* [dpdk-users] Consulting the usage of rte_mb in memif rx/tx path
@ 2019-08-02 11:09 Phil Yang (Arm Technology China)
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From: Phil Yang (Arm Technology China) @ 2019-08-02 11:09 UTC (permalink / raw)
To: jgrajcia, users
Cc: damarion, Honnappa Nagarahalli, Gavin Hu (Arm Technology China), nd
I am trying to understand the rte_mb() in eth_memif_rx/tx functions. What's the purpose of this barrier?
In my understanding, the RX and TX processes are handling in the same core (e.g the testpmd forwarding engine) on each side (Master/Salve).
x86 platform guarantees that all stores are visible in program order and load-load are also in program order. And it has data dependence between the before-rte_mb and the after-rte_mb operation (update ring->head/tail). So why do we need this barrier?
BTW, on Aarch64, the rte_mb() is a 'DSB SY', which will stop the pipeline. So after removed this barrier, the testpmd with memif vPMD got 3.5% performance improvement.
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2019-08-02 11:09 [dpdk-users] Consulting the usage of rte_mb in memif rx/tx path Phil Yang (Arm Technology China)
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