DPDK patches and discussions
 help / color / mirror / Atom feed
From: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>
To: Junfeng Guo <junfeng.guo@intel.com>,
	"qi.z.zhang@intel.com" <qi.z.zhang@intel.com>,
	"jingjing.wu@intel.com" <jingjing.wu@intel.com>,
	"ferruh.yigit@amd.com" <ferruh.yigit@amd.com>,
	"beilei.xing@intel.com" <beilei.xing@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
	"xiaoyun.li@intel.com" <xiaoyun.li@intel.com>,
	"helin.zhang@intel.com" <helin.zhang@intel.com>,
	Rushil Gupta <rushilg@google.com>,
	Jordan Kimbrough <jrkim@google.com>,
	Jeroen de Borst <jeroendb@google.com>, nd <nd@arm.com>,
	nd <nd@arm.com>
Subject: RE: [RFC v2 7/9] net/gve: support basic stats for DQO
Date: Mon, 30 Jan 2023 18:27:16 +0000	[thread overview]
Message-ID: <DBAPR08MB5814CD6CE157EE5B85F5026398D39@DBAPR08MB5814.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20230130062642.3337239-8-junfeng.guo@intel.com>

Few comments inline

> -----Original Message-----
> From: Junfeng Guo <junfeng.guo@intel.com>
> Sent: Monday, January 30, 2023 12:27 AM
> To: qi.z.zhang@intel.com; jingjing.wu@intel.com; ferruh.yigit@amd.com;
> beilei.xing@intel.com
> Cc: dev@dpdk.org; xiaoyun.li@intel.com; helin.zhang@intel.com; Junfeng Guo
> <junfeng.guo@intel.com>; Rushil Gupta <rushilg@google.com>; Jordan
> Kimbrough <jrkim@google.com>; Jeroen de Borst <jeroendb@google.com>
> Subject: [RFC v2 7/9] net/gve: support basic stats for DQO
> 
> Add basic stats support for DQO.
> 
> Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
> Signed-off-by: Rushil Gupta <rushilg@google.com>
> Signed-off-by: Jordan Kimbrough <jrkim@google.com>
> Signed-off-by: Jeroen de Borst <jeroendb@google.com>
> ---
>  drivers/net/gve/gve_ethdev.c | 60 ++++++++++++++++++++++++++++++++++++
>  drivers/net/gve/gve_ethdev.h | 11 +++++++  drivers/net/gve/gve_rx_dqo.c | 12
> +++++++-  drivers/net/gve/gve_tx_dqo.c |  6 ++++
>  4 files changed, 88 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c index
> 89e3f09c37..fae00305f9 100644
> --- a/drivers/net/gve/gve_ethdev.c
> +++ b/drivers/net/gve/gve_ethdev.c
> @@ -369,6 +369,64 @@ gve_dev_info_get(struct rte_eth_dev *dev, struct
> rte_eth_dev_info *dev_info)
>  	return 0;
>  }
> 
> +static int
> +gve_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
> +{
> +	uint16_t i;
> +
> +	for (i = 0; i < dev->data->nb_tx_queues; i++) {
> +		struct gve_tx_queue *txq = dev->data->tx_queues[i];
> +		if (txq == NULL)
> +			continue;
> +
> +		stats->opackets += txq->packets;
> +		stats->obytes += txq->bytes;
> +		stats->oerrors += txq->errors;
> +	}
> +
> +	for (i = 0; i < dev->data->nb_rx_queues; i++) {
> +		struct gve_rx_queue *rxq = dev->data->rx_queues[i];
> +		if (rxq == NULL)
> +			continue;
> +
> +		stats->ipackets += rxq->packets;
> +		stats->ibytes += rxq->bytes;
> +		stats->ierrors += rxq->errors;
> +		stats->rx_nombuf += rxq->no_mbufs;
> +	}
> +
> +	return 0;
> +}
> +
> +static int
> +gve_dev_stats_reset(struct rte_eth_dev *dev) {
> +	uint16_t i;
> +
> +	for (i = 0; i < dev->data->nb_tx_queues; i++) {
> +		struct gve_tx_queue *txq = dev->data->tx_queues[i];
> +		if (txq == NULL)
> +			continue;
> +
> +		txq->packets  = 0;
> +		txq->bytes = 0;
> +		txq->errors = 0;
Do these (similar ones elsewhere) need to be atomic operations? These statistics are being accessed from PMD and the control plane threads.

> +	}
> +
> +	for (i = 0; i < dev->data->nb_rx_queues; i++) {
> +		struct gve_rx_queue *rxq = dev->data->rx_queues[i];
> +		if (rxq == NULL)
> +			continue;
> +
> +		rxq->packets  = 0;
> +		rxq->bytes = 0;
> +		rxq->errors = 0;
> +		rxq->no_mbufs = 0;
> +	}
> +
> +	return 0;
> +}
> +
>  static int
>  gve_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)  { @@ -407,6 +465,8
> @@ static const struct eth_dev_ops gve_eth_dev_ops = {
>  	.rx_queue_release     = gve_rx_queue_release,
>  	.tx_queue_release     = gve_tx_queue_release,
>  	.link_update          = gve_link_update,
> +	.stats_get            = gve_dev_stats_get,
> +	.stats_reset          = gve_dev_stats_reset,
>  	.mtu_set              = gve_dev_mtu_set,
>  };
> 
> diff --git a/drivers/net/gve/gve_ethdev.h b/drivers/net/gve/gve_ethdev.h index
> d434f9babe..2e0f96499d 100644
> --- a/drivers/net/gve/gve_ethdev.h
> +++ b/drivers/net/gve/gve_ethdev.h
> @@ -105,6 +105,11 @@ struct gve_tx_queue {
>  	struct gve_queue_page_list *qpl;
>  	struct gve_tx_iovec *iov_ring;
> 
> +	/* stats items */
> +	uint64_t packets;
> +	uint64_t bytes;
> +	uint64_t errors;
> +
>  	uint16_t port_id;
>  	uint16_t queue_id;
> 
> @@ -156,6 +161,12 @@ struct gve_rx_queue {
>  	/* only valid for GQI_QPL queue format */
>  	struct gve_queue_page_list *qpl;
> 
> +	/* stats items */
> +	uint64_t packets;
> +	uint64_t bytes;
> +	uint64_t errors;
> +	uint64_t no_mbufs;
> +
>  	struct gve_priv *hw;
>  	const struct rte_memzone *qres_mz;
>  	struct gve_queue_resources *qres;
> diff --git a/drivers/net/gve/gve_rx_dqo.c b/drivers/net/gve/gve_rx_dqo.c index
> 244517ce5d..41ead5bd98 100644
> --- a/drivers/net/gve/gve_rx_dqo.c
> +++ b/drivers/net/gve/gve_rx_dqo.c
> @@ -37,6 +37,7 @@ gve_rx_refill_dqo(struct gve_rx_queue *rxq)
>  			next_avail = 0;
>  			rxq->nb_rx_hold -= delta;
>  		} else {
> +			rxq->no_mbufs += nb_desc - next_avail;
>  			dev = &rte_eth_devices[rxq->port_id];
>  			dev->data->rx_mbuf_alloc_failed += nb_desc -
> next_avail;
>  			PMD_DRV_LOG(DEBUG, "RX mbuf alloc failed
> port_id=%u queue_id=%u", @@ -57,6 +58,7 @@ gve_rx_refill_dqo(struct
> gve_rx_queue *rxq)
>  			next_avail += nb_refill;
>  			rxq->nb_rx_hold -= nb_refill;
>  		} else {
> +			rxq->no_mbufs += nb_desc - next_avail;
>  			dev = &rte_eth_devices[rxq->port_id];
>  			dev->data->rx_mbuf_alloc_failed += nb_desc -
> next_avail;
>  			PMD_DRV_LOG(DEBUG, "RX mbuf alloc failed
> port_id=%u queue_id=%u", @@ -80,7 +82,9 @@ gve_rx_burst_dqo(void
> *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
>  	uint16_t pkt_len;
>  	uint16_t rx_id;
>  	uint16_t nb_rx;
> +	uint64_t bytes;
> 
> +	bytes = 0;
>  	nb_rx = 0;
>  	rxq = rx_queue;
>  	rx_id = rxq->rx_tail;
> @@ -94,8 +98,10 @@ gve_rx_burst_dqo(void *rx_queue, struct rte_mbuf
> **rx_pkts, uint16_t nb_pkts)
>  		if (rx_desc->generation != rxq->cur_gen_bit)
>  			break;
> 
> -		if (unlikely(rx_desc->rx_error))
> +		if (unlikely(rx_desc->rx_error)) {
> +			rxq->errors++;
>  			continue;
> +		}
> 
>  		pkt_len = rx_desc->packet_len;
> 
> @@ -120,6 +126,7 @@ gve_rx_burst_dqo(void *rx_queue, struct rte_mbuf
> **rx_pkts, uint16_t nb_pkts)
>  		rxm->hash.rss = rte_be_to_cpu_32(rx_desc->hash);
> 
>  		rx_pkts[nb_rx++] = rxm;
> +		bytes += pkt_len;
>  	}
> 
>  	if (nb_rx > 0) {
> @@ -128,6 +135,9 @@ gve_rx_burst_dqo(void *rx_queue, struct rte_mbuf
> **rx_pkts, uint16_t nb_pkts)
>  			rxq->next_avail = rx_id_bufq;
> 
>  		gve_rx_refill_dqo(rxq);
> +
> +		rxq->packets += nb_rx;
> +		rxq->bytes += bytes;
Similarly here, these should be atomic operations.

>  	}
> 
>  	return nb_rx;
> diff --git a/drivers/net/gve/gve_tx_dqo.c b/drivers/net/gve/gve_tx_dqo.c index
> 3583c82246..9c1361c894 100644
> --- a/drivers/net/gve/gve_tx_dqo.c
> +++ b/drivers/net/gve/gve_tx_dqo.c
> @@ -80,10 +80,12 @@ gve_tx_burst_dqo(void *tx_queue, struct rte_mbuf
> **tx_pkts, uint16_t nb_pkts)
>  	uint16_t nb_used;
>  	uint16_t tx_id;
>  	uint16_t sw_id;
> +	uint64_t bytes;
> 
>  	sw_ring = txq->sw_ring;
>  	txr = txq->tx_ring;
> 
> +	bytes = 0;
>  	mask = txq->nb_tx_desc - 1;
>  	sw_mask = txq->sw_size - 1;
>  	tx_id = txq->tx_tail;
> @@ -118,6 +120,7 @@ gve_tx_burst_dqo(void *tx_queue, struct rte_mbuf
> **tx_pkts, uint16_t nb_pkts)
>  			tx_id = (tx_id + 1) & mask;
>  			sw_id = (sw_id + 1) & sw_mask;
> 
> +			bytes += tx_pkt->pkt_len;
>  			tx_pkt = tx_pkt->next;
>  		} while (tx_pkt);
> 
> @@ -141,6 +144,9 @@ gve_tx_burst_dqo(void *tx_queue, struct rte_mbuf
> **tx_pkts, uint16_t nb_pkts)
>  		rte_write32(tx_id, txq->qtx_tail);
>  		txq->tx_tail = tx_id;
>  		txq->sw_tail = sw_id;
> +
> +		txq->packets += nb_tx;
> +		txq->bytes += bytes;
>  	}
> 
>  	return nb_tx;
> --
> 2.34.1


  reply	other threads:[~2023-01-30 18:27 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-18  2:53 [RFC 0/8] gve PMD enhancement Junfeng Guo
2023-01-18  2:53 ` [RFC 1/8] net/gve: add Rx queue setup for DQO Junfeng Guo
2023-01-18  2:53 ` [RFC 2/8] net/gve: support device start and close " Junfeng Guo
2023-01-18  2:53 ` [RFC 3/8] net/gve: support queue release and stop " Junfeng Guo
2023-01-18  2:53 ` [RFC 4/8] net/gve: support basic Tx data path " Junfeng Guo
2023-01-18  2:53 ` [RFC 5/8] net/gve: support basic Rx " Junfeng Guo
2023-01-18  2:53 ` [RFC 6/8] net/gve: support basic stats " Junfeng Guo
2023-01-18  2:53 ` [RFC 7/8] net/gve: support jumbo frame for GQI Junfeng Guo
2023-01-18  2:53 ` [RFC 8/8] net/gve: add AdminQ command to verify driver compatibility Junfeng Guo
2023-01-25 13:37 ` [RFC 0/8] gve PMD enhancement Li, Xiaoyun
2023-01-30  6:26 ` [RFC v2 0/9] " Junfeng Guo
2023-01-30  6:26   ` [RFC v2 1/9] net/gve: add Tx queue setup for DQO Junfeng Guo
2023-01-30  6:26   ` [RFC v2 2/9] net/gve: add Rx " Junfeng Guo
2023-01-30  6:26   ` [RFC v2 3/9] net/gve: support device start and close " Junfeng Guo
2023-01-30  6:26   ` [RFC v2 4/9] net/gve: support queue release and stop " Junfeng Guo
2023-01-30  6:26   ` [RFC v2 5/9] net/gve: support basic Tx data path " Junfeng Guo
2023-01-30  6:26   ` [RFC v2 6/9] net/gve: support basic Rx " Junfeng Guo
2023-01-30 18:32     ` Honnappa Nagarahalli
2023-01-30  6:26   ` [RFC v2 7/9] net/gve: support basic stats " Junfeng Guo
2023-01-30 18:27     ` Honnappa Nagarahalli [this message]
2023-01-30  6:26   ` [RFC v2 8/9] net/gve: support jumbo frame for GQI Junfeng Guo
2023-01-30  6:26   ` [RFC v2 9/9] net/gve: add AdminQ command to verify driver compatibility Junfeng Guo
2023-02-17  7:32   ` [RFC v3 00/10] gve PMD enhancement Junfeng Guo
2023-02-17  7:32     ` [RFC v3 01/10] net/gve: add Tx queue setup for DQO Junfeng Guo
2023-02-17  7:32     ` [RFC v3 02/10] net/gve: add Rx " Junfeng Guo
2023-02-17  7:32     ` [RFC v3 03/10] net/gve: support device start and close " Junfeng Guo
2023-02-17  7:32     ` [RFC v3 04/10] net/gve: support queue release and stop " Junfeng Guo
2023-02-17  7:32     ` [RFC v3 05/10] net/gve: support basic Tx data path " Junfeng Guo
2023-02-17  7:32     ` [RFC v3 06/10] net/gve: support basic Rx " Junfeng Guo
2023-02-17 15:17       ` Honnappa Nagarahalli
2023-02-23  5:32         ` Guo, Junfeng
2023-02-17  7:32     ` [RFC v3 07/10] net/gve: support basic stats " Junfeng Guo
2023-02-17 15:28       ` Honnappa Nagarahalli
2023-02-17  7:32     ` [RFC v3 08/10] net/gve: enable Tx checksum offload " Junfeng Guo
2023-02-17  7:32     ` [RFC v3 09/10] net/gve: support jumbo frame for GQI Junfeng Guo
2023-02-17  7:32     ` [RFC v3 10/10] net/gve: add AdminQ command to verify driver compatibility Junfeng Guo

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=DBAPR08MB5814CD6CE157EE5B85F5026398D39@DBAPR08MB5814.eurprd08.prod.outlook.com \
    --to=honnappa.nagarahalli@arm.com \
    --cc=beilei.xing@intel.com \
    --cc=dev@dpdk.org \
    --cc=ferruh.yigit@amd.com \
    --cc=helin.zhang@intel.com \
    --cc=jeroendb@google.com \
    --cc=jingjing.wu@intel.com \
    --cc=jrkim@google.com \
    --cc=junfeng.guo@intel.com \
    --cc=nd@arm.com \
    --cc=qi.z.zhang@intel.com \
    --cc=rushilg@google.com \
    --cc=xiaoyun.li@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).