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From: "Sexton, Rory" <rory.sexton@intel.com>
To: "Wu, Jingjing" <jingjing.wu@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
	"Marjanovic, Nemanja" <nemanja.marjanovic@intel.com>
Subject: Re: [dpdk-dev] [PATCH v2] net/i40e: set no drop for traffic class
Date: Thu, 19 Jan 2017 10:38:00 +0000	[thread overview]
Message-ID: <EAC303C93824C94DB804849C22B752B30D2D491A@IRSMSX104.ger.corp.intel.com> (raw)
In-Reply-To: <9BB6961774997848B5B42BEC655768F810CCA338@SHSMSX103.ccr.corp.intel.com>

Perhaps the best solution is as suggested to set
rte_eth_conf.dcb_capability_en = ETH_DCB_PFC_SUPPORT
rte_eth_conf.rxmode.mq_mode = ETH_MQ_RX_DCB_FLAG
and set rte_eth_dcb_rx_conf.nb_tcs to the number of tc's to apply
Using this port configuration will give the same behavior of the patch and it removes the need for an API change.

Rory

-----Original Message-----
From: Wu, Jingjing 
Sent: Tuesday, January 17, 2017 3:09 PM
To: Sexton, Rory <rory.sexton@intel.com>
Cc: dev@dpdk.org; Marjanovic, Nemanja <nemanja.marjanovic@intel.com>
Subject: RE: [PATCH v2] net/i40e: set no drop for traffic class



> -----Original Message-----
> From: Sexton, Rory
> Sent: Monday, January 16, 2017 11:52 PM
> To: Wu, Jingjing <jingjing.wu@intel.com>
> Cc: dev@dpdk.org; Sexton, Rory <rory.sexton@intel.com>; Marjanovic, 
> Nemanja <nemanja.marjanovic@intel.com>
> Subject: [PATCH v2] net/i40e: set no drop for traffic class
> 
> From: Rory Sexton <rory.sexton@intel.com>
> 
> The default traffic class in i40e is set to drop versus on ixgbe it 
> isset to no drop. This means when packets build up in the RX SRAM on 
> the NIC, they are dropped, and they do this when the SW descriptor rings fill up.
> 
> This patch changes this behaviour and our testing shows there are no 
> drops as a result.
> 
> Signed-off-by: Rory Sexton <rory.sexton@intel.com>
> Signed-off-by: Nemanja Marjanovic <nemanja.marjanovic@intel.com>
> ---
> v2:
> * Changed to use existing api to set priority register directly.
> 
>  drivers/net/i40e/i40e_ethdev.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/net/i40e/i40e_ethdev.c 
> b/drivers/net/i40e/i40e_ethdev.c index 67778ba..97339b5 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -2985,8 +2985,11 @@ static int
>  i40e_priority_flow_ctrl_set(__rte_unused struct rte_eth_dev *dev,
>  			    __rte_unused struct rte_eth_pfc_conf *pfc_conf) {
> +	struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data-
> >dev_private);
> +
>  	PMD_INIT_FUNC_TRACE();
> 
> +	I40E_WRITE_REG(hw, I40E_PRTDCB_TC2PFC, 0xff);

PRTDCB_TC2PFC  is the Bitmap who controls the use of Priority Flow Control (PFC) per each TC. Bit n set to 1b indicates TC n uses PFC in Rx and Tx. The TC is referred as a no-drop TC.

And if look the rte_eth_pfc_conf, there is a field called priority, which would map to a TC.
Currently, the TC and priority is 1:1 map when dcb is enabled.
So how about change it like:
Check dcb info, and map the priority to tc, then val = 0x1 << tc; I40E_WRITE_REG(hw, I40E_PRTDCB_TC2PFC, val);

Thanks
Jingjing



>  	return -ENOSYS;
>  }
> 
> --
> 2.4.3

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  reply	other threads:[~2017-01-19 10:40 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-04 13:54 [dpdk-dev] [PATCH v1] " Rory Sexton
2016-12-05  8:44 ` Wu, Jingjing
2016-12-09 14:02   ` Sexton, Rory
2016-12-26  8:45     ` Wu, Jingjing
2017-01-16 15:52       ` [dpdk-dev] [PATCH v2] " rory.sexton
2017-01-17 15:09         ` Wu, Jingjing
2017-01-19 10:38           ` Sexton, Rory [this message]
2017-02-07 15:25             ` Wu, Jingjing
2017-02-09 15:34               ` Ferruh Yigit

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