From: Shijith Thotton <sthotton@marvell.com>
To: Olivier Matz <olivier.matz@6wind.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com>,
"Honnappa.Nagarahalli@arm.com" <Honnappa.Nagarahalli@arm.com>,
"bruce.richardson@intel.com" <bruce.richardson@intel.com>,
Jerin Jacob Kollanukkaran <jerinj@marvell.com>,
"mb@smartsharesystems.com" <mb@smartsharesystems.com>,
"stephen@networkplumber.org" <stephen@networkplumber.org>,
"thomas@monjalon.net" <thomas@monjalon.net>,
"david.marchand@redhat.com" <david.marchand@redhat.com>,
Ruifeng Wang <ruifeng.wang@arm.com>,
Jan Viktorin <viktorin@rehivetech.com>,
Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar Kokkilagadda <kirankumark@marvell.com>,
Sunil Kumar Kori <skori@marvell.com>,
Satha Koteswara Rao Kottidi <skoteshwar@marvell.com>,
Ankur Dwivedi <adwivedi@marvell.com>,
Anoob Joseph <anoobj@marvell.com>,
Tejasree Kondoj <ktejasree@marvell.com>,
Radha Chintakuntla <radhac@marvell.com>,
Veerasenareddy Burru <vburru@marvell.com>,
Ashwin Sekhar T K <asekhar@marvell.com>,
Jakub Palider <jpalider@marvell.com>,
Tomasz Duszynski <tduszynski@marvell.com>
Subject: RE: [EXT] Re: [PATCH v3 4/5] drivers: mark Marvell cnxk PMDs work with IOVA as VA
Date: Thu, 29 Sep 2022 06:19:32 +0000 [thread overview]
Message-ID: <PH0PR18MB44257291EA2245B9FDC16981D9579@PH0PR18MB4425.namprd18.prod.outlook.com> (raw)
In-Reply-To: <YzRDr8YuO4GqOkB3@platinum>
>> Enabled the flag pmd_iova_as_va in cnxk driver build files as they work
>> with IOVA as VA. Updated cn9k and cn10k soc build configurations to
>> enable the IOVA as VA build by default.
>>
>> Signed-off-by: Shijith Thotton <sthotton@marvell.com>
>> ---
>> config/arm/meson.build | 8 +++-
>> drivers/common/cnxk/meson.build | 1 +
>> drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 4 +-
>> drivers/crypto/cnxk/cn9k_ipsec_la_ops.h | 2 +-
>> drivers/crypto/cnxk/meson.build | 2 +
>> drivers/dma/cnxk/meson.build | 1 +
>> drivers/event/cnxk/meson.build | 1 +
>> drivers/mempool/cnxk/meson.build | 1 +
>> drivers/net/cnxk/cn10k_tx.h | 55 +++++++-----------------
>> drivers/net/cnxk/cn9k_tx.h | 55 +++++++-----------------
>> drivers/net/cnxk/cnxk_ethdev.h | 1 -
>> drivers/net/cnxk/meson.build | 1 +
>> drivers/raw/cnxk_bphy/meson.build | 1 +
>> drivers/raw/cnxk_gpio/meson.build | 1 +
>> 14 files changed, 50 insertions(+), 84 deletions(-)
>>
>> diff --git a/config/arm/meson.build b/config/arm/meson.build
>> index 9f1636e0d5..4e95e8b388 100644
>> --- a/config/arm/meson.build
>> +++ b/config/arm/meson.build
>> @@ -294,7 +294,8 @@ soc_cn10k = {
>> 'flags': [
>> ['RTE_MAX_LCORE', 24],
>> ['RTE_MAX_NUMA_NODES', 1],
>> - ['RTE_MEMPOOL_ALIGN', 128]
>> + ['RTE_MEMPOOL_ALIGN', 128],
>> + ['RTE_IOVA_AS_VA', 1]
>> ],
>> 'part_number': '0xd49',
>> 'extra_march_features': ['crypto'],
>> @@ -370,7 +371,10 @@ soc_cn9k = {
>> 'description': 'Marvell OCTEON 9',
>> 'implementer': '0x43',
>> 'part_number': '0xb2',
>> - 'numa': false
>> + 'numa': false,
>> + 'flags': [
>> + ['RTE_IOVA_AS_VA', 1]
>> + ]
>> }
>
>I think this could go in a separate patch: "disable IOVA as PA for octeontx2/3"
>
>The reason is that this patch clearly breaks the API (m->buf_iova field
>becomes invalid) and the ABI (mbuf fields are moved) for these
>architectures. This ABI breakage has to be advertised in the release
>note. In fact, it should have been advertised before, but I suppose it
>does not impact general purpose arm distributions, so I guess it is ok.
>
>One other thing to highlight: enabling RTE_IOVA_AS_VA means that it
>disable all drivers that do not have the pmd_iova_as_va flag. Are there
>use-cases where drivers other than cnxk are used? For instance, is there
>a PCI bus which is likely to be used by a driver/* ?
>
All always enable drivers are enabled in this mode, which include
bus/pci, bus/vdev and mempool/ring.
>>
>> soc_stingray = {
>> diff --git a/drivers/common/cnxk/meson.build
>b/drivers/common/cnxk/meson.build
>> index 6f808271d1..d019cfa8d1 100644
>> --- a/drivers/common/cnxk/meson.build
>> +++ b/drivers/common/cnxk/meson.build
>> @@ -86,3 +86,4 @@ sources += files('cnxk_telemetry_bphy.c',
>> )
>>
>> deps += ['bus_pci', 'net', 'telemetry']
>> +pmd_iova_as_va = true
>> diff --git a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h
>b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h
>> index 66cfe6ca98..16db14344d 100644
>> --- a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h
>> +++ b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h
>> @@ -85,7 +85,7 @@ process_outb_sa(struct roc_cpt_lf *lf, struct rte_crypto_op
>*cop,
>>
>> /* Prepare CPT instruction */
>> inst->w4.u64 = inst_w4_u64 | rte_pktmbuf_pkt_len(m_src);
>> - dptr = rte_pktmbuf_iova(m_src);
>> + dptr = rte_pktmbuf_mtod(m_src, uint64_t);
>> inst->dptr = dptr;
>> inst->rptr = dptr;
>>
>> @@ -102,7 +102,7 @@ process_inb_sa(struct rte_crypto_op *cop, struct
>cn10k_ipsec_sa *sa,
>>
>> /* Prepare CPT instruction */
>> inst->w4.u64 = sa->inst.w4 | rte_pktmbuf_pkt_len(m_src);
>> - dptr = rte_pktmbuf_iova(m_src);
>> + dptr = rte_pktmbuf_mtod(m_src, uint64_t);
>> inst->dptr = dptr;
>> inst->rptr = dptr;
>>
>> diff --git a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
>b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
>> index e469596756..8b68e4c728 100644
>> --- a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
>> +++ b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h
>> @@ -99,7 +99,7 @@ process_inb_sa(struct rte_crypto_op *cop, struct
>cn9k_ipsec_sa *sa,
>>
>> /* Prepare CPT instruction */
>> inst->w4.u64 = sa->inst.w4 | rte_pktmbuf_pkt_len(m_src);
>> - inst->dptr = inst->rptr = rte_pktmbuf_iova(m_src);
>> + inst->dptr = inst->rptr = rte_pktmbuf_mtod(m_src, uint64_t);
>> inst->w7.u64 = sa->inst.w7;
>> }
>> #endif /* __CN9K_IPSEC_LA_OPS_H__ */
>> diff --git a/drivers/crypto/cnxk/meson.build b/drivers/crypto/cnxk/meson.build
>> index 23a1cc3aac..764e7bb99a 100644
>> --- a/drivers/crypto/cnxk/meson.build
>> +++ b/drivers/crypto/cnxk/meson.build
>> @@ -31,3 +31,5 @@ if get_option('buildtype').contains('debug')
>> else
>> cflags += [ '-ULA_IPSEC_DEBUG' ]
>> endif
>> +
>> +pmd_iova_as_va = true
>> diff --git a/drivers/dma/cnxk/meson.build b/drivers/dma/cnxk/meson.build
>> index d4be4ee860..ef0e3db109 100644
>> --- a/drivers/dma/cnxk/meson.build
>> +++ b/drivers/dma/cnxk/meson.build
>> @@ -3,3 +3,4 @@
>>
>> deps += ['bus_pci', 'common_cnxk', 'dmadev']
>> sources = files('cnxk_dmadev.c')
>> +pmd_iova_as_va = true
>> diff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build
>> index b27bae7b12..650d0d4256 100644
>> --- a/drivers/event/cnxk/meson.build
>> +++ b/drivers/event/cnxk/meson.build
>> @@ -479,3 +479,4 @@ foreach flag: extra_flags
>> endforeach
>>
>> deps += ['bus_pci', 'common_cnxk', 'net_cnxk', 'crypto_cnxk']
>> +pmd_iova_as_va = true
>> diff --git a/drivers/mempool/cnxk/meson.build
>b/drivers/mempool/cnxk/meson.build
>> index d5d1978569..a328176457 100644
>> --- a/drivers/mempool/cnxk/meson.build
>> +++ b/drivers/mempool/cnxk/meson.build
>> @@ -17,3 +17,4 @@ sources = files(
>> )
>>
>> deps += ['eal', 'mbuf', 'kvargs', 'bus_pci', 'common_cnxk', 'mempool']
>> +pmd_iova_as_va = true
>> diff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h
>> index ea13866b20..2ef62da132 100644
>> --- a/drivers/net/cnxk/cn10k_tx.h
>> +++ b/drivers/net/cnxk/cn10k_tx.h
>> @@ -1775,14 +1775,6 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue,
>uint64_t *ws,
>> mbuf2 = (uint64_t *)tx_pkts[2];
>> mbuf3 = (uint64_t *)tx_pkts[3];
>>
>> - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 +
>> - offsetof(struct rte_mbuf, buf_iova));
>> - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 +
>> - offsetof(struct rte_mbuf, buf_iova));
>> - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 +
>> - offsetof(struct rte_mbuf, buf_iova));
>> - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 +
>> - offsetof(struct rte_mbuf, buf_iova));
>> /*
>> * Get mbuf's, olflags, iova, pktlen, dataoff
>> * dataoff_iovaX.D[0] = iova,
>> @@ -1790,28 +1782,24 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue,
>uint64_t *ws,
>> * len_olflagsX.D[0] = ol_flags,
>> * len_olflagsX.D[1](63:32) = mbuf->pkt_len
>> */
>> - dataoff_iova0 = vld1q_u64(mbuf0);
>> - len_olflags0 = vld1q_u64(mbuf0 + 2);
>> - dataoff_iova1 = vld1q_u64(mbuf1);
>> - len_olflags1 = vld1q_u64(mbuf1 + 2);
>> - dataoff_iova2 = vld1q_u64(mbuf2);
>> - len_olflags2 = vld1q_u64(mbuf2 + 2);
>> - dataoff_iova3 = vld1q_u64(mbuf3);
>> - len_olflags3 = vld1q_u64(mbuf3 + 2);
>> + dataoff_iova0 =
>> + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off,
>vld1q_u64(mbuf0), 1);
>> + len_olflags0 = vld1q_u64(mbuf0 + 3);
>> + dataoff_iova1 =
>> + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off,
>vld1q_u64(mbuf1), 1);
>> + len_olflags1 = vld1q_u64(mbuf1 + 3);
>> + dataoff_iova2 =
>> + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off,
>vld1q_u64(mbuf2), 1);
>> + len_olflags2 = vld1q_u64(mbuf2 + 3);
>> + dataoff_iova3 =
>> + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off,
>vld1q_u64(mbuf3), 1);
>> + len_olflags3 = vld1q_u64(mbuf3 + 3);
>>
>> /* Move mbufs to point pool */
>> - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 +
>> - offsetof(struct rte_mbuf, pool) -
>> - offsetof(struct rte_mbuf, buf_iova));
>> - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 +
>> - offsetof(struct rte_mbuf, pool) -
>> - offsetof(struct rte_mbuf, buf_iova));
>> - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 +
>> - offsetof(struct rte_mbuf, pool) -
>> - offsetof(struct rte_mbuf, buf_iova));
>> - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 +
>> - offsetof(struct rte_mbuf, pool) -
>> - offsetof(struct rte_mbuf, buf_iova));
>> + mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + offsetof(struct rte_mbuf,
>pool));
>> + mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + offsetof(struct rte_mbuf,
>pool));
>> + mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + offsetof(struct rte_mbuf,
>pool));
>> + mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + offsetof(struct rte_mbuf,
>pool));
>>
>> if (flags & (NIX_TX_OFFLOAD_OL3_OL4_CSUM_F |
>> NIX_TX_OFFLOAD_L3_L4_CSUM_F)) {
>> @@ -1861,17 +1849,6 @@ cn10k_nix_xmit_pkts_vector(void *tx_queue,
>uint64_t *ws,
>> xtmp128 = vzip2q_u64(len_olflags0, len_olflags1);
>> ytmp128 = vzip2q_u64(len_olflags2, len_olflags3);
>>
>> - /* Clear dataoff_iovaX.D[1] bits other than dataoff(15:0) */
>> - const uint64x2_t and_mask0 = {
>> - 0xFFFFFFFFFFFFFFFF,
>> - 0x000000000000FFFF,
>> - };
>> -
>> - dataoff_iova0 = vandq_u64(dataoff_iova0, and_mask0);
>> - dataoff_iova1 = vandq_u64(dataoff_iova1, and_mask0);
>> - dataoff_iova2 = vandq_u64(dataoff_iova2, and_mask0);
>> - dataoff_iova3 = vandq_u64(dataoff_iova3, and_mask0);
>> -
>> /*
>> * Pick only 16 bits of pktlen preset at bits 63:32
>> * and place them at bits 15:0.
>> diff --git a/drivers/net/cnxk/cn9k_tx.h b/drivers/net/cnxk/cn9k_tx.h
>> index 6ce81f5c96..f5d99ccb5a 100644
>> --- a/drivers/net/cnxk/cn9k_tx.h
>> +++ b/drivers/net/cnxk/cn9k_tx.h
>> @@ -1005,14 +1005,6 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct
>rte_mbuf **tx_pkts,
>> mbuf2 = (uint64_t *)tx_pkts[2];
>> mbuf3 = (uint64_t *)tx_pkts[3];
>>
>> - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 +
>> - offsetof(struct rte_mbuf, buf_iova));
>> - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 +
>> - offsetof(struct rte_mbuf, buf_iova));
>> - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 +
>> - offsetof(struct rte_mbuf, buf_iova));
>> - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 +
>> - offsetof(struct rte_mbuf, buf_iova));
>> /*
>> * Get mbuf's, olflags, iova, pktlen, dataoff
>> * dataoff_iovaX.D[0] = iova,
>> @@ -1020,28 +1012,24 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct
>rte_mbuf **tx_pkts,
>> * len_olflagsX.D[0] = ol_flags,
>> * len_olflagsX.D[1](63:32) = mbuf->pkt_len
>> */
>> - dataoff_iova0 = vld1q_u64(mbuf0);
>> - len_olflags0 = vld1q_u64(mbuf0 + 2);
>> - dataoff_iova1 = vld1q_u64(mbuf1);
>> - len_olflags1 = vld1q_u64(mbuf1 + 2);
>> - dataoff_iova2 = vld1q_u64(mbuf2);
>> - len_olflags2 = vld1q_u64(mbuf2 + 2);
>> - dataoff_iova3 = vld1q_u64(mbuf3);
>> - len_olflags3 = vld1q_u64(mbuf3 + 2);
>> + dataoff_iova0 =
>> + vsetq_lane_u64(((struct rte_mbuf *)mbuf0)->data_off,
>vld1q_u64(mbuf0), 1);
>> + len_olflags0 = vld1q_u64(mbuf0 + 3);
>> + dataoff_iova1 =
>> + vsetq_lane_u64(((struct rte_mbuf *)mbuf1)->data_off,
>vld1q_u64(mbuf1), 1);
>> + len_olflags1 = vld1q_u64(mbuf1 + 3);
>> + dataoff_iova2 =
>> + vsetq_lane_u64(((struct rte_mbuf *)mbuf2)->data_off,
>vld1q_u64(mbuf2), 1);
>> + len_olflags2 = vld1q_u64(mbuf2 + 3);
>> + dataoff_iova3 =
>> + vsetq_lane_u64(((struct rte_mbuf *)mbuf3)->data_off,
>vld1q_u64(mbuf3), 1);
>> + len_olflags3 = vld1q_u64(mbuf3 + 3);
>>
>> /* Move mbufs to point pool */
>> - mbuf0 = (uint64_t *)((uintptr_t)mbuf0 +
>> - offsetof(struct rte_mbuf, pool) -
>> - offsetof(struct rte_mbuf, buf_iova));
>> - mbuf1 = (uint64_t *)((uintptr_t)mbuf1 +
>> - offsetof(struct rte_mbuf, pool) -
>> - offsetof(struct rte_mbuf, buf_iova));
>> - mbuf2 = (uint64_t *)((uintptr_t)mbuf2 +
>> - offsetof(struct rte_mbuf, pool) -
>> - offsetof(struct rte_mbuf, buf_iova));
>> - mbuf3 = (uint64_t *)((uintptr_t)mbuf3 +
>> - offsetof(struct rte_mbuf, pool) -
>> - offsetof(struct rte_mbuf, buf_iova));
>> + mbuf0 = (uint64_t *)((uintptr_t)mbuf0 + offsetof(struct rte_mbuf,
>pool));
>> + mbuf1 = (uint64_t *)((uintptr_t)mbuf1 + offsetof(struct rte_mbuf,
>pool));
>> + mbuf2 = (uint64_t *)((uintptr_t)mbuf2 + offsetof(struct rte_mbuf,
>pool));
>> + mbuf3 = (uint64_t *)((uintptr_t)mbuf3 + offsetof(struct rte_mbuf,
>pool));
>>
>> if (flags & (NIX_TX_OFFLOAD_OL3_OL4_CSUM_F |
>> NIX_TX_OFFLOAD_L3_L4_CSUM_F)) {
>> @@ -1091,17 +1079,6 @@ cn9k_nix_xmit_pkts_vector(void *tx_queue, struct
>rte_mbuf **tx_pkts,
>> xtmp128 = vzip2q_u64(len_olflags0, len_olflags1);
>> ytmp128 = vzip2q_u64(len_olflags2, len_olflags3);
>>
>> - /* Clear dataoff_iovaX.D[1] bits other than dataoff(15:0) */
>> - const uint64x2_t and_mask0 = {
>> - 0xFFFFFFFFFFFFFFFF,
>> - 0x000000000000FFFF,
>> - };
>> -
>> - dataoff_iova0 = vandq_u64(dataoff_iova0, and_mask0);
>> - dataoff_iova1 = vandq_u64(dataoff_iova1, and_mask0);
>> - dataoff_iova2 = vandq_u64(dataoff_iova2, and_mask0);
>> - dataoff_iova3 = vandq_u64(dataoff_iova3, and_mask0);
>> -
>> /*
>> * Pick only 16 bits of pktlen preset at bits 63:32
>> * and place them at bits 15:0.
>> diff --git a/drivers/net/cnxk/cnxk_ethdev.h b/drivers/net/cnxk/cnxk_ethdev.h
>> index 4cb7c9e90c..abf1e4215f 100644
>> --- a/drivers/net/cnxk/cnxk_ethdev.h
>> +++ b/drivers/net/cnxk/cnxk_ethdev.h
>> @@ -690,7 +690,6 @@ cnxk_pktmbuf_detach(struct rte_mbuf *m)
>>
>> m->priv_size = priv_size;
>> m->buf_addr = (char *)m + mbuf_size;
>> - m->buf_iova = rte_mempool_virt2iova(m) + mbuf_size;
>> m->buf_len = (uint16_t)buf_len;
>> rte_pktmbuf_reset_headroom(m);
>> m->data_len = 0;
>> diff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build
>> index f347e98fce..01489b3a36 100644
>> --- a/drivers/net/cnxk/meson.build
>> +++ b/drivers/net/cnxk/meson.build
>> @@ -194,3 +194,4 @@ foreach flag: extra_flags
>> endforeach
>>
>> headers = files('rte_pmd_cnxk.h')
>> +pmd_iova_as_va = true
>> diff --git a/drivers/raw/cnxk_bphy/meson.build
>b/drivers/raw/cnxk_bphy/meson.build
>> index 14147feaf4..781ed63e05 100644
>> --- a/drivers/raw/cnxk_bphy/meson.build
>> +++ b/drivers/raw/cnxk_bphy/meson.build
>> @@ -10,3 +10,4 @@ sources = files(
>> 'cnxk_bphy_irq.c',
>> )
>> headers = files('rte_pmd_bphy.h')
>> +pmd_iova_as_va = true
>> diff --git a/drivers/raw/cnxk_gpio/meson.build
>b/drivers/raw/cnxk_gpio/meson.build
>> index a75a5b9084..f9aed173b6 100644
>> --- a/drivers/raw/cnxk_gpio/meson.build
>> +++ b/drivers/raw/cnxk_gpio/meson.build
>> @@ -9,3 +9,4 @@ sources = files(
>> 'cnxk_gpio_selftest.c',
>> )
>> headers = files('rte_pmd_cnxk_gpio.h')
>> +pmd_iova_as_va = true
>> --
>> 2.25.1
>>
next prev parent reply other threads:[~2022-09-29 6:19 UTC|newest]
Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-30 16:25 [PATCH] mbuf: add mbuf physical address field to dynamic field Shijith Thotton
2022-06-30 16:45 ` Stephen Hemminger
2022-07-01 12:16 ` Shijith Thotton
2022-07-01 12:24 ` Shijith Thotton
2022-07-03 7:31 ` Morten Brørup
2022-07-04 14:00 ` Bruce Richardson
2022-08-03 15:34 ` [EXT] " Shijith Thotton
2022-08-29 15:16 ` [PATCH v1 0/4] mbuf dynamic field expansion Shijith Thotton
2022-09-07 13:43 ` [PATCH v2 0/5] " Shijith Thotton
2022-09-21 9:43 ` David Marchand
2022-09-21 14:01 ` [EXT] " Shijith Thotton
2022-09-21 13:56 ` [PATCH v3 " Shijith Thotton
2022-09-21 13:56 ` [PATCH v3 1/5] build: add meson option to configure IOVA mode as VA Shijith Thotton
2022-09-28 12:52 ` Olivier Matz
2022-09-29 5:48 ` [EXT] " Shijith Thotton
2022-09-21 13:56 ` [PATCH v3 2/5] mbuf: add second dynamic field member for VA only build Shijith Thotton
2022-09-28 7:24 ` Thomas Monjalon
2022-09-28 12:52 ` Olivier Matz
2022-09-28 19:33 ` Thomas Monjalon
2022-09-28 19:48 ` Stephen Hemminger
2022-09-29 6:13 ` [EXT] " Shijith Thotton
2022-09-28 12:52 ` Olivier Matz
2022-09-21 13:56 ` [PATCH v3 3/5] lib: move mbuf next pointer to first cache line Shijith Thotton
2022-09-21 14:07 ` Morten Brørup
2022-09-28 12:52 ` Olivier Matz
2022-09-29 6:14 ` [EXT] " Shijith Thotton
2022-09-21 13:56 ` [PATCH v3 4/5] drivers: mark Marvell cnxk PMDs work with IOVA as VA Shijith Thotton
2022-09-28 12:53 ` Olivier Matz
2022-09-29 6:19 ` Shijith Thotton [this message]
2022-09-29 7:44 ` [EXT] " Olivier Matz
2022-09-29 8:10 ` Shijith Thotton
2022-10-07 20:17 ` Olivier Matz
2022-10-07 20:22 ` [EXT] " Shijith Thotton
2022-09-21 13:56 ` [PATCH v3 5/5] drivers: mark software " Shijith Thotton
2022-09-28 5:41 ` [PATCH v3 0/5] mbuf dynamic field expansion Shijith Thotton
2022-09-28 12:52 ` Olivier Matz
2022-09-29 4:51 ` [EXT] " Shijith Thotton
2022-10-07 13:50 ` Thomas Monjalon
2022-10-07 19:35 ` [EXT] " Shijith Thotton
2022-10-07 19:30 ` [PATCH v4 0/7] " Shijith Thotton
2022-10-07 19:30 ` [PATCH v4 1/7] mbuf: add API to get and set mbuf physical address Shijith Thotton
2022-10-07 20:16 ` Olivier Matz
2022-10-07 20:20 ` [EXT] " Shijith Thotton
2022-10-07 19:30 ` [PATCH v4 2/7] test/dma: use API to get mbuf data " Shijith Thotton
2022-10-07 20:17 ` Olivier Matz
2022-10-07 19:30 ` [PATCH v4 3/7] build: add meson option to configure IOVA mode as PA Shijith Thotton
2022-10-07 19:30 ` [PATCH v4 4/7] mbuf: add second dynamic field member Shijith Thotton
2022-10-07 19:30 ` [PATCH v4 5/7] lib: move mbuf next pointer to first cache line Shijith Thotton
2022-10-07 19:30 ` [PATCH v4 6/7] drivers: mark cnxk PMDs work with IOVA as PA disabled Shijith Thotton
2022-10-07 19:30 ` [PATCH v4 7/7] drivers: mark software " Shijith Thotton
2022-10-07 20:19 ` [PATCH v4 0/7] mbuf dynamic field expansion Olivier Matz
2022-10-07 21:02 ` [PATCH v5 " Shijith Thotton
2022-10-07 21:02 ` [PATCH v5 1/7] mbuf: add API to get and set mbuf physical address Shijith Thotton
2022-10-07 21:20 ` Stephen Hemminger
2022-10-07 21:02 ` [PATCH v5 2/7] test/dma: use API to get mbuf data " Shijith Thotton
2022-10-07 21:02 ` [PATCH v5 3/7] build: add meson option to configure IOVA mode as PA Shijith Thotton
2022-10-07 21:02 ` [PATCH v5 4/7] mbuf: add second dynamic field member Shijith Thotton
2022-10-07 21:02 ` [PATCH v5 5/7] lib: move mbuf next pointer to first cache line Shijith Thotton
2022-10-07 21:22 ` Stephen Hemminger
2022-10-07 21:30 ` [EXT] " Shijith Thotton
2022-10-07 21:02 ` [PATCH v5 6/7] drivers: mark cnxk PMDs work with IOVA as PA disabled Shijith Thotton
2022-10-07 21:02 ` [PATCH v5 7/7] drivers: mark software " Shijith Thotton
2022-10-09 9:34 ` [PATCH v5 0/7] mbuf dynamic field expansion Thomas Monjalon
2022-09-07 13:43 ` [PATCH v2 1/5] build: add meson option to configure IOVA mode as VA Shijith Thotton
2022-09-07 15:31 ` Stephen Hemminger
2022-09-07 15:38 ` Bruce Richardson
2022-09-07 21:33 ` Morten Brørup
2022-09-07 13:43 ` [PATCH v2 2/5] mbuf: add second dynamic field member for VA only build Shijith Thotton
2022-09-07 13:43 ` [PATCH v2 3/5] lib: move mbuf next pointer to first cache line Shijith Thotton
2022-09-07 13:43 ` [PATCH v2 4/5] drivers: mark Marvell cnxk PMDs work with IOVA as VA Shijith Thotton
2022-09-07 13:43 ` [PATCH v2 5/5] drivers: mark software " Shijith Thotton
2022-08-29 15:16 ` [PATCH v1 1/4] build: add meson option to configure IOVA mode " Shijith Thotton
2022-08-29 18:18 ` Morten Brørup
2022-08-30 8:32 ` Bruce Richardson
2022-08-29 15:16 ` [PATCH v1 2/4] mbuf: add second dynamic field member for VA only build Shijith Thotton
2022-08-29 18:32 ` Morten Brørup
2022-08-30 8:35 ` Bruce Richardson
2022-08-30 8:41 ` [EXT] " Pavan Nikhilesh Bhagavatula
2022-08-30 13:22 ` Honnappa Nagarahalli
2022-09-07 13:55 ` Shijith Thotton
2022-08-29 15:16 ` [PATCH v1 3/4] drivers: mark Marvell cnxk PMDs work with IOVA as VA Shijith Thotton
2022-08-29 15:16 ` [PATCH v1 4/4] drivers: mark software " Shijith Thotton
2022-08-30 13:07 ` [PATCH] mbuf: add mbuf physical address field to dynamic field Ferruh Yigit
2022-09-12 13:19 ` [EXT] " Shijith Thotton
2022-06-30 16:55 ` Bruce Richardson
2022-07-01 9:48 ` Olivier Matz
2022-07-01 11:53 ` Slava Ovsiienko
2022-07-01 12:01 ` [EXT] " Shijith Thotton
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=PH0PR18MB44257291EA2245B9FDC16981D9579@PH0PR18MB4425.namprd18.prod.outlook.com \
--to=sthotton@marvell.com \
--cc=Honnappa.Nagarahalli@arm.com \
--cc=adwivedi@marvell.com \
--cc=anoobj@marvell.com \
--cc=asekhar@marvell.com \
--cc=bruce.richardson@intel.com \
--cc=david.marchand@redhat.com \
--cc=dev@dpdk.org \
--cc=jerinj@marvell.com \
--cc=jpalider@marvell.com \
--cc=kirankumark@marvell.com \
--cc=ktejasree@marvell.com \
--cc=mb@smartsharesystems.com \
--cc=ndabilpuram@marvell.com \
--cc=olivier.matz@6wind.com \
--cc=pbhagavatula@marvell.com \
--cc=radhac@marvell.com \
--cc=ruifeng.wang@arm.com \
--cc=skori@marvell.com \
--cc=skoteshwar@marvell.com \
--cc=stephen@networkplumber.org \
--cc=tduszynski@marvell.com \
--cc=thomas@monjalon.net \
--cc=vburru@marvell.com \
--cc=viktorin@rehivetech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).