[dpdk-dev] [PATCH 3/5] i40e: support selecting hash functions

[Helin Zhang <helin.zhang@intel.com>]

Toeplitz and simple XOR hash functions are supported by
hardware, code changes are to tell the hardware which hash
function is selected according to the configuration.

Signed-off-by: Helin Zhang <helin.zhang@intel.com>
---
 config/common_bsdapp              |  1 +
 config/common_linuxapp            |  1 +
 lib/librte_pmd_i40e/i40e_ethdev.c | 30 ++++++++++++++++++++++++++++++
 3 files changed, 32 insertions(+)

diff --git a/config/common_bsdapp b/config/common_bsdapp
index bf6d8a0..e73629e 100644
--- a/config/common_bsdapp
+++ b/config/common_bsdapp
@@ -187,6 +187,7 @@ CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n
 CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF=4
 # interval up to 8160 us, aligned to 2 (or default value)
 CONFIG_RTE_LIBRTE_I40E_ITR_INTERVAL=-1
+CONFIG_RTE_LIBRTE_I40E_HASH_FUNC_TOEPLITZ=y
 
 #
 # Compile burst-oriented VIRTIO PMD driver
diff --git a/config/common_linuxapp b/config/common_linuxapp
index 9047975..9e00513 100644
--- a/config/common_linuxapp
+++ b/config/common_linuxapp
@@ -210,6 +210,7 @@ CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n
 CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF=4
 # interval up to 8160 us, aligned to 2 (or default value)
 CONFIG_RTE_LIBRTE_I40E_ITR_INTERVAL=-1
+CONFIG_RTE_LIBRTE_I40E_HASH_FUNC_TOEPLITZ=y
 
 #
 # Compile burst-oriented VIRTIO PMD driver
diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c
index 9ed31b5..cc04c70 100644
--- a/lib/librte_pmd_i40e/i40e_ethdev.c
+++ b/lib/librte_pmd_i40e/i40e_ethdev.c
@@ -203,6 +203,7 @@ static int i40e_dev_rss_hash_update(struct rte_eth_dev *dev,
 				    struct rte_eth_rss_conf *rss_conf);
 static int i40e_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 				      struct rte_eth_rss_conf *rss_conf);
+static void i40e_select_hash_function(struct i40e_hw *hw);
 
 /* Default hash key buffer for RSS */
 static uint32_t rss_key_default[I40E_PFQF_HKEY_MAX_INDEX + 1];
@@ -384,6 +385,9 @@ eth_i40e_dev_init(__rte_unused struct eth_driver *eth_drv,
 		return ret;
 	}
 
+	/* Select hash functions */
+	i40e_select_hash_function(hw);
+
 	/* Initialize the shared code (base driver) */
 	ret = i40e_init_shared_code(hw);
 	if (ret) {
@@ -3956,3 +3960,29 @@ i40e_pf_config_mq_rx(struct i40e_pf *pf)
 
 	return 0;
 }
+
+static void
+i40e_select_hash_function(struct i40e_hw *hw)
+{
+	uint32_t reg;
+
+	reg = I40E_READ_REG(hw, I40E_GLQF_CTL);
+#ifdef RTE_LIBRTE_I40E_HASH_FUNC_TOEPLITZ
+	if (reg & I40E_GLQF_CTL_HTOEP_MASK) {
+		PMD_DRV_LOG(DEBUG, "Hash function already set to Hoeplitz\n");
+		return;
+	}
+	reg |= I40E_GLQF_CTL_HTOEP_MASK;
+#else
+	if (!(reg & I40E_GLQF_CTL_HTOEP_MASK)) {
+		PMD_DRV_LOG(DEBUG, "Hash function already set to "
+						"Simple XOR\n");
+		return;
+	}
+	reg &= ~I40E_GLQF_CTL_HTOEP_MASK;
+#endif
+	PMD_DRV_LOG(INFO, "Hash function set to %s\n",
+		(reg & I40E_GLQF_CTL_HTOEP_MASK) ? "Toeplitz" : "XOR");
+	I40E_WRITE_REG(hw, I40E_GLQF_CTL, reg);
+	I40E_WRITE_FLUSH(hw);
+}
-- 
1.8.1.4