[dpdk-dev] [PATCH v2 0/2] Add HMAC_MD5 to Intel QuickAssist Technology driver

[dpdk-dev] [PATCH v2 0/2] Add HMAC_MD5 to Intel QuickAssist Technology driver

[Deepak Kumar Jain]

This patchset add capability to use HMAC_MD5 hash algorithm to Intel QuickAssist Technology driver and test cases to cryptodev test files.

This patchset depends on the following patches/patchsets:

"crypto/qat: make the session struct variable in size"
(http://dpdk.org/dev/patchwork/patch/15125/)

Arkadiusz Kusztal (2):
  crypto/qat: add MD5 HMAC capability to Intel QAT driver
  app/test: add test cases for MD5 HMAC for Intel QAT driver

Changes from v1:
* Added new feature information in release_16_11.rst file.

 app/test/test_cryptodev.c                        | 185 +++++++++++++++++++++++
 app/test/test_cryptodev_hmac_test_vectors.h      | 121 +++++++++++++++
 doc/guides/cryptodevs/qat.rst                    |   1 +
 doc/guides/rel_notes/release_16_11.rst           |   5 +
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c |  34 +++++
 drivers/crypto/qat/qat_crypto.c                  |  28 +++-
 6 files changed, 372 insertions(+), 2 deletions(-)
 create mode 100644 app/test/test_cryptodev_hmac_test_vectors.h

-- 
2.5.5

[dpdk-dev] [PATCH v2 1/2] crypto/qat: add MD5 HMAC capability to Intel QAT driver

[Deepak Kumar Jain]

From: Arkadiusz Kusztal <arkadiuszx.kusztal@intel.com>

Added posibility to compute MD5 HMAC digest with Intel QuickAssist
Technology Driver

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
---
 doc/guides/cryptodevs/qat.rst                    |  1 +
 doc/guides/rel_notes/release_16_11.rst           |  5 ++++
 drivers/crypto/qat/qat_adf/qat_algs_build_desc.c | 34 ++++++++++++++++++++++++
 drivers/crypto/qat/qat_crypto.c                  | 28 +++++++++++++++++--
 4 files changed, 66 insertions(+), 2 deletions(-)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index cae1958..485abb4 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -57,6 +57,7 @@ Hash algorithms:
 * ``RTE_CRYPTO_AUTH_SHA512_HMAC``
 * ``RTE_CRYPTO_AUTH_AES_XCBC_MAC``
 * ``RTE_CRYPTO_AUTH_SNOW3G_UIA2``
+* ``RTE_CRYPTO_AUTH_MD5_HMAC``
 
 
 Limitations
diff --git a/doc/guides/rel_notes/release_16_11.rst b/doc/guides/rel_notes/release_16_11.rst
index 66916af..4f7d784 100644
--- a/doc/guides/rel_notes/release_16_11.rst
+++ b/doc/guides/rel_notes/release_16_11.rst
@@ -36,6 +36,11 @@ New Features
 
      This section is a comment. Make sure to start the actual text at the margin.
 
+* **Updated the QAT PMD.**
+  The QAT PMD was updated with changes including the following:
+
+  * Added support for MD5_HMAC algorithm.
+
 
 Resolved Issues
 ---------------
diff --git a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
index c658f6e..521a9c4 100644
--- a/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
+++ b/drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
@@ -58,6 +58,7 @@
 
 #include <openssl/sha.h>	/* Needed to calculate pre-compute values */
 #include <openssl/aes.h>	/* Needed to calculate pre-compute values */
+#include <openssl/md5.h>	/* Needed to calculate pre-compute values */
 
 
 /*
@@ -86,6 +87,9 @@ static int qat_hash_get_state1_size(enum icp_qat_hw_auth_algo qat_hash_alg)
 	case ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2:
 		return QAT_HW_ROUND_UP(ICP_QAT_HW_SNOW_3G_UIA2_STATE1_SZ,
 						QAT_HW_DEFAULT_ALIGNMENT);
+	case ICP_QAT_HW_AUTH_ALGO_MD5:
+		return QAT_HW_ROUND_UP(ICP_QAT_HW_MD5_STATE1_SZ,
+						QAT_HW_DEFAULT_ALIGNMENT);
 	case ICP_QAT_HW_AUTH_ALGO_DELIMITER:
 		/* return maximum state1 size in this case */
 		return QAT_HW_ROUND_UP(ICP_QAT_HW_SHA512_STATE1_SZ,
@@ -107,6 +111,8 @@ static int qat_hash_get_digest_size(enum icp_qat_hw_auth_algo qat_hash_alg)
 		return ICP_QAT_HW_SHA256_STATE1_SZ;
 	case ICP_QAT_HW_AUTH_ALGO_SHA512:
 		return ICP_QAT_HW_SHA512_STATE1_SZ;
+	case ICP_QAT_HW_AUTH_ALGO_MD5:
+		return ICP_QAT_HW_MD5_STATE1_SZ;
 	case ICP_QAT_HW_AUTH_ALGO_DELIMITER:
 		/* return maximum digest size in this case */
 		return ICP_QAT_HW_SHA512_STATE1_SZ;
@@ -129,6 +135,8 @@ static int qat_hash_get_block_size(enum icp_qat_hw_auth_algo qat_hash_alg)
 		return SHA512_CBLOCK;
 	case ICP_QAT_HW_AUTH_ALGO_GALOIS_128:
 		return 16;
+	case ICP_QAT_HW_AUTH_ALGO_MD5:
+		return MD5_CBLOCK;
 	case ICP_QAT_HW_AUTH_ALGO_DELIMITER:
 		/* return maximum block size in this case */
 		return SHA512_CBLOCK;
@@ -172,6 +180,19 @@ static int partial_hash_sha512(uint8_t *data_in, uint8_t *data_out)
 	return 0;
 }
 
+static int partial_hash_md5(uint8_t *data_in, uint8_t *data_out)
+{
+
+	MD5_CTX ctx;
+
+	if (!MD5_Init(&ctx))
+		return -EFAULT;
+	MD5_Transform(&ctx, data_in);
+	rte_memcpy(data_out, &ctx, MD5_DIGEST_LENGTH);
+
+	return 0;
+}
+
 static int partial_hash_compute(enum icp_qat_hw_auth_algo hash_alg,
 			uint8_t *data_in,
 			uint8_t *data_out)
@@ -213,6 +234,10 @@ static int partial_hash_compute(enum icp_qat_hw_auth_algo hash_alg,
 			*hash_state_out_be64 =
 				rte_bswap64(*(((uint64_t *)digest)+i));
 		break;
+	case ICP_QAT_HW_AUTH_ALGO_MD5:
+		if (partial_hash_md5(data_in, data_out))
+			return -EFAULT;
+		break;
 	default:
 		PMD_DRV_LOG(ERR, "invalid hash alg %u", hash_alg);
 		return -EFAULT;
@@ -620,6 +645,15 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
 		auth_param->hash_state_sz =
 				RTE_ALIGN_CEIL(add_auth_data_length, 16) >> 3;
 		break;
+	case ICP_QAT_HW_AUTH_ALGO_MD5:
+		if (qat_alg_do_precomputes(ICP_QAT_HW_AUTH_ALGO_MD5,
+			authkey, authkeylen, cdesc->cd_cur_ptr,
+			&state1_size)) {
+			PMD_DRV_LOG(ERR, "(MD5)precompute failed");
+			return -EFAULT;
+		}
+		state2_size = ICP_QAT_HW_MD5_STATE2_SZ;
+		break;
 	default:
 		PMD_DRV_LOG(ERR, "Invalid HASH alg %u", cdesc->qat_hash_alg);
 		return -EFAULT;
diff --git a/drivers/crypto/qat/qat_crypto.c b/drivers/crypto/qat/qat_crypto.c
index 6a402b0..ba1daa7 100644
--- a/drivers/crypto/qat/qat_crypto.c
+++ b/drivers/crypto/qat/qat_crypto.c
@@ -132,6 +132,27 @@ static const struct rte_cryptodev_capabilities qat_pmd_capabilities[] = {
 			}, }
 		}, }
 	},
+	{	/* MD5 HMAC */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+			{.auth = {
+				.algo = RTE_CRYPTO_AUTH_MD5_HMAC,
+				.block_size = 64,
+				.key_size = {
+					.min = 8,
+					.max = 64,
+					.increment = 8
+				},
+				.digest_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				},
+				.aad_size = { 0 }
+			}, }
+		}, }
+	},
 	{	/* AES XCBC MAC */
 		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
 		{.sym = {
@@ -527,6 +548,9 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
 		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2;
 		break;
+	case RTE_CRYPTO_AUTH_MD5_HMAC:
+		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_MD5;
+		break;
 	case RTE_CRYPTO_AUTH_NULL:
 	case RTE_CRYPTO_AUTH_SHA1:
 	case RTE_CRYPTO_AUTH_SHA256:
@@ -536,7 +560,6 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 	case RTE_CRYPTO_AUTH_SHA384:
 	case RTE_CRYPTO_AUTH_SHA384_HMAC:
 	case RTE_CRYPTO_AUTH_MD5:
-	case RTE_CRYPTO_AUTH_MD5_HMAC:
 	case RTE_CRYPTO_AUTH_AES_CCM:
 	case RTE_CRYPTO_AUTH_AES_GMAC:
 	case RTE_CRYPTO_AUTH_KASUMI_F9:
@@ -575,7 +598,8 @@ qat_crypto_sym_configure_session_auth(struct rte_cryptodev *dev,
 	return session;
 
 error_out:
-	rte_mempool_put(internals->sess_mp, session);
+	if (internals->sess_mp != NULL)
+		rte_mempool_put(internals->sess_mp, session);
 	return NULL;
 }
 
-- 
2.5.5

[dpdk-dev] [PATCH v2 2/2] app/test: add test cases for MD5 HMAC for Intel QAT driver

[Deepak Kumar Jain]

From: Arkadiusz Kusztal <arkadiuszx.kusztal@intel.com>

Added MD5 HMAC hash algorithm to test file for Intel QuickAssist
Technology Driver

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
---
 app/test/test_cryptodev.c                   | 185 ++++++++++++++++++++++++++++
 app/test/test_cryptodev_hmac_test_vectors.h | 121 ++++++++++++++++++
 2 files changed, 306 insertions(+)
 create mode 100644 app/test/test_cryptodev_hmac_test_vectors.h

diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 647787d..8553759 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -49,6 +49,7 @@
 #include "test_cryptodev_snow3g_test_vectors.h"
 #include "test_cryptodev_snow3g_hash_test_vectors.h"
 #include "test_cryptodev_gcm_test_vectors.h"
+#include "test_cryptodev_hmac_test_vectors.h"
 
 static enum rte_cryptodev_type gbl_cryptodev_type;
 
@@ -3431,6 +3432,179 @@ test_stats(void)
 	return TEST_SUCCESS;
 }
 
+static int MD5_HMAC_create_session(struct crypto_testsuite_params *ts_params,
+				   struct crypto_unittest_params *ut_params,
+				   enum rte_crypto_auth_operation op,
+				   const struct HMAC_MD5_vector *test_case)
+{
+	uint8_t key[64];
+
+	memcpy(key, test_case->key.data, test_case->key.len);
+
+	ut_params->auth_xform.type = RTE_CRYPTO_SYM_XFORM_AUTH;
+	ut_params->auth_xform.next = NULL;
+	ut_params->auth_xform.auth.op = op;
+
+	ut_params->auth_xform.auth.algo = RTE_CRYPTO_AUTH_MD5_HMAC;
+
+	ut_params->auth_xform.auth.digest_length = MD5_DIGEST_LEN;
+	ut_params->auth_xform.auth.add_auth_data_length = 0;
+	ut_params->auth_xform.auth.key.length = test_case->key.len;
+	ut_params->auth_xform.auth.key.data = key;
+
+	ut_params->sess = rte_cryptodev_sym_session_create(
+		ts_params->valid_devs[0], &ut_params->auth_xform);
+
+	if (ut_params->sess == NULL)
+		return TEST_FAILED;
+
+	ut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);
+
+	memset(rte_pktmbuf_mtod(ut_params->ibuf, uint8_t *), 0,
+			rte_pktmbuf_tailroom(ut_params->ibuf));
+
+	return 0;
+}
+
+static int MD5_HMAC_create_op(struct crypto_unittest_params *ut_params,
+			      const struct HMAC_MD5_vector *test_case,
+			      uint8_t **plaintext)
+{
+	uint16_t plaintext_pad_len;
+
+	struct rte_crypto_sym_op *sym_op = ut_params->op->sym;
+
+	plaintext_pad_len = RTE_ALIGN_CEIL(test_case->plaintext.len,
+				16);
+
+	*plaintext = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf,
+			plaintext_pad_len);
+	memcpy(*plaintext, test_case->plaintext.data,
+			test_case->plaintext.len);
+
+	sym_op->auth.digest.data = (uint8_t *)rte_pktmbuf_append(
+			ut_params->ibuf, MD5_DIGEST_LEN);
+	TEST_ASSERT_NOT_NULL(sym_op->auth.digest.data,
+			"no room to append digest");
+	sym_op->auth.digest.phys_addr = rte_pktmbuf_mtophys_offset(
+			ut_params->ibuf, plaintext_pad_len);
+	sym_op->auth.digest.length = MD5_DIGEST_LEN;
+
+	if (ut_params->auth_xform.auth.op == RTE_CRYPTO_AUTH_OP_VERIFY) {
+		rte_memcpy(sym_op->auth.digest.data, test_case->auth_tag.data,
+			   test_case->auth_tag.len);
+	}
+
+	sym_op->auth.data.offset = 0;
+	sym_op->auth.data.length = test_case->plaintext.len;
+
+	rte_crypto_op_attach_sym_session(ut_params->op, ut_params->sess);
+	ut_params->op->sym->m_src = ut_params->ibuf;
+
+	return 0;
+}
+
+static int
+test_MD5_HMAC_generate(const struct HMAC_MD5_vector *test_case)
+{
+	uint16_t plaintext_pad_len;
+	uint8_t *plaintext, *auth_tag;
+
+	struct crypto_testsuite_params *ts_params = &testsuite_params;
+	struct crypto_unittest_params *ut_params = &unittest_params;
+
+	if (MD5_HMAC_create_session(ts_params, ut_params,
+			RTE_CRYPTO_AUTH_OP_GENERATE, test_case))
+		return TEST_FAILED;
+
+	/* Generate Crypto op data structure */
+	ut_params->op = rte_crypto_op_alloc(ts_params->op_mpool,
+			RTE_CRYPTO_OP_TYPE_SYMMETRIC);
+	TEST_ASSERT_NOT_NULL(ut_params->op,
+			"Failed to allocate symmetric crypto operation struct");
+
+	plaintext_pad_len = RTE_ALIGN_CEIL(test_case->plaintext.len,
+				16);
+
+	if (MD5_HMAC_create_op(ut_params, test_case, &plaintext))
+		return TEST_FAILED;
+
+	TEST_ASSERT_NOT_NULL(process_crypto_request(ts_params->valid_devs[0],
+			ut_params->op), "failed to process sym crypto op");
+
+	TEST_ASSERT_EQUAL(ut_params->op->status, RTE_CRYPTO_OP_STATUS_SUCCESS,
+			"crypto op processing failed");
+
+	if (ut_params->op->sym->m_dst) {
+		auth_tag = rte_pktmbuf_mtod_offset(ut_params->op->sym->m_dst,
+				uint8_t *, plaintext_pad_len);
+	} else {
+		auth_tag = plaintext + plaintext_pad_len;
+	}
+
+	TEST_ASSERT_BUFFERS_ARE_EQUAL(
+			auth_tag,
+			test_case->auth_tag.data,
+			test_case->auth_tag.len,
+			"HMAC_MD5 generated tag not as expected");
+
+	return TEST_SUCCESS;
+}
+
+static int
+test_MD5_HMAC_verify(const struct HMAC_MD5_vector *test_case)
+{
+	uint8_t *plaintext;
+
+	struct crypto_testsuite_params *ts_params = &testsuite_params;
+	struct crypto_unittest_params *ut_params = &unittest_params;
+
+	if (MD5_HMAC_create_session(ts_params, ut_params,
+			RTE_CRYPTO_AUTH_OP_VERIFY, test_case)) {
+		return TEST_FAILED;
+	}
+
+	/* Generate Crypto op data structure */
+	ut_params->op = rte_crypto_op_alloc(ts_params->op_mpool,
+			RTE_CRYPTO_OP_TYPE_SYMMETRIC);
+	TEST_ASSERT_NOT_NULL(ut_params->op,
+			"Failed to allocate symmetric crypto operation struct");
+
+	if (MD5_HMAC_create_op(ut_params, test_case, &plaintext))
+		return TEST_FAILED;
+
+	TEST_ASSERT_NOT_NULL(process_crypto_request(ts_params->valid_devs[0],
+			ut_params->op), "failed to process sym crypto op");
+
+	TEST_ASSERT_EQUAL(ut_params->op->status, RTE_CRYPTO_OP_STATUS_SUCCESS,
+			"HMAC_MD5 crypto op processing failed");
+
+	return TEST_SUCCESS;
+}
+
+static int
+test_MD5_HMAC_generate_case_1(void)
+{
+	return test_MD5_HMAC_generate(&HMAC_MD5_test_case_1);
+}
+
+static int
+test_MD5_HMAC_verify_case_1(void)
+{
+	return test_MD5_HMAC_verify(&HMAC_MD5_test_case_1);
+}
+
+static int
+test_MD5_HMAC_generate_case_2(void)
+{
+	return test_MD5_HMAC_generate(&HMAC_MD5_test_case_2);
+}
+
+static int
+test_MD5_HMAC_verify_case_2(void)
+{
+	return test_MD5_HMAC_verify(&HMAC_MD5_test_case_2);
+}
 
 static int
 test_multi_session(void)
@@ -3951,6 +4125,17 @@ static struct unit_test_suite cryptodev_qat_testsuite  = {
 			test_snow3g_authenticated_encryption_test_case_1),
 		TEST_CASE_ST(ut_setup, ut_teardown,
 			test_snow3g_encrypted_authentication_test_case_1),
+
+		/** HMAC_MD5 Authentication */
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_MD5_HMAC_generate_case_1),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_MD5_HMAC_verify_case_1),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_MD5_HMAC_generate_case_2),
+		TEST_CASE_ST(ut_setup, ut_teardown,
+			test_MD5_HMAC_verify_case_2),
+
 		TEST_CASES_END() /**< NULL terminate unit test array */
 	}
 };
diff --git a/app/test/test_cryptodev_hmac_test_vectors.h b/app/test/test_cryptodev_hmac_test_vectors.h
new file mode 100644
index 0000000..d30215f
--- /dev/null
+++ b/app/test/test_cryptodev_hmac_test_vectors.h
@@ -0,0 +1,121 @@
+/*-
+ *   BSD LICENSE
+ *
+ *   Copyright(c) 2016 Intel Corporation. All rights reserved.
+ *
+ *   Redistribution and use in source and binary forms, with or without
+ *   modification, are permitted provided that the following conditions
+ *   are met:
+ *
+ *	 * Redistributions of source code must retain the above copyright
+ *	   notice, this list of conditions and the following disclaimer.
+ *	 * Redistributions in binary form must reproduce the above copyright
+ *	   notice, this list of conditions and the following disclaimer in
+ *	   the documentation and/or other materials provided with the
+ *	   distribution.
+ *	 * Neither the name of Intel Corporation nor the names of its
+ *	   contributors may be used to endorse or promote products derived
+ *	   from this software without specific prior written permission.
+ *
+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef APP_TEST_TEST_CRYPTODEV_HMAC_TEST_VECTORS_H_
+#define APP_TEST_TEST_CRYPTODEV_HMAC_TEST_VECTORS_H_
+
+/* *** MD5 test vectors *** */
+
+#define MD5_DIGEST_LEN	16
+
+struct HMAC_MD5_vector {
+	struct {
+		uint8_t data[64];
+		uint16_t len;
+	} key;
+
+	struct {
+			uint8_t data[1024];
+			uint16_t len;
+	} plaintext;
+
+	struct {
+			uint8_t data[16];
+			uint16_t len;
+	} auth_tag;
+};
+
+static const struct
+HMAC_MD5_vector HMAC_MD5_test_case_1 = {
+	.key = {
+		.data = {
+			0xF8, 0x2A, 0xC7, 0x54, 0xDB, 0x96, 0x18, 0xAA,
+			0xC3, 0xA1, 0x53, 0xF6, 0x1F, 0x17, 0x60, 0xBD
+		},
+		.len = 16
+	},
+	.plaintext = {
+		.data = {
+			0x87, 0x4D, 0x61, 0x91, 0xB6, 0x20, 0xE3, 0x26,
+			0x1B, 0xEF, 0x68, 0x64, 0x99, 0x0D, 0xB6, 0xCE,
+			0x98, 0x06, 0xF6, 0x6B, 0x79, 0x70, 0xFD, 0xFF,
+			0x86, 0x17, 0x18, 0x7B, 0xB9, 0xFF, 0xFD, 0xFF,
+			0x5A, 0xE4, 0xDF, 0x3E, 0xDB, 0xD5, 0xD3, 0x5E,
+			0x5B, 0x4F, 0x09, 0x02, 0x0D, 0xB0, 0x3E, 0xAB,
+			0x1E, 0x03, 0x1D, 0xDA, 0x2F, 0xBE, 0x03, 0xD1,
+			0x79, 0x21, 0x70, 0xA0, 0xF3, 0x00, 0x9C, 0xEE
+		},
+		.len = 64
+	},
+	.auth_tag = {
+		.data = {
+			0x67, 0x83, 0xE1, 0x0F, 0xB0, 0xBF, 0x33, 0x49,
+			0x22, 0x04, 0x89, 0xDF, 0x86, 0xD0, 0x5F, 0x0C
+		},
+		.len = MD5_DIGEST_LEN
+	}
+};
+
+static const struct
+HMAC_MD5_vector HMAC_MD5_test_case_2 = {
+	.key = {
+		.data = {
+			0xF8, 0x2A, 0xC7, 0x54, 0xDB, 0x96, 0x18, 0xAA,
+			0xC3, 0xA1, 0x53, 0xF6, 0x1F, 0x17, 0x60, 0xBD,
+			0xF8, 0x2A, 0xC7, 0x54, 0xDB, 0x96, 0x18, 0xAA,
+			0xC3, 0xA1, 0x53, 0xF6, 0x1F, 0x17, 0x60, 0xBD
+		},
+		.len = 32
+	},
+	.plaintext = {
+		.data = {
+			0x87, 0x4D, 0x61, 0x91, 0xB6, 0x20, 0xE3, 0x26,
+			0x1B, 0xEF, 0x68, 0x64, 0x99, 0x0D, 0xB6, 0xCE,
+			0x98, 0x06, 0xF6, 0x6B, 0x79, 0x70, 0xFD, 0xFF,
+			0x86, 0x17, 0x18, 0x7B, 0xB9, 0xFF, 0xFD, 0xFF,
+			0x5A, 0xE4, 0xDF, 0x3E, 0xDB, 0xD5, 0xD3, 0x5E,
+			0x5B, 0x4F, 0x09, 0x02, 0x0D, 0xB0, 0x3E, 0xAB,
+			0x1E, 0x03, 0x1D, 0xDA, 0x2F, 0xBE, 0x03, 0xD1,
+			0x79, 0x21, 0x70, 0xA0, 0xF3, 0x00, 0x9C, 0xEE
+		},
+		.len = 64
+	},
+	.auth_tag = {
+		.data = {
+			0x39, 0x24, 0x70, 0x7A, 0x30, 0x38, 0x1E, 0x2B,
+			0x9F, 0x6B, 0xD9, 0x3C, 0xAD, 0xC2, 0x73, 0x52
+		},
+		.len = MD5_DIGEST_LEN
+	}
+};
+
+#endif /* APP_TEST_TEST_CRYPTODEV_HMAC_TEST_VECTORS_H_ */
-- 
2.5.5

Re: [dpdk-dev] [PATCH v2 0/2] Add HMAC_MD5 to Intel QuickAssist Technology driver

[De Lara Guarch, Pablo]

> -----Original Message-----
> From: Jain, Deepak K
> Sent: Friday, September 09, 2016 8:45 AM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo; Jain, Deepak K
> Subject: [PATCH v2 0/2] Add HMAC_MD5 to Intel QuickAssist Technology
> driver
> 
> This patchset add capability to use HMAC_MD5 hash algorithm to Intel
> QuickAssist Technology driver and test cases to cryptodev test files.
> 
> This patchset depends on the following patches/patchsets:
> 
> "crypto/qat: make the session struct variable in size"
> (http://dpdk.org/dev/patchwork/patch/15125/)
> 
> Arkadiusz Kusztal (2):
>   crypto/qat: add MD5 HMAC capability to Intel QAT driver
>   app/test: add test cases for MD5 HMAC for Intel QAT driver
> 
> Changes from v1:
> * Added new feature information in release_16_11.rst file.
> 
>  app/test/test_cryptodev.c                        | 185 +++++++++++++++++++++++
>  app/test/test_cryptodev_hmac_test_vectors.h      | 121 +++++++++++++++
>  doc/guides/cryptodevs/qat.rst                    |   1 +
>  doc/guides/rel_notes/release_16_11.rst           |   5 +
>  drivers/crypto/qat/qat_adf/qat_algs_build_desc.c |  34 +++++
>  drivers/crypto/qat/qat_crypto.c                  |  28 +++-
>  6 files changed, 372 insertions(+), 2 deletions(-)
>  create mode 100644 app/test/test_cryptodev_hmac_test_vectors.h
> 
> --
> 2.5.5

Applied to dpdk-next-crypto.
Thanks,

Pablo

Re: [dpdk-dev] [PATCH v2 0/2] Add HMAC_MD5 to Intel QuickAssist Technology driver

[Liu, Yong]

Tested-by: Yong Liu <yong.liu@intel.com>

- Tested Branch: dpdk-next-crypto/master
- Tested Commit: 3e329d659b62097d15ec86ff92acc8effaf28cd2
- OS: Fedora20 3.11.10-301.fc20.x86_64
- GCC: gcc version 4.8.3 20140911
- CPU: Intel(R) Xeon(R) CPU E5-2699 v3 @ 2.30GHz
- NIC: Intel Corporation Device Fortville [8086:1583]
- QAT: Intel Corporation Coleto Creek PCIe Endpoint [8086:0435]
- Default x86_64-native-linuxapp-gcc configuration
- Prerequisites:
- Total 2 cases, 2 passed, 0 failed

- Prerequisites command / instruction:
  Enable CONFIG_RTE_LIBRTE_PMD_QAT in config/common_base and rebuild dpdk
  Bind QAT VF devices to igb_uio

- Case: 
  Description: HMAC_MD5 authentication unit test 
  Command / instruction:
    Start test application with normal eal parameter.
      ./$RTE_TARGET/app/test -c f -n 4 -- -i
    Run crypto QAT unit test suite and verify MD5_HMAC cases passed

- Case: 
  Description: l2fwd_crypto with HMAC_MD5 authentication test
  Command / instruction:
    Start l2fwd_crypto with QAT technology enable.
    Authentication method is MD5_HMAC, auth key is also inputted in.
      l2fwd-crypto -c 0xf -n4 -- -p0x1 --chain HASH_ONLY --cdev_type HW \
        --auth_algo MD5_HMAC --auth_op GENERATE \
        --auth_key 00:01:02:03:04:05:06:07:08:09:0a:0b:0c:0d:0e:0f
    Send 65 packets with random 64 bytes payload and capture forwarded packets.
    Check all forwarded packets contained of 16 bytes hashed value.
    Check hash values are same as automatic calculated value.

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Deepak Kumar Jain
> Sent: Friday, September 09, 2016 11:45 PM
> To: dev@dpdk.org
> Cc: De Lara Guarch, Pablo; Jain, Deepak K
> Subject: [dpdk-dev] [PATCH v2 0/2] Add HMAC_MD5 to Intel QuickAssist
> Technology driver
> 
> This patchset add capability to use HMAC_MD5 hash algorithm to Intel
> QuickAssist Technology driver and test cases to cryptodev test files.
> 
> This patchset depends on the following patches/patchsets:
> 
> "crypto/qat: make the session struct variable in size"
> (http://dpdk.org/dev/patchwork/patch/15125/)
> 
> Arkadiusz Kusztal (2):
>   crypto/qat: add MD5 HMAC capability to Intel QAT driver
>   app/test: add test cases for MD5 HMAC for Intel QAT driver
> 
> Changes from v1:
> * Added new feature information in release_16_11.rst file.
> 
>  app/test/test_cryptodev.c                        | 185
> +++++++++++++++++++++++
>  app/test/test_cryptodev_hmac_test_vectors.h      | 121 +++++++++++++++
>  doc/guides/cryptodevs/qat.rst                    |   1 +
>  doc/guides/rel_notes/release_16_11.rst           |   5 +
>  drivers/crypto/qat/qat_adf/qat_algs_build_desc.c |  34 +++++
>  drivers/crypto/qat/qat_crypto.c                  |  28 +++-
>  6 files changed, 372 insertions(+), 2 deletions(-)
>  create mode 100644 app/test/test_cryptodev_hmac_test_vectors.h
> 
> --
> 2.5.5