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From: Jiawei Wang <jiaweiw@nvidia.com>
To: matan@nvidia.com, orika@nvidia.com, viacheslavo@nvidia.com,
	ferruh.yigit@intel.com, thomas@monjalon.net,
	Shahaf Shuler <shahafs@nvidia.com>
Cc: dev@dpdk.org, rasland@nvidia.com, asafp@nvidia.com,
	Li Zhang <lizh@nvidia.com>
Subject: [dpdk-dev] [PATCH v6 14/15] net/mlx5: allow multiple flow tables on the same level
Date: Tue, 20 Apr 2021 13:55:21 +0300
Message-ID: <1618916122-181792-15-git-send-email-jiaweiw@nvidia.com> (raw)
In-Reply-To: <1618916122-181792-1-git-send-email-jiaweiw@nvidia.com>

From: Li Zhang <lizh@nvidia.com>

The driver devices support creation of multiple flow tables.
Jump action can be used in order to move the packet steering
to different flow table.
Table 0 is always the root table for packet steering.

Jumping between tables may cause endless loops in steering mechanism,
that's why each table has level attribute,
the driver sub-system may not allow jumping to table with
equal or lower level than the current table.

Currently, in the driver, the table ID and level are always identical.

Allow multiple flow table creation with the same level attribute.

This patch adds the table id in flow table data entry, while
allocates the flow table, if the table level is same but the
different table id, the new table will be allocated with new
table object id. It supports 4M multiple flow tables on the
same level.

Signed-off-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
---
 drivers/net/mlx5/mlx5.c         |  9 +++--
 drivers/net/mlx5/mlx5.h         | 10 +++--
 drivers/net/mlx5/mlx5_flow.c    | 17 ++++++---
 drivers/net/mlx5/mlx5_flow.h    | 12 ++++--
 drivers/net/mlx5/mlx5_flow_dv.c | 84 +++++++++++++++++++++++------------------
 5 files changed, 79 insertions(+), 53 deletions(-)

diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c
index e5ffb8f..7e13b38 100644
--- a/drivers/net/mlx5/mlx5.c
+++ b/drivers/net/mlx5/mlx5.c
@@ -1271,9 +1271,12 @@ struct mlx5_dev_ctx_shared *
 	 * because DV expect to see them even if they cannot be created by
 	 * RDMA-CORE.
 	 */
-	if (!flow_dv_tbl_resource_get(dev, 0, 0, 0, 0, NULL, 0, 1, &error) ||
-	    !flow_dv_tbl_resource_get(dev, 0, 1, 0, 0, NULL, 0, 1, &error) ||
-	    !flow_dv_tbl_resource_get(dev, 0, 0, 1, 0, NULL, 0, 1, &error)) {
+	if (!flow_dv_tbl_resource_get(dev, 0, 0, 0, 0,
+		NULL, 0, 1, 0, &error) ||
+	    !flow_dv_tbl_resource_get(dev, 0, 1, 0, 0,
+		NULL, 0, 1, 0, &error) ||
+	    !flow_dv_tbl_resource_get(dev, 0, 0, 1, 0,
+		NULL, 0, 1, 0, &error)) {
 		err = ENOMEM;
 		goto error;
 	}
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index b2eb851..55ff17a 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -779,10 +779,12 @@ struct mlx5_aso_mtr_pools_mng {
 union mlx5_flow_tbl_key {
 	struct {
 		/* Table ID should be at the lowest address. */
-		uint32_t table_id;	/**< ID of the table. */
-		uint16_t dummy;		/**< Dummy table for DV API. */
-		uint8_t domain;		/**< 1 - FDB, 0 - NIC TX/RX. */
-		uint8_t direction;	/**< 1 - egress, 0 - ingress. */
+		uint32_t level;	/**< Level of the table. */
+		uint32_t id:22;	/**< ID of the table. */
+		uint32_t dummy:1;	/**< Dummy table for DV API. */
+		uint32_t is_fdb:1;	/**< 1 - FDB, 0 - NIC TX/RX. */
+		uint32_t is_egress:1;	/**< 1 - egress, 0 - ingress. */
+		uint32_t reserved:7;	/**< must be zero for comparison. */
 	};
 	uint64_t v64;			/**< full 64bits value of key */
 };
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index cf93ab0..bed8f31 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -4342,6 +4342,9 @@ struct mlx5_hlist_entry *
 		dev_flow->handle->mark = 1;
 	if (sub_flow)
 		*sub_flow = dev_flow;
+#ifdef HAVE_IBV_FLOW_DV_SUPPORT
+	dev_flow->dv.table_id = flow_split_info->table_id;
+#endif
 	return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
 }
 
@@ -5497,8 +5500,7 @@ struct mlx5_hlist_entry *
 						struct mlx5_flow_tbl_data_entry,
 						tbl);
 			sfx_attr.group = sfx_attr.transfer ?
-						(sfx_tbl_data->table_id - 1) :
-						sfx_tbl_data->table_id;
+			(sfx_tbl_data->level - 1) : sfx_tbl_data->level;
 		} else {
 			MLX5_ASSERT(attr->transfer);
 			sfx_attr.group = jump_table;
@@ -5698,7 +5700,8 @@ struct mlx5_hlist_entry *
 		.skip_scale = 0,
 		.flow_idx = 0,
 		.prefix_mark = 0,
-		.prefix_layers = 0
+		.prefix_layers = 0,
+		.table_id = 0
 	};
 	int ret;
 
@@ -7784,10 +7787,12 @@ int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
 	union tunnel_offload_mark mbits = { .val = mark };
 	union mlx5_flow_tbl_key table_key = {
 		{
-			.table_id = tunnel_id_to_flow_tbl(mbits.table_id),
+			.level = tunnel_id_to_flow_tbl(mbits.table_id),
+			.id = 0,
+			.reserved = 0,
 			.dummy = 0,
-			.domain = !!mbits.transfer,
-			.direction = 0,
+			.is_fdb = !!mbits.transfer,
+			.is_egress = 0,
 		}
 	};
 	he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 81cf1b5..1a74b17 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -564,8 +564,9 @@ struct mlx5_flow_tbl_data_entry {
 	uint32_t is_egress:1; /**< Egress table. */
 	uint32_t is_transfer:1; /**< Transfer table. */
 	uint32_t dummy:1; /**<  DR table. */
-	uint32_t reserve:27; /**< Reserved to future using. */
-	uint32_t table_id; /**< Table ID. */
+	uint32_t id:22; /**< Table ID. */
+	uint32_t reserve:5; /**< Reserved to future using. */
+	uint32_t level; /**< Table level. */
 };
 
 /* Sub rdma-core actions list. */
@@ -699,6 +700,7 @@ struct mlx5_flow_handle {
 /** Device flow structure only for DV flow creation. */
 struct mlx5_flow_dv_workspace {
 	uint32_t group; /**< The group index. */
+	uint32_t table_id; /**< Flow table identifier. */
 	uint8_t transfer; /**< 1 if the flow is E-Switch flow. */
 	int actions_n; /**< number of actions. */
 	void *actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS]; /**< Action list. */
@@ -1059,6 +1061,7 @@ struct mlx5_flow_split_info {
 	uint32_t flow_idx; /**< This memory pool index to the flow. */
 	uint32_t prefix_mark; /**< Prefix subflow mark flag. */
 	uint64_t prefix_layers; /**< Prefix subflow layers. */
+	uint32_t table_id; /**< Flow table identifier. */
 };
 
 typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev,
@@ -1410,9 +1413,10 @@ int flow_dv_tbl_match_cb(struct mlx5_hlist *list,
 void flow_dv_tbl_remove_cb(struct mlx5_hlist *list,
 			   struct mlx5_hlist_entry *entry);
 struct mlx5_flow_tbl_resource *flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
-		uint32_t table_id, uint8_t egress, uint8_t transfer,
+		uint32_t table_level, uint8_t egress, uint8_t transfer,
 		bool external, const struct mlx5_flow_tunnel *tunnel,
-		uint32_t group_id, uint8_t dummy, struct rte_flow_error *error);
+		uint32_t group_id, uint8_t dummy,
+		uint32_t table_id, struct rte_flow_error *error);
 
 struct mlx5_hlist_entry *flow_dv_tag_create_cb(struct mlx5_hlist *list,
 					       uint64_t key, void *cb_ctx);
diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index a649339..ffd9f63 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -9373,20 +9373,21 @@ struct mlx5_hlist_entry *
 	tbl_data->group_id = tt_prm->group_id;
 	tbl_data->external = !!tt_prm->external;
 	tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
-	tbl_data->is_egress = !!key.direction;
-	tbl_data->is_transfer = !!key.domain;
+	tbl_data->is_egress = !!key.is_egress;
+	tbl_data->is_transfer = !!key.is_fdb;
 	tbl_data->dummy = !!key.dummy;
-	tbl_data->table_id = key.table_id;
+	tbl_data->level = key.level;
+	tbl_data->id = key.id;
 	tbl = &tbl_data->tbl;
 	if (key.dummy)
 		return &tbl_data->entry;
-	if (key.domain)
+	if (key.is_fdb)
 		domain = sh->fdb_domain;
-	else if (key.direction)
+	else if (key.is_egress)
 		domain = sh->tx_domain;
 	else
 		domain = sh->rx_domain;
-	ret = mlx5_flow_os_create_flow_tbl(domain, key.table_id, &tbl->obj);
+	ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
 	if (ret) {
 		rte_flow_error_set(error, ENOMEM,
 				   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
@@ -9394,7 +9395,7 @@ struct mlx5_hlist_entry *
 		mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
 		return NULL;
 	}
-	if (key.table_id) {
+	if (key.level != 0) {
 		ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
 					(tbl->obj, &tbl_data->jump.action);
 		if (ret) {
@@ -9407,9 +9408,9 @@ struct mlx5_hlist_entry *
 			return NULL;
 		}
 	}
-	MKSTR(matcher_name, "%s_%s_%u_matcher_cache",
-	      key.domain ? "FDB" : "NIC", key.direction ? "egress" : "ingress",
-	      key.table_id);
+	MKSTR(matcher_name, "%s_%s_%u_%u_matcher_cache",
+	      key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
+	      key.level, key.id);
 	mlx5_cache_list_init(&tbl_data->matchers, matcher_name, 0, sh,
 			     flow_dv_matcher_create_cb,
 			     flow_dv_matcher_match_cb,
@@ -9426,10 +9427,11 @@ struct mlx5_hlist_entry *
 		container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
 	union mlx5_flow_tbl_key key = { .v64 = key64 };
 
-	return tbl_data->table_id != key.table_id ||
+	return tbl_data->level != key.level ||
+	       tbl_data->id != key.id ||
 	       tbl_data->dummy != key.dummy ||
-	       tbl_data->is_transfer != key.domain ||
-	       tbl_data->is_egress != key.direction;
+	       tbl_data->is_transfer != !!key.is_fdb ||
+	       tbl_data->is_egress != !!key.is_egress;
 }
 
 /**
@@ -9437,14 +9439,16 @@ struct mlx5_hlist_entry *
  *
  * @param[in, out] dev
  *   Pointer to rte_eth_dev structure.
- * @param[in] table_id
- *   Table id to use.
+ * @param[in] table_level
+ *   Table level to use.
  * @param[in] egress
  *   Direction of the table.
  * @param[in] transfer
  *   E-Switch or NIC flow.
  * @param[in] dummy
  *   Dummy entry for dv API.
+ * @param[in] table_id
+ *   Table id to use.
  * @param[out] error
  *   pointer to error structure.
  *
@@ -9453,20 +9457,23 @@ struct mlx5_hlist_entry *
  */
 struct mlx5_flow_tbl_resource *
 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
-			 uint32_t table_id, uint8_t egress,
+			 uint32_t table_level, uint8_t egress,
 			 uint8_t transfer,
 			 bool external,
 			 const struct mlx5_flow_tunnel *tunnel,
 			 uint32_t group_id, uint8_t dummy,
+			 uint32_t table_id,
 			 struct rte_flow_error *error)
 {
 	struct mlx5_priv *priv = dev->data->dev_private;
 	union mlx5_flow_tbl_key table_key = {
 		{
-			.table_id = table_id,
-			.dummy = dummy,
-			.domain = !!transfer,
-			.direction = !!egress,
+			.level = table_level,
+			.id = table_id,
+			.reserved = 0,
+			.dummy = !!dummy,
+			.is_fdb = !!transfer,
+			.is_egress = !!egress,
 		}
 	};
 	struct mlx5_flow_tbl_tunnel_prm tt_prm = {
@@ -9489,8 +9496,10 @@ struct mlx5_flow_tbl_resource *
 				   "cannot get table");
 		return NULL;
 	}
-	DRV_LOG(DEBUG, "Table_id %u tunnel %u group %u registered.",
-		table_id, tunnel ? tunnel->tunnel_id : 0, group_id);
+	DRV_LOG(DEBUG, "table_level %u table_id %u "
+		"tunnel %u group %u registered.",
+		table_level, table_id,
+		tunnel ? tunnel->tunnel_id : 0, group_id);
 	tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
 	return &tbl_data->tbl;
 }
@@ -9517,7 +9526,7 @@ struct mlx5_flow_tbl_resource *
 					tbl_data->tunnel->tunnel_id : 0,
 			.group = tbl_data->group_id
 		};
-		uint32_t table_id = tbl_data->table_id;
+		uint32_t table_level = tbl_data->level;
 
 		tunnel_grp_hash = tbl_data->tunnel ?
 					tbl_data->tunnel->groups :
@@ -9526,8 +9535,9 @@ struct mlx5_flow_tbl_resource *
 		if (he)
 			mlx5_hlist_unregister(tunnel_grp_hash, he);
 		DRV_LOG(DEBUG,
-			"Table_id %u tunnel %u group %u released.",
-			table_id,
+			"table_level %u id %u tunnel %u group %u released.",
+			table_level,
+			tbl_data->id,
 			tbl_data->tunnel ?
 			tbl_data->tunnel->tunnel_id : 0,
 			tbl_data->group_id);
@@ -9655,10 +9665,10 @@ struct mlx5_cache_entry *
 	 * tunnel offload API requires this registration for cases when
 	 * tunnel match rule was inserted before tunnel set rule.
 	 */
-	tbl = flow_dv_tbl_resource_get(dev, key->table_id,
-				       key->direction, key->domain,
+	tbl = flow_dv_tbl_resource_get(dev, key->level,
+				       key->is_egress, key->is_fdb,
 				       dev_flow->external, tunnel,
-				       group_id, 0, error);
+				       group_id, 0, key->id, error);
 	if (!tbl)
 		return -rte_errno;	/* No need to refill the error info */
 	tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
@@ -10137,7 +10147,7 @@ struct mlx5_cache_entry *
 		is_egress = 1;
 	tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
 					is_egress, is_transfer,
-					true, NULL, 0, 0, error);
+					true, NULL, 0, 0, 0, error);
 	if (!tbl) {
 		rte_flow_error_set(error, ENOMEM,
 					  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
@@ -11490,7 +11500,7 @@ struct mlx5_cache_entry *
 						       attr->transfer,
 						       !!dev_flow->external,
 						       tunnel, jump_group, 0,
-						       error);
+						       0, error);
 			if (!tbl)
 				return rte_flow_error_set
 						(error, errno,
@@ -12032,9 +12042,10 @@ struct mlx5_cache_entry *
 	matcher.priority = mlx5_get_matcher_priority(dev, attr,
 					matcher.priority);
 	/* reserved field no needs to be set to 0 here. */
-	tbl_key.domain = attr->transfer;
-	tbl_key.direction = attr->egress;
-	tbl_key.table_id = dev_flow->dv.group;
+	tbl_key.is_fdb = attr->transfer;
+	tbl_key.is_egress = attr->egress;
+	tbl_key.level = dev_flow->dv.group;
+	tbl_key.id = dev_flow->dv.table_id;
 	if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
 				     tunnel, attr->group, error))
 		return -rte_errno;
@@ -13641,7 +13652,7 @@ struct mlx5_cache_entry *
 	/* Create the meter table with METER level. */
 	dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
 					    egress, transfer, false, NULL, 0,
-					    0, &error);
+					    0, 0, &error);
 	if (!dtb->tbl) {
 		DRV_LOG(ERR, "Failed to create meter policer table.");
 		return -1;
@@ -13650,7 +13661,7 @@ struct mlx5_cache_entry *
 	dtb->sfx_tbl = flow_dv_tbl_resource_get(dev,
 					    MLX5_FLOW_TABLE_LEVEL_SUFFIX,
 					    egress, transfer, false, NULL, 0,
-					    0, &error);
+					    0, 0, &error);
 	if (!dtb->sfx_tbl) {
 		DRV_LOG(ERR, "Failed to create meter suffix table.");
 		return -1;
@@ -14173,7 +14184,8 @@ struct mlx5_cache_entry *
 	void *flow = NULL;
 	int ret = -1;
 
-	tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL, 0, 0, NULL);
+	tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
+					0, 0, 0, NULL);
 	if (!tbl)
 		goto err;
 	dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
-- 
1.8.3.1


  parent reply	other threads:[~2021-04-20 10:56 UTC|newest]

Thread overview: 105+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-31  7:36 [dpdk-dev] [PATCH 00/13] Add ASO meter support in MLX5 PMD Li Zhang
2021-03-31  7:36 ` [dpdk-dev] [PATCH 01/13] net/mlx5: support three level table walk Li Zhang
2021-03-31  7:36 ` [dpdk-dev] [PATCH 02/13] net/mlx5: fix meter statistics Li Zhang
2021-03-31  7:36 ` [dpdk-dev] [PATCH 03/13] net/mlx5: optimize " Li Zhang
2021-03-31  7:36 ` [dpdk-dev] [PATCH 04/13] net/mlx5: use mask for meter register setting Li Zhang
2021-03-31  7:36 ` [dpdk-dev] [PATCH 05/13] common/mlx5: add definitions for ASO flow meter Li Zhang
2021-03-31  7:36 ` [dpdk-dev] [PATCH 06/13] common/mlx5: add read ASO flow meter HCA capability Li Zhang
2021-03-31  7:36 ` [dpdk-dev] [PATCH 07/13] common/mlx5: add DevX API to create ASO flow meter object Li Zhang
2021-03-31  7:36 ` [dpdk-dev] [PATCH 08/13] net/mlx5: flow meter pool to manage " Li Zhang
2021-03-31  7:36 ` [dpdk-dev] [PATCH 09/13] net/mlx5: init/uninit flow meter queue for WQE Li Zhang
2021-03-31  7:36 ` [dpdk-dev] [PATCH 10/13] net/mlx5: aso flow meter send WQE and CQE handle Li Zhang
2021-03-31  7:36 ` [dpdk-dev] [PATCH 11/13] net/mlx5: add support of ASO meter action Li Zhang
2021-03-31  7:36 ` [dpdk-dev] [PATCH 12/13] net/mlx5: make ASO meter queue thread-safe Li Zhang
2021-03-31  7:36 ` [dpdk-dev] [PATCH 13/13] net/mlx5: allow multiple flow tables on the same level Li Zhang
2021-04-02 15:16 ` [dpdk-dev] [PATCH v2 00/13] Add ASO meter support in MLX5 PMD Li Zhang
2021-04-02 15:16   ` [dpdk-dev] [PATCH v2 01/13] net/mlx5: support three level table walk Li Zhang
2021-04-02 15:16   ` [dpdk-dev] [PATCH v2 02/13] net/mlx5: fix meter statistics Li Zhang
2021-04-02 15:16   ` [dpdk-dev] [PATCH v2 03/13] net/mlx5: optimize " Li Zhang
2021-04-02 15:16   ` [dpdk-dev] [PATCH v2 04/13] net/mlx5: use mask for meter register setting Li Zhang
2021-04-02 15:16   ` [dpdk-dev] [PATCH v2 05/13] common/mlx5: add definitions for ASO flow meter Li Zhang
2021-04-02 15:16   ` [dpdk-dev] [PATCH v2 06/13] common/mlx5: add read ASO flow meter HCA capability Li Zhang
2021-04-02 15:16   ` [dpdk-dev] [PATCH v2 07/13] common/mlx5: add DevX API to create ASO flow meter object Li Zhang
2021-04-13 16:50     ` Kinsella, Ray
2021-04-02 15:16   ` [dpdk-dev] [PATCH v2 08/13] net/mlx5: flow meter pool to manage " Li Zhang
2021-04-02 15:16   ` [dpdk-dev] [PATCH v2 09/13] net/mlx5: init/uninit flow meter queue for WQE Li Zhang
2021-04-02 15:16   ` [dpdk-dev] [PATCH v2 10/13] net/mlx5: aso flow meter send WQE and CQE handle Li Zhang
2021-04-02 15:16   ` [dpdk-dev] [PATCH v2 11/13] net/mlx5: add support of ASO meter action Li Zhang
2021-04-02 15:16   ` [dpdk-dev] [PATCH v2 12/13] net/mlx5: make ASO meter queue thread-safe Li Zhang
2021-04-02 15:16   ` [dpdk-dev] [PATCH v2 13/13] net/mlx5: allow multiple flow tables on the same level Li Zhang
2021-04-13  0:10 ` [dpdk-dev] [PATCH v3 00/14] Add ASO meter support in MLX5 PMD Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 01/14] net/mlx5: support three level table walk Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 02/14] common/mlx5: add color register idle bits definition Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 03/14] net/mlx5: fix meter statistics Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 04/14] net/mlx5: optimize " Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 05/14] net/mlx5: use mask for meter register setting Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 06/14] common/mlx5: add definitions for ASO flow meter Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 07/14] common/mlx5: add read ASO flow meter HCA capability Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 08/14] common/mlx5: add DevX API to create ASO flow meter object Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 09/14] net/mlx5: flow meter pool to manage " Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 10/14] net/mlx5: initialize the flow meter ASO SQ Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 11/14] net/mlx5: aso flow meter send WQE and CQE handle Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 12/14] net/mlx5: add support of ASO meter action Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 13/14] net/mlx5: make ASO meter queue thread-safe Li Zhang
2021-04-13  0:10   ` [dpdk-dev] [PATCH v3 14/14] net/mlx5: allow multiple flow tables on the same level Li Zhang
2021-04-14  2:57 ` [dpdk-dev] [PATCH v4 00/14] Add ASO meter support in MLX5 PMD Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 01/14] net/mlx5: support three level table walk Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 02/14] common/mlx5: add color register idle bits definition Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 03/14] net/mlx5: fix meter statistics Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 04/14] net/mlx5: optimize " Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 05/14] net/mlx5: use mask for meter register setting Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 06/14] common/mlx5: add definitions for ASO flow meter Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 07/14] common/mlx5: add read ASO flow meter HCA capability Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 08/14] common/mlx5: add DevX API to create ASO flow meter object Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 09/14] net/mlx5: flow meter pool to manage " Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 10/14] net/mlx5: initialize the flow meter ASO SQ Li Zhang
2021-04-15 13:05     ` Raslan Darawsheh
2021-04-15 14:21       ` Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 11/14] net/mlx5: aso flow meter send WQE and CQE handle Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 12/14] net/mlx5: add support of ASO meter action Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 13/14] net/mlx5: make ASO meter queue thread-safe Li Zhang
2021-04-14  2:57   ` [dpdk-dev] [PATCH v4 14/14] net/mlx5: allow multiple flow tables on the same level Li Zhang
2021-04-15 15:11 ` [dpdk-dev] [PATCH v5 00/14] Add ASO meter support in MLX5 PMD Li Zhang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 01/14] net/mlx5: support three level table walk Li Zhang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 02/14] common/mlx5: add color register idle bits definition Li Zhang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 03/14] net/mlx5: fix meter statistics Li Zhang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 04/14] net/mlx5: optimize " Li Zhang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 05/14] net/mlx5: use mask for meter register setting Li Zhang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 06/14] common/mlx5: add definitions for ASO flow meter Li Zhang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 07/14] common/mlx5: add read ASO flow meter HCA capability Li Zhang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 08/14] common/mlx5: add DevX API to create ASO flow meter object Li Zhang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 09/14] net/mlx5: flow meter pool to manage " Li Zhang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 10/14] net/mlx5: initialize the flow meter ASO SQ Li Zhang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 11/14] net/mlx5: aso flow meter send WQE and CQE handle Li Zhang
2021-04-19 21:46     ` Ferruh Yigit
2021-04-19 22:02       ` Thomas Monjalon
2021-04-20 10:35         ` Jiawei(Jonny) Wang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 12/14] net/mlx5: add support of ASO meter action Li Zhang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 13/14] net/mlx5: make ASO meter queue thread-safe Li Zhang
2021-04-15 15:11   ` [dpdk-dev] [PATCH v5 14/14] net/mlx5: allow multiple flow tables on the same level Li Zhang
2021-04-18 19:33   ` [dpdk-dev] [PATCH v5 00/14] Add ASO meter support in MLX5 PMD Raslan Darawsheh
2021-04-19 21:42   ` Ferruh Yigit
2021-04-19 21:59     ` Thomas Monjalon
2021-04-20 10:33       ` Jiawei(Jonny) Wang
2021-04-20 10:55 ` [dpdk-dev] [PATCH v6 00/15] " Jiawei Wang
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 01/15] net/mlx5: support three level table walk Jiawei Wang
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 02/15] common/mlx5: add color register idle bits definition Jiawei Wang
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 03/15] net/mlx5: fix meter statistics Jiawei Wang
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 04/15] net/mlx5: optimize " Jiawei Wang
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 05/15] net/mlx5: use mask for meter register setting Jiawei Wang
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 06/15] common/mlx5: add definitions for ASO flow meter Jiawei Wang
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 07/15] common/mlx5: add read ASO flow meter HCA capability Jiawei Wang
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 08/15] common/mlx5: add DevX API to create ASO flow meter object Jiawei Wang
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 09/15] net/mlx5: flow meter pool to manage " Jiawei Wang
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 10/15] net/mlx5: initialize the flow meter ASO SQ Jiawei Wang
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 11/15] net/mlx5: add meter ASO queue management Jiawei Wang
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 12/15] net/mlx5: add support of ASO meter action Jiawei Wang
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 13/15] net/mlx5: make ASO meter queue thread-safe Jiawei Wang
2021-04-20 10:55   ` Jiawei Wang [this message]
2021-04-20 10:55   ` [dpdk-dev] [PATCH v6 15/15] doc: update release notes for ASO meter Jiawei Wang
2021-04-21  6:50     ` Raslan Darawsheh
2021-04-21  8:58     ` Ferruh Yigit
2021-04-21  6:51   ` [dpdk-dev] [PATCH v6 00/15] Add ASO meter support in MLX5 PMD Raslan Darawsheh
2021-04-21  8:31   ` Ferruh Yigit
2021-04-21  8:33     ` Asaf Penso
2021-04-21  8:58       ` Ferruh Yigit

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