* [dpdk-dev] [PATCH] net/iavf: fix QFI field bit check for GTPU EH @ 2021-09-29 11:13 Junfeng Guo 2021-09-29 12:31 ` [dpdk-dev] [PATCH v2] " Junfeng Guo 0 siblings, 1 reply; 6+ messages in thread From: Junfeng Guo @ 2021-09-29 11:13 UTC (permalink / raw) To: qi.z.zhang, jingjing.wu, beilei.xing Cc: dev, stable, ferruh.yigit, junfeng.guo, lingyu.liu If GTPU Extionsion header has no pdu_type setting, the parsed value of gtp_psc_spec->pdu_type will be 0, which is same as IAVF_GTPU_EH_DWLINK. Thus, fot this case, we should check gtp_psc_mask->pdu_type instead, to set QFI field bit of GTPU_EH first. Fixes: 45cc3a5435fc ("net/iavf: fix QFI fields of GTPU UL/DL for FDIR") Cc: stable@dpdk.org Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> --- drivers/net/iavf/iavf_fdir.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/net/iavf/iavf_fdir.c b/drivers/net/iavf/iavf_fdir.c index 560589a496..227a089ce0 100644 --- a/drivers/net/iavf/iavf_fdir.c +++ b/drivers/net/iavf/iavf_fdir.c @@ -1171,17 +1171,15 @@ iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad, if (gtp_psc_spec && gtp_psc_mask) { if (gtp_psc_mask->qfi == UINT8_MAX) { input_set |= IAVF_INSET_GTPU_QFI; - if (gtp_psc_spec->pdu_type == - IAVF_GTPU_EH_UPLINK) + if (!gtp_psc_mask->pdu_type) VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, - GTPU_UP, QFI); - else if (gtp_psc_spec->pdu_type == - IAVF_GTPU_EH_DWLINK) + GTPU_EH, QFI); + else if (gtp_psc_spec->pdu_type == IAVF_GTPU_EH_DWLINK) VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, GTPU_DWN, QFI); - else + else if (gtp_psc_spec->pdu_type == IAVF_GTPU_EH_UPLINK) VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, - GTPU_EH, QFI); + GTPU_UP, QFI); } rte_memcpy(hdr->buffer, gtp_psc_spec, -- 2.25.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [dpdk-dev] [PATCH v2] net/iavf: fix QFI field bit check for GTPU EH 2021-09-29 11:13 [dpdk-dev] [PATCH] net/iavf: fix QFI field bit check for GTPU EH Junfeng Guo @ 2021-09-29 12:31 ` Junfeng Guo 2021-10-07 4:24 ` Zhang, Qi Z 2021-10-08 10:41 ` [dpdk-dev] [PATCH v3] " Junfeng Guo 0 siblings, 2 replies; 6+ messages in thread From: Junfeng Guo @ 2021-09-29 12:31 UTC (permalink / raw) To: qi.z.zhang, jingjing.wu, beilei.xing Cc: dev, stable, ferruh.yigit, junfeng.guo, lingyu.liu If GTPU Extionsion header has no pdu_type setting, the parsed value of gtp_psc_spec->pdu_type will be 0, which is same as IAVF_GTPU_EH_DWLINK. Thus, for this case, we should check gtp_psc_mask->pdu_type instead, to set QFI field bit of GTPU_EH first. Fixes: 45cc3a5435fc ("net/iavf: fix QFI fields of GTPU UL/DL for FDIR") Cc: stable@dpdk.org Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> --- drivers/net/iavf/iavf_fdir.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/net/iavf/iavf_fdir.c b/drivers/net/iavf/iavf_fdir.c index 560589a496..227a089ce0 100644 --- a/drivers/net/iavf/iavf_fdir.c +++ b/drivers/net/iavf/iavf_fdir.c @@ -1171,17 +1171,15 @@ iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad, if (gtp_psc_spec && gtp_psc_mask) { if (gtp_psc_mask->qfi == UINT8_MAX) { input_set |= IAVF_INSET_GTPU_QFI; - if (gtp_psc_spec->pdu_type == - IAVF_GTPU_EH_UPLINK) + if (!gtp_psc_mask->pdu_type) VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, - GTPU_UP, QFI); - else if (gtp_psc_spec->pdu_type == - IAVF_GTPU_EH_DWLINK) + GTPU_EH, QFI); + else if (gtp_psc_spec->pdu_type == IAVF_GTPU_EH_DWLINK) VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, GTPU_DWN, QFI); - else + else if (gtp_psc_spec->pdu_type == IAVF_GTPU_EH_UPLINK) VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, - GTPU_EH, QFI); + GTPU_UP, QFI); } rte_memcpy(hdr->buffer, gtp_psc_spec, -- 2.25.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [dpdk-dev] [PATCH v2] net/iavf: fix QFI field bit check for GTPU EH 2021-09-29 12:31 ` [dpdk-dev] [PATCH v2] " Junfeng Guo @ 2021-10-07 4:24 ` Zhang, Qi Z 2021-10-08 10:41 ` [dpdk-dev] [PATCH v3] " Junfeng Guo 1 sibling, 0 replies; 6+ messages in thread From: Zhang, Qi Z @ 2021-10-07 4:24 UTC (permalink / raw) To: Guo, Junfeng, Wu, Jingjing, Xing, Beilei Cc: dev, stable, Yigit, Ferruh, Liu, Lingyu > -----Original Message----- > From: Guo, Junfeng <junfeng.guo@intel.com> > Sent: Wednesday, September 29, 2021 8:32 PM > To: Zhang, Qi Z <qi.z.zhang@intel.com>; Wu, Jingjing <jingjing.wu@intel.com>; > Xing, Beilei <beilei.xing@intel.com> > Cc: dev@dpdk.org; stable@dpdk.org; Yigit, Ferruh <ferruh.yigit@intel.com>; > Guo, Junfeng <junfeng.guo@intel.com>; Liu, Lingyu <lingyu.liu@intel.com> > Subject: [PATCH v2] net/iavf: fix QFI field bit check for GTPU EH > > If GTPU Extionsion header has no pdu_type setting, the parsed value of > gtp_psc_spec->pdu_type will be 0, which is same as IAVF_GTPU_EH_DWLINK. > Thus, for this case, we should check gtp_psc_mask->pdu_type instead, to set > QFI field bit of GTPU_EH first. > > Fixes: 45cc3a5435fc ("net/iavf: fix QFI fields of GTPU UL/DL for FDIR") > Cc: stable@dpdk.org > > Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> The patch can't be applied due to below commit commit 16b8e92d49b87705fffbedd9c3241204d9a584a6 Author: Raslan Darawsheh <rasland@nvidia.com> Date: Mon Aug 23 13:55:39 2021 +0300 ethdev: use extension header for GTP PSC item This updates the gtp_psc flow item to use the net header definition of the gtp_psc to be based on RFC 38415-g30 Signed-off-by: Raslan Darawsheh <rasland@nvidia.com> Acked-by: Ferruh Yigit <ferruh.yigit@intel.com> Could you rebase? Thanks Qi > --- > drivers/net/iavf/iavf_fdir.c | 12 +++++------- > 1 file changed, 5 insertions(+), 7 deletions(-) > > diff --git a/drivers/net/iavf/iavf_fdir.c b/drivers/net/iavf/iavf_fdir.c index > 560589a496..227a089ce0 100644 > --- a/drivers/net/iavf/iavf_fdir.c > +++ b/drivers/net/iavf/iavf_fdir.c > @@ -1171,17 +1171,15 @@ iavf_fdir_parse_pattern(__rte_unused struct > iavf_adapter *ad, > if (gtp_psc_spec && gtp_psc_mask) { > if (gtp_psc_mask->qfi == UINT8_MAX) { > input_set |= IAVF_INSET_GTPU_QFI; > - if (gtp_psc_spec->pdu_type == > - IAVF_GTPU_EH_UPLINK) > + if (!gtp_psc_mask->pdu_type) > VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, > - GTPU_UP, QFI); > - else if (gtp_psc_spec->pdu_type == > - IAVF_GTPU_EH_DWLINK) > + GTPU_EH, QFI); > + else if (gtp_psc_spec->pdu_type == > IAVF_GTPU_EH_DWLINK) > VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, > GTPU_DWN, QFI); > - else > + else if (gtp_psc_spec->pdu_type == > IAVF_GTPU_EH_UPLINK) > VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, > - GTPU_EH, QFI); > + GTPU_UP, QFI); > } > > rte_memcpy(hdr->buffer, gtp_psc_spec, > -- > 2.25.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [dpdk-dev] [PATCH v3] net/iavf: fix QFI field bit check for GTPU EH 2021-09-29 12:31 ` [dpdk-dev] [PATCH v2] " Junfeng Guo 2021-10-07 4:24 ` Zhang, Qi Z @ 2021-10-08 10:41 ` Junfeng Guo 2021-10-08 6:09 ` Zhang, Qi Z 1 sibling, 1 reply; 6+ messages in thread From: Junfeng Guo @ 2021-10-08 10:41 UTC (permalink / raw) To: qi.z.zhang, jingjing.wu, beilei.xing Cc: dev, ferruh.yigit, junfeng.guo, stable If GTPU Extionsion header has no pdu_type setting, the parsed value of gtp_psc_spec->hdr.type will be 0, which is same as IAVF_GTPU_EH_DWLINK. Thus, for this case, we should check gtp_psc_mask->hdr.type instead, to set QFI field bit of GTPU_EH first. Fixes: cd212c466992 ("net/iavf: fix QFI fields of GTPU UL/DL for flow director") Cc: stable@dpdk.org Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> --- drivers/net/iavf/iavf_fdir.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/iavf/iavf_fdir.c b/drivers/net/iavf/iavf_fdir.c index ea2b692712..ea99806330 100644 --- a/drivers/net/iavf/iavf_fdir.c +++ b/drivers/net/iavf/iavf_fdir.c @@ -1172,7 +1172,10 @@ iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad, if (gtp_psc_spec && gtp_psc_mask) { if (gtp_psc_mask->hdr.qfi == 0x3F) { input_set |= IAVF_INSET_GTPU_QFI; - if (gtp_psc_spec->hdr.type == + if (!gtp_psc_mask->hdr.type) + VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, + GTPU_EH, QFI); + else if (gtp_psc_spec->hdr.type == IAVF_GTPU_EH_UPLINK) VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, GTPU_UP, QFI); @@ -1180,9 +1183,6 @@ iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad, IAVF_GTPU_EH_DWLINK) VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, GTPU_DWN, QFI); - else - VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, - GTPU_EH, QFI); } rte_memcpy(hdr->buffer, gtp_psc_spec, -- 2.25.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [dpdk-dev] [PATCH v3] net/iavf: fix QFI field bit check for GTPU EH 2021-10-08 10:41 ` [dpdk-dev] [PATCH v3] " Junfeng Guo @ 2021-10-08 6:09 ` Zhang, Qi Z 2021-10-08 11:01 ` [dpdk-dev] [dpdk-stable] " David Marchand 0 siblings, 1 reply; 6+ messages in thread From: Zhang, Qi Z @ 2021-10-08 6:09 UTC (permalink / raw) To: Guo, Junfeng, Wu, Jingjing, Xing, Beilei; +Cc: dev, Yigit, Ferruh, stable > -----Original Message----- > From: Guo, Junfeng <junfeng.guo@intel.com> > Sent: Friday, October 8, 2021 6:42 PM > To: Zhang, Qi Z <qi.z.zhang@intel.com>; Wu, Jingjing <jingjing.wu@intel.com>; > Xing, Beilei <beilei.xing@intel.com> > Cc: dev@dpdk.org; Yigit, Ferruh <ferruh.yigit@intel.com>; Guo, Junfeng > <junfeng.guo@intel.com>; stable@dpdk.org > Subject: [PATCH v3] net/iavf: fix QFI field bit check for GTPU EH > > If GTPU Extionsion header has no pdu_type setting, the parsed value of > gtp_psc_spec->hdr.type will be 0, which is same as IAVF_GTPU_EH_DWLINK. > Thus, for this case, we should check gtp_psc_mask->hdr.type instead, to set > QFI field bit of GTPU_EH first. > > Fixes: cd212c466992 ("net/iavf: fix QFI fields of GTPU UL/DL for flow director") > Cc: stable@dpdk.org > > Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com> Applied to dpdk-next-net-intel. Thanks Qi ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [dpdk-dev] [dpdk-stable] [PATCH v3] net/iavf: fix QFI field bit check for GTPU EH 2021-10-08 6:09 ` Zhang, Qi Z @ 2021-10-08 11:01 ` David Marchand 0 siblings, 0 replies; 6+ messages in thread From: David Marchand @ 2021-10-08 11:01 UTC (permalink / raw) To: Zhang, Qi Z Cc: Guo, Junfeng, Wu, Jingjing, Xing, Beilei, dev, Yigit, Ferruh, stable, Thomas Monjalon On Fri, Oct 8, 2021 at 8:09 AM Zhang, Qi Z <qi.z.zhang@intel.com> wrote: > > -----Original Message----- > > From: Guo, Junfeng <junfeng.guo@intel.com> > > Sent: Friday, October 8, 2021 6:42 PM > > To: Zhang, Qi Z <qi.z.zhang@intel.com>; Wu, Jingjing <jingjing.wu@intel.com>; > > Xing, Beilei <beilei.xing@intel.com> > > Cc: dev@dpdk.org; Yigit, Ferruh <ferruh.yigit@intel.com>; Guo, Junfeng > > <junfeng.guo@intel.com>; stable@dpdk.org > > Subject: [PATCH v3] net/iavf: fix QFI field bit check for GTPU EH > > > > If GTPU Extionsion header has no pdu_type setting, the parsed value of extension. > > gtp_psc_spec->hdr.type will be 0, which is same as IAVF_GTPU_EH_DWLINK. > > Thus, for this case, we should check gtp_psc_mask->hdr.type instead, to set > > QFI field bit of GTPU_EH first. > > > > Fixes: cd212c466992 ("net/iavf: fix QFI fields of GTPU UL/DL for flow director") This patch fixes a 3 weeks old patch that was itself fixing. Fixes: 78e8a87f6324 ("net/iavf: fix GTPU UL and DL support for flow director") I hope all tests are now fine. > > Cc: stable@dpdk.org > > > > Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> > > Acked-by: Qi Zhang <qi.z.zhang@intel.com> > > Applied to dpdk-next-net-intel. -- David Marchand ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2021-10-08 11:02 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2021-09-29 11:13 [dpdk-dev] [PATCH] net/iavf: fix QFI field bit check for GTPU EH Junfeng Guo 2021-09-29 12:31 ` [dpdk-dev] [PATCH v2] " Junfeng Guo 2021-10-07 4:24 ` Zhang, Qi Z 2021-10-08 10:41 ` [dpdk-dev] [PATCH v3] " Junfeng Guo 2021-10-08 6:09 ` Zhang, Qi Z 2021-10-08 11:01 ` [dpdk-dev] [dpdk-stable] " David Marchand
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