* [PATCH v1] net/ice: support max burst size configuration
@ 2021-11-11 6:38 Wenjun Wu
0 siblings, 0 replies; only message in thread
From: Wenjun Wu @ 2021-11-11 6:38 UTC (permalink / raw)
To: dev, qi.z.zhang; +Cc: Wenjun Wu
This patch adds support for max burst size configuration for
TX scheduler. This feature can be tuned on by devargs:
-a 0000:18:00.0,max_burst_size=x
The value of x should between 64 and 1023*1024.
Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
---
drivers/net/ice/ice_ethdev.c | 36 ++++++++++++++++++++++++++++++++++++
drivers/net/ice/ice_ethdev.h | 1 +
2 files changed, 37 insertions(+)
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 13a7a9702a..2ba42840e2 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -32,6 +32,7 @@
#define ICE_HW_DEBUG_MASK_ARG "hw_debug_mask"
#define ICE_ONE_PPS_OUT_ARG "pps_out"
#define ICE_RX_LOW_LATENCY_ARG "rx_low_latency"
+#define ICE_MAX_BURST_SIZE_ARG "max_burst_size"
#define ICE_CYCLECOUNTER_MASK 0xffffffffffffffffULL
@@ -45,6 +46,7 @@ static const char * const ice_valid_args[] = {
ICE_HW_DEBUG_MASK_ARG,
ICE_ONE_PPS_OUT_ARG,
ICE_RX_LOW_LATENCY_ARG,
+ ICE_MAX_BURST_SIZE_ARG,
NULL
};
@@ -1943,6 +1945,25 @@ handle_pps_out_arg(__rte_unused const char *key, const char *value,
return 0;
}
+static int
+parse_u16(const char *key, const char *value, void *args)
+{
+ u16 *num = (u16 *)args;
+ u16 tmp;
+
+ errno = 0;
+ tmp = strtoull(value, NULL, 10);
+ if (errno) {
+ PMD_DRV_LOG(WARNING, "%s: \"%s\" is not a valid u16",
+ key, value);
+ return -1;
+ }
+
+ *num = tmp;
+
+ return 0;
+}
+
static int ice_parse_devargs(struct rte_eth_dev *dev)
{
struct ice_adapter *ad =
@@ -1991,6 +2012,13 @@ static int ice_parse_devargs(struct rte_eth_dev *dev)
ret = rte_kvargs_process(kvlist, ICE_RX_LOW_LATENCY_ARG,
&parse_bool, &ad->devargs.rx_low_latency);
+ if (ret)
+ goto bail;
+
+ ret = rte_kvargs_process(kvlist, ICE_MAX_BURST_SIZE_ARG,
+ &parse_u16, &ad->devargs.max_burst_size);
+ if (ret)
+ goto bail;
bail:
rte_kvargs_free(kvlist);
@@ -2199,6 +2227,14 @@ ice_dev_init(struct rte_eth_dev *dev)
ice_init_controlq_parameter(hw);
+ if (ad->devargs.max_burst_size) {
+ ret = ice_cfg_rl_burst_size(hw, ad->devargs.max_burst_size);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "Failed to configure burst size");
+ return -EINVAL;
+ }
+ }
+
ret = ice_init_hw(hw);
if (ret) {
PMD_INIT_LOG(ERR, "Failed to initialize HW");
diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h
index 3a5bb9bbc6..005bb25535 100644
--- a/drivers/net/ice/ice_ethdev.h
+++ b/drivers/net/ice/ice_ethdev.h
@@ -490,6 +490,7 @@ struct ice_devargs {
uint8_t proto_xtr[ICE_MAX_QUEUE_NUM];
uint8_t pin_idx;
uint8_t pps_out_ena;
+ uint16_t max_burst_size;
};
/**
--
2.25.1
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