* [PATCH 0/2] simplify building x86 code with AVX2 support
@ 2023-07-27 9:31 Bruce Richardson
2023-07-27 9:31 ` [PATCH 1/2] build/x86: remove conditional checks for " Bruce Richardson
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Bruce Richardson @ 2023-07-27 9:31 UTC (permalink / raw)
To: dev; +Cc: Bruce Richardson
Inside our optimized vector drivers (and libs), there were always build
time checks for various levels of instruction set support, most
notably AVX2 and AVX-512 on x86 systems. One of the checks done in
each case was verifying that the compiler used was able to generate
AVX code appropriately. However, since this was originally done,
our minimum compiler support has been updated and so we no longer
need to check this - all supported compilers can generate AVX2.
This allows us to simplify the build logic for the x86 vector code.
In future, we can do similarly for AVX-512.
Bruce Richardson (2):
build/x86: remove conditional checks for AVX2 support
build: remove unnecessary AVX2 compiler flag
drivers/net/bnxt/bnxt_ethdev.c | 8 ++++----
drivers/net/bnxt/bnxt_rxr.h | 2 +-
drivers/net/bnxt/bnxt_txr.h | 2 +-
drivers/net/bnxt/meson.build | 26 +++++++++----------------
drivers/net/enic/meson.build | 10 +++-------
drivers/net/i40e/i40e_rxtx.c | 14 ++++---------
drivers/net/i40e/meson.build | 22 ++++++---------------
drivers/net/iavf/iavf_rxtx_vec_common.h | 2 +-
drivers/net/iavf/meson.build | 22 ++++++---------------
drivers/net/ice/meson.build | 21 ++++++--------------
lib/acl/meson.build | 23 +++++-----------------
lib/acl/rte_acl.c | 10 +++-------
12 files changed, 49 insertions(+), 113 deletions(-)
--
2.39.2
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/2] build/x86: remove conditional checks for AVX2 support
2023-07-27 9:31 [PATCH 0/2] simplify building x86 code with AVX2 support Bruce Richardson
@ 2023-07-27 9:31 ` Bruce Richardson
2023-07-27 9:31 ` [PATCH 2/2] build: remove unnecessary AVX2 compiler flag Bruce Richardson
2023-10-12 12:37 ` [PATCH 0/2] simplify building x86 code with AVX2 support David Marchand
2 siblings, 0 replies; 4+ messages in thread
From: Bruce Richardson @ 2023-07-27 9:31 UTC (permalink / raw)
To: dev; +Cc: Bruce Richardson
In a number of libraries and drivers we have multiple levels of checks
for enabling AVX2 support. In these cases:
* we first check for AVX2 support in the build-time ISA, i.e. through
the instruction-set/-march flag. If present, we add source file to the
list of sources.
* if not enabled at the minimum instruction-set level, i.e. a
default/generic build, we then check for compiler support for AVX2
and, if available, did a separate build of the AVX2 file using an
additional flag to enable the instruction set.
While this works, and was necessary in older releases, we no longer need
this level of complexity, as all supported DPDK compilers have support
for AVX2. This makes the second check unnecessary.
However, when we look at the effect of the second option above vs the
first, the only real difference is that in the second case, we add an
additional "-mavx2" to the build flags. This flag simply makes the
instruction set available for use, so should be harmless in the case
where the "march" flag already has that instruction set available.
Therefore, we can remove the check for the first case also, and always
use the fallback case with the extra flag.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/bnxt/meson.build | 27 ++++++++++-----------------
drivers/net/enic/meson.build | 10 +++-------
drivers/net/i40e/meson.build | 23 +++++++----------------
drivers/net/iavf/meson.build | 23 +++++++----------------
drivers/net/ice/meson.build | 22 +++++++---------------
lib/acl/meson.build | 24 ++++++------------------
6 files changed, 40 insertions(+), 89 deletions(-)
diff --git a/drivers/net/bnxt/meson.build b/drivers/net/bnxt/meson.build
index c7a0d5f6c9..c223a21002 100644
--- a/drivers/net/bnxt/meson.build
+++ b/drivers/net/bnxt/meson.build
@@ -53,23 +53,16 @@ subdir('hcapi/cfa')
if arch_subdir == 'x86'
sources += files('bnxt_rxtx_vec_sse.c')
- # compile AVX2 version if either:
- # a. we have AVX supported in minimum instruction set baseline
- # b. it's not minimum instruction set, but supported by compiler
- if cc.get_define('__AVX2__', args: machine_args) != ''
- cflags += ['-DCC_AVX2_SUPPORT']
- sources += files('bnxt_rxtx_vec_avx2.c')
- elif cc.has_argument('-mavx2')
- cflags += ['-DCC_AVX2_SUPPORT']
- bnxt_avx2_lib = static_library('bnxt_avx2_lib',
- 'bnxt_rxtx_vec_avx2.c',
- dependencies: [static_rte_ethdev,
- static_rte_bus_pci,
- static_rte_kvargs, static_rte_hash],
- include_directories: includes,
- c_args: [cflags, '-mavx2'])
- objs += bnxt_avx2_lib.extract_objects('bnxt_rxtx_vec_avx2.c')
- endif
+ cflags += ['-DCC_AVX2_SUPPORT']
+ # build AVX2 code with instruction set explicitly enabled for runtime selection
+ bnxt_avx2_lib = static_library('bnxt_avx2_lib',
+ 'bnxt_rxtx_vec_avx2.c',
+ dependencies: [static_rte_ethdev,
+ static_rte_bus_pci,
+ static_rte_kvargs, static_rte_hash],
+ include_directories: includes,
+ c_args: [cflags, '-mavx2'])
+ objs += bnxt_avx2_lib.extract_objects('bnxt_rxtx_vec_avx2.c')
elif arch_subdir == 'arm' and dpdk_conf.get('RTE_ARCH_64')
sources += files('bnxt_rxtx_vec_neon.c')
endif
diff --git a/drivers/net/enic/meson.build b/drivers/net/enic/meson.build
index 77dcd9e7ec..8700ae27f2 100644
--- a/drivers/net/enic/meson.build
+++ b/drivers/net/enic/meson.build
@@ -28,14 +28,10 @@ sources = files(
deps += ['hash']
includes += include_directories('base')
-# The current implementation assumes 64-bit pointers
-if cc.get_define('__AVX2__', args: machine_args) != '' and dpdk_conf.get('RTE_ARCH_64')
- sources += files('enic_rxtx_vec_avx2.c')
-# Build the avx2 handler if the compiler supports it, even though 'machine'
-# does not. This is to support users who build for the min supported machine
+# Build the avx2 handler for 64-bit X86 targets, even though 'machine'
+# may not. This is to support users who build for the min supported machine
# and need to run the binary on newer CPUs too.
-# This part is from i40e meson.build
-elif cc.has_argument('-mavx2') and dpdk_conf.get('RTE_ARCH_64')
+if dpdk_conf.has('RTE_ARCH_X86_64')
enic_avx2_lib = static_library('enic_avx2_lib',
'enic_rxtx_vec_avx2.c',
dependencies: [static_rte_ethdev, static_rte_bus_pci],
diff --git a/drivers/net/i40e/meson.build b/drivers/net/i40e/meson.build
index 8e53b87a65..46600520e1 100644
--- a/drivers/net/i40e/meson.build
+++ b/drivers/net/i40e/meson.build
@@ -49,22 +49,13 @@ if arch_subdir == 'x86'
cflags += ['-fno-asynchronous-unwind-tables']
endif
- # compile AVX2 version if either:
- # a. we have AVX supported in minimum instruction set baseline
- # b. it's not minimum instruction set, but supported by compiler
- if cc.get_define('__AVX2__', args: machine_args) != ''
- cflags += ['-DCC_AVX2_SUPPORT']
- sources += files('i40e_rxtx_vec_avx2.c')
- elif cc.has_argument('-mavx2')
- cflags += ['-DCC_AVX2_SUPPORT']
- i40e_avx2_lib = static_library('i40e_avx2_lib',
- 'i40e_rxtx_vec_avx2.c',
- dependencies: [static_rte_ethdev,
- static_rte_kvargs, static_rte_hash],
- include_directories: includes,
- c_args: [cflags, '-mavx2'])
- objs += i40e_avx2_lib.extract_objects('i40e_rxtx_vec_avx2.c')
- endif
+ cflags += ['-DCC_AVX2_SUPPORT']
+ i40e_avx2_lib = static_library('i40e_avx2_lib',
+ 'i40e_rxtx_vec_avx2.c',
+ dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],
+ include_directories: includes,
+ c_args: [cflags, '-mavx2'])
+ objs += i40e_avx2_lib.extract_objects('i40e_rxtx_vec_avx2.c')
i40e_avx512_cpu_support = (
cc.get_define('__AVX512F__', args: machine_args) != '' and
diff --git a/drivers/net/iavf/meson.build b/drivers/net/iavf/meson.build
index fc09ffa2ae..ff949ef92b 100644
--- a/drivers/net/iavf/meson.build
+++ b/drivers/net/iavf/meson.build
@@ -29,22 +29,13 @@ if arch_subdir == 'x86'
cflags += ['-fno-asynchronous-unwind-tables']
endif
- # compile AVX2 version if either:
- # a. we have AVX supported in minimum instruction set baseline
- # b. it's not minimum instruction set, but supported by compiler
- if cc.get_define('__AVX2__', args: machine_args) != ''
- cflags += ['-DCC_AVX2_SUPPORT']
- sources += files('iavf_rxtx_vec_avx2.c')
- elif cc.has_argument('-mavx2')
- cflags += ['-DCC_AVX2_SUPPORT']
- iavf_avx2_lib = static_library('iavf_avx2_lib',
- 'iavf_rxtx_vec_avx2.c',
- dependencies: [static_rte_ethdev,
- static_rte_kvargs, static_rte_hash],
- include_directories: includes,
- c_args: [cflags, '-mavx2'])
- objs += iavf_avx2_lib.extract_objects('iavf_rxtx_vec_avx2.c')
- endif
+ cflags += ['-DCC_AVX2_SUPPORT']
+ iavf_avx2_lib = static_library('iavf_avx2_lib',
+ 'iavf_rxtx_vec_avx2.c',
+ dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],
+ include_directories: includes,
+ c_args: [cflags, '-mavx2'])
+ objs += iavf_avx2_lib.extract_objects('iavf_rxtx_vec_avx2.c')
iavf_avx512_cpu_support = (
cc.get_define('__AVX512F__', args: machine_args) != '' and
diff --git a/drivers/net/ice/meson.build b/drivers/net/ice/meson.build
index 460528854a..98288f6ac0 100644
--- a/drivers/net/ice/meson.build
+++ b/drivers/net/ice/meson.build
@@ -28,21 +28,13 @@ if arch_subdir == 'x86'
cflags += ['-fno-asynchronous-unwind-tables']
endif
- # compile AVX2 version if either:
- # a. we have AVX supported in minimum instruction set baseline
- # b. it's not minimum instruction set, but supported by compiler
- if cc.get_define('__AVX2__', args: machine_args) != ''
- cflags += ['-DCC_AVX2_SUPPORT']
- sources += files('ice_rxtx_vec_avx2.c')
- elif cc.has_argument('-mavx2')
- cflags += ['-DCC_AVX2_SUPPORT']
- ice_avx2_lib = static_library('ice_avx2_lib',
- 'ice_rxtx_vec_avx2.c',
- dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],
- include_directories: includes,
- c_args: [cflags, '-mavx2'])
- objs += ice_avx2_lib.extract_objects('ice_rxtx_vec_avx2.c')
- endif
+ cflags += ['-DCC_AVX2_SUPPORT']
+ ice_avx2_lib = static_library('ice_avx2_lib',
+ 'ice_rxtx_vec_avx2.c',
+ dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],
+ include_directories: includes,
+ c_args: [cflags, '-mavx2'])
+ objs += ice_avx2_lib.extract_objects('ice_rxtx_vec_avx2.c')
ice_avx512_cpu_support = (
cc.get_define('__AVX512F__', args: machine_args) != '' and
diff --git a/lib/acl/meson.build b/lib/acl/meson.build
index fbe17f9454..87f19757a8 100644
--- a/lib/acl/meson.build
+++ b/lib/acl/meson.build
@@ -14,24 +14,12 @@ headers = files('rte_acl.h', 'rte_acl_osdep.h')
if dpdk_conf.has('RTE_ARCH_X86')
sources += files('acl_run_sse.c')
- # compile AVX2 version if either:
- # a. we have AVX supported in minimum instruction set baseline
- # b. it's not minimum instruction set, but supported by compiler
- #
- # in former case, just add avx2 C file to files list
- # in latter case, compile c file to static lib, using correct compiler
- # flags, and then have the .o file from static lib linked into main lib.
- if cc.get_define('__AVX2__', args: machine_args) != ''
- sources += files('acl_run_avx2.c')
- cflags += '-DCC_AVX2_SUPPORT'
- elif cc.has_argument('-mavx2')
- avx2_tmplib = static_library('avx2_tmp',
- 'acl_run_avx2.c',
- dependencies: static_rte_eal,
- c_args: cflags + ['-mavx2'])
- objs += avx2_tmplib.extract_objects('acl_run_avx2.c')
- cflags += '-DCC_AVX2_SUPPORT'
- endif
+ cflags += '-DCC_AVX2_SUPPORT'
+ avx2_tmplib = static_library('avx2_tmp',
+ 'acl_run_avx2.c',
+ dependencies: static_rte_eal,
+ c_args: cflags + ['-mavx2'])
+ objs += avx2_tmplib.extract_objects('acl_run_avx2.c')
# compile AVX512 version if:
# we are building 64-bit binary AND binutils can generate proper code
--
2.39.2
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 2/2] build: remove unnecessary AVX2 compiler flag
2023-07-27 9:31 [PATCH 0/2] simplify building x86 code with AVX2 support Bruce Richardson
2023-07-27 9:31 ` [PATCH 1/2] build/x86: remove conditional checks for " Bruce Richardson
@ 2023-07-27 9:31 ` Bruce Richardson
2023-10-12 12:37 ` [PATCH 0/2] simplify building x86 code with AVX2 support David Marchand
2 siblings, 0 replies; 4+ messages in thread
From: Bruce Richardson @ 2023-07-27 9:31 UTC (permalink / raw)
To: dev; +Cc: Bruce Richardson
Since AVX2 is always available at build time, the CC_AVX2_SUPPORT cflag
became equivalent to the RTE_ARCH_X86 one. Therefore, we can just remove
all use of the flag, replacing it will the RTE_ARCH_X86 one, and also
simplifying the code in a few places where we can merge with other
X86/non-X86 blocks e.g. for providing SSE fallbacks.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
drivers/net/bnxt/bnxt_ethdev.c | 8 ++++----
drivers/net/bnxt/bnxt_rxr.h | 2 +-
drivers/net/bnxt/bnxt_txr.h | 2 +-
drivers/net/bnxt/meson.build | 1 -
drivers/net/i40e/i40e_rxtx.c | 14 ++++----------
drivers/net/i40e/meson.build | 1 -
drivers/net/iavf/iavf_rxtx_vec_common.h | 2 +-
drivers/net/iavf/meson.build | 1 -
drivers/net/ice/meson.build | 1 -
lib/acl/meson.build | 1 -
lib/acl/rte_acl.c | 10 +++-------
11 files changed, 14 insertions(+), 29 deletions(-)
diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index ee1552452a..e8c178241f 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -1280,7 +1280,7 @@ bnxt_receive_function(struct rte_eth_dev *eth_dev)
if (bp->ieee_1588)
goto use_scalar_rx;
-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)
+#if defined(RTE_ARCH_X86)
if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 &&
rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1) {
PMD_DRV_LOG(INFO,
@@ -1332,7 +1332,7 @@ bnxt_transmit_function(struct rte_eth_dev *eth_dev)
BNXT_TRUFLOW_EN(bp) || bp->ieee_1588)
goto use_scalar_tx;
-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)
+#if defined(RTE_ARCH_X86)
if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 &&
rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1) {
PMD_DRV_LOG(INFO,
@@ -3019,7 +3019,7 @@ static const struct {
#if defined(RTE_ARCH_X86)
{bnxt_recv_pkts_vec, "Vector SSE"},
#endif
-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)
+#if defined(RTE_ARCH_X86)
{bnxt_recv_pkts_vec_avx2, "Vector AVX2"},
#endif
#if defined(RTE_ARCH_ARM64)
@@ -3053,7 +3053,7 @@ static const struct {
#if defined(RTE_ARCH_X86)
{bnxt_xmit_pkts_vec, "Vector SSE"},
#endif
-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)
+#if defined(RTE_ARCH_X86)
{bnxt_xmit_pkts_vec_avx2, "Vector AVX2"},
#endif
#if defined(RTE_ARCH_ARM64)
diff --git a/drivers/net/bnxt/bnxt_rxr.h b/drivers/net/bnxt/bnxt_rxr.h
index 8e722b7bf0..af53bc0c25 100644
--- a/drivers/net/bnxt/bnxt_rxr.h
+++ b/drivers/net/bnxt/bnxt_rxr.h
@@ -112,7 +112,7 @@ uint16_t bnxt_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
int bnxt_rxq_vec_setup(struct bnxt_rx_queue *rxq);
#endif
-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)
+#if defined(RTE_ARCH_X86)
uint16_t bnxt_recv_pkts_vec_avx2(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts);
#endif
diff --git a/drivers/net/bnxt/bnxt_txr.h b/drivers/net/bnxt/bnxt_txr.h
index 8e391ee58a..e64ea2c7d1 100644
--- a/drivers/net/bnxt/bnxt_txr.h
+++ b/drivers/net/bnxt/bnxt_txr.h
@@ -52,7 +52,7 @@ uint16_t bnxt_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t bnxt_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
#endif
-#if defined(RTE_ARCH_X86) && defined(CC_AVX2_SUPPORT)
+#if defined(RTE_ARCH_X86)
uint16_t bnxt_xmit_pkts_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
#endif
diff --git a/drivers/net/bnxt/meson.build b/drivers/net/bnxt/meson.build
index c223a21002..1f9ce51f43 100644
--- a/drivers/net/bnxt/meson.build
+++ b/drivers/net/bnxt/meson.build
@@ -53,7 +53,6 @@ subdir('hcapi/cfa')
if arch_subdir == 'x86'
sources += files('bnxt_rxtx_vec_sse.c')
- cflags += ['-DCC_AVX2_SUPPORT']
# build AVX2 code with instruction set explicitly enabled for runtime selection
bnxt_avx2_lib = static_library('bnxt_avx2_lib',
'bnxt_rxtx_vec_avx2.c',
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index b4f65b58fa..63fef1a5ea 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -3216,15 +3216,9 @@ get_avx_supported(bool request_avx512)
#endif
} else {
if (rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 &&
- rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1)
-#ifdef CC_AVX2_SUPPORT
+ rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) == 1 &&
+ rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) == 1)
return true;
-#else
- PMD_DRV_LOG(NOTICE,
- "AVX2 is not supported in build env");
- return false;
-#endif
}
return false;
@@ -3608,7 +3602,7 @@ i40e_set_default_pctype_table(struct rte_eth_dev *dev)
}
}
-#ifndef CC_AVX2_SUPPORT
+#ifndef RTE_ARCH_X86
uint16_t
i40e_recv_pkts_vec_avx2(void __rte_unused *rx_queue,
struct rte_mbuf __rte_unused **rx_pkts,
@@ -3632,4 +3626,4 @@ i40e_xmit_pkts_vec_avx2(void __rte_unused * tx_queue,
{
return 0;
}
-#endif /* ifndef CC_AVX2_SUPPORT */
+#endif /* ifndef RTE_ARCH_X86 */
diff --git a/drivers/net/i40e/meson.build b/drivers/net/i40e/meson.build
index 46600520e1..f8827e4995 100644
--- a/drivers/net/i40e/meson.build
+++ b/drivers/net/i40e/meson.build
@@ -49,7 +49,6 @@ if arch_subdir == 'x86'
cflags += ['-fno-asynchronous-unwind-tables']
endif
- cflags += ['-DCC_AVX2_SUPPORT']
i40e_avx2_lib = static_library('i40e_avx2_lib',
'i40e_rxtx_vec_avx2.c',
dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],
diff --git a/drivers/net/iavf/iavf_rxtx_vec_common.h b/drivers/net/iavf/iavf_rxtx_vec_common.h
index ddb13ce8c3..25f22d7267 100644
--- a/drivers/net/iavf/iavf_rxtx_vec_common.h
+++ b/drivers/net/iavf/iavf_rxtx_vec_common.h
@@ -396,7 +396,7 @@ iavf_txd_enable_offload(__rte_unused struct rte_mbuf *tx_pkt,
*txd_hi |= ((uint64_t)td_cmd) << IAVF_TXD_QW1_CMD_SHIFT;
}
-#ifdef CC_AVX2_SUPPORT
+#ifdef RTE_ARCH_X86
static __rte_always_inline void
iavf_rxq_rearm_common(struct iavf_rx_queue *rxq, __rte_unused bool avx512)
{
diff --git a/drivers/net/iavf/meson.build b/drivers/net/iavf/meson.build
index ff949ef92b..a6ce2725c3 100644
--- a/drivers/net/iavf/meson.build
+++ b/drivers/net/iavf/meson.build
@@ -29,7 +29,6 @@ if arch_subdir == 'x86'
cflags += ['-fno-asynchronous-unwind-tables']
endif
- cflags += ['-DCC_AVX2_SUPPORT']
iavf_avx2_lib = static_library('iavf_avx2_lib',
'iavf_rxtx_vec_avx2.c',
dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],
diff --git a/drivers/net/ice/meson.build b/drivers/net/ice/meson.build
index 98288f6ac0..a957fc5d3a 100644
--- a/drivers/net/ice/meson.build
+++ b/drivers/net/ice/meson.build
@@ -28,7 +28,6 @@ if arch_subdir == 'x86'
cflags += ['-fno-asynchronous-unwind-tables']
endif
- cflags += ['-DCC_AVX2_SUPPORT']
ice_avx2_lib = static_library('ice_avx2_lib',
'ice_rxtx_vec_avx2.c',
dependencies: [static_rte_ethdev, static_rte_kvargs, static_rte_hash],
diff --git a/lib/acl/meson.build b/lib/acl/meson.build
index 87f19757a8..9cba08321a 100644
--- a/lib/acl/meson.build
+++ b/lib/acl/meson.build
@@ -14,7 +14,6 @@ headers = files('rte_acl.h', 'rte_acl_osdep.h')
if dpdk_conf.has('RTE_ARCH_X86')
sources += files('acl_run_sse.c')
- cflags += '-DCC_AVX2_SUPPORT'
avx2_tmplib = static_library('avx2_tmp',
'acl_run_avx2.c',
dependencies: static_rte_eal,
diff --git a/lib/acl/rte_acl.c b/lib/acl/rte_acl.c
index a61c3ba188..4182006d1d 100644
--- a/lib/acl/rte_acl.c
+++ b/lib/acl/rte_acl.c
@@ -42,10 +42,9 @@ rte_acl_classify_avx512x32(__rte_unused const struct rte_acl_ctx *ctx,
}
#endif
-#ifndef CC_AVX2_SUPPORT
+#ifndef RTE_ARCH_X86
/*
- * If the compiler doesn't support AVX2 instructions,
- * then the dummy one would be used instead for AVX2 classify method.
+ * If ISA doesn't have AVX2 or SSE, provide dummy fallbacks
*/
int
rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,
@@ -56,9 +55,6 @@ rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,
{
return -ENOTSUP;
}
-#endif
-
-#ifndef RTE_ARCH_X86
int
rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
__rte_unused const uint8_t **data,
@@ -182,7 +178,7 @@ acl_check_alg_x86(enum rte_acl_classify_alg alg)
}
if (alg == RTE_ACL_CLASSIFY_AVX2) {
-#ifdef CC_AVX2_SUPPORT
+#ifdef RTE_ARCH_X86
if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) &&
rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_256)
return 0;
--
2.39.2
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 0/2] simplify building x86 code with AVX2 support
2023-07-27 9:31 [PATCH 0/2] simplify building x86 code with AVX2 support Bruce Richardson
2023-07-27 9:31 ` [PATCH 1/2] build/x86: remove conditional checks for " Bruce Richardson
2023-07-27 9:31 ` [PATCH 2/2] build: remove unnecessary AVX2 compiler flag Bruce Richardson
@ 2023-10-12 12:37 ` David Marchand
2 siblings, 0 replies; 4+ messages in thread
From: David Marchand @ 2023-10-12 12:37 UTC (permalink / raw)
To: Bruce Richardson; +Cc: dev, Ferruh Yigit
Hello Bruce,
On Thu, Jul 27, 2023 at 11:31 AM Bruce Richardson
<bruce.richardson@intel.com> wrote:
>
> Inside our optimized vector drivers (and libs), there were always build
> time checks for various levels of instruction set support, most
> notably AVX2 and AVX-512 on x86 systems. One of the checks done in
> each case was verifying that the compiler used was able to generate
> AVX code appropriately. However, since this was originally done,
> our minimum compiler support has been updated and so we no longer
> need to check this - all supported compilers can generate AVX2.
> This allows us to simplify the build logic for the x86 vector code.
>
> In future, we can do similarly for AVX-512.
>
> Bruce Richardson (2):
> build/x86: remove conditional checks for AVX2 support
> build: remove unnecessary AVX2 compiler flag
>
> drivers/net/bnxt/bnxt_ethdev.c | 8 ++++----
> drivers/net/bnxt/bnxt_rxr.h | 2 +-
> drivers/net/bnxt/bnxt_txr.h | 2 +-
> drivers/net/bnxt/meson.build | 26 +++++++++----------------
> drivers/net/enic/meson.build | 10 +++-------
> drivers/net/i40e/i40e_rxtx.c | 14 ++++---------
> drivers/net/i40e/meson.build | 22 ++++++---------------
> drivers/net/iavf/iavf_rxtx_vec_common.h | 2 +-
> drivers/net/iavf/meson.build | 22 ++++++---------------
> drivers/net/ice/meson.build | 21 ++++++--------------
> lib/acl/meson.build | 23 +++++-----------------
> lib/acl/rte_acl.c | 10 +++-------
> 12 files changed, 49 insertions(+), 113 deletions(-)
Sorry, this series had fallen through the cracks... though I intended
to apply with other build update series.
It still applies fine, I ran my checks and I see nothing wrong with the series.
Applied, thanks for the cleanup.
--
David Marchand
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-10-12 12:38 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2023-07-27 9:31 [PATCH 0/2] simplify building x86 code with AVX2 support Bruce Richardson
2023-07-27 9:31 ` [PATCH 1/2] build/x86: remove conditional checks for " Bruce Richardson
2023-07-27 9:31 ` [PATCH 2/2] build: remove unnecessary AVX2 compiler flag Bruce Richardson
2023-10-12 12:37 ` [PATCH 0/2] simplify building x86 code with AVX2 support David Marchand
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