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From: "Ananyev, Konstantin" <konstantin.ananyev@intel.com>
To: Jerin Jacob <jerin.jacob@caviumnetworks.com>,
	"dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH 2/3] arm64: acl: add neon based acl implementation
Date: Mon, 2 Nov 2015 16:54:24 +0000	[thread overview]
Message-ID: <2601191342CEEE43887BDE71AB97725836AB86A5@irsmsx105.ger.corp.intel.com> (raw)
In-Reply-To: <1446473921-12706-3-git-send-email-jerin.jacob@caviumnetworks.com>

Hi Jacob,

> diff --git a/lib/librte_acl/rte_acl.c b/lib/librte_acl/rte_acl.c
> index d60219f..e2fdebd 100644
> --- a/lib/librte_acl/rte_acl.c
> +++ b/lib/librte_acl/rte_acl.c
> @@ -55,11 +55,32 @@ rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,
>  	return -ENOTSUP;
>  }
> 
> +int __attribute__ ((weak))
> +rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
> +	__rte_unused const uint8_t **data,
> +	__rte_unused uint32_t *results,
> +	__rte_unused uint32_t num,
> +	__rte_unused uint32_t categories)
> +{
> +	return -ENOTSUP;
> +}
> +
> +int __attribute__ ((weak))
> +rte_acl_classify_neon(__rte_unused const struct rte_acl_ctx *ctx,
> +	__rte_unused const uint8_t **data,
> +	__rte_unused uint32_t *results,
> +	__rte_unused uint32_t num,
> +	__rte_unused uint32_t categories)
> +{
> +	return -ENOTSUP;
> +}
> +
>  static const rte_acl_classify_t classify_fns[] = {
>  	[RTE_ACL_CLASSIFY_DEFAULT] = rte_acl_classify_scalar,
>  	[RTE_ACL_CLASSIFY_SCALAR] = rte_acl_classify_scalar,
>  	[RTE_ACL_CLASSIFY_SSE] = rte_acl_classify_sse,
>  	[RTE_ACL_CLASSIFY_AVX2] = rte_acl_classify_avx2,
> +	[RTE_ACL_CLASSIFY_NEON] = rte_acl_classify_neon,
>  };
> 
>  /* by default, use always available scalar code path. */
> @@ -93,6 +114,9 @@ rte_acl_init(void)
>  {
>  	enum rte_acl_classify_alg alg = RTE_ACL_CLASSIFY_DEFAULT;
> 
> +#ifdef RTE_ARCH_ARM64
> +	alg =  RTE_ACL_CLASSIFY_NEON;
> +#else

On ARM, is there any specific cpu flag that you can use to determine is NEON
isa is supported or not?
It would be good to avoid extra conditional compilation here if possible.
Another question - did I get it right that NEON isa is supported on all
possible RTE_ARCH_ARM64 cpu models you plan to support?
Konstantin

  parent reply	other threads:[~2015-11-02 16:54 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-02 14:18 [dpdk-dev] [PATCH 0/3] ARM64: NEON ACL implementation Jerin Jacob
2015-11-02 14:18 ` [dpdk-dev] [PATCH 1/3] arm: ret_vector.h improvements Jerin Jacob
2015-11-02 14:18   ` [dpdk-dev] [PATCH 2/3] arm64: acl: add neon based acl implementation Jerin Jacob
2015-11-02 14:18     ` [dpdk-dev] [PATCH 3/3] arm64: defconfig: enabled CONFIG_RTE_LIBRTE_ACL Jerin Jacob
2015-11-02 15:39     ` [dpdk-dev] [PATCH 2/3] arm64: acl: add neon based acl implementation Jan Viktorin
2015-11-02 16:19       ` Jerin Jacob
2015-11-02 17:31         ` Jan Viktorin
2015-11-02 16:54     ` Ananyev, Konstantin [this message]
2015-11-03  4:30       ` Jerin Jacob
2015-11-03 10:23         ` Ananyev, Konstantin
2015-11-03 10:35           ` Jan Viktorin
2015-11-03 13:20             ` Ananyev, Konstantin

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