* [dpdk-dev] [PATCH v2] doc: new sample app UG for VM power management
[not found] <1417088640-7641-1-git-send-email-pablo.de.lara.guarch@intel.com>
@ 2014-11-28 16:46 ` Pablo de Lara
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 0/3] doc: add VM power mgmt app Pablo de Lara
0 siblings, 1 reply; 8+ messages in thread
From: Pablo de Lara @ 2014-11-28 16:46 UTC (permalink / raw)
To: dev
This patch adds a new sample app UG, contaning explanation
of the new two sample apps added in the VM power management
patchset
Changes in v2:
Corrected svg files
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
.../sample_app_ug/img/vm_power_mgr_highlevel.svg | 1173 ++++++++++++++++++++
.../img/vm_power_mgr_vm_request_seq.svg | 548 +++++++++
doc/guides/sample_app_ug/index.rst | 5 +
doc/guides/sample_app_ug/vm_power_management.rst | 274 +++++
4 files changed, 2000 insertions(+), 0 deletions(-)
create mode 100644 doc/guides/sample_app_ug/img/vm_power_mgr_highlevel.svg
create mode 100644 doc/guides/sample_app_ug/img/vm_power_mgr_vm_request_seq.svg
create mode 100644 doc/guides/sample_app_ug/vm_power_management.rst
diff --git a/doc/guides/sample_app_ug/img/vm_power_mgr_highlevel.svg b/doc/guides/sample_app_ug/img/vm_power_mgr_highlevel.svg
new file mode 100644
index 0000000..4b0b3b8
--- /dev/null
+++ b/doc/guides/sample_app_ug/img/vm_power_mgr_highlevel.svg
@@ -0,0 +1,1173 @@
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+ <g id="shape2-55" v:mID="2" v:groupContext="shape" transform="translate(18.3,-48.7951)">
+ <title>Box.2</title>
+ <desc>Core 0</desc>
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+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ <text x="12.09" y="443.31" class="st13" v:langID="2057"><v:paragraph v:horizAlign="1"/><v:tabList/>Core 0</text> </g>
+ <g id="shape3-61" v:mID="3" v:groupContext="shape" transform="translate(69.3236,-48.7951)">
+ <title>Box.3</title>
+ <desc>Core 1</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
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+ <text x="12.09" y="443.31" class="st13" v:langID="2057"><v:paragraph v:horizAlign="1"/><v:tabList/>Core 1</text> </g>
+ <g id="shape4-67" v:mID="4" v:groupContext="shape" transform="translate(120.347,-48.7951)">
+ <title>Box.4</title>
+ <desc>Core 2</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ <g id="shadow4-68" v:groupContext="shadow" v:shadowOffsetX="1.44" v:shadowOffsetY="-1.44" v:shadowType="1"
+ transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="422.843" width="48.189" height="36.1417" class="st2"/>
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+ <rect x="0" y="422.843" width="48.189" height="36.1417" class="st12"/>
+ <text x="12.09" y="443.31" class="st13" v:langID="2057"><v:paragraph v:horizAlign="1"/><v:tabList/>Core 2</text> </g>
+ <g id="shape5-73" v:mID="5" v:groupContext="shape" transform="translate(171.371,-48.7951)">
+ <title>Box.5</title>
+ <desc>Core 3</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
+ <v:ud v:nameU="msvThemeEffects" v:val="VT0(2):26"/>
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+ <v:textBlock v:margins="rect(4,4,4,4)" v:tabSpace="42.5197"/>
+ <v:textRect cx="24.0945" cy="440.914" width="48.19" height="36.1417"/>
+ <g id="shadow5-74" v:groupContext="shadow" v:shadowOffsetX="1.44" v:shadowOffsetY="-1.44" v:shadowType="1"
+ transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="422.843" width="48.189" height="36.1417" class="st2"/>
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+ <rect x="0" y="422.843" width="48.189" height="36.1417" class="st12"/>
+ <text x="12.09" y="443.31" class="st13" v:langID="2057"><v:paragraph v:horizAlign="1"/><v:tabList/>Core 3</text> </g>
+ <g id="shape6-79" v:mID="6" v:groupContext="shape" transform="translate(222.394,-48.7951)">
+ <title>Box.6</title>
+ <desc>Core 4</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ <v:textBlock v:margins="rect(4,4,4,4)" v:tabSpace="42.5197"/>
+ <v:textRect cx="24.0945" cy="440.914" width="48.19" height="36.1417"/>
+ <g id="shadow6-80" v:groupContext="shadow" v:shadowOffsetX="1.44" v:shadowOffsetY="-1.44" v:shadowType="1"
+ transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
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+ <rect x="0" y="422.843" width="48.189" height="36.1417" class="st12"/>
+ <text x="12.09" y="443.31" class="st13" v:langID="2057"><v:paragraph v:horizAlign="1"/><v:tabList/>Core 4</text> </g>
+ <g id="shape7-85" v:mID="7" v:groupContext="shape" transform="translate(273.418,-48.7951)">
+ <title>Box.7</title>
+ <desc>Core 5</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ <v:textBlock v:margins="rect(4,4,4,4)" v:tabSpace="42.5197"/>
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+ <g id="shadow7-86" v:groupContext="shadow" v:shadowOffsetX="1.44" v:shadowOffsetY="-1.44" v:shadowType="1"
+ transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
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+ <rect x="0" y="422.843" width="48.189" height="36.1417" class="st12"/>
+ <text x="12.09" y="443.31" class="st13" v:langID="2057"><v:paragraph v:horizAlign="1"/><v:tabList/>Core 5</text> </g>
+ <g id="shape8-91" v:mID="8" v:groupContext="shape" transform="translate(324.442,-48.7951)">
+ <title>Box.8</title>
+ <desc>Core 6</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ <g id="shadow8-92" v:groupContext="shadow" v:shadowOffsetX="1.44" v:shadowOffsetY="-1.44" v:shadowType="1"
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+ <g id="shape9-97" v:mID="9" v:groupContext="shape" transform="translate(375.465,-48.7951)">
+ <title>Box.9</title>
+ <desc>Core 7</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ <g id="shadow9-98" v:groupContext="shadow" v:shadowOffsetX="1.44" v:shadowOffsetY="-1.44" v:shadowType="1"
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+ <text x="12.09" y="443.31" class="st13" v:langID="2057"><v:paragraph v:horizAlign="1"/><v:tabList/>Core 7</text> </g>
+ <g id="shape11-103" v:mID="11" v:groupContext="shape" transform="translate(18.3,-298.953)">
+ <title>Box.11</title>
+ <desc>Virtual Core 0</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ <g id="shape12-110" v:mID="12" v:groupContext="shape" transform="translate(69.3236,-298.953)">
+ <title>Box.12</title>
+ <desc>Virtual Core 1</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ <text x="12.76" y="438.51" class="st13" v:langID="2057"><v:paragraph v:horizAlign="1"/><v:tabList/>Virtual <tspan
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+ <g id="shape13-117" v:mID="13" v:groupContext="shape" transform="translate(120.347,-298.953)">
+ <title>Box.13</title>
+ <desc>Virtual Core 2</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ <text x="12.76" y="438.51" class="st13" v:langID="2057"><v:paragraph v:horizAlign="1"/><v:tabList/>Virtual <tspan
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+ <g id="shape14-124" v:mID="14" v:groupContext="shape" transform="translate(171.371,-298.953)">
+ <title>Box.14</title>
+ <desc>Virtual Core 3</desc>
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+ <g id="group16-131" transform="translate(333.737,-187.264) rotate(39.9929)" v:mID="16" v:groupContext="group">
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+ <title>1-D single</title>
+ <g id="shape17-132" v:mID="17" v:groupContext="shape">
+ <title>Sheet.17</title>
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+ v:isBullet="true">·</tspan><tspan class="st17"> </tspan><tspan class="st18">Reuse </tspan>librte_power<tspan
+ class="st18"> </tspan><tspan class="st18">interface</tspan><tspan class="st18">, </tspan><tspan
+ class="st18">but </tspan><tspan x="22" dy="1.204em" class="st18">provides a new implementation that </tspan><tspan
+ x="22" dy="1.2em" class="st18">forwards frequency set requests to host </tspan><tspan x="22" dy="1.2em"
+ class="st18">via Virtio</tspan><tspan class="st18">-</tspan><tspan class="st18">Serial channel<v:newlineChar/></tspan><tspan
+ x="4" dy="1.212em" class="st17" v:isBullet="true">·</tspan><tspan class="st17"> </tspan><tspan class="st18">Each lcore has exclusive access to a </tspan><tspan
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+ class="st17" v:isBullet="true">·</tspan><tspan class="st17"> </tspan><tspan class="st18">Sample application re</tspan><tspan
+ class="st18">-</tspan><tspan class="st18">uses </tspan>l3fwd_power<v:newlineChar/><tspan x="4" dy="1.216em"
+ class="st17" v:isBullet="true">·</tspan><tspan class="st17"> </tspan><tspan class="st18">A CLI for changing frequency from within </tspan><tspan
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+ <v:ud v:nameU="msvThemeEffects" v:val="VT0(2):26"/>
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+ <desc>OS/Hypervisor</desc>
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+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ <title>Box.55</title>
+ <desc>Linux “userspace” power governor /sys/devices/system/cpu/cpuN...</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
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+ <title>Box.45</title>
+ <desc>VM Power Monitor Accepts VM Commands over Virtio Serial endpo...</desc>
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+ v:isBullet="true">·</tspan><tspan class="st17"> </tspan><tspan class="st18">Accepts VM Commands over </tspan><tspan
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+ dy="1.2em" class="st18">monitored via </tspan>epoll<v:newlineChar/><tspan x="4" dy="1.212em" class="st17"
+ v:isBullet="true">·</tspan><tspan class="st17"> </tspan><tspan class="st18">Commands include the </tspan><tspan
+ x="22" dy="1.204em" class="st18">virtual core to be modified</tspan><tspan class="st18">, </tspan><tspan
+ x="22" dy="1.2em" class="st18">using </tspan>libvirt <tspan class="st18">to get physical </tspan><tspan
+ x="22" dy="1.2em" class="st18">core mapping<v:newlineChar/></tspan><tspan x="4" dy="1.212em" class="st17"
+ v:isBullet="true">·</tspan><tspan class="st17"> </tspan><tspan class="st18">Uses librte</tspan><tspan
+ class="st18">_</tspan><tspan class="st18">power to affect </tspan><tspan x="22" dy="1.204em" class="st18">frequency changes via Linux </tspan><tspan
+ x="22" dy="1.2em" class="st18">userspace power </tspan><tspan x="22" dy="1.2em" class="st18">governor</tspan><tspan
+ class="st18">(</tspan><tspan class="st18">APCI cpufreq</tspan><tspan class="st18">)<v:newlineChar/></tspan><tspan
+ x="4" dy="1.212em" class="st17" v:isBullet="true">·</tspan><tspan class="st17"> </tspan><tspan class="st18">CLI</tspan><tspan
+ class="st18">: </tspan><tspan class="st18">For adding VM channels </tspan><tspan x="22" dy="1.204em"
+ class="st18">to monitor</tspan><tspan class="st18">, </tspan><tspan class="st18">inspecting and </tspan><tspan
+ x="22" dy="1.2em" class="st18">changing channel state</tspan><tspan class="st18">, </tspan><tspan x="22"
+ dy="1.2em" class="st18">manually altering CPU </tspan><tspan x="22" dy="1.2em" class="st18">frequency</tspan><tspan
+ class="st18">. </tspan><tspan class="st18">Also allows for the </tspan><tspan x="22" dy="1.2em"
+ class="st18">changing of vCPU to pCPU </tspan><tspan x="22" dy="1.2em" class="st18">pinning</tspan><tspan
+ class="st18">.</tspan></text> </g>
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+ <desc>VM Power Monitor Application</desc>
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+ <title>Box.61</title>
+ <desc>librte_power(vm)</desc>
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+ <desc>lcore channel 0</desc>
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+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ <title>Box.47</title>
+ <desc>librte_power(vm)</desc>
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+ <title>Box.46</title>
+ <desc>lcore channel 1</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ <title>Box.60</title>
+ <desc>lcore channel 2</desc>
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+ <title>Box.62</title>
+ <desc>lcore channel 3</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
+ <v:ud v:nameU="msvThemeColors" v:val="VT0(2):26"/>
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+ <title>Box.50</title>
+ <desc>lcore channel 0</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
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+ <title>Box.52</title>
+ <desc>lcore channel 1</desc>
+ <v:userDefs>
+ <v:ud v:nameU="visVersion" v:val="VT0(14):26"/>
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+ <title>Box.51</title>
+ <desc>Endpoint Monitor(lcore channels)</desc>
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+ <title>Box.25</title>
+ <desc>Channel Manager</desc>
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diff --git a/doc/guides/sample_app_ug/index.rst b/doc/guides/sample_app_ug/index.rst
index ad2ca28..d2ccbc9 100644
--- a/doc/guides/sample_app_ug/index.rst
+++ b/doc/guides/sample_app_ug/index.rst
@@ -100,6 +100,7 @@ Copyright © 2012 - 2014, Intel Corporation. All rights reserved.
netmap_compatibility
internet_proto_ip_pipeline
test_pipeline
+ vm_power_management
**Figures**
@@ -147,6 +148,10 @@ Copyright © 2012 - 2014, Intel Corporation. All rights reserved.
:ref:`Figure 21.Test Pipeline Application <figure_21>`
+:ref:`Figure 22.High level Solution <figure_22>`
+
+:ref:`Figure 23.VM request to scale frequency <figure_23>`
+
**Tables**
:ref:`Table 1.Output Traffic Marking <table_1>`
diff --git a/doc/guides/sample_app_ug/vm_power_management.rst b/doc/guides/sample_app_ug/vm_power_management.rst
new file mode 100644
index 0000000..7eaafd5
--- /dev/null
+++ b/doc/guides/sample_app_ug/vm_power_management.rst
@@ -0,0 +1,274 @@
+.. BSD LICENSE
+ Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in
+ the documentation and/or other materials provided with the
+ distribution.
+ * Neither the name of Intel Corporation nor the names of its
+ contributors may be used to endorse or promote products derived
+ from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+VM Power Management Application
+===============================
+
+Introduction
+------------
+
+Applications running in Virtual Environments have an abstract view of the underlying hardware on the Host, in particular applications cannot see the binding of virtual to physical hardware. When looking at CPU resourcing, the pinning of Virtual CPUs(vCPUs) to Host Physical CPUs(pCPUS) is not apparent to an application and this pinning may change over time.
+Furthermore, Operating Systems on virtual machines do not have the ability to govern their own power policy; the Machine Specific Registers (MSRs) for enabling P-State transitions are not exposed to Operating Systems running on Virtual Machines(VMs).
+
+The Virtual Machine Power Management solution shows an example of how a DPDK application can indicate its processing requirements using VM local only information(vCPU/lcore) to a Host based Monitor which is responsible for accepting requests for frequency changes for a vCPU, translating the vCPU to a pCPU via libvirt and affecting the change in frequency.
+
+The solution is comprised of two high-level components.
+
+1. Example Host Application
+
+ Using a Command Line Interface(CLI) for VM->Host communication channel management it allows for adding channels to the Monitor, setting and querying the vCPU to pCPU pinning, inspecting and manually changing the frequency for each CPU. The CLI runs on a single lcore while the thread responsible for managing VM requests runs on a second lcore.
+ VM requests arriving on a channel for frequency changes are passed to the librte_power ACPI cpufreq sysfs based library. The Host Application relies on both qemu-kvm and libvirt to function.
+
+2. librte_power for Virtual Machines
+
+ Using an alternate implementation for the librte_power API, requests for frequency changes are forwarded to the host monitor rather than the APCI cpufreq sysfs interface used on the host.
+ The l3fwd-power application will use this implementation when deployed on a VM(see Chapter 11 "L3 Forwarding with Power Management Application").
+
+.. _figure_22:
+
+**Figure 22. Highlevel Solution**
+
+|vm_power_mgr_highlevel|
+
+Overview
+--------
+
+VM Power Management employs qemu-kvm to provide communications channels between the host and VMs in the form of Virtio-Serial which appears as a paravirtualized serial device on a VM and can be configured to use various backends on the host. For this example each Virtio-Serial endpoint on the host is configured as AF_UNIX file socket, supporting poll/select and epoll for event notification. In this example each channel endpoint on the host is monitored via epoll for EPOLLIN events.
+Each channel is specified as qemu-kvm arguments or as libvirt XML for each VM, where each VM can have a number of channels up to a maximum of 64 per VM, in this example each DPDK lcore on a VM has exclusive access to a channel.
+
+To enable frequency changes from within a VM, a request via the librte_power interface is forwarded via Virtio-Serial to the host, each request contains the vCPU and power command(scale up/down/min/max).
+The API for host and guest librte_power is consistent across environments, with the selection of VM or Host Implementation determined at automatically at runtime based on the environment.
+
+Upon receiving a request, the host translates the vCPU to a pCPU via the libvirt API before forwarding to the host librte_power.
+
+
+.. _figure_23:
+
+**Figure 23. VM request to scale frequency**
+
+|vm_power_mgr_vm_request_seq|
+
+Performance Considerations
+~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+While Haswell Microarchitecture allows for independent power control for each core, earlier Microarchtectures do not offer such fine grained control. When deployed on pre-Haswell platforms greater care must be taken in selecting which cores are assigned to a VM, for instance a core will not scale down until its sibling is similarly scaled.
+
+
+Configuration
+-------------
+
+BIOS
+~~~~
+
+Enhanced Intel SpeedStep® Technology must be enabled in the platform BIOS if the power management feature of Intel® DPDK is to be used. Otherwise, the sys file folder /sys/devices/system/cpu/cpu0/cpufreq will not exist, and the CPU frequency- based power management cannot be used. Consult the relevant BIOS documentation to determine how these settings can be accessed.
+
+Host Operating System
+~~~~~~~~~~~~~~~~~~~~~
+
+The Host OS must also have the *apci_cpufreq* module installed, in some cases the *intel_pstate* driver may be the default Power Management environment. To enable *acpi_cpufreq* and disable *intel_pstate*, add the following to the grub linux command line:
+
+::
+
+ intel_pstate=disable
+
+Upon rebooting, load the *acpi_cpufreq* module:
+
+::
+
+ modprobe acpi_cpufreq
+
+
+
+Hypervisor Channel Configuration
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Virtio-Serial channels are configured via libvirt XML:
+
+
+::
+
+ <name>{vm_name}</name>
+ <controller type='virtio-serial' index='0'>
+ <address type='pci' domain='0x0000' bus='0x00' slot='0x06' function='0x0'/>
+ </controller>
+ <channel type='unix'>
+ <source mode='bind' path='/tmp/powermonitor/{vm_name}.{channel_num}'/>
+ <target type='virtio' name='virtio.serial.port.poweragent.{vm_channel_num}/>
+ <address type='virtio-serial' controller='0' bus='0' port='{N}'/>
+ </channel>
+
+
+Where a single controller of type *virtio-serial* is created and up to 32 channels can be associated with a single controller and multiple controllers can be specified.
+The convention is to use the name of the VM in the host path *{vm_name}* and to increment *{channel_num}* for each channel, likewise the port value *{N}* must be incremented for each channel.
+
+Each channel on the host will appear in *path*, the directory */tmp/powermonitor/* must first be created and given qemu permissions
+
+::
+
+ mkdir /tmp/powermonitor/
+ chown qemu:qemu /tmp/powermonitor
+
+ Note that files and directories within /tmp are generally removed upon
+ rebooting the host and the above steps may need to be carried out after each reboot.
+
+The serial device as it appears on a VM is configured with the *target* element attribute *name* and must be in the form of *virtio.serial.port.poweragent.{vm_channel_num}*, where *vm_channel_num* is typically the lcore channel to be used in DPDK VM applications.
+
+Each channel on a VM will be present at */dev/virtio-ports/virtio.serial.port.poweragent.{vm_channel_num}*
+
+Compiling and Running the Host Application
+------------------------------------------
+
+Compiling
+~~~~~~~~~
+
+1. export RTE_SDK=/path/to/rte_sdk
+2. cd ${RTE_SDK}/examples/vm_power_manager
+3. make
+
+Running
+~~~~~~~
+
+The application does not have any specific command line options other than *EAL*:
+
+::
+
+ ./build/vm_power_mgr [EAL options]
+
+The application requires exactly two cores to run, one core is dedicated to the CLI, while the other is dedicated to the channel endpoint monitor, for example to run on cores 0 & 1 on a system with 4 memory channels:
+
+::
+
+ ./build/vm_power_mgr -c 0x3 -n 4
+
+After successful initialisation the user is presented with VM Power Manager CLI:
+
+::
+
+ vm_power>
+
+Virtual Machines can now be added to the VM Power Manager:
+
+::
+
+ vm_power> add_vm {vm_name}
+
+When a {vm_name} is specified with the *add_vm* command a lookup is performed with libvirt to ensure that the VM exists, {vm_name} is used as an unique identifier to associate channels with a particular VM and for executing operations on a VM within the CLI. VMs do not have to be running to in order to add them.
+
+A number of commands can be issued via the CLI in relation to VMs:
+
+ Remove a Virtual Machine identified by {vm_name} from the VM Power Manager.::
+
+ rm_vm {vm_name}
+
+ Add communication channels for the specified VM, the virtio channels must be enabled in the VM configuration(qemu/libvirt) and the associated VM must be active. {list} is a comma-separated list of channel numbers to add, using the keyword 'all' will attempt to add all channels for the VM::
+
+ add_channels {vm_name} {list}|all
+
+ Enable or disable the communication channels in {list}(comma-separated) for the specified VM, alternatively list can be replaced with keyword 'all'. Disabled channels will still receive packets on the host, however the commands they specify will be ignored. Set status to 'enabled' to begin processing requests again::
+
+ set_channel_status {vm_name} {list}|all enabled|disabled
+
+ Print to the CLI the information on the specified VM, the information lists the number of vCPUS, the pinning to pCPU(s) as a bit mask, along with any communication channels associated with each VM, along with the status of each channel.::
+
+ show_vm {vm_name}
+
+ Set the binding of Virtual CPU on VM with name {vm_name} to the Physical CPU mask.::
+
+ set_pcpu_mask {vm_name} {vcpu} {pcpu}
+
+ Set the binding of Virtual CPU on VM to the Physical CPU.::
+
+ set_pcpu {vm_name} {vcpu} {pcpu}
+
+Manual control and inspection can also be carried in relation CPU frequency scaling:
+
+ Get the current frequency for each core specified in the mask.::
+
+ show_cpu_freq_mask {mask}
+
+ Set the current frequency for the cores specified in {core_mask} by scaling each up/down/min/max.::
+
+ set_cpu_freq {core_mask} up|down|min|max
+
+ Get the current frequency for the specified core.::
+
+ show_cpu_freq {core_num}
+
+ Set the current frequency for the specified core by scaling up/down/min/max.::
+
+ set_cpu_freq {core_num} up|down|min|max
+
+Compiling and Running the Guest Applications
+--------------------------------------------
+
+For compiling and running l3fwd-power, see Chapter 11 "L3 Forwarding with Power Management Application".
+
+A guest CLI is also provided for validating the setup.
+
+For both l3fwd-power and guest CLI, the channels for the VM must be monitored by the host application using the *add_channels* command on the host.
+
+
+Compiling
+~~~~~~~~~
+
+1. export RTE_SDK=/path/to/rte_sdk
+2. cd ${RTE_SDK}/examples/vm_power_manager/guest_cli
+3. make
+
+Running
+~~~~~~~
+
+The application does not have any specific command line options other than *EAL*:
+
+::
+
+ ./build/vm_power_mgr [EAL options]
+
+The application for example purposes uses a channel for each lcore enabled, for example to run on cores 0,1,2,3 on a system with 4 memory channels:
+
+::
+
+ ./build/guest_vm_power_mgr -c 0xf -n 4
+
+
+After successful initialisation the user is presented with VM Power Manager Guest CLI:
+
+::
+
+ vm_power(guest)>
+
+To change the frequency of a lcore, use the set_cpu_freq command. Where {core_num} is the lcore and channel to change frequency by scaling up/down/min/max.
+
+::
+
+ set_cpu_freq {core_num} up|down|min|max
+
+.. |vm_power_mgr_highlevel| image:: img/vm_power_mgr_highlevel.svg
+.. |vm_power_mgr_vm_request_seq| image:: img/vm_power_mgr_vm_request_seq.svg
--
1.7.4.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH v3 0/3] doc: add VM power mgmt app
2014-11-28 16:46 ` [dpdk-dev] [PATCH v2] doc: new sample app UG for VM power management Pablo de Lara
@ 2014-12-09 12:02 ` Pablo de Lara
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 1/3] doc: add vm power mgmt overview svg Pablo de Lara
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Pablo de Lara @ 2014-12-09 12:02 UTC (permalink / raw)
To: dev
This patchset adds a new sample app UG, contaning explanation
of the new two sample apps added in the VM power management
patchset
Changes in v3:
Scaled svg files
Removed trailing whitespaces
Replaced directives for code blocks
Separate svg files in different commits
Fixed numbered lists
Changes in v2:
Corrected svg files
Pablo de Lara (3):
doc: add vm power mgmt overview svg
doc: add vm power mgmt request sequence svg
doc: add VM power mgmt app
doc/guides/rel_notes/rel_description.rst | 2 +
.../sample_app_ug/img/vm_power_mgr_highlevel.svg | 742 ++++++++++++++++
.../img/vm_power_mgr_vm_request_seq.svg | 927 ++++++++++++++++++++
doc/guides/sample_app_ug/index.rst | 5 +
doc/guides/sample_app_ug/vm_power_management.rst | 361 ++++++++
5 files changed, 2037 insertions(+), 0 deletions(-)
create mode 100644 doc/guides/sample_app_ug/img/vm_power_mgr_highlevel.svg
create mode 100644 doc/guides/sample_app_ug/img/vm_power_mgr_vm_request_seq.svg
create mode 100644 doc/guides/sample_app_ug/vm_power_management.rst
--
1.7.4.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH v3 1/3] doc: add vm power mgmt overview svg
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 0/3] doc: add VM power mgmt app Pablo de Lara
@ 2014-12-09 12:02 ` Pablo de Lara
2014-12-11 10:13 ` Iremonger, Bernard
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 2/3] doc: add vm power mgmt request sequence svg Pablo de Lara
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 3/3] doc: add VM power mgmt app Pablo de Lara
2 siblings, 1 reply; 8+ messages in thread
From: Pablo de Lara @ 2014-12-09 12:02 UTC (permalink / raw)
To: dev
Added first of the two figures in the VM power management app UG:
VM power mangament highlevel overview
Signed-off-by: Alan Carew <alan.carew@intel.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
.../sample_app_ug/img/vm_power_mgr_highlevel.svg | 742 ++++++++++++++++++++
1 files changed, 742 insertions(+), 0 deletions(-)
create mode 100644 doc/guides/sample_app_ug/img/vm_power_mgr_highlevel.svg
diff --git a/doc/guides/sample_app_ug/img/vm_power_mgr_highlevel.svg b/doc/guides/sample_app_ug/img/vm_power_mgr_highlevel.svg
new file mode 100644
index 0000000..bc07dfe
--- /dev/null
+++ b/doc/guides/sample_app_ug/img/vm_power_mgr_highlevel.svg
@@ -0,0 +1,742 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN" "http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
+<!-- Generated by Microsoft Visio, SVG Export vm_power_mgr_highlevel.svg Page-1 -->
+
+<!--
+# BSD License
+# Copyright (c) <2014>, Intel Corporation
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+#
+# - Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+#
+# - Neither the name of Intel Corporation nor the names of its
+# contributors may be used to endorse or promote products derived
+# from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE.
+-->
+
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+ <title>Box.4</title>
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+ <title>Sheet.30</title>
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+ <path d="M2.83 456.15 L215.76 456.15 A1.41732 1.41732 0 0 1 217.18 457.57 L217.18 457.57 a0.334585 0.334585 -180
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+ x="4" dy="1.212em" class="st17">·</tspan><tspan class="st17"> </tspan><tspan class="st18">Each lcore has exclusive access to a </tspan><tspan
+ x="22" dy="1.204em" class="st18">single channel </tspan><tspan x="4" dy="1.212em" class="st17">·</tspan><tspan
+ class="st17"> </tspan><tspan class="st18">Sample application re</tspan><tspan class="st18">-</tspan><tspan
+ class="st18">uses </tspan>l3fwd_power <tspan x="4" dy="1.216em" class="st17">·</tspan><tspan class="st17"> </tspan><tspan
+ class="st18">A CLI for changing frequency from within </tspan><tspan x="22" dy="1.204em" class="st18">a VM is also included</tspan><tspan
+ class="st18">.</tspan></text> </g>
+ <g id="group37-257" transform="translate(769.581,100.51) rotate(82.4551)">
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+ </g>
+ <g id="shape15-277" transform="translate(18.3,-99.8187)">
+ <title>Box.15</title>
+ <desc>OS/Hypervisor</desc>
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+ <g id="shape55-284" transform="translate(237.985,-159.346)">
+ <title>Box.55</title>
+ <desc>Linux “userspace” power governor /sys/devices/system/cpu/cpuN...</desc>
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+ <g id="shape45-291" transform="translate(429.324,-60.1337)">
+ <title>Box.45</title>
+ <desc>VM Power Monitor Accepts VM Commands over Virtio Serial endpo...</desc>
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+ class="st17"> </tspan><tspan class="st18">Accepts VM Commands over </tspan><tspan x="22" dy="1.204em"
+ class="st18">Virtio Serial endpoints</tspan><tspan class="st18">, </tspan><tspan x="22" dy="1.2em"
+ class="st18">monitored via </tspan>epoll <tspan x="4" dy="1.212em" class="st17">·</tspan><tspan
+ class="st17"> </tspan><tspan class="st18">Commands include the </tspan><tspan x="22" dy="1.204em"
+ class="st18">virtual core to be modified</tspan><tspan class="st18">, </tspan><tspan x="22" dy="1.2em"
+ class="st18">using </tspan>libvirt <tspan class="st18">to get physical </tspan><tspan x="22" dy="1.2em"
+ class="st18">core mapping </tspan><tspan x="4" dy="1.212em" class="st17">·</tspan><tspan class="st17"> </tspan><tspan
+ class="st18">Uses librte</tspan><tspan class="st18">_</tspan><tspan class="st18">power to affect </tspan><tspan
+ x="22" dy="1.204em" class="st18">frequency changes via Linux </tspan><tspan x="22" dy="1.2em" class="st18">userspace power </tspan><tspan
+ x="22" dy="1.2em" class="st18">governor</tspan><tspan class="st18">(</tspan><tspan class="st18">APCI cpufreq</tspan><tspan
+ class="st18">) </tspan><tspan x="4" dy="1.212em" class="st17">·</tspan><tspan class="st17"> </tspan><tspan
+ class="st18">CLI</tspan><tspan class="st18">: </tspan><tspan class="st18">For adding VM channels </tspan><tspan
+ x="22" dy="1.204em" class="st18">to monitor</tspan><tspan class="st18">, </tspan><tspan class="st18">inspecting and </tspan><tspan
+ x="22" dy="1.2em" class="st18">changing channel state</tspan><tspan class="st18">, </tspan><tspan x="22"
+ dy="1.2em" class="st18">manually altering CPU </tspan><tspan x="22" dy="1.2em" class="st18">frequency</tspan><tspan
+ class="st18">. </tspan><tspan class="st18">Also allows for the </tspan><tspan x="22" dy="1.2em"
+ class="st18">changing of vCPU to pCPU </tspan><tspan x="22" dy="1.2em" class="st18">pinning</tspan><tspan
+ class="st18">.</tspan></text> </g>
+ <g id="shape53-339" transform="translate(26.8039,-116.827)">
+ <title>Box.53</title>
+ <desc>VM Power Monitor Application</desc>
+ <g id="shadow53-340" transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="342.41" width="150.236" height="116.575" class="st2"/>
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+ <g id="shape61-346" transform="translate(18.3,-396.394)">
+ <title>Box.61</title>
+ <desc>librte_power(vm)</desc>
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+ <g id="shape48-352" transform="translate(18.3,-366.275)">
+ <title>Box.48</title>
+ <desc>lcore channel 0</desc>
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+ <g id="shape47-361" transform="translate(245.072,-396.394)">
+ <title>Box.47</title>
+ <desc>librte_power(vm)</desc>
+ <g id="shadow47-362" transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
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+ <g id="shape46-367" transform="translate(72.1583,-366.275)">
+ <title>Box.46</title>
+ <desc>lcore channel 1</desc>
+ <g id="shadow46-368" transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="428.867" width="42.5197" height="30.1181" class="st2"/>
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+ <text x="11.7" y="436.73" class="st11">lcore <tspan x="6.14" dy="1.2em" class="st14">channel </tspan><tspan x="19.04"
+ dy="1.2em" class="st14">1</tspan></text> </g>
+ <g id="shape60-375" transform="translate(126.017,-366.275)">
+ <title>Box.60</title>
+ <desc>lcore channel 2</desc>
+ <g id="shadow60-376" transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="428.867" width="42.5197" height="30.1181" class="st2"/>
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+ <text x="11.7" y="436.73" class="st11">lcore <tspan x="6.14" dy="1.2em" class="st14">channel </tspan><tspan x="19.04"
+ dy="1.2em" class="st14">2</tspan></text> </g>
+ <g id="shape62-383" transform="translate(177.04,-366.275)">
+ <title>Box.62</title>
+ <desc>lcore channel 3</desc>
+ <g id="shadow62-384" transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="428.867" width="42.5197" height="30.1181" class="st2"/>
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+ <text x="11.7" y="436.73" class="st11">lcore <tspan x="6.14" dy="1.2em" class="st14">channel </tspan><tspan x="19.04"
+ dy="1.2em" class="st14">3</tspan></text> </g>
+ <g id="shape50-391" transform="translate(245.072,-366.275)">
+ <title>Box.50</title>
+ <desc>lcore channel 0</desc>
+ <g id="shadow50-392" transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="428.867" width="42.5197" height="30.1181" class="st2"/>
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+ <rect x="0" y="428.867" width="42.5197" height="30.1181" class="st21"/>
+ <text x="11.7" y="436.73" class="st11">lcore <tspan x="6.14" dy="1.2em" class="st14">channel </tspan><tspan x="19.04"
+ dy="1.2em" class="st14">0</tspan></text> </g>
+ <g id="shape52-399" transform="translate(301.765,-366.275)">
+ <title>Box.52</title>
+ <desc>lcore channel 1</desc>
+ <g id="shadow52-400" transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="428.867" width="42.5197" height="30.1181" class="st2"/>
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+ <rect x="0" y="428.867" width="42.5197" height="30.1181" class="st21"/>
+ <text x="11.7" y="436.73" class="st11">lcore <tspan x="6.14" dy="1.2em" class="st14">channel </tspan><tspan x="19.04"
+ dy="1.2em" class="st14">1</tspan></text> </g>
+ <g id="shape51-407" transform="translate(26.8039,-216.039)">
+ <title>Box.51</title>
+ <desc>Endpoint Monitor(lcore channels)</desc>
+ <g id="shadow51-408" transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="441.623" width="141.732" height="17.3622" class="st2"/>
+ </g>
+ <rect x="0" y="441.623" width="141.732" height="17.3622" class="st21"/>
+ <text x="7.09" y="452.82" class="st11">Endpoint Monitor(lcore channels)</text> </g>
+ <g id="shape25-413" transform="translate(26.8039,-198.854)">
+ <title>Box.25</title>
+ <desc>Channel Manager</desc>
+ <g id="shadow25-414" transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="441.623" width="141.732" height="17.3622" class="st2"/>
+ </g>
+ <rect x="0" y="441.623" width="141.732" height="17.3622" class="st22"/>
+ <text x="37.53" y="452.82" class="st11">Channel Manager</text> </g>
+ <g id="shape41-420" transform="translate(247.906,-215.862)">
+ <title>Box.41</title>
+ <desc>QEMU</desc>
+ <g id="shadow41-421" transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="441.623" width="141.732" height="17.3622" class="st2"/>
+ </g>
+ <rect x="0" y="441.623" width="141.732" height="17.3622" class="st21"/>
+ <text x="58.87" y="452.82" class="st11">QEMU</text> </g>
+ <g id="shape42-426" transform="translate(247.906,-198.854)">
+ <title>Box.42</title>
+ <desc>libvirt</desc>
+ <g id="shadow42-427" transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="441.623" width="141.732" height="17.3622" class="st2"/>
+ </g>
+ <rect x="0" y="441.623" width="141.732" height="17.3622" class="st23"/>
+ <text x="59.98" y="452.82" class="st11">libvirt</text> </g>
+ <g id="shape43-433" transform="translate(168.536,-231.718)">
+ <title>Dynamic connector.43</title>
+ <path d="M0 465.98 L10.63 465.98 L10.63 466.16 L73.21 466.16" class="st24"/>
+ </g>
+ <g id="shape69-441" transform="translate(168.536,-190.527)">
+ <title>Dynamic connector</title>
+ <path d="M0 458.98 L10.63 458.98 L10.63 475.99 L63.29 475.99" class="st24"/>
+ </g>
+ <g id="shape26-447" transform="translate(26.8039,-181.846)">
+ <title>Box.26</title>
+ <desc>librte_power(Host)</desc>
+ <g id="shadow26-448" transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="441.623" width="141.732" height="17.3622" class="st2"/>
+ </g>
+ <rect x="0" y="441.623" width="141.732" height="17.3622" class="st19"/>
+ <text x="35.53" y="452.82" class="st11">librte_power(Host)</text> </g>
+ <g id="shape68-453" transform="translate(168.536,-200.449)">
+ <title>Dynamic connector.68</title>
+ <desc>Map vCPU to pCPU</desc>
+ <path d="M5.8 451.9 L6.16 451.9 L73.21 451.9" class="st26"/>
+ <rect x="4.11883" y="447.099" width="71.1324" height="9.59985" class="st27"/>
+ <text x="4.12" y="454.3" class="st13">Map vCPU to pCPU</text> </g>
+ <g id="shape27-464" transform="translate(26.8039,-164.838)">
+ <title>Box.27</title>
+ <desc>VM Power CLI</desc>
+ <g id="shadow27-465" transform="matrix(1,0,0,1,1.44,1.44)" class="st1">
+ <rect x="0" y="441.623" width="141.732" height="17.3622" class="st2"/>
+ </g>
+ <rect x="0" y="441.623" width="141.732" height="17.3622" class="st22"/>
+ <text x="44.2" y="452.82" class="st11">VM Power CLI</text> </g>
+ </g>
+</svg>
--
1.7.4.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH v3 2/3] doc: add vm power mgmt request sequence svg
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 0/3] doc: add VM power mgmt app Pablo de Lara
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 1/3] doc: add vm power mgmt overview svg Pablo de Lara
@ 2014-12-09 12:02 ` Pablo de Lara
2014-12-11 10:15 ` Iremonger, Bernard
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 3/3] doc: add VM power mgmt app Pablo de Lara
2 siblings, 1 reply; 8+ messages in thread
From: Pablo de Lara @ 2014-12-09 12:02 UTC (permalink / raw)
To: dev
Added second of the two figures in the VM power management app UG
VM power management request sequence
Signed-off-by: Alan Carew <alan.carew@intel.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
.../img/vm_power_mgr_vm_request_seq.svg | 927 ++++++++++++++++++++
1 files changed, 927 insertions(+), 0 deletions(-)
create mode 100644 doc/guides/sample_app_ug/img/vm_power_mgr_vm_request_seq.svg
diff --git a/doc/guides/sample_app_ug/img/vm_power_mgr_vm_request_seq.svg b/doc/guides/sample_app_ug/img/vm_power_mgr_vm_request_seq.svg
new file mode 100644
index 0000000..fe2e0de
--- /dev/null
+++ b/doc/guides/sample_app_ug/img/vm_power_mgr_vm_request_seq.svg
@@ -0,0 +1,927 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+
+<!--
+# BSD License
+# Copyright (c) <2014>, Intel Corporation
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer.
+#
+# - Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in
+# the documentation and/or other materials provided with the
+# distribution.
+#
+# - Neither the name of Intel Corporation nor the names of its
+# contributors may be used to endorse or promote products derived
+# from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+# STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+# OF THE POSSIBILITY OF SUCH DAMAGE.
+-->
+
+<svg
+ xmlns:dc="http://purl.org/dc/elements/1.1/"
+ xmlns:cc="http://creativecommons.org/ns#"
+ xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
+ xmlns:svg="http://www.w3.org/2000/svg"
+ xmlns="http://www.w3.org/2000/svg"
+ xmlns:xlink="http://www.w3.org/1999/xlink"
+ xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
+ xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
+ version="1.1"
+ width="912.44751"
+ height="664.9787"
+ id="svg5187"
+ inkscape:version="0.48.5 r10040"
+ sodipodi:docname="vm_power_mgr_vm_request_seq.svg">
+ <metadata
+ id="metadata5497">
+ <rdf:RDF>
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1.7.4.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [dpdk-dev] [PATCH v3 3/3] doc: add VM power mgmt app
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 0/3] doc: add VM power mgmt app Pablo de Lara
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 1/3] doc: add vm power mgmt overview svg Pablo de Lara
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 2/3] doc: add vm power mgmt request sequence svg Pablo de Lara
@ 2014-12-09 12:02 ` Pablo de Lara
2014-12-11 10:17 ` Iremonger, Bernard
2 siblings, 1 reply; 8+ messages in thread
From: Pablo de Lara @ 2014-12-09 12:02 UTC (permalink / raw)
To: dev
Added new section in sample app UG for
the new VM power management app.
Signed-off-by: Alan Carew <alan.carew@intel.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
doc/guides/rel_notes/rel_description.rst | 2 +
doc/guides/sample_app_ug/index.rst | 5 +
doc/guides/sample_app_ug/vm_power_management.rst | 361 ++++++++++++++++++++++
3 files changed, 368 insertions(+), 0 deletions(-)
create mode 100644 doc/guides/sample_app_ug/vm_power_management.rst
diff --git a/doc/guides/rel_notes/rel_description.rst b/doc/guides/rel_notes/rel_description.rst
index 07c897b..d159b3c 100644
--- a/doc/guides/rel_notes/rel_description.rst
+++ b/doc/guides/rel_notes/rel_description.rst
@@ -149,6 +149,8 @@ The following is a list of Intel® DPDK documents in the suggested reading order
* Kernel NIC Interface (KNI)
+ * VM Power Management
+
In addition, there are some other applications that are built when the libraries are created.
The source for these applications is in the DPDK/app directory and are called:
diff --git a/doc/guides/sample_app_ug/index.rst b/doc/guides/sample_app_ug/index.rst
index db88b0d..c3b50e2 100644
--- a/doc/guides/sample_app_ug/index.rst
+++ b/doc/guides/sample_app_ug/index.rst
@@ -101,6 +101,7 @@ Copyright © 2012 - 2014, Intel Corporation. All rights reserved.
internet_proto_ip_pipeline
test_pipeline
dist_app
+ vm_power_management
**Figures**
@@ -152,6 +153,10 @@ Copyright © 2012 - 2014, Intel Corporation. All rights reserved.
:ref:`Figure 23.Distributor Sample Application Layout <figure_23>`
+:ref:`Figure 24.High level Solution <figure_24>`
+
+:ref:`Figure 25.VM request to scale frequency <figure_25>`
+
**Tables**
:ref:`Table 1.Output Traffic Marking <table_1>`
diff --git a/doc/guides/sample_app_ug/vm_power_management.rst b/doc/guides/sample_app_ug/vm_power_management.rst
new file mode 100644
index 0000000..f5b5200
--- /dev/null
+++ b/doc/guides/sample_app_ug/vm_power_management.rst
@@ -0,0 +1,361 @@
+.. BSD LICENSE
+ Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
+ All rights reserved.
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions
+ are met:
+
+ * Redistributions of source code must retain the above copyright
+ notice, this list of conditions and the following disclaimer.
+ * Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in
+ the documentation and/or other materials provided with the
+ distribution.
+ * Neither the name of Intel Corporation nor the names of its
+ contributors may be used to endorse or promote products derived
+ from this software without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+VM Power Management Application
+===============================
+
+Introduction
+------------
+
+Applications running in Virtual Environments have an abstract view of
+the underlying hardware on the Host, in particular applications cannot see
+the binding of virtual to physical hardware.
+When looking at CPU resourcing, the pinning of Virtual CPUs(vCPUs) to
+Host Physical CPUs(pCPUS) is not apparent to an application
+and this pinning may change over time.
+Furthermore, Operating Systems on virtual machines do not have the ability
+to govern their own power policy; the Machine Specific Registers (MSRs)
+for enabling P-State transitions are not exposed to Operating Systems
+running on Virtual Machines(VMs).
+
+The Virtual Machine Power Management solution shows an example of
+how a DPDK application can indicate its processing requirements using VM local
+only information(vCPU/lcore) to a Host based Monitor which is responsible
+for accepting requests for frequency changes for a vCPU, translating the vCPU
+to a pCPU via libvirt and affecting the change in frequency.
+
+The solution is comprised of two high-level components:
+
+#. Example Host Application
+
+ Using a Command Line Interface(CLI) for VM->Host communication channel management
+ allows adding channels to the Monitor, setting and querying the vCPU to pCPU pinning,
+ inspecting and manually changing the frequency for each CPU.
+ The CLI runs on a single lcore while the thread responsible for managing
+ VM requests runs on a second lcore.
+
+ VM requests arriving on a channel for frequency changes are passed
+ to the librte_power ACPI cpufreq sysfs based library.
+ The Host Application relies on both qemu-kvm and libvirt to function.
+
+#. librte_power for Virtual Machines
+
+ Using an alternate implementation for the librte_power API, requests for
+ frequency changes are forwarded to the host monitor rather than
+ the APCI cpufreq sysfs interface used on the host.
+
+ The l3fwd-power application will use this implementation when deployed on a VM
+ (see Chapter 11 "L3 Forwarding with Power Management Application").
+
+.. _figure_24:
+
+**Figure 24. Highlevel Solution**
+
+|vm_power_mgr_highlevel|
+
+Overview
+--------
+
+VM Power Management employs qemu-kvm to provide communications channels
+between the host and VMs in the form of Virtio-Serial which appears as
+a paravirtualized serial device on a VM and can be configured to use
+various backends on the host. For this example each Virtio-Serial endpoint
+on the host is configured as AF_UNIX file socket, supporting poll/select
+and epoll for event notification.
+In this example each channel endpoint on the host is monitored via
+epoll for EPOLLIN events.
+Each channel is specified as qemu-kvm arguments or as libvirt XML for each VM,
+where each VM can have a number of channels up to a maximum of 64 per VM,
+in this example each DPDK lcore on a VM has exclusive access to a channel.
+
+To enable frequency changes from within a VM, a request via the librte_power interface
+is forwarded via Virtio-Serial to the host, each request contains the vCPU
+and power command(scale up/down/min/max).
+The API for host and guest librte_power is consistent across environments,
+with the selection of VM or Host Implementation determined at automatically
+at runtime based on the environment.
+
+Upon receiving a request, the host translates the vCPU to a pCPU via
+the libvirt API before forwarding to the host librte_power.
+
+.. _figure_25:
+
+**Figure 25. VM request to scale frequency**
+
+|vm_power_mgr_vm_request_seq|
+
+Performance Considerations
+~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+While Haswell Microarchitecture allows for independent power control for each core,
+earlier Microarchtectures do not offer such fine grained control.
+When deployed on pre-Haswell platforms greater care must be taken in selecting
+which cores are assigned to a VM, for instance a core will not scale down
+until its sibling is similarly scaled.
+
+Configuration
+-------------
+
+BIOS
+~~~~
+
+Enhanced Intel SpeedStep® Technology must be enabled in the platform BIOS
+if the power management feature of DPDK is to be used.
+Otherwise, the sys file folder /sys/devices/system/cpu/cpu0/cpufreq will not exist,
+and the CPU frequency- based power management cannot be used.
+Consult the relevant BIOS documentation to determine how these settings
+can be accessed.
+
+Host Operating System
+~~~~~~~~~~~~~~~~~~~~~
+
+The Host OS must also have the *apci_cpufreq* module installed, in some cases
+the *intel_pstate* driver may be the default Power Management environment.
+To enable *acpi_cpufreq* and disable *intel_pstate*, add the following
+to the grub linux command line:
+
+.. code-block:: console
+
+ intel_pstate=disable
+
+Upon rebooting, load the *acpi_cpufreq* module:
+
+.. code-block:: console
+
+ modprobe acpi_cpufreq
+
+Hypervisor Channel Configuration
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Virtio-Serial channels are configured via libvirt XML:
+
+
+.. code-block:: xml
+
+ <name>{vm_name}</name>
+ <controller type='virtio-serial' index='0'>
+ <address type='pci' domain='0x0000' bus='0x00' slot='0x06' function='0x0'/>
+ </controller>
+ <channel type='unix'>
+ <source mode='bind' path='/tmp/powermonitor/{vm_name}.{channel_num}'/>
+ <target type='virtio' name='virtio.serial.port.poweragent.{vm_channel_num}/>
+ <address type='virtio-serial' controller='0' bus='0' port='{N}'/>
+ </channel>
+
+
+Where a single controller of type *virtio-serial* is created and up to 32 channels
+can be associated with a single controller and multiple controllers can be specified.
+The convention is to use the name of the VM in the host path *{vm_name}* and
+to increment *{channel_num}* for each channel, likewise the port value *{N}*
+must be incremented for each channel.
+
+Each channel on the host will appear in *path*, the directory */tmp/powermonitor/*
+must first be created and given qemu permissions
+
+.. code-block:: console
+
+ mkdir /tmp/powermonitor/
+ chown qemu:qemu /tmp/powermonitor
+
+Note that files and directories within /tmp are generally removed upon
+rebooting the host and the above steps may need to be carried out after each reboot.
+
+The serial device as it appears on a VM is configured with the *target* element attribute *name*
+and must be in the form of *virtio.serial.port.poweragent.{vm_channel_num}*,
+where *vm_channel_num* is typically the lcore channel to be used in DPDK VM applications.
+
+Each channel on a VM will be present at */dev/virtio-ports/virtio.serial.port.poweragent.{vm_channel_num}*
+
+Compiling and Running the Host Application
+------------------------------------------
+
+Compiling
+~~~~~~~~~
+
+#. export RTE_SDK=/path/to/rte_sdk
+#. cd ${RTE_SDK}/examples/vm_power_manager
+#. make
+
+Running
+~~~~~~~
+
+The application does not have any specific command line options other than *EAL*:
+
+.. code-block:: console
+
+ ./build/vm_power_mgr [EAL options]
+
+The application requires exactly two cores to run, one core is dedicated to the CLI,
+while the other is dedicated to the channel endpoint monitor, for example to run
+on cores 0 & 1 on a system with 4 memory channels:
+
+.. code-block:: console
+
+ ./build/vm_power_mgr -c 0x3 -n 4
+
+After successful initialisation the user is presented with VM Power Manager CLI:
+
+.. code-block:: console
+
+ vm_power>
+
+Virtual Machines can now be added to the VM Power Manager:
+
+.. code-block:: console
+
+ vm_power> add_vm {vm_name}
+
+When a {vm_name} is specified with the *add_vm* command a lookup is performed
+with libvirt to ensure that the VM exists, {vm_name} is used as an unique identifier
+to associate channels with a particular VM and for executing operations on a VM within the CLI.
+VMs do not have to be running to in order to add them.
+
+A number of commands can be issued via the CLI in relation to VMs:
+
+ Remove a Virtual Machine identified by {vm_name} from the VM Power Manager.
+
+ .. code-block:: console
+
+ rm_vm {vm_name}
+
+ Add communication channels for the specified VM, the virtio channels must be enabled
+ in the VM configuration(qemu/libvirt) and the associated VM must be active.
+ {list} is a comma-separated list of channel numbers to add, using the keyword 'all'
+ will attempt to add all channels for the VM:
+
+ .. code-block:: console
+
+ add_channels {vm_name} {list}|all
+
+ Enable or disable the communication channels in {list}(comma-separated)
+ for the specified VM, alternatively list can be replaced with keyword 'all'.
+ Disabled channels will still receive packets on the host, however the commands
+ they specify will be ignored. Set status to 'enabled' to begin processing requests again:
+
+ .. code-block:: console
+
+ set_channel_status {vm_name} {list}|all enabled|disabled
+
+ Print to the CLI the information on the specified VM, the information
+ lists the number of vCPUS, the pinning to pCPU(s) as a bit mask, along with
+ any communication channels associated with each VM, along with the status of each channel:
+
+ .. code-block:: console
+
+ show_vm {vm_name}
+
+ Set the binding of Virtual CPU on VM with name {vm_name} to the Physical CPU mask:
+
+ .. code-block:: console
+
+ set_pcpu_mask {vm_name} {vcpu} {pcpu}
+
+ Set the binding of Virtual CPU on VM to the Physical CPU:
+
+ .. code-block:: console
+
+ set_pcpu {vm_name} {vcpu} {pcpu}
+
+Manual control and inspection can also be carried in relation CPU frequency scaling:
+
+ Get the current frequency for each core specified in the mask:
+
+ .. code-block:: console
+
+ show_cpu_freq_mask {mask}
+
+ Set the current frequency for the cores specified in {core_mask} by scaling each up/down/min/max:
+
+ .. code-block:: console
+
+ set_cpu_freq {core_mask} up|down|min|max
+
+ Get the current frequency for the specified core:
+
+ .. code-block:: console
+
+ show_cpu_freq {core_num}
+
+ Set the current frequency for the specified core by scaling up/down/min/max:
+
+ .. code-block:: console
+
+ set_cpu_freq {core_num} up|down|min|max
+
+Compiling and Running the Guest Applications
+--------------------------------------------
+
+For compiling and running l3fwd-power, see Chapter 11 "L3 Forwarding with Power Management Application".
+
+A guest CLI is also provided for validating the setup.
+
+For both l3fwd-power and guest CLI, the channels for the VM must be monitored by the
+host application using the *add_channels* command on the host.
+
+Compiling
+~~~~~~~~~
+
+#. export RTE_SDK=/path/to/rte_sdk
+#. cd ${RTE_SDK}/examples/vm_power_manager/guest_cli
+#. make
+
+Running
+~~~~~~~
+
+The application does not have any specific command line options other than *EAL*:
+
+.. code-block:: console
+
+ ./build/vm_power_mgr [EAL options]
+
+The application for example purposes uses a channel for each lcore enabled,
+for example to run on cores 0,1,2,3 on a system with 4 memory channels:
+
+.. code-block:: console
+
+ ./build/guest_vm_power_mgr -c 0xf -n 4
+
+
+After successful initialisation the user is presented with VM Power Manager Guest CLI:
+
+.. code-block:: console
+
+ vm_power(guest)>
+
+To change the frequency of a lcore, use the set_cpu_freq command.
+Where {core_num} is the lcore and channel to change frequency by scaling up/down/min/max.
+
+.. code-block:: console
+
+ set_cpu_freq {core_num} up|down|min|max
+
+.. |vm_power_mgr_highlevel| image:: img/vm_power_mgr_highlevel.svg
+
+.. |vm_power_mgr_vm_request_seq| image:: img/vm_power_mgr_vm_request_seq.svg
--
1.7.4.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [dpdk-dev] [PATCH v3 1/3] doc: add vm power mgmt overview svg
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 1/3] doc: add vm power mgmt overview svg Pablo de Lara
@ 2014-12-11 10:13 ` Iremonger, Bernard
0 siblings, 0 replies; 8+ messages in thread
From: Iremonger, Bernard @ 2014-12-11 10:13 UTC (permalink / raw)
To: De Lara Guarch, Pablo; +Cc: dev
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Pablo de Lara
> Sent: Tuesday, December 9, 2014 12:02 PM
> To: dev@dpdk.org
> Subject: [dpdk-dev] [PATCH v3 1/3] doc: add vm power mgmt overview svg
>
> Added first of the two figures in the VM power management app UG:
> VM power mangament highlevel overview
>
> Signed-off-by: Alan Carew <alan.carew@intel.com>
> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Bernard Iremonger <bernard.iremonger@intel.com>
I have applied the patch to my tree next/dpdk-doc.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [dpdk-dev] [PATCH v3 2/3] doc: add vm power mgmt request sequence svg
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 2/3] doc: add vm power mgmt request sequence svg Pablo de Lara
@ 2014-12-11 10:15 ` Iremonger, Bernard
0 siblings, 0 replies; 8+ messages in thread
From: Iremonger, Bernard @ 2014-12-11 10:15 UTC (permalink / raw)
To: De Lara Guarch, Pablo; +Cc: dev
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Pablo de Lara
> Sent: Tuesday, December 9, 2014 12:02 PM
> To: dev@dpdk.org
> Subject: [dpdk-dev] [PATCH v3 2/3] doc: add vm power mgmt request sequence svg
>
> Added second of the two figures in the VM power management app UG VM power management
> request sequence
>
> Signed-off-by: Alan Carew <alan.carew@intel.com>
> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Bernard Iremonger <bernard.iremonger@intel.com>
I have applied the patch to my tree next/dpdk-doc.
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [dpdk-dev] [PATCH v3 3/3] doc: add VM power mgmt app
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 3/3] doc: add VM power mgmt app Pablo de Lara
@ 2014-12-11 10:17 ` Iremonger, Bernard
0 siblings, 0 replies; 8+ messages in thread
From: Iremonger, Bernard @ 2014-12-11 10:17 UTC (permalink / raw)
To: De Lara Guarch, Pablo; +Cc: dev
> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Pablo de Lara
> Sent: Tuesday, December 9, 2014 12:02 PM
> To: dev@dpdk.org
> Subject: [dpdk-dev] [PATCH v3 3/3] doc: add VM power mgmt app
>
> Added new section in sample app UG for
> the new VM power management app.
>
> Signed-off-by: Alan Carew <alan.carew@intel.com>
> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Bernard Iremonger <bernard.iremonger@intel.com>
I have applied the patch to my tree next/dpdk-doc.
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2014-12-11 10:18 UTC | newest]
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2014-11-28 16:46 ` [dpdk-dev] [PATCH v2] doc: new sample app UG for VM power management Pablo de Lara
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 0/3] doc: add VM power mgmt app Pablo de Lara
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 1/3] doc: add vm power mgmt overview svg Pablo de Lara
2014-12-11 10:13 ` Iremonger, Bernard
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 2/3] doc: add vm power mgmt request sequence svg Pablo de Lara
2014-12-11 10:15 ` Iremonger, Bernard
2014-12-09 12:02 ` [dpdk-dev] [PATCH v3 3/3] doc: add VM power mgmt app Pablo de Lara
2014-12-11 10:17 ` Iremonger, Bernard
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