Re: [dpdk-dev] [PATCH] net/i40e: fix conflict with multi-driver

["Xing, Beilei" <beilei.xing@intel.com>]

> -----Original Message-----
> From: Zhang, AlvinX
> Sent: Friday, September 20, 2019 6:57 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Xing, Beilei <beilei.xing@intel.com>
> Cc: dev@dpdk.org; Zhang, AlvinX <alvinx.zhang@intel.com>;
> stable@dpdk.org
> Subject: [PATCH] net/i40e: fix conflict with multi-driver
> 
> From: Alvin Zhang <alvinx.zhang@intel.com>
> 
> If support-multi-driver option been set, we suppose the DPDK will not modify
> the value of global register GLQF_FD_MSK. Current situation is if we create a
> new flow with 'flow creat ...' command, the register value may be changed.

Thanks for the fix, the patch looks OK for me, but the commit log should be amended.
How about 
"If support-multi-driver is enabled, the global registers should not be configured.
But with the correct code base, if creating a flow with rte_flow API, the global
register GLQF_FD_MSK may be changed." ?

Beilei

> 
> Fixes: cfdfca493cae ("net/i40e: fix multiple driver support")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
> ---
>  drivers/net/i40e/i40e_flow.c | 34 +++++++++++++++++++++++++++-------
>  1 file changed, 27 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
> index e902a35..8c54394 100644
> --- a/drivers/net/i40e/i40e_flow.c
> +++ b/drivers/net/i40e/i40e_flow.c
> @@ -2349,6 +2349,33 @@ static int i40e_flow_destroy_tunnel_filter(struct
> i40e_pf *pf,
>  	if (num < 0)
>  		return -EINVAL;
> 
> +	if (pf->support_multi_driver) {
> +		for (i = 0; i < num; i++)
> +			if (i40e_read_rx_ctl(hw,
> +					I40E_GLQF_FD_MSK(i, pctype)) !=
> +					mask_reg[i]) {
> +				PMD_DRV_LOG(ERR, "Input set setting is not"
> +						" supported.");
> +				return -1;
> +			}
> +		for (i = num; i < I40E_INSET_MASK_NUM_REG; i++)
> +			if (i40e_read_rx_ctl(hw,
> +					I40E_GLQF_FD_MSK(i, pctype)) != 0) {
> +				PMD_DRV_LOG(ERR, "Input set setting is not"
> +						" supported.");
> +				return -1;
> +			}
> +
> +	} else {
> +		for (i = 0; i < num; i++)
> +			i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype),
> +				mask_reg[i]);
> +		/*clear unused mask registers of the pctype */
> +		for (i = num; i < I40E_INSET_MASK_NUM_REG; i++)
> +			i40e_check_write_reg(hw,
> +					I40E_GLQF_FD_MSK(i, pctype), 0);
> +	}
> +
>  	inset_reg |= i40e_translate_input_set_reg(hw->mac.type, input_set);
> 
>  	i40e_check_write_reg(hw, I40E_PRTQF_FD_INSET(pctype, 0), @@
> -2357,13 +2384,6 @@ static int i40e_flow_destroy_tunnel_filter(struct
> i40e_pf *pf,
>  			     (uint32_t)((inset_reg >>
>  					 I40E_32_BIT_WIDTH) & UINT32_MAX));
> 
> -	for (i = 0; i < num; i++)
> -		i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype),
> -				     mask_reg[i]);
> -
> -	/*clear unused mask registers of the pctype */
> -	for (i = num; i < I40E_INSET_MASK_NUM_REG; i++)
> -		i40e_check_write_reg(hw, I40E_GLQF_FD_MSK(i, pctype), 0);
>  	I40E_WRITE_FLUSH(hw);
> 
>  	pf->fdir.input_set[pctype] = input_set;
> --
> 1.8.3.1