From: Xiaoyun wang <cloud.wangxiaoyun@huawei.com>
To: <ferruh.yigit@intel.com>
Cc: <dev@dpdk.org>, <xuanziyang2@huawei.com>,
<shahar.belkar@huawei.com>, <luoxianjun@huawei.com>,
<tanya.brokhman@huawei.com>, <zhouguoyang@huawei.com>,
<wulike1@huawei.com>, Xiaoyun wang <cloud.wangxiaoyun@huawei.com>
Subject: [dpdk-dev] [PATCH v2 03/17] net/hinic: add VF PMD operation interfaces
Date: Wed, 25 Sep 2019 22:30:31 +0800 [thread overview]
Message-ID: <9ef34f460dcc62c38058206b80269142ad5684eb.1569421287.git.cloud.wangxiaoyun@huawei.com> (raw)
In-Reply-To: <cover.1569421286.git.cloud.wangxiaoyun@huawei.com>
This patch adds VF PMD operation interfaces to support SRIOV.
Signed-off-by: Xiaoyun wang <cloud.wangxiaoyun@huawei.com>
---
drivers/net/hinic/base/hinic_pmd_niccfg.c | 35 ++++
drivers/net/hinic/base/hinic_pmd_niccfg.h | 14 ++
drivers/net/hinic/hinic_pmd_ethdev.c | 255 ++++++++++++++++++++----------
3 files changed, 223 insertions(+), 81 deletions(-)
diff --git a/drivers/net/hinic/base/hinic_pmd_niccfg.c b/drivers/net/hinic/base/hinic_pmd_niccfg.c
index d3bbc3d..0a20ade 100644
--- a/drivers/net/hinic/base/hinic_pmd_niccfg.c
+++ b/drivers/net/hinic/base/hinic_pmd_niccfg.c
@@ -1436,3 +1436,38 @@ int hinic_flush_qp_res(void *hwdev)
return 0;
}
+
+/**
+ * hinic_vf_get_default_cos - Get default cos of VF.
+ *
+ * @param hwdev
+ * The hardware interface of a nic device.
+ * @param cos_id
+ * Cos value.
+ *
+ * @return
+ * 0 on success.
+ * negative error value otherwise.
+ */
+int hinic_vf_get_default_cos(struct hinic_hwdev *hwdev, u8 *cos_id)
+{
+ struct hinic_vf_default_cos vf_cos;
+ u16 out_size = sizeof(vf_cos);
+ int err;
+
+ memset(&vf_cos, 0, sizeof(vf_cos));
+ vf_cos.mgmt_msg_head.resp_aeq_num = HINIC_AEQ1;
+
+ err = hinic_msg_to_mgmt_sync(hwdev, HINIC_MOD_L2NIC,
+ HINIC_PORT_CMD_GET_VF_COS, &vf_cos,
+ sizeof(vf_cos), &vf_cos,
+ &out_size, 0);
+ if (err || !out_size || vf_cos.mgmt_msg_head.status) {
+ PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d, status: 0x%x, out size: 0x%x",
+ err, vf_cos.mgmt_msg_head.status, out_size);
+ return -EFAULT;
+ }
+ *cos_id = vf_cos.state.default_cos;
+
+ return 0;
+}
diff --git a/drivers/net/hinic/base/hinic_pmd_niccfg.h b/drivers/net/hinic/base/hinic_pmd_niccfg.h
index dcb9602..94371bb 100644
--- a/drivers/net/hinic/base/hinic_pmd_niccfg.h
+++ b/drivers/net/hinic/base/hinic_pmd_niccfg.h
@@ -562,6 +562,18 @@ struct hinic_clear_qp_resource {
u16 rsvd1;
};
+struct hinic_dcb_state {
+ u8 dcb_on;
+ u8 default_cos;
+ u8 up_cos[8];
+};
+
+struct hinic_vf_default_cos {
+ struct hinic_mgmt_msg_head mgmt_msg_head;
+
+ struct hinic_dcb_state state;
+};
+
/* set physical port Anti-Attack rate */
struct hinic_port_anti_attack_rate {
struct hinic_mgmt_msg_head mgmt_msg_head;
@@ -659,4 +671,6 @@ int hinic_set_link_status_follow(void *hwdev,
void hinic_vf_func_free(struct hinic_hwdev *hwdev);
+int hinic_vf_get_default_cos(struct hinic_hwdev *hwdev, u8 *cos_id);
+
#endif /* _HINIC_PMD_NICCFG_H_ */
diff --git a/drivers/net/hinic/hinic_pmd_ethdev.c b/drivers/net/hinic/hinic_pmd_ethdev.c
index c9a400e..2f413e3 100644
--- a/drivers/net/hinic/hinic_pmd_ethdev.c
+++ b/drivers/net/hinic/hinic_pmd_ethdev.c
@@ -20,6 +20,7 @@
#include "base/hinic_pmd_cmdq.h"
#include "base/hinic_pmd_niccfg.h"
#include "base/hinic_pmd_nicio.h"
+#include "base/hinic_pmd_mbox.h"
#include "hinic_pmd_ethdev.h"
#include "hinic_pmd_tx.h"
#include "hinic_pmd_rx.h"
@@ -29,13 +30,21 @@
/* Hinic devices */
#define HINIC_DEV_ID_PRD 0x1822
+#define HINIC_DEV_ID_VF 0x375E
+#define HINIC_DEV_ID_VF_HV 0x379E
+
+/* Mezz card for Blade Server */
#define HINIC_DEV_ID_MEZZ_25GE 0x0210
#define HINIC_DEV_ID_MEZZ_40GE 0x020D
#define HINIC_DEV_ID_MEZZ_100GE 0x0205
+/* 2*25G and 2*100G card */
+#define HINIC_DEV_ID_1822_DUAL_25GE 0x0206
+#define HINIC_DEV_ID_1822_100GE 0x0200
+
#define HINIC_SERVICE_MODE_NIC 2
-#define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
+#define HINIC_INTR_CB_UNREG_MAX_RETRIES 10
#define DEFAULT_BASE_COS 4
#define NR_MAX_COS 8
@@ -43,7 +52,7 @@
#define HINIC_MIN_RX_BUF_SIZE 1024
#define HINIC_MAX_MAC_ADDRS 1
-/** Driver-specific log messages type. */
+/* Driver-specific log messages type */
int hinic_logtype;
struct hinic_xstats_name_off {
@@ -197,10 +206,16 @@ struct hinic_xstats_name_off {
static int hinic_xstats_calc_num(struct hinic_nic_dev *nic_dev)
{
- return (HINIC_VPORT_XSTATS_NUM +
- HINIC_PHYPORT_XSTATS_NUM +
- HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
- HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
+ if (HINIC_IS_VF(nic_dev->hwdev)) {
+ return (HINIC_VPORT_XSTATS_NUM +
+ HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
+ HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
+ } else {
+ return (HINIC_VPORT_XSTATS_NUM +
+ HINIC_PHYPORT_XSTATS_NUM +
+ HINIC_RXQ_XSTATS_NUM * nic_dev->num_rq +
+ HINIC_TXQ_XSTATS_NUM * nic_dev->num_sq);
+ }
}
static const struct rte_eth_desc_lim hinic_rx_desc_lim = {
@@ -599,7 +614,7 @@ static void hinic_reset_tx_queue(struct rte_eth_dev *dev)
txq->wq->delta = txq->q_depth;
txq->wq->mask = txq->q_depth - 1;
- /*clear hardware ci*/
+ /* clear hardware ci */
ci_addr = (volatile u32 *)HINIC_CI_VADDR(nic_io->ci_vaddr_base,
q_id);
*ci_addr = 0;
@@ -888,6 +903,9 @@ static int hinic_dev_start(struct rte_eth_dev *dev)
goto cfg_rxtx_fail;
}
+ /* reactive pf status, so that uP report asyn event */
+ hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_ACTIVE_FLAG);
+
/* open virtual port and ready to start packet receiving */
rc = hinic_set_vport_enable(nic_dev->hwdev, true);
if (rc) {
@@ -915,6 +933,8 @@ static int hinic_dev_start(struct rte_eth_dev *dev)
(void)hinic_set_vport_enable(nic_dev->hwdev, false);
en_vport_fail:
+ hinic_set_pf_status(nic_dev->hwdev->hwif, HINIC_PF_STATUS_INIT);
+
/* Flush tx && rx chip resources in case of set vport fake fail */
(void)hinic_flush_qp_res(nic_dev->hwdev);
rte_delay_ms(100);
@@ -1233,7 +1253,7 @@ static int hinic_dev_stats_reset(struct rte_eth_dev *dev)
*
* @param dev
* Pointer to Ethernet device structure.
- **/
+ */
static int hinic_dev_xstats_reset(struct rte_eth_dev *dev)
{
struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
@@ -1697,6 +1717,9 @@ static int hinic_dev_xstats_get(struct rte_eth_dev *dev,
count++;
}
+ if (HINIC_IS_VF(nic_dev->hwdev))
+ return count;
+
/* Get stats from hinic_phy_port_stats */
err = hinic_get_phy_port_stats(nic_dev->hwdev, &port_stats);
if (err)
@@ -1765,6 +1788,9 @@ static int hinic_dev_xstats_get_names(struct rte_eth_dev *dev,
count++;
}
+ if (HINIC_IS_VF(nic_dev->hwdev))
+ return count;
+
/* get phy port stats */
for (i = 0; i < HINIC_PHYPORT_XSTATS_NUM; i++) {
snprintf(xstats_names[count].name,
@@ -1805,18 +1831,39 @@ static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
up_pgid, up_bw, up_strict);
}
-static void hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
+static int hinic_init_default_cos(struct hinic_nic_dev *nic_dev)
{
- nic_dev->default_cos =
- (hinic_global_func_id(nic_dev->hwdev) +
- DEFAULT_BASE_COS) % NR_MAX_COS;
+ u8 cos_id = 0;
+ int err;
+
+ if (!HINIC_IS_VF(nic_dev->hwdev)) {
+ nic_dev->default_cos =
+ (hinic_global_func_id(nic_dev->hwdev) +
+ DEFAULT_BASE_COS) % NR_MAX_COS;
+ } else {
+ err = hinic_vf_get_default_cos(nic_dev->hwdev, &cos_id);
+ if (err) {
+ PMD_DRV_LOG(ERR, "Get VF default cos failed, err: %d",
+ err);
+ return HINIC_ERROR;
+ }
+
+ nic_dev->default_cos = cos_id;
+ }
+
+ return 0;
}
static int hinic_set_default_hw_feature(struct hinic_nic_dev *nic_dev)
{
int err;
- hinic_init_default_cos(nic_dev);
+ err = hinic_init_default_cos(nic_dev);
+ if (err)
+ return err;
+
+ if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
+ return 0;
/* Restore DCB configure to default status */
err = hinic_set_default_dcb_feature(nic_dev);
@@ -1852,6 +1899,9 @@ static int32_t hinic_card_workmode_check(struct hinic_nic_dev *nic_dev)
struct hinic_board_info info = { 0 };
int rc;
+ if (hinic_func_type(nic_dev->hwdev) == TYPE_VF)
+ return 0;
+
rc = hinic_get_board_info(nic_dev->hwdev, &info);
if (rc)
return rc;
@@ -1867,7 +1917,7 @@ static int hinic_copy_mempool_init(struct hinic_nic_dev *nic_dev)
nic_dev->cpy_mpool =
rte_pktmbuf_pool_create(nic_dev->proc_dev_name,
HINIC_COPY_MEMPOOL_DEPTH,
- RTE_CACHE_LINE_SIZE, 0,
+ 0, 0,
HINIC_COPY_MBUF_SIZE,
rte_socket_id());
if (!nic_dev->cpy_mpool) {
@@ -1978,6 +2028,14 @@ static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
goto init_pf_to_mgmt_fail;
}
+ /* init mailbox */
+ rc = hinic_comm_func_to_func_init(nic_dev->hwdev);
+ if (rc) {
+ PMD_DRV_LOG(ERR, "Initialize func_to_func failed, dev_name: %s",
+ eth_dev->data->name);
+ goto init_func_to_func_fail;
+ }
+
rc = hinic_card_workmode_check(nic_dev);
if (rc) {
PMD_DRV_LOG(ERR, "Check card workmode failed, dev_name: %s",
@@ -2077,6 +2135,9 @@ static int hinic_nic_dev_create(struct rte_eth_dev *eth_dev)
init_cmdq_fail:
l2nic_reset_fail:
workmode_check_fail:
+ hinic_comm_func_to_func_free(nic_dev->hwdev);
+
+init_func_to_func_fail:
hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
init_pf_to_mgmt_fail:
@@ -2110,6 +2171,7 @@ static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
hinic_deinit_nicio(nic_dev->hwdev);
hinic_deactivate_hwdev_state(nic_dev->hwdev);
hinic_comm_cmdqs_free(nic_dev->hwdev);
+ hinic_comm_func_to_func_free(nic_dev->hwdev);
hinic_comm_pf_to_mgmt_free(nic_dev->hwdev);
hinic_comm_aeqs_free(nic_dev->hwdev);
free_cfg_mgmt(nic_dev->hwdev);
@@ -2119,6 +2181,93 @@ static void hinic_nic_dev_destroy(struct rte_eth_dev *eth_dev)
nic_dev->hwdev = NULL;
}
+/**
+ * DPDK callback to close the device.
+ *
+ * @param dev
+ * Pointer to Ethernet device structure.
+ */
+static void hinic_dev_close(struct rte_eth_dev *dev)
+{
+ struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+
+ if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
+ PMD_DRV_LOG(WARNING, "Device %s already closed",
+ dev->data->name);
+ return;
+ }
+
+ /* stop device first */
+ hinic_dev_stop(dev);
+
+ /* rx_cqe, rx_info */
+ hinic_free_all_rx_resources(dev);
+
+ /* tx_info */
+ hinic_free_all_tx_resources(dev);
+
+ /* free wq, pi_dma_addr */
+ hinic_free_all_rq(nic_dev);
+
+ /* free wq, db_addr */
+ hinic_free_all_sq(nic_dev);
+
+ /* deinit mac vlan tbl */
+ hinic_deinit_mac_addr(dev);
+
+ /* disable hardware and uio interrupt */
+ hinic_disable_interrupt(dev);
+
+ /* deinit nic hardware device */
+ hinic_nic_dev_destroy(dev);
+}
+
+static const struct eth_dev_ops hinic_pmd_ops = {
+ .dev_configure = hinic_dev_configure,
+ .dev_infos_get = hinic_dev_infos_get,
+ .rx_queue_setup = hinic_rx_queue_setup,
+ .tx_queue_setup = hinic_tx_queue_setup,
+ .dev_start = hinic_dev_start,
+ .link_update = hinic_link_update,
+ .rx_queue_release = hinic_rx_queue_release,
+ .tx_queue_release = hinic_tx_queue_release,
+ .dev_stop = hinic_dev_stop,
+ .dev_close = hinic_dev_close,
+ .promiscuous_enable = hinic_dev_promiscuous_enable,
+ .promiscuous_disable = hinic_dev_promiscuous_disable,
+ .rss_hash_update = hinic_rss_hash_update,
+ .rss_hash_conf_get = hinic_rss_conf_get,
+ .reta_update = hinic_rss_indirtbl_update,
+ .reta_query = hinic_rss_indirtbl_query,
+ .stats_get = hinic_dev_stats_get,
+ .stats_reset = hinic_dev_stats_reset,
+ .xstats_get = hinic_dev_xstats_get,
+ .xstats_reset = hinic_dev_xstats_reset,
+ .xstats_get_names = hinic_dev_xstats_get_names,
+};
+
+static const struct eth_dev_ops hinic_pmd_vf_ops = {
+ .dev_configure = hinic_dev_configure,
+ .dev_infos_get = hinic_dev_infos_get,
+ .rx_queue_setup = hinic_rx_queue_setup,
+ .tx_queue_setup = hinic_tx_queue_setup,
+ .dev_start = hinic_dev_start,
+ .link_update = hinic_link_update,
+ .rx_queue_release = hinic_rx_queue_release,
+ .tx_queue_release = hinic_tx_queue_release,
+ .dev_stop = hinic_dev_stop,
+ .dev_close = hinic_dev_close,
+ .rss_hash_update = hinic_rss_hash_update,
+ .rss_hash_conf_get = hinic_rss_conf_get,
+ .reta_update = hinic_rss_indirtbl_update,
+ .reta_query = hinic_rss_indirtbl_query,
+ .stats_get = hinic_dev_stats_get,
+ .stats_reset = hinic_dev_stats_reset,
+ .xstats_get = hinic_dev_xstats_get,
+ .xstats_reset = hinic_dev_xstats_reset,
+ .xstats_get_names = hinic_dev_xstats_get_names,
+};
+
static int hinic_func_init(struct rte_eth_dev *eth_dev)
{
struct rte_pci_device *pci_dev;
@@ -2173,6 +2322,11 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)
goto create_nic_dev_fail;
}
+ if (HINIC_IS_VF(nic_dev->hwdev))
+ eth_dev->dev_ops = &hinic_pmd_vf_ops;
+ else
+ eth_dev->dev_ops = &hinic_pmd_ops;
+
rc = hinic_init_mac_addr(eth_dev);
if (rc) {
PMD_DRV_LOG(ERR, "Initialize mac table failed, dev_name: %s",
@@ -2214,6 +2368,7 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)
hinic_deinit_mac_addr(eth_dev);
init_mac_fail:
+ eth_dev->dev_ops = NULL;
hinic_nic_dev_destroy(eth_dev);
create_nic_dev_fail:
@@ -2226,71 +2381,6 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)
return rc;
}
-/**
- * DPDK callback to close the device.
- *
- * @param dev
- * Pointer to Ethernet device structure.
- */
-static void hinic_dev_close(struct rte_eth_dev *dev)
-{
- struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
-
- if (hinic_test_and_set_bit(HINIC_DEV_CLOSE, &nic_dev->dev_status)) {
- PMD_DRV_LOG(WARNING, "Device %s already closed",
- dev->data->name);
- return;
- }
-
- /* stop device first */
- hinic_dev_stop(dev);
-
- /* rx_cqe, rx_info */
- hinic_free_all_rx_resources(dev);
-
- /* tx_info */
- hinic_free_all_tx_resources(dev);
-
- /* free wq, pi_dma_addr */
- hinic_free_all_rq(nic_dev);
-
- /* free wq, db_addr */
- hinic_free_all_sq(nic_dev);
-
- /* deinit mac vlan tbl */
- hinic_deinit_mac_addr(dev);
-
- /* disable hardware and uio interrupt */
- hinic_disable_interrupt(dev);
-
- /* deinit nic hardware device */
- hinic_nic_dev_destroy(dev);
-}
-
-static const struct eth_dev_ops hinic_pmd_ops = {
- .dev_configure = hinic_dev_configure,
- .dev_infos_get = hinic_dev_infos_get,
- .rx_queue_setup = hinic_rx_queue_setup,
- .tx_queue_setup = hinic_tx_queue_setup,
- .dev_start = hinic_dev_start,
- .link_update = hinic_link_update,
- .rx_queue_release = hinic_rx_queue_release,
- .tx_queue_release = hinic_tx_queue_release,
- .dev_stop = hinic_dev_stop,
- .dev_close = hinic_dev_close,
- .promiscuous_enable = hinic_dev_promiscuous_enable,
- .promiscuous_disable = hinic_dev_promiscuous_disable,
- .rss_hash_update = hinic_rss_hash_update,
- .rss_hash_conf_get = hinic_rss_conf_get,
- .reta_update = hinic_rss_indirtbl_update,
- .reta_query = hinic_rss_indirtbl_query,
- .stats_get = hinic_dev_stats_get,
- .stats_reset = hinic_dev_stats_reset,
- .xstats_get = hinic_dev_xstats_get,
- .xstats_reset = hinic_dev_xstats_reset,
- .xstats_get_names = hinic_dev_xstats_get_names,
-};
-
static int hinic_dev_init(struct rte_eth_dev *eth_dev)
{
struct rte_pci_device *pci_dev;
@@ -2303,8 +2393,7 @@ static int hinic_dev_init(struct rte_eth_dev *eth_dev)
(rte_eal_process_type() == RTE_PROC_PRIMARY) ?
"primary" : "secondary");
- /* rte_eth_dev ops, rx_burst and tx_burst */
- eth_dev->dev_ops = &hinic_pmd_ops;
+ /* rte_eth_dev rx_burst and tx_burst */
eth_dev->rx_pkt_burst = hinic_recv_pkts;
eth_dev->tx_pkt_burst = hinic_xmit_pkts;
@@ -2338,6 +2427,10 @@ static int hinic_dev_uninit(struct rte_eth_dev *dev)
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
+ { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
+ { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },
+ { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_DUAL_25GE) },
+ { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_1822_100GE) },
{.vendor_id = 0},
};
--
1.8.3.1
next prev parent reply other threads:[~2019-09-25 14:15 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-25 14:26 [dpdk-dev] [PATCH v2 00/17] Add advanced features for Huawei hinic pmd Xiaoyun wang
2019-09-25 14:30 ` Xiaoyun wang
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 01/17] net/hinic/base: add mbox command channel for SRIOV Xiaoyun wang
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 02/17] net/hinic/base: add HW interfaces " Xiaoyun wang
2019-09-25 14:30 ` Xiaoyun wang [this message]
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 04/17] net/hinic: add VLAN filter and offload Xiaoyun wang
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 05/17] net/hinic: add allmulticast mode and MTU set Xiaoyun wang
2019-09-26 18:47 ` Ferruh Yigit
2019-09-30 8:43 ` Wangxiaoyun (Cloud, Network Chip Application Development Dept)
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 06/17] net/hinic: add unicast and multicast MAC set Xiaoyun wang
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 07/17] net/hinic: add fdir config interface Xiaoyun wang
2019-09-26 18:48 ` Ferruh Yigit
2019-09-30 14:08 ` Wangxiaoyun (Cloud, Network Chip Application Development Dept)
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 08/17] net/hinic: add fdir validate flow operations Xiaoyun wang
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 09/17] net/hinic: create and destroy ntuple filter Xiaoyun wang
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 10/17] net/hinic: create and destroy fdir filter Xiaoyun wang
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 11/17] net/hinic: flush " Xiaoyun wang
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 12/17] net/hinic: set link down and up Xiaoyun wang
2019-09-26 18:47 ` Ferruh Yigit
2019-09-28 8:59 ` [dpdk-dev] 答复: " Wangxiaoyun (Cloud, Network Chip Application Development Dept)
2019-09-30 8:39 ` [dpdk-dev] " Wangxiaoyun (Cloud, Network Chip Application Development Dept)
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 13/17] net/hinic: support inner L3 checksum offload Xiaoyun wang
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 14/17] net/hinic: support LRO offload Xiaoyun wang
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 15/17] net/hinic: add hinic PMD doc files Xiaoyun wang
2019-09-26 18:51 ` Ferruh Yigit
2019-09-30 14:15 ` Wangxiaoyun (Cloud, Network Chip Application Development Dept)
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 16/17] net/hinic/base: optimize aeq interfaces Xiaoyun wang
2019-09-25 14:30 ` [dpdk-dev] [PATCH v2 17/17] net/hinic: optimize tx&rx performance Xiaoyun wang
2019-09-27 2:08 ` Gavin Hu (Arm Technology China)
2019-09-30 14:41 ` Wangxiaoyun (Cloud, Network Chip Application Development Dept)
2019-09-26 18:51 ` [dpdk-dev] [PATCH v2 00/17] Add advanced features for Huawei hinic pmd Ferruh Yigit
2019-09-30 14:19 ` Wangxiaoyun (Cloud, Network Chip Application Development Dept)
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