* [PATCH] net/mlx5: fix actions template expansion
@ 2023-06-08 12:15 Gregory Etelson
2023-06-08 13:59 ` Raslan Darawsheh
0 siblings, 1 reply; 2+ messages in thread
From: Gregory Etelson @ 2023-06-08 12:15 UTC (permalink / raw)
To: dev; +Cc: getelson, rasland
Static actions definitions used in template expansion were defined in
conditional context. That context was destroyed by the time it's
memory was accessed.
Fixes: cf7f458b05f3 ("net/mlx5: add indirect QUOTA create/query/modify")
Signed-off-by: Gregory Etelson <getelson@nvidia.com>
---
drivers/net/mlx5/mlx5_flow_hw.c | 188 +++++++++++++-------------------
1 file changed, 78 insertions(+), 110 deletions(-)
diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index bbb88a6478..cb040a51ac 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -4637,78 +4637,80 @@ flow_hw_actions_template_replace_container(const
*rm = (void *)(uintptr_t)new_masks;
}
-#define RX_META_COPY_ACTION ((const struct rte_flow_action) { \
- .type = RTE_FLOW_ACTION_TYPE_MODIFY_FIELD, \
- .conf = &(struct rte_flow_action_modify_field){ \
- .operation = RTE_FLOW_MODIFY_SET, \
- .dst = { \
- .field = (enum rte_flow_field_id) \
- MLX5_RTE_FLOW_FIELD_META_REG, \
- .level = REG_B, \
- }, \
- .src = { \
- .field = (enum rte_flow_field_id) \
- MLX5_RTE_FLOW_FIELD_META_REG, \
- .level = REG_C_1, \
- }, \
- .width = 32, \
- } \
-})
-
-#define RX_META_COPY_MASK ((const struct rte_flow_action) { \
- .type = RTE_FLOW_ACTION_TYPE_MODIFY_FIELD, \
- .conf = &(struct rte_flow_action_modify_field){ \
- .operation = RTE_FLOW_MODIFY_SET, \
- .dst = { \
- .field = (enum rte_flow_field_id) \
- MLX5_RTE_FLOW_FIELD_META_REG, \
- .level = UINT32_MAX, \
- .offset = UINT32_MAX, \
- }, \
- .src = { \
- .field = (enum rte_flow_field_id) \
- MLX5_RTE_FLOW_FIELD_META_REG, \
- .level = UINT32_MAX, \
- .offset = UINT32_MAX, \
- }, \
- .width = UINT32_MAX, \
- } \
-})
-
-#define QUOTA_COLOR_INC_ACTION ((const struct rte_flow_action) { \
- .type = RTE_FLOW_ACTION_TYPE_MODIFY_FIELD, \
- .conf = &(struct rte_flow_action_modify_field) { \
- .operation = RTE_FLOW_MODIFY_ADD, \
- .dst = { \
- .field = RTE_FLOW_FIELD_METER_COLOR, \
- .level = 0, .offset = 0 \
- }, \
- .src = { \
- .field = RTE_FLOW_FIELD_VALUE, \
- .level = 1, \
- .offset = 0, \
- }, \
- .width = 2 \
- } \
-})
-
-#define QUOTA_COLOR_INC_MASK ((const struct rte_flow_action) { \
- .type = RTE_FLOW_ACTION_TYPE_MODIFY_FIELD, \
- .conf = &(struct rte_flow_action_modify_field) { \
- .operation = RTE_FLOW_MODIFY_ADD, \
- .dst = { \
- .field = RTE_FLOW_FIELD_METER_COLOR, \
- .level = UINT32_MAX, \
- .offset = UINT32_MAX, \
- }, \
- .src = { \
- .field = RTE_FLOW_FIELD_VALUE, \
- .level = 3, \
- .offset = 0 \
- }, \
- .width = UINT32_MAX \
- } \
-})
+/* Action template copies these actions in rte_flow_conv() */
+
+static const struct rte_flow_action rx_meta_copy_action = {
+ .type = RTE_FLOW_ACTION_TYPE_MODIFY_FIELD,
+ .conf = &(struct rte_flow_action_modify_field){
+ .operation = RTE_FLOW_MODIFY_SET,
+ .dst = {
+ .field = (enum rte_flow_field_id)
+ MLX5_RTE_FLOW_FIELD_META_REG,
+ .level = REG_B,
+ },
+ .src = {
+ .field = (enum rte_flow_field_id)
+ MLX5_RTE_FLOW_FIELD_META_REG,
+ .level = REG_C_1,
+ },
+ .width = 32,
+ }
+};
+
+static const struct rte_flow_action rx_meta_copy_mask = {
+ .type = RTE_FLOW_ACTION_TYPE_MODIFY_FIELD,
+ .conf = &(struct rte_flow_action_modify_field){
+ .operation = RTE_FLOW_MODIFY_SET,
+ .dst = {
+ .field = (enum rte_flow_field_id)
+ MLX5_RTE_FLOW_FIELD_META_REG,
+ .level = UINT8_MAX,
+ .offset = UINT32_MAX,
+ },
+ .src = {
+ .field = (enum rte_flow_field_id)
+ MLX5_RTE_FLOW_FIELD_META_REG,
+ .level = UINT8_MAX,
+ .offset = UINT32_MAX,
+ },
+ .width = UINT32_MAX,
+ }
+};
+
+static const struct rte_flow_action quota_color_inc_action = {
+ .type = RTE_FLOW_ACTION_TYPE_MODIFY_FIELD,
+ .conf = &(struct rte_flow_action_modify_field) {
+ .operation = RTE_FLOW_MODIFY_ADD,
+ .dst = {
+ .field = RTE_FLOW_FIELD_METER_COLOR,
+ .level = 0, .offset = 0
+ },
+ .src = {
+ .field = RTE_FLOW_FIELD_VALUE,
+ .level = 1,
+ .offset = 0,
+ },
+ .width = 2
+ }
+};
+
+static const struct rte_flow_action quota_color_inc_mask = {
+ .type = RTE_FLOW_ACTION_TYPE_MODIFY_FIELD,
+ .conf = &(struct rte_flow_action_modify_field) {
+ .operation = RTE_FLOW_MODIFY_ADD,
+ .dst = {
+ .field = RTE_FLOW_FIELD_METER_COLOR,
+ .level = UINT8_MAX,
+ .offset = UINT32_MAX,
+ },
+ .src = {
+ .field = RTE_FLOW_FIELD_VALUE,
+ .level = 3,
+ .offset = 0
+ },
+ .width = UINT32_MAX
+ }
+};
/**
* Create flow action template.
@@ -4748,40 +4750,6 @@ flow_hw_actions_template_create(struct rte_eth_dev *dev,
int set_vlan_vid_ix = -1;
struct rte_flow_action_modify_field set_vlan_vid_spec = {0, };
struct rte_flow_action_modify_field set_vlan_vid_mask = {0, };
- const struct rte_flow_action_modify_field rx_mreg = {
- .operation = RTE_FLOW_MODIFY_SET,
- .dst = {
- .field = (enum rte_flow_field_id)MLX5_RTE_FLOW_FIELD_META_REG,
- .level = REG_B,
- },
- .src = {
- .field = (enum rte_flow_field_id)MLX5_RTE_FLOW_FIELD_META_REG,
- .level = REG_C_1,
- },
- .width = 32,
- };
- const struct rte_flow_action_modify_field rx_mreg_mask = {
- .operation = RTE_FLOW_MODIFY_SET,
- .dst = {
- .field = (enum rte_flow_field_id)MLX5_RTE_FLOW_FIELD_META_REG,
- .level = UINT8_MAX,
- .offset = UINT32_MAX,
- },
- .src = {
- .field = (enum rte_flow_field_id)MLX5_RTE_FLOW_FIELD_META_REG,
- .level = UINT8_MAX,
- .offset = UINT32_MAX,
- },
- .width = UINT32_MAX,
- };
- const struct rte_flow_action rx_cpy = {
- .type = RTE_FLOW_ACTION_TYPE_MODIFY_FIELD,
- .conf = &rx_mreg,
- };
- const struct rte_flow_action rx_cpy_mask = {
- .type = RTE_FLOW_ACTION_TYPE_MODIFY_FIELD,
- .conf = &rx_mreg_mask,
- };
struct rte_flow_action mf_actions[MLX5_HW_MAX_ACTS];
struct rte_flow_action mf_masks[MLX5_HW_MAX_ACTS];
uint32_t expand_mf_num = 0;
@@ -4829,16 +4797,16 @@ flow_hw_actions_template_create(struct rte_eth_dev *dev,
action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
}
if (action_flags & MLX5_FLOW_ACTION_QUOTA) {
- mf_actions[expand_mf_num] = QUOTA_COLOR_INC_ACTION;
- mf_masks[expand_mf_num] = QUOTA_COLOR_INC_MASK;
+ mf_actions[expand_mf_num] = quota_color_inc_action;
+ mf_masks[expand_mf_num] = quota_color_inc_mask;
expand_mf_num++;
}
if (priv->sh->config.dv_xmeta_en == MLX5_XMETA_MODE_META32_HWS &&
priv->sh->config.dv_esw_en &&
(action_flags & (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS))) {
/* Insert META copy */
- mf_actions[expand_mf_num] = RX_META_COPY_ACTION;
- mf_masks[expand_mf_num] = RX_META_COPY_MASK;
+ mf_actions[expand_mf_num] = rx_meta_copy_action;
+ mf_masks[expand_mf_num] = rx_meta_copy_mask;
expand_mf_num++;
}
if (expand_mf_num) {
--
2.40.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* RE: [PATCH] net/mlx5: fix actions template expansion
2023-06-08 12:15 [PATCH] net/mlx5: fix actions template expansion Gregory Etelson
@ 2023-06-08 13:59 ` Raslan Darawsheh
0 siblings, 0 replies; 2+ messages in thread
From: Raslan Darawsheh @ 2023-06-08 13:59 UTC (permalink / raw)
To: Gregory Etelson, dev
Hello,
> -----Original Message-----
> From: Gregory Etelson <getelson@nvidia.com>
> Sent: Thursday, June 8, 2023 3:16 PM
> To: dev@dpdk.org
> Cc: Gregory Etelson <getelson@nvidia.com>; Raslan Darawsheh
> <rasland@nvidia.com>
> Subject: [PATCH] net/mlx5: fix actions template expansion
>
> Static actions definitions used in template expansion were defined in
> conditional context. That context was destroyed by the time it's
> memory was accessed.
>
> Fixes: cf7f458b05f3 ("net/mlx5: add indirect QUOTA create/query/modify")
> Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Squashed into relevant commit in next-net-mlx,
Kindest regards,
Raslan Darawsheh
^ permalink raw reply [flat|nested] 2+ messages in thread
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