DPDK patches and discussions
 help / color / mirror / Atom feed
From: David Marchand <david.marchand@redhat.com>
To: Min Zhou <zhoumin@loongson.cn>
Cc: Thomas Monjalon <thomas@monjalon.net>,
	Bruce Richardson <bruce.richardson@intel.com>,
	 "Burakov, Anatoly" <anatoly.burakov@intel.com>,
	Qiming Yang <qiming.yang@intel.com>,
	 Yuying Zhang <Yuying.Zhang@intel.com>,
	Jakub Grajciar <jgrajcia@cisco.com>,
	 Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,
	dev <dev@dpdk.org>,
	maobibo@loongson.cn
Subject: Re: [v3 00/24] Support LoongArch architecture
Date: Wed, 20 Jul 2022 18:33:41 +0200	[thread overview]
Message-ID: <CAJFAV8zAMsFPPbOrYJbfa+DOzbFFNV0C+aBsSiYBn0LcGBganA@mail.gmail.com> (raw)
In-Reply-To: <20220606131054.2097526-1-zhoumin@loongson.cn>

Hello,

On Mon, Jun 6, 2022 at 3:11 PM Min Zhou <zhoumin@loongson.cn> wrote:
>
> Dear team,
> The following patch set is intended to support DPDK running on LoongArch
> architecture.
>
> LoongArch is the general processor architecture of Loongson and is a new
> RISC ISA, which is a bit like MIPS or RISC-V.
>
> The online documents of LoongArch are here:
>         https://loongson.github.io/LoongArch-Documentation/README-EN.html
>
> The latest cross compile tool chain can be downloaded from:
>         https://github.com/loongson/build-tools
>
> v3:
>     - add URL for cross compile tool chain
>         - remove rte_lpm_lsx.h which was a dummy vector implementation
>       because there is already a scalar implementation, thanks to
>       Michal Mazurek
>     - modify the name of compiler for cross compiling
>     - remove useless variable in meson.build
>
> v2:
>     - use standard atomics of toolchain to implement
>       atomic operations
>     - implement spinlock based on standard atomics

Thanks for porting DPDK to a new architecture.

I am unsure of what this architecture status is wrt to the upstream
Linux kernel and wrt to main distributions support.
Could you give some details?

Otherwise, I did not look at the series yet, but it needs to be
rebased on the main repository, there have been quite some changes
since this original submission.
How will this architecture be integrated wrt CI: GHA? sending your hw
to UNH lab? or maybe do you have plans for your own CI servers?


-- 
David Marchand


  parent reply	other threads:[~2022-07-20 16:33 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-06 13:10 Min Zhou
2022-06-06 13:10 ` [v3 01/24] eal/loongarch: add atomic operations for LoongArch Min Zhou
2022-07-20 10:16   ` zhoumin
2022-06-06 13:10 ` [v3 02/24] eal/loongarch: add byte order " Min Zhou
2022-06-06 13:10 ` [v3 03/24] eal/loongarch: add cpu cycle " Min Zhou
2022-06-06 13:10 ` [v3 04/24] eal/loongarch: add prefetch " Min Zhou
2022-06-06 13:10 ` [v3 05/24] eal/loongarch: add spinlock " Min Zhou
2022-06-06 13:10 ` [v3 06/24] eal/loongarch: add cpu flag checks " Min Zhou
2022-06-06 13:10 ` [v3 07/24] eal/loongarch: add dummy vector memcpy " Min Zhou
2022-06-06 13:10 ` [v3 08/24] eal/loongarch: add io operations " Min Zhou
2022-06-06 13:10 ` [v3 09/24] eal/loongarch: add mcslock " Min Zhou
2022-06-06 13:10 ` [v3 10/24] eal/loongarch: add pause " Min Zhou
2022-06-06 13:10 ` [v3 11/24] eal/loongarch: add pflock " Min Zhou
2022-06-06 13:10 ` [v3 12/24] eal/loongarch: add rwlock " Min Zhou
2022-06-06 13:10 ` [v3 13/24] eal/loongarch: add ticketlock " Min Zhou
2022-06-06 13:10 ` [v3 14/24] eal/loongarch: add power " Min Zhou
2022-06-06 13:10 ` [v3 15/24] eal/loongarch: add hypervisor " Min Zhou
2022-06-06 13:10 ` [v3 16/24] mem: add huge page size definition " Min Zhou
2022-06-06 13:10 ` [v3 17/24] eal/linux: set eal base address " Min Zhou
2022-06-06 13:10 ` [v3 18/24] meson: introduce LoongArch architecture Min Zhou
2022-06-06 13:10 ` [v3 19/24] test/xmmt_ops: add dummy vector implementation for LoongArch Min Zhou
2022-06-06 13:10 ` [v3 20/24] ixgbe: " Min Zhou
2022-06-06 13:10 ` [v3 21/24] i40e: " Min Zhou
2022-06-06 13:10 ` [v3 22/24] tap: add system call number " Min Zhou
2022-06-06 13:10 ` [v3 23/24] memif: " Min Zhou
2022-06-06 13:10 ` [v3 24/24] maintainers: claim responsibility " Min Zhou
2022-07-20 16:33 ` David Marchand [this message]
2022-07-21 10:33   ` [v3 00/24] Support LoongArch architecture zhoumin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=CAJFAV8zAMsFPPbOrYJbfa+DOzbFFNV0C+aBsSiYBn0LcGBganA@mail.gmail.com \
    --to=david.marchand@redhat.com \
    --cc=Yuying.Zhang@intel.com \
    --cc=anatoly.burakov@intel.com \
    --cc=bruce.richardson@intel.com \
    --cc=dev@dpdk.org \
    --cc=jgrajcia@cisco.com \
    --cc=konstantin.v.ananyev@yandex.ru \
    --cc=maobibo@loongson.cn \
    --cc=qiming.yang@intel.com \
    --cc=thomas@monjalon.net \
    --cc=zhoumin@loongson.cn \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).