From: Jerin Jacob <jerinjacobk@gmail.com>
To: Harman Kalra <hkalra@marvell.com>, Ferruh Yigit <ferruh.yigit@intel.com>
Cc: Jerin Jacob <jerinj@marvell.com>,
Nithin Dabilpuram <ndabilpuram@marvell.com>,
dpdk-dev <dev@dpdk.org>
Subject: Re: [dpdk-dev] [PATCH] common/octeontx2: fix msix offset structure fields
Date: Tue, 17 Nov 2020 22:25:47 +0530 [thread overview]
Message-ID: <CALBAE1MiOa1j1rgbkFweCVS0ka=b=PV45mT4Kr6NBMhzQkyTfw@mail.gmail.com> (raw)
In-Reply-To: <20201116144155.148634-1-hkalra@marvell.com>
On Mon, Nov 16, 2020 at 8:12 PM Harman Kalra <hkalra@marvell.com> wrote:
>
> Syncing the data types of msix offset mbox response structure
> fields wrt rvu_pfvf structure as in msix offset mbox handler,
> respective block LFs response field is initialised with rvu_pfvf
> and mismatch in the data types of respective fields may lead
> to issues.
>
> This mismatch in data types resulted in a bug where no sso msix
> offsets are returned. For 256 SSO hwgrps, 256 msix offsets
> are required, but since num of sso lf field (rsp->sso) in
> response structure is u8 and is initialised with same field
> in pfvf structure viz u16, value 256 corresponds to 0 hence
> no sso_msixoff.
> Similar mbox changes are required in kernel side also which are
> available in marvell SDK version SDK-11.0.
>
> Fixes: 2b71657c8660 ("common/octeontx2: add mbox request and response definition")
>
> Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Applied to dpdk-next-net-mrvl/for-main. Thanks
> ---
> drivers/common/octeontx2/otx2_mbox.h | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/common/octeontx2/otx2_mbox.h b/drivers/common/octeontx2/otx2_mbox.h
> index 9a1e8a7ea..f6d884c19 100644
> --- a/drivers/common/octeontx2/otx2_mbox.h
> +++ b/drivers/common/octeontx2/otx2_mbox.h
> @@ -90,7 +90,7 @@ struct mbox_msghdr {
> #define OTX2_MBOX_RSP_SIG (0xbeef)
> /* Signature, for validating corrupted msgs */
> uint16_t __otx2_io sig;
> -#define OTX2_MBOX_VERSION (0x0009)
> +#define OTX2_MBOX_VERSION (0x000a)
> /* Version of msg's structure for this ID */
> uint16_t __otx2_io ver;
> /* Offset of next msg within mailbox region */
> @@ -454,17 +454,17 @@ struct msix_offset_rsp {
> struct mbox_msghdr hdr;
> uint16_t __otx2_io npa_msixoff;
> uint16_t __otx2_io nix_msixoff;
> - uint8_t __otx2_io sso;
> - uint8_t __otx2_io ssow;
> - uint8_t __otx2_io timlfs;
> - uint8_t __otx2_io cptlfs;
> + uint16_t __otx2_io sso;
> + uint16_t __otx2_io ssow;
> + uint16_t __otx2_io timlfs;
> + uint16_t __otx2_io cptlfs;
> uint16_t __otx2_io sso_msixoff[MAX_RVU_BLKLF_CNT];
> uint16_t __otx2_io ssow_msixoff[MAX_RVU_BLKLF_CNT];
> uint16_t __otx2_io timlf_msixoff[MAX_RVU_BLKLF_CNT];
> uint16_t __otx2_io cptlf_msixoff[MAX_RVU_BLKLF_CNT];
> - uint8_t __otx2_io cpt1_lfs;
> - uint8_t __otx2_io ree0_lfs;
> - uint8_t __otx2_io ree1_lfs;
> + uint16_t __otx2_io cpt1_lfs;
> + uint16_t __otx2_io ree0_lfs;
> + uint16_t __otx2_io ree1_lfs;
> uint16_t __otx2_io cpt1_lf_msixoff[MAX_RVU_BLKLF_CNT];
> uint16_t __otx2_io ree0_lf_msixoff[MAX_RVU_BLKLF_CNT];
> uint16_t __otx2_io ree1_lf_msixoff[MAX_RVU_BLKLF_CNT];
> --
> 2.18.0
>
prev parent reply other threads:[~2020-11-17 16:56 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-16 14:41 Harman Kalra
2020-11-17 16:55 ` Jerin Jacob [this message]
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