From: jinho hwang <hwang.jinho@gmail.com>
To: Scott Talbert <swt@techie.net>
Cc: dev <dev@dpdk.org>
Subject: Re: [dpdk-dev] NIC Stops Transmitting
Date: Fri, 26 Jul 2013 18:31:37 -0400 [thread overview]
Message-ID: <CAPQGAnHkqCHQ9g7OQXF5+w-nho78HdtgCh8YtXumnCz-jzNANg@mail.gmail.com> (raw)
In-Reply-To: <alpine.LRH.2.03.1307261601190.21740@techie.net>
On Fri, Jul 26, 2013 at 4:04 PM, Scott Talbert <swt@techie.net> wrote:
> On Fri, 26 Jul 2013, Stephen Hemminger wrote:
>
>>> I'm writing an application using DPDK that transmits a large number of
>>> packets (it doesn't receive any). When I transmit at 2 Gb/sec,
>>> everything
>>> will run fine for several seconds (receiver is receiving at correct
>>> rate),
>>> but then the NIC appears to get 'stuck' and doesn't transmit any more
>>> packets. In this state, rte_eth_tx_burst() is returning zero (suggesting
>>> that there are no available transmit descriptors), but even if I sleep()
>>> for a second and try again, rte_eth_tx_burst() still returns 0. It
>>> almost
>>> appears as if a packet gets stuck in the transmit ring and keeps
>>> everything from flowing. I'm using an Intel 82599EB NIC.
>>>
>> Make sure there is enough memory for mbufs.
>> Also what is your ring size and transmit free threshold?
>> It is easy to instrument the driver to see where it is saying "no space
>> left"
>> Also be careful with threshold values, many values of
>> pthresh/hthresh/wthresh
>> don't work. I would check the Intel reference manual for your hardware.
>
>
> Thanks for the tips. I don't think I'm running out of mbufs, but I'll check
> that again. I am using these values from one of the examples - which claim
> to be correct for the 82599EB.
>
> /*
> * These default values are optimized for use with the Intel(R) 82599 10 GbE
> * Controller and the DPDK ixgbe PMD. Consider using other values for other
> * network controllers and/or network drivers.
> */
> #define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */
> #define TX_HTHRESH 0 /**< Default values of TX host threshold reg. */
> #define TX_WTHRESH 0 /**< Default values of TX write-back threshold reg. */
>
> static const struct rte_eth_txconf tx_conf = {
> .tx_thresh = {
> .pthresh = TX_PTHRESH,
> .hthresh = TX_HTHRESH,
> .wthresh = TX_WTHRESH,
> },
> .tx_free_thresh = 0, /* Use PMD default values */
> .tx_rs_thresh = 0, /* Use PMD default values */
> };
>
> /*
> * Configurable number of RX/TX ring descriptors
> */
> #define RTE_TEST_TX_DESC_DEFAULT 512
> static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;
>
Scott,
I am wondering whether you use multiple cores accessing the same
receive queue. I had this problem before, but after I make the same
number of receiving queues as the number of receiving cores, the
problem disappeared. I did not dig more since I did not care how many
receive queues I have did not matter.
Jinho
next prev parent reply other threads:[~2013-07-26 22:31 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-26 19:39 Scott Talbert
2013-07-26 19:53 ` Stephen Hemminger
2013-07-26 20:04 ` Scott Talbert
2013-07-26 22:31 ` jinho hwang [this message]
2013-07-26 23:26 ` Scott Talbert
2013-07-29 17:02 ` Scott Talbert
2013-07-31 2:43 ` [dpdk-dev] miss include file in DPDK 1.3.1r2 Jia.Sui
2013-07-31 9:18 ` [dpdk-dev] [PATCH] mem: fix include in rte_malloc Thomas Monjalon
2013-07-31 11:36 ` didier.pallard
2013-07-31 11:48 ` Thomas Monjalon
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