* [PATCH] examples/ipsec-secgw: fix Tx checksum offload flag
@ 2022-06-22 9:28 Radu Nicolau
2022-06-22 9:46 ` Zhang, Roy Fan
2022-06-29 16:46 ` [PATCH v2] " Radu Nicolau
0 siblings, 2 replies; 7+ messages in thread
From: Radu Nicolau @ 2022-06-22 9:28 UTC (permalink / raw)
To: Radu Nicolau, Akhil Goyal; +Cc: dev, ndabilpuram
For the inline crypto path set the Tx checksum offload flag
only if the device supports it.
Fixes: d24471e5786b ("examples/ipsec-secgw: disable Tx checksum for inline")
Cc: ndabilpuram@marvell.com
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
---
examples/ipsec-secgw/sa.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/examples/ipsec-secgw/sa.c b/examples/ipsec-secgw/sa.c
index 0b27f11fc0..9b35dfdbef 100644
--- a/examples/ipsec-secgw/sa.c
+++ b/examples/ipsec-secgw/sa.c
@@ -1841,7 +1841,10 @@ sa_check_offloads(uint16_t port_id, uint64_t *rx_offloads,
if (rule->mss)
*tx_offloads |=
RTE_ETH_TX_OFFLOAD_TCP_TSO;
- *tx_offloads |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM;
+ if (dev_info.tx_offload_capa &
+ RTE_ETH_TX_OFFLOAD_IPV4_CKSUM)
+ *tx_offloads |=
+ RTE_ETH_TX_OFFLOAD_IPV4_CKSUM;
}
break;
default:
--
2.25.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH] examples/ipsec-secgw: fix Tx checksum offload flag
2022-06-22 9:28 [PATCH] examples/ipsec-secgw: fix Tx checksum offload flag Radu Nicolau
@ 2022-06-22 9:46 ` Zhang, Roy Fan
2022-06-28 8:36 ` Akhil Goyal
2022-06-29 16:46 ` [PATCH v2] " Radu Nicolau
1 sibling, 1 reply; 7+ messages in thread
From: Zhang, Roy Fan @ 2022-06-22 9:46 UTC (permalink / raw)
To: Nicolau, Radu, Nicolau, Radu, Akhil Goyal; +Cc: dev, ndabilpuram
> -----Original Message-----
> From: Radu Nicolau <radu.nicolau@intel.com>
> Sent: Wednesday, June 22, 2022 10:28 AM
> To: Nicolau, Radu <radu.nicolau@intel.com>; Akhil Goyal <gakhil@marvell.com>
> Cc: dev@dpdk.org; ndabilpuram@marvell.com
> Subject: [PATCH] examples/ipsec-secgw: fix Tx checksum offload flag
>
> For the inline crypto path set the Tx checksum offload flag
> only if the device supports it.
>
> Fixes: d24471e5786b ("examples/ipsec-secgw: disable Tx checksum for inline")
> Cc: ndabilpuram@marvell.com
>
> Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
> ---
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH] examples/ipsec-secgw: fix Tx checksum offload flag
2022-06-22 9:46 ` Zhang, Roy Fan
@ 2022-06-28 8:36 ` Akhil Goyal
0 siblings, 0 replies; 7+ messages in thread
From: Akhil Goyal @ 2022-06-28 8:36 UTC (permalink / raw)
To: Zhang, Roy Fan, Nicolau, Radu, Nicolau, Radu; +Cc: dev, Nithin Kumar Dabilpuram
> > For the inline crypto path set the Tx checksum offload flag
> > only if the device supports it.
> >
> > Fixes: d24471e5786b ("examples/ipsec-secgw: disable Tx checksum for inline")
> > Cc: ndabilpuram@marvell.com
> >
> > Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
> > ---
> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Applied to dpdk-next-crypto
Thanks.
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2] examples/ipsec-secgw: fix Tx checksum offload flag
2022-06-22 9:28 [PATCH] examples/ipsec-secgw: fix Tx checksum offload flag Radu Nicolau
2022-06-22 9:46 ` Zhang, Roy Fan
@ 2022-06-29 16:46 ` Radu Nicolau
2022-06-30 5:01 ` [EXT] " Akhil Goyal
1 sibling, 1 reply; 7+ messages in thread
From: Radu Nicolau @ 2022-06-29 16:46 UTC (permalink / raw)
To: Radu Nicolau, Akhil Goyal
Cc: dev, roy.fan.zhang, vladimir.medvedkin, ndabilpuram
For the inline crypto path set the Tx checksum offload flag
only if the device supports it.
Fixes: d24471e5786b ("examples/ipsec-secgw: disable Tx checksum for inline")
Cc: ndabilpuram@marvell.com
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
---
v2: when supported the checksum offload flag needs to also be set for ports that don't have SAs programmed
examples/ipsec-secgw/sa.c | 44 ++++++++++++++++++++++-----------------
1 file changed, 25 insertions(+), 19 deletions(-)
diff --git a/examples/ipsec-secgw/sa.c b/examples/ipsec-secgw/sa.c
index 5d9cec97db..b364ac5881 100644
--- a/examples/ipsec-secgw/sa.c
+++ b/examples/ipsec-secgw/sa.c
@@ -1828,37 +1828,43 @@ sa_check_offloads(uint16_t port_id, uint64_t *rx_offloads,
for (idx_sa = 0; idx_sa < nb_sa_out; idx_sa++) {
rule = &sa_out[idx_sa];
rule_type = ipsec_get_action_type(rule);
- switch (rule_type) {
- case RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL:
- /* Checksum offload is not needed for inline protocol as
- * all processing for Outbound IPSec packets will be
- * implicitly taken care and for non-IPSec packets,
- * there is no need of IPv4 Checksum offload.
- */
- if (rule->portid == port_id) {
+ if (rule->portid == port_id) {
+ switch (rule_type) {
+ case RTE_SECURITY_ACTION_TYPE_INLINE_PROTOCOL:
+ /* Checksum offload is not needed for inline
+ * protocol as all processing for Outbound IPSec
+ * packets will be implicitly taken care and for
+ * non-IPSec packets, there is no need of
+ * IPv4 Checksum offload.
+ */
*tx_offloads |= RTE_ETH_TX_OFFLOAD_SECURITY;
if (rule->mss)
*tx_offloads |= (RTE_ETH_TX_OFFLOAD_TCP_TSO |
RTE_ETH_TX_OFFLOAD_IPV4_CKSUM);
- }
- break;
- case RTE_SECURITY_ACTION_TYPE_INLINE_CRYPTO:
- if (rule->portid == port_id) {
+ break;
+ case RTE_SECURITY_ACTION_TYPE_INLINE_CRYPTO:
*tx_offloads |= RTE_ETH_TX_OFFLOAD_SECURITY;
if (rule->mss)
*tx_offloads |=
RTE_ETH_TX_OFFLOAD_TCP_TSO;
- *tx_offloads |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM;
+ if (dev_info.tx_offload_capa &
+ RTE_ETH_TX_OFFLOAD_IPV4_CKSUM)
+ *tx_offloads |=
+ RTE_ETH_TX_OFFLOAD_IPV4_CKSUM;
+ break;
+ default:
+ /* Enable IPv4 checksum offload even if
+ * one of lookaside SA's are present.
+ */
+ if (dev_info.tx_offload_capa &
+ RTE_ETH_TX_OFFLOAD_IPV4_CKSUM)
+ *tx_offloads |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM;
+ break;
}
- break;
- default:
- /* Enable IPv4 checksum offload even if one of lookaside
- * SA's are present.
- */
+ } else {
if (dev_info.tx_offload_capa &
RTE_ETH_TX_OFFLOAD_IPV4_CKSUM)
*tx_offloads |= RTE_ETH_TX_OFFLOAD_IPV4_CKSUM;
- break;
}
}
return 0;
--
2.25.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [EXT] [PATCH v2] examples/ipsec-secgw: fix Tx checksum offload flag
2022-06-29 16:46 ` [PATCH v2] " Radu Nicolau
@ 2022-06-30 5:01 ` Akhil Goyal
0 siblings, 0 replies; 7+ messages in thread
From: Akhil Goyal @ 2022-06-30 5:01 UTC (permalink / raw)
To: Radu Nicolau
Cc: dev, roy.fan.zhang, vladimir.medvedkin, Nithin Kumar Dabilpuram
> For the inline crypto path set the Tx checksum offload flag
> only if the device supports it.
>
> Fixes: d24471e5786b ("examples/ipsec-secgw: disable Tx checksum for inline")
> Cc: ndabilpuram@marvell.com
>
> Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
> Acked-by: Akhil Goyal <gakhil@marvell.com>
> ---
> v2: when supported the checksum offload flag needs to also be set for ports
> that don't have SAs programmed
V1 was already applied to crypto tree.
Please make sure to send incremental patch if the patch is applied.
For now, I have replaced this patch with v1 on the tree as it was not pulled to main.
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] examples/ipsec-secgw: fix Tx checksum offload flag
2022-09-30 12:40 [PATCH] " Radu Nicolau
@ 2022-10-18 15:39 ` Medvedkin, Vladimir
0 siblings, 0 replies; 7+ messages in thread
From: Medvedkin, Vladimir @ 2022-10-18 15:39 UTC (permalink / raw)
To: Radu Nicolau, Akhil Goyal; +Cc: dev, ndabilpuram
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
On 30/09/2022 13:40, Radu Nicolau wrote:
> Fix a typo in computing port mask for Tx checksum offload capability.
>
> Fixes: 4edcee19fc20 ("examples/ipsec-secgw: use Tx checksum offload conditionally")
> Cc: ndabilpuram@marvell.com
>
> Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
> ---
> examples/ipsec-secgw/ipsec-secgw.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/examples/ipsec-secgw/ipsec-secgw.c b/examples/ipsec-secgw/ipsec-secgw.c
> index 8a25b83535..75ba359e69 100644
> --- a/examples/ipsec-secgw/ipsec-secgw.c
> +++ b/examples/ipsec-secgw/ipsec-secgw.c
> @@ -3042,7 +3042,7 @@ main(int32_t argc, char **argv)
> port_init(portid, req_rx_offloads[portid],
> req_tx_offloads[portid]);
> if ((req_tx_offloads[portid] & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM))
> - ipv4_cksum_port_mask = 1U << portid;
> + ipv4_cksum_port_mask |= 1U << portid;
> }
>
> for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
--
Regards,
Vladimir
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH] examples/ipsec-secgw: fix Tx checksum offload flag
@ 2022-09-30 12:40 Radu Nicolau
2022-10-18 15:39 ` Medvedkin, Vladimir
0 siblings, 1 reply; 7+ messages in thread
From: Radu Nicolau @ 2022-09-30 12:40 UTC (permalink / raw)
To: Radu Nicolau, Akhil Goyal; +Cc: dev, ndabilpuram
Fix a typo in computing port mask for Tx checksum offload capability.
Fixes: 4edcee19fc20 ("examples/ipsec-secgw: use Tx checksum offload conditionally")
Cc: ndabilpuram@marvell.com
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
---
examples/ipsec-secgw/ipsec-secgw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/examples/ipsec-secgw/ipsec-secgw.c b/examples/ipsec-secgw/ipsec-secgw.c
index 8a25b83535..75ba359e69 100644
--- a/examples/ipsec-secgw/ipsec-secgw.c
+++ b/examples/ipsec-secgw/ipsec-secgw.c
@@ -3042,7 +3042,7 @@ main(int32_t argc, char **argv)
port_init(portid, req_rx_offloads[portid],
req_tx_offloads[portid]);
if ((req_tx_offloads[portid] & RTE_ETH_TX_OFFLOAD_IPV4_CKSUM))
- ipv4_cksum_port_mask = 1U << portid;
+ ipv4_cksum_port_mask |= 1U << portid;
}
for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
--
2.25.1
^ permalink raw reply [flat|nested] 7+ messages in thread
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2022-06-22 9:28 [PATCH] examples/ipsec-secgw: fix Tx checksum offload flag Radu Nicolau
2022-06-22 9:46 ` Zhang, Roy Fan
2022-06-28 8:36 ` Akhil Goyal
2022-06-29 16:46 ` [PATCH v2] " Radu Nicolau
2022-06-30 5:01 ` [EXT] " Akhil Goyal
2022-09-30 12:40 [PATCH] " Radu Nicolau
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