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* [dpdk-dev] [PATCH] net/mlx5: add wire vport hint
@ 2020-11-13 15:32 Viacheslav Ovsiienko
  2020-11-17 16:18 ` Raslan Darawsheh
  0 siblings, 1 reply; 2+ messages in thread
From: Viacheslav Ovsiienko @ 2020-11-13 15:32 UTC (permalink / raw)
  To: dev; +Cc: rasland, matan

The kernel can use two approaches to distinguish the E-Switch
source vport in the packet metadata - either with dedicated
source_port field or register C0. To eliminate the extra source
vport matching in the hardware the source_port field can be
set to specific values (0xFFFF) for the wire source port.

This match can be applied to recognize wire port only in FDB
domain. Missing the register C0 match in the NIC Rx domain causes
incorrect representor steering within shared IB device ports
and must be always specified (if kernel uses this approach).

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 39 +++++++++++++++++++++++++++++----------
 1 file changed, 29 insertions(+), 10 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 78c710f..e31bdac 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -7596,13 +7596,16 @@ struct mlx5_hlist_entry *
  *   Flow matcher value.
  * @param[in] item
  *   Flow pattern to translate.
+ * @param[in]
+ *   Flow attributes.
  *
  * @return
  *   0 on success, a negative errno value otherwise.
  */
 static int
 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
-			       void *key, const struct rte_flow_item *item)
+			       void *key, const struct rte_flow_item *item,
+			       const struct rte_flow_attr *attr)
 {
 	const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
 	const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
@@ -7614,14 +7617,30 @@ struct mlx5_hlist_entry *
 	priv = mlx5_port_to_eswitch_info(id, item == NULL);
 	if (!priv)
 		return -rte_errno;
-	/* Translate to vport field or to metadata, depending on mode. */
-	if (priv->vport_meta_mask)
-		flow_dv_translate_item_meta_vport(matcher, key,
-						  priv->vport_meta_tag,
-						  priv->vport_meta_mask);
-	else
+	/*
+	 * Translate to vport field or to metadata, depending on mode.
+	 * Kernel can use either misc.source_port or half of C0 metadata
+	 * register.
+	 */
+	if (priv->vport_meta_mask) {
+		/*
+		 * Provide the hint for SW steering library
+		 * to insert the flow into ingress domain and
+		 * save the extra vport match.
+		 */
+		if (mask == 0xffff && priv->vport_id == 0xffff &&
+		    priv->pf_bond < 0 && attr->transfer)
+			flow_dv_translate_item_source_vport
+				(matcher, key, priv->vport_id, mask);
+		else
+			flow_dv_translate_item_meta_vport
+				(matcher, key,
+				 priv->vport_meta_tag,
+				 priv->vport_meta_mask);
+	} else {
 		flow_dv_translate_item_source_vport(matcher, key,
 						    priv->vport_id, mask);
+	}
 	return 0;
 }
 
@@ -10218,8 +10237,8 @@ struct mlx5_cache_entry *
 						  NULL, "item not supported");
 		switch (item_type) {
 		case RTE_FLOW_ITEM_TYPE_PORT_ID:
-			flow_dv_translate_item_port_id(dev, match_mask,
-						       match_value, items);
+			flow_dv_translate_item_port_id
+				(dev, match_mask, match_value, items, attr);
 			last_item = MLX5_FLOW_ITEM_PORT_ID;
 			break;
 		case RTE_FLOW_ITEM_TYPE_ETH:
@@ -10445,7 +10464,7 @@ struct mlx5_cache_entry *
 	if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
 	    (priv->representor || priv->master)) {
 		if (flow_dv_translate_item_port_id(dev, match_mask,
-						   match_value, NULL))
+						   match_value, NULL, attr))
 			return -rte_errno;
 	}
 #ifdef RTE_LIBRTE_MLX5_DEBUG
-- 
1.8.3.1


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2020-11-13 15:32 [dpdk-dev] [PATCH] net/mlx5: add wire vport hint Viacheslav Ovsiienko
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