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From: "O'loingsigh, Mairtin" <mairtin.oloingsigh@intel.com>
To: "De Lara Guarch, Pablo" <pablo.de.lara.guarch@intel.com>,
	"Singh, Jasvinder" <jasvinder.singh@intel.com>,
	"Richardson, Bruce" <bruce.richardson@intel.com>
Cc: "dev@dpdk.org" <dev@dpdk.org>,
	"Ryan, Brendan" <brendan.ryan@intel.com>,
	"Coyle, David" <david.coyle@intel.com>
Subject: Re: [dpdk-dev] [PATCH v3 2/2] net: add support for AVX512/VPCLMULQDQ based CRC
Date: Mon, 5 Oct 2020 13:38:15 +0000
Message-ID: <MN2PR11MB3725621F5AB754F40115CDE49C0C0@MN2PR11MB3725.namprd11.prod.outlook.com> (raw)
In-Reply-To: <SN6PR11MB3101B52D48299FB6E4554672840C0@SN6PR11MB3101.namprd11.prod.outlook.com>

Hi Pablo,

> -----Original Message-----
> From: De Lara Guarch, Pablo <pablo.de.lara.guarch@intel.com>
> Sent: Monday, October 5, 2020 2:20 PM
> To: O'loingsigh, Mairtin <mairtin.oloingsigh@intel.com>; Singh, Jasvinder
> <jasvinder.singh@intel.com>; Richardson, Bruce
> <bruce.richardson@intel.com>
> Cc: dev@dpdk.org; Ryan, Brendan <brendan.ryan@intel.com>; Coyle, David
> <david.coyle@intel.com>
> Subject: RE: [PATCH v3 2/2] net: add support for AVX512/VPCLMULQDQ
> based CRC
> 
> Hi Mairtin,
> 
> > -----Original Message-----
> > From: O'loingsigh, Mairtin <mairtin.oloingsigh@intel.com>
> > Sent: Tuesday, September 29, 2020 4:36 PM
> > To: Singh, Jasvinder <jasvinder.singh@intel.com>; Richardson, Bruce
> > <bruce.richardson@intel.com>; De Lara Guarch, Pablo
> > <pablo.de.lara.guarch@intel.com>
> > Cc: dev@dpdk.org; Ryan, Brendan <brendan.ryan@intel.com>; Coyle,
> David
> > <david.coyle@intel.com>; O'loingsigh, Mairtin
> > <mairtin.oloingsigh@intel.com>
> > Subject: [PATCH v3 2/2] net: add support for AVX512/VPCLMULQDQ based
> > CRC
> >
> > This patch enables the optimized calculation of CRC32-Ethernet and
> > CRC16- CCITT using the AVX512 and VPCLMULQDQ instruction sets. This
> > CRC implementation is built if the compiler supports the required
> > instruction sets. It is selected at run-time if the host CPU, again,
> > supports the required instruction sets.
> >
> > Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh@intel.com>
> > Signed-off-by: David Coyle <david.coyle@intel.com>
> 
> ...
> 
> > +static __rte_always_inline uint32_t
> > +crc32_eth_calc_vpclmulqdq(const uint8_t *data, uint32_t data_len,
> > +uint32_t
> > crc,
> > +	const struct crc_vpclmulqdq_ctx *params) {
> > +	__m128i res, d;
> > +	__m256i b;
> > +	__m512i temp, k;
> > +	__m512i qw0 = _mm512_set1_epi64(0), qw1, qw2, qw3;
> > +	__m512i fold0, fold1, fold2, fold3;
> > +	__mmask16 mask;
> > +	uint32_t n = 0;
> > +	int reduction = 0;
> > +
> > +	/* Get CRC init value */
> > +	b = _mm256_insert_epi32(_mm256_setzero_si256(), crc, 0);
> > +	temp = _mm512_inserti32x8(_mm512_setzero_si512(), b, 0);
> 
> You can replace this with the following, which produces less instructions (b
> needs to be changed to __m128i):
> 
>         b = _mm_cvtsi32_si128(crc);
>         temp = _mm512_castsi128_si512(b);
> 
> > +
> > +	if (data_len > 255) {
> > +		fold0 = _mm512_loadu_si512((const __m512i *)data);
> 
> ...
> 
> > +	} else {
> > +		if (data_len > 31) {
> > +			res = _mm_insert_epi32(_mm_setzero_si128(), crc,
> 0);
> 
> Should work better with:
> 
> res = _mm_cvtsi32_si128(crc);
> 
> > +			d = _mm_loadu_si128((const __m128i *)data);
> > +			res = _mm_xor_si128(res, d);
> > +			n += 16;
> > +
> > +			reduction = 240 - ((n+256)-data_len);
> > +
> > +			while (reduction > 0)
> > +				reduction_loop(&res, &reduction, data, &n,
> > +						params);
> > +
> > +			if (n != data_len)
> > +				res = last_two_xmm(data, data_len, n, res,
> > +						params);
> > +		} else if (data_len > 16) {
> > +			res = _mm_insert_epi32(_mm_setzero_si128(), crc,
> 0);
> 
> Same as above.
> 
> > +			d = _mm_loadu_si128((const __m128i *)data);
> > +			res = _mm_xor_si128(res, d);
> > +			n += 16;
> > +
> > +			if (n != data_len)
> > +				res = last_two_xmm(data, data_len, n, res,
> > +						params);
> > +		} else if (data_len == 16) {
> > +			res = _mm_insert_epi32(_mm_setzero_si128(), crc,
> 0);
> 
> Same.
> 
> > +			d = _mm_loadu_si128((const __m128i *)data);
> > +			res = _mm_xor_si128(res, d);
> > +		} else {
> > +			res = _mm_insert_epi32(_mm_setzero_si128(), crc,
> 0);
> 
> Same.
> 
> > +			mask = byte_len_to_mask_table[data_len];
> > +			d = _mm_maskz_loadu_epi8(mask, data);

Thanks for the feedback.
Ill make these changes and submit a v4 patch

Regards,
Mairtin

  reply	other threads:[~2020-10-05 13:41 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-29 15:35 [dpdk-dev] [PATCH v3 0/2] net: add CRC run-time checks and " Mairtin o Loingsigh
2020-09-29 15:36 ` [dpdk-dev] [PATCH v3 1/2] net: add run-time architecture specific CRC selection Mairtin o Loingsigh
2020-10-02 15:17   ` Singh, Jasvinder
2020-10-06 16:38     ` O'loingsigh, Mairtin
2020-09-29 15:36 ` [dpdk-dev] [PATCH v3 2/2] net: add support for AVX512/VPCLMULQDQ based CRC Mairtin o Loingsigh
2020-10-05 13:20   ` De Lara Guarch, Pablo
2020-10-05 13:38     ` O'loingsigh, Mairtin [this message]
2020-10-06 16:23 ` [dpdk-dev] [PATCH v4 0/2] net: add CRC run-time checks and " Mairtin o Loingsigh
2020-10-06 16:23   ` [dpdk-dev] [PATCH v4 1/2] net: add run-time architecture specific CRC selection Mairtin o Loingsigh
2020-10-07 14:59     ` Ananyev, Konstantin
2020-10-09 14:04       ` Coyle, David
2020-10-10 12:42         ` Ananyev, Konstantin
2020-10-06 16:23   ` [dpdk-dev] [PATCH v4 2/2] net: add support for AVX512/VPCLMULQDQ based CRC Mairtin o Loingsigh
2020-10-07  9:26   ` [dpdk-dev] [PATCH v4 0/2] net: add CRC run-time checks and " David Marchand
2020-10-09 13:50   ` [dpdk-dev] [PATCH v5 " Mairtin o Loingsigh
2020-10-09 13:50     ` [dpdk-dev] [PATCH v5 1/2] net: add run-time architecture specific CRC selection Mairtin o Loingsigh
2020-10-09 16:22       ` Singh, Jasvinder
2020-10-10  9:34       ` Ruifeng Wang
2020-10-13  9:07       ` Bruce Richardson
2020-10-09 13:50     ` [dpdk-dev] [PATCH v5 2/2] net: add support for AVX512/VPCLMULQDQ based CRC Mairtin o Loingsigh
2020-10-09 16:24       ` Singh, Jasvinder
2020-10-09 18:35     ` [dpdk-dev] [PATCH v5 0/2] net: add CRC run-time checks and " De Lara Guarch, Pablo
2020-10-13 18:47     ` David Marchand

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