From: Slava Ovsiienko <viacheslavo@nvidia.com> To: Bing Zhao <bingz@nvidia.com>, "viacheslavo@mellanox.com" <viacheslavo@mellanox.com>, "matan@mellanox.com" <matan@mellanox.com> Cc: "dev@dpdk.org" <dev@dpdk.org>, Ori Kam <orika@nvidia.com>, "Raslan Darawsheh" <rasland@nvidia.com> Subject: Re: [dpdk-dev] [PATCH v2 5/6] net/mlx5: change hairpin ingress flow validation Date: Mon, 26 Oct 2020 09:30:19 +0000 Message-ID: <MWHPR12MB150142888BDB0AE17537F051DF190@MWHPR12MB1501.namprd12.prod.outlook.com> (raw) In-Reply-To: <1603375597-430528-6-git-send-email-bingz@nvidia.com> > -----Original Message----- > From: Bing Zhao <bingz@nvidia.com> > Sent: Thursday, October 22, 2020 17:07 > To: viacheslavo@mellanox.com; matan@mellanox.com > Cc: dev@dpdk.org; Ori Kam <orika@nvidia.com>; Raslan Darawsheh > <rasland@nvidia.com> > Subject: [PATCH v2 5/6] net/mlx5: change hairpin ingress flow validation > > In the current implementation of the single port hairpin, there is a implicit > splitting process for actions. When inserting a hairpin flow, all the actions will > be included with the ingress attribute. > The flow engine will check and decide which actions should be moved into the > TX flow part, e.g., encapsulation, VLAN push. > > In some NICs, some actions can only be done in one direction. Since the > hairpin flow will be split into two parts, such validation will be skipped. > > With the hairpin explicit TX flow mode, no splitting is needed any more. The > hairpin flow may have no big difference from a standard flow (except the > queue). The application should take full charge of the actions and the flow > engine should validate the hairpin flow in the same way as other flows. > > In the meanwhile, a new internal API is added to get the hairpin configuration. > This will bypass the useless atomic operation to save the CPU cycles. > > Signed-off-by: Bing Zhao <bingz@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> > --- > drivers/net/mlx5/mlx5_flow_dv.c | 15 ++++++++++++--- > drivers/net/mlx5/mlx5_rxq.c | 27 +++++++++++++++++++++++++++ > drivers/net/mlx5/mlx5_rxtx.h | 2 ++ > 3 files changed, 41 insertions(+), 3 deletions(-) > > diff --git a/drivers/net/mlx5/mlx5_flow_dv.c > b/drivers/net/mlx5/mlx5_flow_dv.c index 15cd34e..d5be6f0 100644 > --- a/drivers/net/mlx5/mlx5_flow_dv.c > +++ b/drivers/net/mlx5/mlx5_flow_dv.c > @@ -6058,11 +6058,17 @@ struct field_modify_info modify_tcp[] = { > actions, > "no fate action is found"); > } > - /* Continue validation for Xcap and VLAN actions.*/ > + /* > + * Continue validation for Xcap and VLAN actions. > + * If hairpin is working in explicit TX rule mode, there is no actions > + * splitting and the validation of hairpin ingress flow should be the > + * same as other standard flows. > + */ > if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS | > MLX5_FLOW_VLAN_ACTIONS)) && > (queue_index == 0xFFFF || > - mlx5_rxq_get_type(dev, queue_index) != > MLX5_RXQ_TYPE_HAIRPIN)) { > + mlx5_rxq_get_type(dev, queue_index) != > MLX5_RXQ_TYPE_HAIRPIN || > + !!mlx5_rxq_get_hairpin_conf(dev, queue_index)->tx_explicit)) { > if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) == > MLX5_FLOW_XCAP_ACTIONS) > return rte_flow_error_set(error, ENOTSUP, @@ - > 6091,7 +6097,10 @@ struct field_modify_info modify_tcp[] = { > "multiple VLAN actions"); > } > } > - /* Hairpin flow will add one more TAG action. */ > + /* > + * Hairpin flow will add one more TAG action in TX implicit mode. > + * In TX explicit mode, there will be no hairpin flow ID. > + */ > if (hairpin > 0) > rw_act_num += MLX5_ACT_NUM_SET_TAG; > /* extra metadata enabled: one more TAG action will be add. */ diff -- > git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index > 78e15e7..d328d4a 100644 > --- a/drivers/net/mlx5/mlx5_rxq.c > +++ b/drivers/net/mlx5/mlx5_rxq.c > @@ -1720,6 +1720,33 @@ enum mlx5_rxq_type > return MLX5_RXQ_TYPE_UNDEFINED; > } > > +/* > + * Get a Rx hairpin queue configuration. > + * > + * @param dev > + * Pointer to Ethernet device. > + * @param idx > + * Rx queue index. > + * > + * @return > + * Pointer to the configuration if a hairpin RX queue, otherwise NULL. > + */ > +const struct rte_eth_hairpin_conf * > +mlx5_rxq_get_hairpin_conf(struct rte_eth_dev *dev, uint16_t idx) { > + struct mlx5_priv *priv = dev->data->dev_private; > + struct mlx5_rxq_ctrl *rxq_ctrl = NULL; > + > + if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) { > + rxq_ctrl = container_of((*priv->rxqs)[idx], > + struct mlx5_rxq_ctrl, > + rxq); > + if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN) > + return &rxq_ctrl->hairpin_conf; > + } > + return NULL; > +} > + > /** > * Get an indirection table. > * > diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h index > b50b643..d91ed0f 100644 > --- a/drivers/net/mlx5/mlx5_rxtx.h > +++ b/drivers/net/mlx5/mlx5_rxtx.h > @@ -344,6 +344,8 @@ uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev, int > mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hxrq_idx); int > mlx5_hrxq_verify(struct rte_eth_dev *dev); enum mlx5_rxq_type > mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx); > +const struct rte_eth_hairpin_conf *mlx5_rxq_get_hairpin_conf > + (struct rte_eth_dev *dev, uint16_t idx); > struct mlx5_hrxq *mlx5_drop_action_create(struct rte_eth_dev *dev); void > mlx5_drop_action_destroy(struct rte_eth_dev *dev); uint64_t > mlx5_get_rx_port_offloads(void); > -- > 1.8.3.1
next prev parent reply other threads:[~2020-10-26 9:30 UTC|newest] Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-08 14:16 [dpdk-dev] [PATCH 0/4] add two ports hairpin mode support in mlx5 PMD Bing Zhao 2020-10-08 14:16 ` [dpdk-dev] [PATCH 1/4] net/mlx5: remove hairpin queue peer port checking Bing Zhao 2020-10-08 14:16 ` [dpdk-dev] [PATCH 2/4] net/mlx5: add support for two ports hairpin mode Bing Zhao 2020-10-08 14:16 ` [dpdk-dev] [PATCH 3/4] net/mlx5: conditional hairpin auto bind Bing Zhao 2020-10-08 14:17 ` [dpdk-dev] [PATCH 4/4] doc: update hairpin support for mlx5 driver Bing Zhao 2020-10-22 14:06 ` [dpdk-dev] [PATCH v2 0/6] add two ports hairpin mode support in mlx5 PMD Bing Zhao 2020-10-22 14:06 ` [dpdk-dev] [PATCH v2 1/6] net/mlx5: change hairpin queue peer checking Bing Zhao 2020-10-26 9:28 ` Slava Ovsiienko 2020-10-22 14:06 ` [dpdk-dev] [PATCH v2 2/6] net/mlx5: add support for two ports hairpin mode Bing Zhao 2020-10-26 9:29 ` Slava Ovsiienko 2020-10-22 14:06 ` [dpdk-dev] [PATCH v2 3/6] net/mlx5: add support to get hairpin peer ports Bing Zhao 2020-10-26 9:29 ` Slava Ovsiienko 2020-10-22 14:06 ` [dpdk-dev] [PATCH v2 4/6] net/mlx5: conditional hairpin auto bind Bing Zhao 2020-10-26 9:29 ` Slava Ovsiienko 2020-10-22 14:06 ` [dpdk-dev] [PATCH v2 5/6] net/mlx5: change hairpin ingress flow validation Bing Zhao 2020-10-26 9:30 ` Slava Ovsiienko [this message] 2020-10-22 14:06 ` [dpdk-dev] [PATCH v2 6/6] net/mlx5: not split hairpin flow in explicit mode Bing Zhao 2020-10-26 9:30 ` Slava Ovsiienko 2020-10-26 16:37 ` [dpdk-dev] [PATCH v3 0/7] add two ports hairpin mode support in mlx5 PMD Bing Zhao 2020-10-26 16:37 ` [dpdk-dev] [PATCH v3 1/7] net/mlx5: change hairpin queue peer checking Bing Zhao 2020-10-26 16:37 ` [dpdk-dev] [PATCH v3 2/7] net/mlx5: add support for two ports hairpin mode Bing Zhao 2020-10-26 16:37 ` [dpdk-dev] [PATCH v3 3/7] net/mlx5: add support to get hairpin peer ports Bing Zhao 2020-10-26 16:37 ` [dpdk-dev] [PATCH v3 4/7] net/mlx5: conditional hairpin auto bind Bing Zhao 2020-10-26 16:37 ` [dpdk-dev] [PATCH v3 5/7] net/mlx5: change hairpin ingress flow validation Bing Zhao 2020-10-26 16:37 ` [dpdk-dev] [PATCH v3 6/7] net/mlx5: not split hairpin flow in explicit mode Bing Zhao 2020-10-26 16:37 ` [dpdk-dev] [PATCH v3 7/7] doc: update mlx5 hairpin support and limitations Bing Zhao 2020-10-26 16:44 ` Slava Ovsiienko 2020-10-26 22:42 ` [dpdk-dev] [PATCH v3 0/7] add two ports hairpin mode support in mlx5 PMD Raslan Darawsheh
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=MWHPR12MB150142888BDB0AE17537F051DF190@MWHPR12MB1501.namprd12.prod.outlook.com \ --to=viacheslavo@nvidia.com \ --cc=bingz@nvidia.com \ --cc=dev@dpdk.org \ --cc=matan@mellanox.com \ --cc=orika@nvidia.com \ --cc=rasland@nvidia.com \ --cc=viacheslavo@mellanox.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: link
DPDK patches and discussions This inbox may be cloned and mirrored by anyone: git clone --mirror https://inbox.dpdk.org/dev/0 dev/git/0.git # If you have public-inbox 1.1+ installed, you may # initialize and index your mirror using the following commands: public-inbox-init -V2 dev dev/ https://inbox.dpdk.org/dev \ dev@dpdk.org public-inbox-index dev Example config snippet for mirrors. Newsgroup available over NNTP: nntp://inbox.dpdk.org/inbox.dpdk.dev AGPL code for this site: git clone https://public-inbox.org/public-inbox.git