Re: [dpdk-dev] [PATCH v2 5/6] net/mlx5: change hairpin ingress flow validation

[Slava Ovsiienko <viacheslavo@nvidia.com>]

> -----Original Message-----
> From: Bing Zhao <bingz@nvidia.com>
> Sent: Thursday, October 22, 2020 17:07
> To: viacheslavo@mellanox.com; matan@mellanox.com
> Cc: dev@dpdk.org; Ori Kam <orika@nvidia.com>; Raslan Darawsheh
> <rasland@nvidia.com>
> Subject: [PATCH v2 5/6] net/mlx5: change hairpin ingress flow validation
> 
> In the current implementation of the single port hairpin, there is a implicit
> splitting process for actions. When inserting a hairpin flow, all the actions will
> be included with the ingress attribute.
> The flow engine will check and decide which actions should be moved into the
> TX flow part, e.g., encapsulation, VLAN push.
> 
> In some NICs, some actions can only be done in one direction. Since the
> hairpin flow will be split into two parts, such validation will be skipped.
> 
> With the hairpin explicit TX flow mode, no splitting is needed any more. The
> hairpin flow may have no big difference from a standard flow (except the
> queue). The application should take full charge of the actions and the flow
> engine should validate the hairpin flow in the same way as other flows.
> 
> In the meanwhile, a new internal API is added to get the hairpin configuration.
> This will bypass the useless atomic operation to save the CPU cycles.
> 
> Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

> ---
>  drivers/net/mlx5/mlx5_flow_dv.c | 15 ++++++++++++---
>  drivers/net/mlx5/mlx5_rxq.c     | 27 +++++++++++++++++++++++++++
>  drivers/net/mlx5/mlx5_rxtx.h    |  2 ++
>  3 files changed, 41 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/net/mlx5/mlx5_flow_dv.c
> b/drivers/net/mlx5/mlx5_flow_dv.c index 15cd34e..d5be6f0 100644
> --- a/drivers/net/mlx5/mlx5_flow_dv.c
> +++ b/drivers/net/mlx5/mlx5_flow_dv.c
> @@ -6058,11 +6058,17 @@ struct field_modify_info modify_tcp[] = {
>  						  actions,
>  						  "no fate action is found");
>  	}
> -	/* Continue validation for Xcap and VLAN actions.*/
> +	/*
> +	 * Continue validation for Xcap and VLAN actions.
> +	 * If hairpin is working in explicit TX rule mode, there is no actions
> +	 * splitting and the validation of hairpin ingress flow should be the
> +	 * same as other standard flows.
> +	 */
>  	if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
>  			     MLX5_FLOW_VLAN_ACTIONS)) &&
>  	    (queue_index == 0xFFFF ||
> -	     mlx5_rxq_get_type(dev, queue_index) !=
> MLX5_RXQ_TYPE_HAIRPIN)) {
> +	     mlx5_rxq_get_type(dev, queue_index) !=
> MLX5_RXQ_TYPE_HAIRPIN ||
> +	     !!mlx5_rxq_get_hairpin_conf(dev, queue_index)->tx_explicit)) {
>  		if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
>  		    MLX5_FLOW_XCAP_ACTIONS)
>  			return rte_flow_error_set(error, ENOTSUP, @@ -
> 6091,7 +6097,10 @@ struct field_modify_info modify_tcp[] = {
>  						 "multiple VLAN actions");
>  		}
>  	}
> -	/* Hairpin flow will add one more TAG action. */
> +	/*
> +	 * Hairpin flow will add one more TAG action in TX implicit mode.
> +	 * In TX explicit mode, there will be no hairpin flow ID.
> +	 */
>  	if (hairpin > 0)
>  		rw_act_num += MLX5_ACT_NUM_SET_TAG;
>  	/* extra metadata enabled: one more TAG action will be add. */ diff --
> git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index
> 78e15e7..d328d4a 100644
> --- a/drivers/net/mlx5/mlx5_rxq.c
> +++ b/drivers/net/mlx5/mlx5_rxq.c
> @@ -1720,6 +1720,33 @@ enum mlx5_rxq_type
>  	return MLX5_RXQ_TYPE_UNDEFINED;
>  }
> 
> +/*
> + * Get a Rx hairpin queue configuration.
> + *
> + * @param dev
> + *   Pointer to Ethernet device.
> + * @param idx
> + *   Rx queue index.
> + *
> + * @return
> + *   Pointer to the configuration if a hairpin RX queue, otherwise NULL.
> + */
> +const struct rte_eth_hairpin_conf *
> +mlx5_rxq_get_hairpin_conf(struct rte_eth_dev *dev, uint16_t idx) {
> +	struct mlx5_priv *priv = dev->data->dev_private;
> +	struct mlx5_rxq_ctrl *rxq_ctrl = NULL;
> +
> +	if (idx < priv->rxqs_n && (*priv->rxqs)[idx]) {
> +		rxq_ctrl = container_of((*priv->rxqs)[idx],
> +					struct mlx5_rxq_ctrl,
> +					rxq);
> +		if (rxq_ctrl->type == MLX5_RXQ_TYPE_HAIRPIN)
> +			return &rxq_ctrl->hairpin_conf;
> +	}
> +	return NULL;
> +}
> +
>  /**
>   * Get an indirection table.
>   *
> diff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h index
> b50b643..d91ed0f 100644
> --- a/drivers/net/mlx5/mlx5_rxtx.h
> +++ b/drivers/net/mlx5/mlx5_rxtx.h
> @@ -344,6 +344,8 @@ uint32_t mlx5_hrxq_get(struct rte_eth_dev *dev,  int
> mlx5_hrxq_release(struct rte_eth_dev *dev, uint32_t hxrq_idx);  int
> mlx5_hrxq_verify(struct rte_eth_dev *dev);  enum mlx5_rxq_type
> mlx5_rxq_get_type(struct rte_eth_dev *dev, uint16_t idx);
> +const struct rte_eth_hairpin_conf *mlx5_rxq_get_hairpin_conf
> +	(struct rte_eth_dev *dev, uint16_t idx);
>  struct mlx5_hrxq *mlx5_drop_action_create(struct rte_eth_dev *dev);  void
> mlx5_drop_action_destroy(struct rte_eth_dev *dev);  uint64_t
> mlx5_get_rx_port_offloads(void);
> --
> 1.8.3.1