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From: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
To: dev@dpdk.org
Cc: matan@mellanox.com, rasland@mellanox.com, ferruh.yigit@intel.com,
	stable@dpdk.org
Subject: [dpdk-stable] [PATCH v2] net/mlx5: fix shared metadata matcher field setup
Date: Fri, 17 Jan 2020 11:01:34 +0000
Message-ID: <1579258894-4680-1-git-send-email-viacheslavo@mellanox.com> (raw)
In-Reply-To: <1576828138-13063-1-git-send-email-viacheslavo@mellanox.com>

Matcher is flow table related structure providing the flow pattern
to be translated directly in hardware controlling data. Some fields
in this structure might be split (by software) between multiple items.

For example, the metadata register c0 field in the matcher might be
split into two independent subfields - the source vport index and
META item value. These subfields have no permanent assigned masks,
the actual configuration is queried from the kernel drivers in
runtime. To handle source vport value (the port of e-Switch which
is origin of the packet) the kernel might use the dedicated vport
field in the matcher or the part of register c0 field, depending
on configuration.

To setup the matcher structure fields the macro MLX5_SET is used.
MLX5_SET configures the specified 32-bit field as whole entity.
For metadata register c0 we should take into account the provided
mask in order to configure the specified subfield bits only,
otherwise setting vport overrides the META values and vice versa.

Fixes: acfcd5c52f94 ("net/mlx5: update meta register matcher set")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
---
v1: - http://patches.dpdk.org/patch/64068/
v2: - update commit message
    - update headline
      "net/mlx5: fix matcher metadata register c0 field setup"
       

 drivers/net/mlx5/mlx5_flow_dv.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 5bd1b1c..2b70788 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -5748,6 +5748,7 @@ struct field_modify_info modify_tcp[] = {
 		MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
 	void *misc2_v =
 		MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
+	uint32_t temp;
 
 	data &= mask;
 	switch (reg_type) {
@@ -5760,8 +5761,18 @@ struct field_modify_info modify_tcp[] = {
 		MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
 		break;
 	case REG_C_0:
-		MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, mask);
-		MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, data);
+		/*
+		 * The metadata register C0 field might be divided into
+		 * source vport index and META item value, we should set
+		 * this field according to specified mask, not as whole one.
+		 */
+		temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
+		temp |= mask;
+		MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
+		temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
+		temp &= ~mask;
+		temp |= data;
+		MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
 		break;
 	case REG_C_1:
 		MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
-- 
1.8.3.1


  parent reply	other threads:[~2020-01-17 11:01 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-20  7:48 [dpdk-stable] [PATCH] net/mlx5: fix matcher metadata register c0 " Viacheslav Ovsiienko
2020-01-06 14:50 ` Matan Azrad
2020-01-07 11:31   ` Raslan Darawsheh
2020-01-08 14:47 ` Ferruh Yigit
2020-01-17 15:04   ` Slava Ovsiienko
2020-01-17 11:01 ` Viacheslav Ovsiienko [this message]
2020-01-17 17:18   ` [dpdk-stable] [PATCH v2] net/mlx5: fix shared metadata matcher " Ferruh Yigit

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