[dpdk-stable] [PATCH 20.11 0/2] support both PIO and MMIO BAR for legacy virito device

["谢华伟(此时此刻）" <huawei.xhw@alibaba-inc.com>]

virtio PMD assumes legacy device only supports PIO(port-mapped) BAR 
resource. This is wrong. As we need to create lots of devices, adn PIO 
resource on x86 is very limited, we expose MMIO(memory-mapped I/O) BAR.

Kernel supports both PIO and MMIO BAR for legacy virtio-pci device, and 
for all other pci devices. This patchset handles different type of BAR in
the similar way.

In previous implementation, under igb_uio driver we get PIO address from
igb_uio sysfs entry; with uio_pci_generic, we get PIO address from
/proc/ioports for x86, and for other ARCHs, we get PIO address from
standard PCI sysfs entry. For PIO/MMIO RW, there is different path for 
different drivers and arch.

All of the above is too much twisted. This patchset unifies the way to get 
both PIO and MMIO address for different driver and ARCHs, all from standard
resource attr under pci sysfs. This is most generic.

We distinguish PIO and MMIO by their address range like how kernel does.
It is ugly but works.

huawei xie (2):
  bus/pci: use PCI standard sysfs entry to get PIO address
  bus/pci: support MMIO in PCI ioport accessors

 drivers/bus/pci/linux/pci.c     |  81 ---------------
 drivers/bus/pci/linux/pci_uio.c | 214 ++++++++++++++++++++++++++++------------
 2 files changed, 150 insertions(+), 145 deletions(-)

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1.8.3.1