[dpdk-stable] [PATCH 17.11] net/qede: fix ethernet type in HW registers

[dpdk-stable] [PATCH 17.11] net/qede: fix ethernet type in HW registers

[Mody, Rasesh]

[ upstream commit d5df6159dddadedc1bdc12ec5f1a92a813dc94d3 ]

Fix to program the HW registers with proper ether type.

Fixes: 36f45bce2537 ("net/qede/base: fix to support OVLAN mode")

Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
---
 drivers/net/qede/base/ecore_dev.c |   20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
index 6a3046d..ca3bb17 100644
--- a/drivers/net/qede/base/ecore_dev.c
+++ b/drivers/net/qede/base/ecore_dev.c
@@ -2334,6 +2334,7 @@ enum _ecore_status_t ecore_hw_init(struct ecore_dev *p_dev,
 	bool b_default_mtu = true;
 	struct ecore_hwfn *p_hwfn;
 	enum _ecore_status_t rc = ECORE_SUCCESS;
+	u16 ether_type;
 	int i;
 
 	if ((p_params->int_mode == ECORE_INT_MODE_MSI) && ECORE_IS_CMT(p_dev)) {
@@ -2366,6 +2367,25 @@ enum _ecore_status_t ecore_hw_init(struct ecore_dev *p_dev,
 		if (rc != ECORE_SUCCESS)
 			return rc;
 
+		if (IS_PF(p_dev) && (OSAL_TEST_BIT(ECORE_MF_8021Q_TAGGING,
+						   &p_dev->mf_bits) ||
+				     OSAL_TEST_BIT(ECORE_MF_8021AD_TAGGING,
+						   &p_dev->mf_bits))) {
+			if (OSAL_TEST_BIT(ECORE_MF_8021Q_TAGGING,
+					  &p_dev->mf_bits))
+				ether_type = ETHER_TYPE_VLAN;
+			else
+				ether_type = ETHER_TYPE_QINQ;
+			STORE_RT_REG(p_hwfn, PRS_REG_TAG_ETHERTYPE_0_RT_OFFSET,
+				     ether_type);
+			STORE_RT_REG(p_hwfn, NIG_REG_TAG_ETHERTYPE_0_RT_OFFSET,
+				     ether_type);
+			STORE_RT_REG(p_hwfn, PBF_REG_TAG_ETHERTYPE_0_RT_OFFSET,
+				     ether_type);
+			STORE_RT_REG(p_hwfn, DORQ_REG_TAG1_ETHERTYPE_RT_OFFSET,
+				     ether_type);
+		}
+
 		ecore_fill_load_req_params(&load_req_params,
 					   p_params->p_drv_load_params);
 		rc = ecore_mcp_load_req(p_hwfn, p_hwfn->p_main_ptt,
-- 
1.7.10.3

Re: [dpdk-stable] [PATCH 17.11] net/qede: fix ethernet type in HW registers

[Yongseok Koh]

> On Jan 11, 2019, at 2:37 PM, Mody, Rasesh <Rasesh.Mody@cavium.com> wrote:
> 
> [ upstream commit d5df6159dddadedc1bdc12ec5f1a92a813dc94d3 ]
> 
> Fix to program the HW registers with proper ether type.
> 
> Fixes: 36f45bce2537 ("net/qede/base: fix to support OVLAN mode")
> 
> Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
> ---

Applied to stable/17.11

Thanks,
Yongseok

> drivers/net/qede/base/ecore_dev.c |   20 ++++++++++++++++++++
> 1 file changed, 20 insertions(+)
> 
> diff --git a/drivers/net/qede/base/ecore_dev.c b/drivers/net/qede/base/ecore_dev.c
> index 6a3046d..ca3bb17 100644
> --- a/drivers/net/qede/base/ecore_dev.c
> +++ b/drivers/net/qede/base/ecore_dev.c
> @@ -2334,6 +2334,7 @@ enum _ecore_status_t ecore_hw_init(struct ecore_dev *p_dev,
> 	bool b_default_mtu = true;
> 	struct ecore_hwfn *p_hwfn;
> 	enum _ecore_status_t rc = ECORE_SUCCESS;
> +	u16 ether_type;
> 	int i;
> 
> 	if ((p_params->int_mode == ECORE_INT_MODE_MSI) && ECORE_IS_CMT(p_dev)) {
> @@ -2366,6 +2367,25 @@ enum _ecore_status_t ecore_hw_init(struct ecore_dev *p_dev,
> 		if (rc != ECORE_SUCCESS)
> 			return rc;
> 
> +		if (IS_PF(p_dev) && (OSAL_TEST_BIT(ECORE_MF_8021Q_TAGGING,
> +						   &p_dev->mf_bits) ||
> +				     OSAL_TEST_BIT(ECORE_MF_8021AD_TAGGING,
> +						   &p_dev->mf_bits))) {
> +			if (OSAL_TEST_BIT(ECORE_MF_8021Q_TAGGING,
> +					  &p_dev->mf_bits))
> +				ether_type = ETHER_TYPE_VLAN;
> +			else
> +				ether_type = ETHER_TYPE_QINQ;
> +			STORE_RT_REG(p_hwfn, PRS_REG_TAG_ETHERTYPE_0_RT_OFFSET,
> +				     ether_type);
> +			STORE_RT_REG(p_hwfn, NIG_REG_TAG_ETHERTYPE_0_RT_OFFSET,
> +				     ether_type);
> +			STORE_RT_REG(p_hwfn, PBF_REG_TAG_ETHERTYPE_0_RT_OFFSET,
> +				     ether_type);
> +			STORE_RT_REG(p_hwfn, DORQ_REG_TAG1_ETHERTYPE_RT_OFFSET,
> +				     ether_type);
> +		}
> +
> 		ecore_fill_load_req_params(&load_req_params,
> 					   p_params->p_drv_load_params);
> 		rc = ecore_mcp_load_req(p_hwfn, p_hwfn->p_main_ptt,
> -- 
> 1.7.10.3
>