From: Raslan Darawsheh <rasland@nvidia.com>
To: Slava Ovsiienko <viacheslavo@nvidia.com>, "dev@dpdk.org" <dev@dpdk.org>
Cc: Matan Azrad <matan@nvidia.com>, Ori Kam <orika@nvidia.com>,
"stable@dpdk.org" <stable@dpdk.org>
Subject: Re: [dpdk-stable] [PATCH] net/mlx5: fix Rx metadata leftovers
Date: Tue, 16 Mar 2021 16:15:19 +0000 [thread overview]
Message-ID: <DM6PR12MB2748399812FC836AC30254EFCF6B9@DM6PR12MB2748.namprd12.prod.outlook.com> (raw)
In-Reply-To: <20210307114547.19591-1-viacheslavo@nvidia.com>
Hi,
> -----Original Message-----
> From: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
> Sent: Sunday, March 7, 2021 1:46 PM
> To: dev@dpdk.org
> Cc: Raslan Darawsheh <rasland@nvidia.com>; Matan Azrad
> <matan@nvidia.com>; Ori Kam <orika@nvidia.com>; stable@dpdk.org
> Subject: [PATCH] net/mlx5: fix Rx metadata leftovers
>
> The Rx metadata might use the metadata register C0 to keep the
> values. The same register C0 might be used by kernel for source
> vport value handling, kernel uses upper half of the register,
> leaving the lower half for application usage.
>
> In the extended metadata mode 1 (dv_xmeta_en devarg is
> assigned with value 1) the metadata width is 16 bits only,
> the Rx datapath code fetched the entire 32-bit value of the
> metadata register and presented one to application. The patch
> provides data masking depending on the chosen metadata mode.
>
> Fixes: 6c55b622a956 ("net/mlx5: set dynamic flow metadata in Rx queues")
> Cc: stable@dpdk.org
>
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
prev parent reply other threads:[~2021-03-16 16:15 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-07 11:45 Viacheslav Ovsiienko
2021-03-11 19:58 ` Matan Azrad
2021-03-16 16:15 ` Raslan Darawsheh [this message]
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