* [dpdk-test-report] |WARNING| pw93138 [PATCH v4 10/19] net/ena/base: adjust changes to lastest ena-com
[not found] <20210511064554.10656-11-mk@semihalf.com>
@ 2021-05-11 6:48 ` checkpatch
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From: checkpatch @ 2021-05-11 6:48 UTC (permalink / raw)
To: test-report; +Cc: Michal Krawczyk
Test-Label: checkpatch
Test-Status: WARNING
http://dpdk.org/patch/93138
_coding style issues_
WARNING:TYPO_SPELLING: 'lastest' may be misspelled - perhaps 'latest'?
#67:
Subject: [dpdk-dev] [PATCH v4 10/19] net/ena/base: adjust changes to lastest
CHECK:CAMELCASE: Avoid CamelCase: <ENA_PRIu64>
#116: FILE: drivers/net/ena/base/ena_plat_dpdk.h:42:
+#define ENA_PRIu64 PRIu64
CHECK:CAMELCASE: Avoid CamelCase: <PRIu64>
#116: FILE: drivers/net/ena/base/ena_plat_dpdk.h:42:
+#define ENA_PRIu64 PRIu64
CHECK:MACRO_ARG_REUSE: Macro argument reuse 'waitqueue' - possible side-effects?
#207: FILE: drivers/net/ena/base/ena_plat_dpdk.h:149:
+#define ENA_WAIT_EVENT_INIT(waitqueue) \
+ do { \
+ pthread_mutex_init(&(waitqueue).mutex, NULL); \
+ pthread_cond_init(&(waitqueue).cond, NULL); \
} while (0)
CHECK:MACRO_ARG_REUSE: Macro argument reuse 'waitevent' - possible side-effects?
#226: FILE: drivers/net/ena/base/ena_plat_dpdk.h:155:
+#define ENA_WAIT_EVENT_WAIT(waitevent, timeout) \
+ do { \
+ struct timespec wait; \
+ struct timeval now; \
+ unsigned long timeout_us; \
+ gettimeofday(&now, NULL); \
+ wait.tv_sec = now.tv_sec + (timeout) / 1000000UL; \
+ timeout_us = (timeout) % 1000000UL; \
+ wait.tv_nsec = (now.tv_usec + timeout_us) * 1000UL; \
+ pthread_mutex_lock(&(waitevent).mutex); \
+ pthread_cond_timedwait(&(waitevent).cond, \
+ &(waitevent).mutex, &wait); \
+ pthread_mutex_unlock(&(waitevent).mutex); \
} while (0)
CHECK:MACRO_ARG_REUSE: Macro argument reuse 'timeout' - possible side-effects?
#226: FILE: drivers/net/ena/base/ena_plat_dpdk.h:155:
+#define ENA_WAIT_EVENT_WAIT(waitevent, timeout) \
+ do { \
+ struct timespec wait; \
+ struct timeval now; \
+ unsigned long timeout_us; \
+ gettimeofday(&now, NULL); \
+ wait.tv_sec = now.tv_sec + (timeout) / 1000000UL; \
+ timeout_us = (timeout) % 1000000UL; \
+ wait.tv_nsec = (now.tv_usec + timeout_us) * 1000UL; \
+ pthread_mutex_lock(&(waitevent).mutex); \
+ pthread_cond_timedwait(&(waitevent).cond, \
+ &(waitevent).mutex, &wait); \
+ pthread_mutex_unlock(&(waitevent).mutex); \
} while (0)
CHECK:MACRO_ARG_REUSE: Macro argument reuse 'size' - possible side-effects?
#283: FILE: drivers/net/ena/base/ena_plat_dpdk.h:188:
+#define ENA_MEM_ALLOC_COHERENT_ALIGNED( \
+ dmadev, size, virt, phys, mem_handle, alignment) \
+ do { \
+ const struct rte_memzone *mz = NULL; \
+ ENA_TOUCH(dmadev); \
+ if ((size) > 0) { \
+ char z_name[RTE_MEMZONE_NAMESIZE]; \
+ snprintf(z_name, sizeof(z_name), \
+ "ena_alloc_%" PRIi64 "", \
+ rte_atomic64_add_return(&ena_alloc_cnt, 1)); \
+ mz = rte_memzone_reserve_aligned(z_name, (size), \
+ SOCKET_ID_ANY, RTE_MEMZONE_IOVA_CONTIG,\
+ alignment); \
+ mem_handle = mz; \
+ } \
+ if (mz == NULL) { \
+ virt = NULL; \
+ phys = 0; \
+ } else { \
+ memset(mz->addr, 0, (size)); \
+ virt = mz->addr; \
+ phys = mz->iova; \
+ } \
} while (0)
CHECK:MACRO_ARG_REUSE: Macro argument reuse 'virt' - possible side-effects?
#283: FILE: drivers/net/ena/base/ena_plat_dpdk.h:188:
+#define ENA_MEM_ALLOC_COHERENT_ALIGNED( \
+ dmadev, size, virt, phys, mem_handle, alignment) \
+ do { \
+ const struct rte_memzone *mz = NULL; \
+ ENA_TOUCH(dmadev); \
+ if ((size) > 0) { \
+ char z_name[RTE_MEMZONE_NAMESIZE]; \
+ snprintf(z_name, sizeof(z_name), \
+ "ena_alloc_%" PRIi64 "", \
+ rte_atomic64_add_return(&ena_alloc_cnt, 1)); \
+ mz = rte_memzone_reserve_aligned(z_name, (size), \
+ SOCKET_ID_ANY, RTE_MEMZONE_IOVA_CONTIG,\
+ alignment); \
+ mem_handle = mz; \
+ } \
+ if (mz == NULL) { \
+ virt = NULL; \
+ phys = 0; \
+ } else { \
+ memset(mz->addr, 0, (size)); \
+ virt = mz->addr; \
+ phys = mz->iova; \
+ } \
} while (0)
CHECK:MACRO_ARG_REUSE: Macro argument reuse 'phys' - possible side-effects?
#283: FILE: drivers/net/ena/base/ena_plat_dpdk.h:188:
+#define ENA_MEM_ALLOC_COHERENT_ALIGNED( \
+ dmadev, size, virt, phys, mem_handle, alignment) \
+ do { \
+ const struct rte_memzone *mz = NULL; \
+ ENA_TOUCH(dmadev); \
+ if ((size) > 0) { \
+ char z_name[RTE_MEMZONE_NAMESIZE]; \
+ snprintf(z_name, sizeof(z_name), \
+ "ena_alloc_%" PRIi64 "", \
+ rte_atomic64_add_return(&ena_alloc_cnt, 1)); \
+ mz = rte_memzone_reserve_aligned(z_name, (size), \
+ SOCKET_ID_ANY, RTE_MEMZONE_IOVA_CONTIG,\
+ alignment); \
+ mem_handle = mz; \
+ } \
+ if (mz == NULL) { \
+ virt = NULL; \
+ phys = 0; \
+ } else { \
+ memset(mz->addr, 0, (size)); \
+ virt = mz->addr; \
+ phys = mz->iova; \
+ } \
} while (0)
CHECK:CAMELCASE: Avoid CamelCase: <PRIi64>
#291: FILE: drivers/net/ena/base/ena_plat_dpdk.h:196:
+ "ena_alloc_%" PRIi64 "", \
CHECK:MACRO_ARG_REUSE: Macro argument reuse 'size' - possible side-effects?
#349: FILE: drivers/net/ena/base/ena_plat_dpdk.h:219:
+#define ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED( \
+ dmadev, size, virt, phys, mem_handle, node, dev_node, alignment) \
+ do { \
+ const struct rte_memzone *mz = NULL; \
+ ENA_TOUCH(dmadev); ENA_TOUCH(dev_node); \
+ if ((size) > 0) { \
+ char z_name[RTE_MEMZONE_NAMESIZE]; \
+ snprintf(z_name, sizeof(z_name), \
+ "ena_alloc_%" PRIi64 "", \
+ rte_atomic64_add_return(&ena_alloc_cnt, 1)); \
+ mz = rte_memzone_reserve_aligned(z_name, (size), \
+ node, RTE_MEMZONE_IOVA_CONTIG, alignment); \
+ mem_handle = mz; \
+ } \
+ if (mz == NULL) { \
+ virt = NULL; \
+ phys = 0; \
+ } else { \
+ memset(mz->addr, 0, (size)); \
+ virt = mz->addr; \
+ phys = mz->iova; \
+ } \
} while (0)
CHECK:MACRO_ARG_REUSE: Macro argument reuse 'virt' - possible side-effects?
#349: FILE: drivers/net/ena/base/ena_plat_dpdk.h:219:
+#define ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED( \
+ dmadev, size, virt, phys, mem_handle, node, dev_node, alignment) \
+ do { \
+ const struct rte_memzone *mz = NULL; \
+ ENA_TOUCH(dmadev); ENA_TOUCH(dev_node); \
+ if ((size) > 0) { \
+ char z_name[RTE_MEMZONE_NAMESIZE]; \
+ snprintf(z_name, sizeof(z_name), \
+ "ena_alloc_%" PRIi64 "", \
+ rte_atomic64_add_return(&ena_alloc_cnt, 1)); \
+ mz = rte_memzone_reserve_aligned(z_name, (size), \
+ node, RTE_MEMZONE_IOVA_CONTIG, alignment); \
+ mem_handle = mz; \
+ } \
+ if (mz == NULL) { \
+ virt = NULL; \
+ phys = 0; \
+ } else { \
+ memset(mz->addr, 0, (size)); \
+ virt = mz->addr; \
+ phys = mz->iova; \
+ } \
} while (0)
CHECK:MACRO_ARG_REUSE: Macro argument reuse 'phys' - possible side-effects?
#349: FILE: drivers/net/ena/base/ena_plat_dpdk.h:219:
+#define ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED( \
+ dmadev, size, virt, phys, mem_handle, node, dev_node, alignment) \
+ do { \
+ const struct rte_memzone *mz = NULL; \
+ ENA_TOUCH(dmadev); ENA_TOUCH(dev_node); \
+ if ((size) > 0) { \
+ char z_name[RTE_MEMZONE_NAMESIZE]; \
+ snprintf(z_name, sizeof(z_name), \
+ "ena_alloc_%" PRIi64 "", \
+ rte_atomic64_add_return(&ena_alloc_cnt, 1)); \
+ mz = rte_memzone_reserve_aligned(z_name, (size), \
+ node, RTE_MEMZONE_IOVA_CONTIG, alignment); \
+ mem_handle = mz; \
+ } \
+ if (mz == NULL) { \
+ virt = NULL; \
+ phys = 0; \
+ } else { \
+ memset(mz->addr, 0, (size)); \
+ virt = mz->addr; \
+ phys = mz->iova; \
+ } \
} while (0)
total: 0 errors, 1 warnings, 12 checks, 350 lines checked
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2021-05-11 6:48 ` [dpdk-test-report] |WARNING| pw93138 [PATCH v4 10/19] net/ena/base: adjust changes to lastest ena-com checkpatch
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