[dpdk-test-report] |WARNING| pw103763-103766 [PATCH] [4/4] common/mlx5: fix RQ size configuration in QP create

[dpdk-test-report] |WARNING| pw103763-103766 [PATCH] [4/4] common/mlx5: fix RQ size configuration in QP create

[dpdklab]

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Test-Label: iol-testing
Test-Status: WARNING
http://dpdk.org/patch/103763

_apply patch failure_

Submitter: Raja Zidane <rzidane@nvidia.com>
Date: Thursday, November 04 2021 12:49:29 
Applied on: CommitID:5b08ac4e4a8dbc95f52b871b62a97fda57fa477e
Apply patch set 103763-103766 failed:

Checking patch drivers/common/mlx5/mlx5_devx_cmds.c...
error: while searching for:
			MLX5_HCA_CAP_OPMOD_GET_CUR);
	if (!hcattr)
		return rc;
	attr->flow_counter_bulk_alloc_bitmap =
			MLX5_GET(cmd_hca_cap, hcattr, flow_counter_bulk_alloc);
	attr->flow_counters_dump = MLX5_GET(cmd_hca_cap, hcattr,

error: patch failed: drivers/common/mlx5/mlx5_devx_cmds.c:832
Hunk #2 succeeded at 2062 (offset -38 lines).
Checking patch drivers/common/mlx5/mlx5_devx_cmds.h...
Hunk #1 succeeded at 187 (offset -60 lines).
Hunk #2 succeeded at 403 (offset -60 lines).
Checking patch drivers/compress/mlx5/mlx5_compress.c...
Checking patch drivers/crypto/mlx5/mlx5_crypto.c...
Hunk #1 succeeded at 556 (offset -1 lines).
Hunk #2 succeeded at 580 (offset -1 lines).
Hunk #3 succeeded at 608 (offset -1 lines).
Hunk #4 succeeded at 631 (offset -1 lines).
Hunk #5 succeeded at 785 (offset -1 lines).
Hunk #6 succeeded at 845 (offset -1 lines).
Hunk #7 succeeded at 935 (offset -1 lines).
error: while searching for:
		return -1;
	}
	priv->keytag = rte_cpu_to_be_64(devarg_prms.keytag);
	priv->max_segs_num = devarg_prms.max_segs_num;
	priv->umr_wqe_size = sizeof(struct mlx5_wqe_umr_bsf_seg) +
			     sizeof(struct mlx5_wqe_cseg) +
			     sizeof(struct mlx5_wqe_umr_cseg) +
			     sizeof(struct mlx5_wqe_mkey_cseg) +
			     RTE_ALIGN(priv->max_segs_num, 4) *
			     sizeof(struct mlx5_wqe_dseg);
	rdmw_wqe_size = sizeof(struct mlx5_rdma_write_wqe) +
			      sizeof(struct mlx5_wqe_dseg) *
			      (priv->max_segs_num <= 2 ? 2 : 2 +
			       RTE_ALIGN(priv->max_segs_num - 2, 4));
	priv->wqe_set_size = priv->umr_wqe_size + rdmw_wqe_size;
	priv->umr_wqe_stride = priv->umr_wqe_size / MLX5_SEND_WQE_BB;
	priv->max_rdmar_ds = rdmw_wqe_size / sizeof(struct mlx5_wqe_dseg);
	pthread_mutex_lock(&priv_list_lock);
	TAILQ_INSERT_TAIL(&mlx5_crypto_priv_list, priv, next);
	pthread_mutex_unlock(&priv_list_lock);

error: patch failed: drivers/crypto/mlx5/mlx5_crypto.c:907
Checking patch drivers/crypto/mlx5/mlx5_crypto.h...
Checking patch drivers/regex/mlx5/mlx5_regex_control.c...
Checking patch drivers/vdpa/mlx5/mlx5_vdpa_event.c...
Applying patch drivers/common/mlx5/mlx5_devx_cmds.c with 1 reject...
Rejected hunk #1.
Hunk #2 applied cleanly.
Applied patch drivers/common/mlx5/mlx5_devx_cmds.h cleanly.
Applied patch drivers/compress/mlx5/mlx5_compress.c cleanly.
Applying patch drivers/crypto/mlx5/mlx5_crypto.c with 1 reject...
Hunk #1 applied cleanly.
Hunk #2 applied cleanly.
Hunk #3 applied cleanly.
Hunk #4 applied cleanly.
Hunk #5 applied cleanly.
Hunk #6 applied cleanly.
Hunk #7 applied cleanly.
Rejected hunk #8.
Applied patch drivers/crypto/mlx5/mlx5_crypto.h cleanly.
Applied patch drivers/regex/mlx5/mlx5_regex_control.c cleanly.
Applied patch drivers/vdpa/mlx5/mlx5_vdpa_event.c cleanly.
diff a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c	(rejected hunks)
@@ -832,6 +832,7 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
 			MLX5_HCA_CAP_OPMOD_GET_CUR);
 	if (!hcattr)
 		return rc;
+	attr->max_wqe_sz_sq = MLX5_GET(cmd_hca_cap, hcattr, max_wqe_sz_sq);
 	attr->flow_counter_bulk_alloc_bitmap =
 			MLX5_GET(cmd_hca_cap, hcattr, flow_counter_bulk_alloc);
 	attr->flow_counters_dump = MLX5_GET(cmd_hca_cap, hcattr,
diff a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c	(rejected hunks)
@@ -907,20 +982,17 @@ mlx5_crypto_dev_probe(struct mlx5_common_device *cdev)
 		return -1;
 	}
 	priv->keytag = rte_cpu_to_be_64(devarg_prms.keytag);
-	priv->max_segs_num = devarg_prms.max_segs_num;
-	priv->umr_wqe_size = sizeof(struct mlx5_wqe_umr_bsf_seg) +
-			     sizeof(struct mlx5_wqe_cseg) +
-			     sizeof(struct mlx5_wqe_umr_cseg) +
-			     sizeof(struct mlx5_wqe_mkey_cseg) +
-			     RTE_ALIGN(priv->max_segs_num, 4) *
-			     sizeof(struct mlx5_wqe_dseg);
-	rdmw_wqe_size = sizeof(struct mlx5_rdma_write_wqe) +
-			      sizeof(struct mlx5_wqe_dseg) *
-			      (priv->max_segs_num <= 2 ? 2 : 2 +
-			       RTE_ALIGN(priv->max_segs_num - 2, 4));
-	priv->wqe_set_size = priv->umr_wqe_size + rdmw_wqe_size;
-	priv->umr_wqe_stride = priv->umr_wqe_size / MLX5_SEND_WQE_BB;
-	priv->max_rdmar_ds = rdmw_wqe_size / sizeof(struct mlx5_wqe_dseg);
+	ret = mlx5_crypto_configure_wqe_size(priv,
+		cdev->config.hca_attr.max_wqe_sz_sq, devarg_prms.max_segs_num);
+	if (ret) {
+		mlx5_crypto_uar_release(priv);
+		rte_cryptodev_pmd_destroy(priv->crypto_dev);
+		return -1;
+	}
+	DRV_LOG(INFO, "Max number of segments: %u.",
+		(unsigned int)RTE_MIN(
+			MLX5_CRYPTO_KLM_SEGS_NUM(priv->umr_wqe_size),
+			(uint16_t)(priv->max_rdmar_ds - 2)));
 	pthread_mutex_lock(&priv_list_lock);
 	TAILQ_INSERT_TAIL(&mlx5_crypto_priv_list, priv, next);
 	pthread_mutex_unlock(&priv_list_lock);
Checking patch drivers/common/mlx5/mlx5_common_devx.c...
Checking patch drivers/common/mlx5/mlx5_common_devx.h...
Checking patch drivers/compress/mlx5/mlx5_compress.c...
error: drivers/compress/mlx5/mlx5_compress.c: does not match index
Checking patch drivers/crypto/mlx5/mlx5_crypto.c...
error: drivers/crypto/mlx5/mlx5_crypto.c: does not match index
Checking patch drivers/regex/mlx5/mlx5_regex_control.c...
error: drivers/regex/mlx5/mlx5_regex_control.c: does not match index
Checking patch drivers/vdpa/mlx5/mlx5_vdpa_event.c...
error: drivers/vdpa/mlx5/mlx5_vdpa_event.c: does not match index
Applied patch drivers/common/mlx5/mlx5_common_devx.c cleanly.
Applied patch drivers/common/mlx5/mlx5_common_devx.h cleanly.

https://lab.dpdk.org/results/dashboard/patchsets/20007/

UNH-IOL DPDK Community Lab