Re: DPDK performances surprise

[Antonio Di Bacco <a.dibacco.ks@gmail.com>]

[-- Attachment #1: Type: text/plain, Size: 1468 bytes --]

The packets are 8000B long.

On Wed, May 18, 2022 at 7:04 PM Stephen Hemminger <
stephen@networkplumber.org> wrote:

> On Wed, 18 May 2022 16:53:04 +0000
> "Sanford, Robert" <rsanford@akamai.com> wrote:
>
> > My guess is that most of the packet data has a short life in the L3
> cache (before being overwritten by newer packets), but is never flushed to
> memory.
> >
> > From: Antonio Di Bacco <a.dibacco.ks@gmail.com>
> > Date: Wednesday, May 18, 2022 at 12:40 PM
> > To: "users@dpdk.org" <users@dpdk.org>
> > Subject: DPDK performances surprise
> >
> > I recently read a performance test where l2fwd was able to receive
> packets (8000B) from a 100 Gbps card, swap the L2 addresses and send them
> back to the same port to be received by an ethernet analyzer. The
> throughput achieved was close to 100 Gbps on a XEON machine (Intel(R)
> Xeon(R) Platinum 8176 CPU @ 2.10GHz) . This is the same processor I have
> and I know that, if I try to write around 8000B to the attached DDR4
> (2666MT/s) on an allocated 1GB hugepage, I get a maximum throughput of
> around 20GB/s.
> >
> > Now, a 100 Gbps can generate a flow of around 12 GB/s, these packets
> have to be written to the DDR and then read back to swap L2 addresses and
> this leads to a cumulative bandwidth on the DDR that is around 2x12 GB/s
> and is more than the 20GB/s of available bandwidth on the DDR4.
> >
> > How can this be possible ?
>
> Likely cache effects from DDIO. What is your packet size.
>

[-- Attachment #2: Type: text/html, Size: 2079 bytes --]