From: Itamar Gozlan <igozlan@nvidia.com>
To: <valex@nvidia.com>, <viacheslavo@nvidia.com>,
<thomas@monjalon.net>, <suanmingm@nvidia.com>,
Matan Azrad <matan@nvidia.com>, Ori Kam <orika@nvidia.com>,
Mark Bloch <mbloch@nvidia.com>
Cc: <dev@dpdk.org>, Erez Shitrit <erezsh@nvidia.com>
Subject: [PATCH 5/5] net/mlx5/hws: fix field copy bind
Date: Mon, 18 Sep 2023 15:07:05 +0300 [thread overview]
Message-ID: <20230918120705.265025-5-igozlan@nvidia.com> (raw)
In-Reply-To: <20230918120705.265025-1-igozlan@nvidia.com>
From: Alex Vesker <valex@nvidia.com>
Fix an issue with binding for unused DW selectors,
these selectors are set to zero but zero is also
a valid value used for DMAC_47_16.
Fixes: c55c2bf35333 ("net/mlx5/hws: add definer layer")
Reviewed-by: Erez Shitrit <erezsh@nvidia.com>
Signed-off-by: Alex Vesker <valex@nvidia.com>
---
drivers/net/mlx5/hws/mlx5dr_definer.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/net/mlx5/hws/mlx5dr_definer.c b/drivers/net/mlx5/hws/mlx5dr_definer.c
index 2f6f91892b..70e46736ec 100644
--- a/drivers/net/mlx5/hws/mlx5dr_definer.c
+++ b/drivers/net/mlx5/hws/mlx5dr_definer.c
@@ -2375,11 +2375,15 @@ mlx5dr_definer_find_byte_in_tag(struct mlx5dr_definer *definer,
uint32_t *tag_byte_off)
{
uint8_t byte_offset;
- int i;
+ int i, dw_to_scan;
+
+ /* Avoid accessing unused DW selectors */
+ dw_to_scan = mlx5dr_definer_is_jumbo(definer) ?
+ DW_SELECTORS : DW_SELECTORS_MATCH;
/* Add offset since each DW covers multiple BYTEs */
byte_offset = hl_byte_off % DW_SIZE;
- for (i = 0; i < DW_SELECTORS; i++) {
+ for (i = 0; i < dw_to_scan; i++) {
if (definer->dw_selector[i] == hl_byte_off / DW_SIZE) {
*tag_byte_off = byte_offset + DW_SIZE * (DW_SELECTORS - i - 1);
return 0;
--
2.38.1
next prev parent reply other threads:[~2023-09-18 12:07 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-18 12:07 [PATCH 1/5] net/mlx5/hws: add support for matching on bth_a bit Itamar Gozlan
2023-09-18 12:07 ` [PATCH 2/5] net/mlx5/hws: support additional 4 C registers Itamar Gozlan
2023-09-18 12:07 ` [PATCH 3/5] net/mlx5/hws: supporting add_field action Itamar Gozlan
2023-09-18 12:07 ` [PATCH 4/5] net/mlx5/hws: supporting default miss table in HWS Itamar Gozlan
2023-10-29 16:02 ` Ori Kam
2023-09-18 12:07 ` Itamar Gozlan [this message]
2023-10-09 7:57 ` [PATCH 1/5] net/mlx5/hws: add support for matching on bth_a bit Matan Azrad
2023-10-10 9:33 ` Raslan Darawsheh
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