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From: Guinan Sun <guinanx.sun@intel.com>
To: dev@dpdk.org
Cc: Beilei Xing <beilei.xing@intel.com>,
	Qi Zhang <qi.z.zhang@intel.com>,
	Qiming Yang <qiming.yang@intel.com>,
	Guinan Sun <guinanx.sun@intel.com>,
	Jesse Brandeburg <jesse.brandeburg@intel.com>
Subject: [dpdk-dev] [PATCH 3/9] net/i40e/base: enable pipe monitor thresholds
Date: Sat,  5 Sep 2020 02:49:32 +0000	[thread overview]
Message-ID: <20200905024938.14609-4-guinanx.sun@intel.com> (raw)
In-Reply-To: <20200905024938.14609-1-guinanx.sun@intel.com>

Enable several registers and defines for software controlled
DCB, particularly around the receive pipe monitor configuration
which is necessary to help ports achieve the right throughput
under load in several different configurations.

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/i40e/base/i40e_register.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h
index ee4f333f9..ee443e9c9 100644
--- a/drivers/net/i40e/base/i40e_register.h
+++ b/drivers/net/i40e/base/i40e_register.h
@@ -203,6 +203,9 @@
 #define I40E_VFCM_PE_ERRINFO1_RLU_ERROR_CNT_MASK  I40E_MASK(0xFF, I40E_VFCM_PE_ERRINFO1_RLU_ERROR_CNT_SHIFT)
 #define I40E_VFCM_PE_ERRINFO1_RLS_ERROR_CNT_SHIFT 24
 #define I40E_VFCM_PE_ERRINFO1_RLS_ERROR_CNT_MASK  I40E_MASK(0xFF, I40E_VFCM_PE_ERRINFO1_RLS_ERROR_CNT_SHIFT)
+#define I40E_PRT_SWR_PM_THR                 0x0026CD00 /* Reset: CORER */
+#define I40E_PRT_SWR_PM_THR_THRESHOLD_SHIFT 0
+#define I40E_PRT_SWR_PM_THR_THRESHOLD_MASK  I40E_MASK(0xFF, I40E_PRT_SWR_PM_THR_THRESHOLD_SHIFT)
 #define I40E_GLDCB_GENC              0x00083044 /* Reset: CORER */
 #define I40E_GLDCB_GENC_PCIRTT_SHIFT 0
 #define I40E_GLDCB_GENC_PCIRTT_MASK  I40E_MASK(0xFFFF, I40E_GLDCB_GENC_PCIRTT_SHIFT)
-- 
2.17.1


  parent reply	other threads:[~2020-09-05  3:00 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-05  2:49 [dpdk-dev] [PATCH 0/9] update i40e base code Guinan Sun
2020-09-05  2:49 ` [dpdk-dev] [PATCH 1/9] net/i40e/base: add VLAN field for input set Guinan Sun
2020-09-07 11:09   ` Ferruh Yigit
2020-09-05  2:49 ` [dpdk-dev] [PATCH 2/9] net/i40e/base: update FW API version Guinan Sun
2020-09-07 11:10   ` Ferruh Yigit
2020-09-05  2:49 ` Guinan Sun [this message]
2020-09-07 11:11   ` [dpdk-dev] [PATCH 3/9] net/i40e/base: enable pipe monitor thresholds Ferruh Yigit
2020-09-05  2:49 ` [dpdk-dev] [PATCH 4/9] net/i40e/base: fix missing function header arguments Guinan Sun
2020-09-08  8:03   ` Yang, Qiming
2020-09-05  2:49 ` [dpdk-dev] [PATCH 5/9] net/i40e/base: add support for minimum rollback revision Guinan Sun
2020-09-05  2:49 ` [dpdk-dev] [PATCH 6/9] net/i40e/base: fix Rx only for unicast promisc on VLAN Guinan Sun
2020-09-05  2:49 ` [dpdk-dev] [PATCH 7/9] net/i40e/base: add EEE LPI status check for X722 adapters Guinan Sun
2020-09-05  2:49 ` [dpdk-dev] [PATCH 8/9] net/i40e/base: fix PHY config param when enabling EEE Guinan Sun
2020-09-05  2:49 ` [dpdk-dev] [PATCH 9/9] net/i40e/base: update version Guinan Sun
2020-09-07  6:27 ` [dpdk-dev] [PATCH 0/9] update i40e base code Zhang, Qi Z
2020-09-12  3:00 ` [dpdk-dev] [PATCH v2 0/7] " Guinan Sun
2020-09-12  3:00   ` [dpdk-dev] [PATCH v2 1/7] net/i40e/base: update FW API version Guinan Sun
2020-09-12  3:00   ` [dpdk-dev] [PATCH v2 2/7] net/i40e/base: fix missing function header arguments Guinan Sun
2020-09-12  3:00   ` [dpdk-dev] [PATCH v2 3/7] net/i40e/base: add support for minimum rollback revision Guinan Sun
2020-09-12  3:00   ` [dpdk-dev] [PATCH v2 4/7] net/i40e/base: fix Rx only for unicast promisc on VLAN Guinan Sun
2020-09-12  3:00   ` [dpdk-dev] [PATCH v2 5/7] net/i40e/base: add EEE LPI status check for X722 adapters Guinan Sun
2020-09-12  3:00   ` [dpdk-dev] [PATCH v2 6/7] net/i40e/base: fix PHY config param when enabling EEE Guinan Sun
2020-09-12  3:00   ` [dpdk-dev] [PATCH v2 7/7] net/i40e/base: update version Guinan Sun
2020-09-13  1:56   ` [dpdk-dev] [PATCH v2 0/7] update i40e base code Zhang, Qi Z

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