* [PATCH] common/cnxk: ensure ROC cache alignment of NPA stack size
@ 2021-11-30 5:38 Ashwin Sekhar T K
2022-01-06 12:25 ` Jerin Jacob
0 siblings, 1 reply; 2+ messages in thread
From: Ashwin Sekhar T K @ 2021-11-30 5:38 UTC (permalink / raw)
To: dev
Cc: ndabilpuram, jerinj, skori, skoteshwar, pbhagavatula,
kirankumark, psatheesh, asekhar, anoobj, gakhil
When PLT_CACHE_LINE_SIZE is set to 64B, the memzone size reserved for
NPA stack could be a multiple of 64B. In such a case, when NDC SYNC
is initiated for the NPA LF, it could go and corrupt an additional
64B bytes as NDC flushes in multiples of ROC cache line size (128B).
So ensure that NPA stack size requested is a multiple of 128B.
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
---
drivers/common/cnxk/roc_npa.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c
index efcb7582eb..75fc22442f 100644
--- a/drivers/common/cnxk/roc_npa.c
+++ b/drivers/common/cnxk/roc_npa.c
@@ -205,6 +205,7 @@ static inline const struct plt_memzone *
npa_stack_dma_alloc(struct npa_lf *lf, char *name, int pool_id, size_t size)
{
const char *mz_name = npa_stack_memzone_name(lf, pool_id, name);
+ size = PLT_ALIGN_CEIL(size, ROC_ALIGN);
return plt_memzone_reserve_aligned(mz_name, size, 0, ROC_ALIGN);
}
--
2.32.0
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] common/cnxk: ensure ROC cache alignment of NPA stack size
2021-11-30 5:38 [PATCH] common/cnxk: ensure ROC cache alignment of NPA stack size Ashwin Sekhar T K
@ 2022-01-06 12:25 ` Jerin Jacob
0 siblings, 0 replies; 2+ messages in thread
From: Jerin Jacob @ 2022-01-06 12:25 UTC (permalink / raw)
To: Ashwin Sekhar T K, Andrew Rybchenko, Ferruh Yigit
Cc: dpdk-dev, Nithin Dabilpuram, Jerin Jacob, Sunil Kumar Kori,
Satha Koteswara Rao Kottidi, Pavan Nikhilesh, Kiran Kumar K,
Satheesh Paul, Anoob Joseph, Akhil Goyal
On Tue, Nov 30, 2021 at 11:11 AM Ashwin Sekhar T K <asekhar@marvell.com> wrote:
>
> When PLT_CACHE_LINE_SIZE is set to 64B, the memzone size reserved for
> NPA stack could be a multiple of 64B. In such a case, when NDC SYNC
> is initiated for the NPA LF, it could go and corrupt an additional
> 64B bytes as NDC flushes in multiples of ROC cache line size (128B).
>
> So ensure that NPA stack size requested is a multiple of 128B.
>
> Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Applied to dpdk-next-net-mrvl/for-next-net. Thanks
> ---
> drivers/common/cnxk/roc_npa.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/common/cnxk/roc_npa.c b/drivers/common/cnxk/roc_npa.c
> index efcb7582eb..75fc22442f 100644
> --- a/drivers/common/cnxk/roc_npa.c
> +++ b/drivers/common/cnxk/roc_npa.c
> @@ -205,6 +205,7 @@ static inline const struct plt_memzone *
> npa_stack_dma_alloc(struct npa_lf *lf, char *name, int pool_id, size_t size)
> {
> const char *mz_name = npa_stack_memzone_name(lf, pool_id, name);
> + size = PLT_ALIGN_CEIL(size, ROC_ALIGN);
>
> return plt_memzone_reserve_aligned(mz_name, size, 0, ROC_ALIGN);
> }
> --
> 2.32.0
>
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