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From: Qi Zhang <qi.z.zhang@intel.com>
To: qiming.yang@intel.com
Cc: dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,
	stable@dpdk.org, Roman Storozhenko <roman.storozhenko@intel.com>
Subject: [PATCH 34/70] net/ice/base: fix null pointer dereference during
Date: Mon, 15 Aug 2022 03:12:30 -0400	[thread overview]
Message-ID: <20220815071306.2910599-35-qi.z.zhang@intel.com> (raw)
In-Reply-To: <20220815071306.2910599-1-qi.z.zhang@intel.com>

Sometimes, during the shutdown process, an PCIe unrecoverable error
occurs. This leads to the following NULL pointer dereference error
while clearing hardware tables:

The patch fixes this bug by checking every table pointer against
NULL before reference it, as some of them probably have been cleared
in advance.

Fixes: 969890d505b1 ("net/ice/base: enable clearing of HW tables")
Cc: stable@dpdk.org

Signed-off-by: Roman Storozhenko <roman.storozhenko@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c | 332 +++++++++++++++------------
 1 file changed, 179 insertions(+), 153 deletions(-)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index aea0d97b9d..2d95ce4d74 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2144,6 +2144,129 @@ void ice_init_flow_profs(struct ice_hw *hw, u8 blk_idx)
 	INIT_LIST_HEAD(&hw->fl_profs[blk_idx]);
 }
 
+/**
+ * ice_init_hw_tbls - init hardware table memory
+ * @hw: pointer to the hardware structure
+ */
+enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
+{
+	u8 i;
+
+	ice_init_lock(&hw->rss_locks);
+	INIT_LIST_HEAD(&hw->rss_list_head);
+	if (!hw->dcf_enabled)
+		ice_init_all_prof_masks(hw);
+	for (i = 0; i < ICE_BLK_COUNT; i++) {
+		struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;
+		struct ice_prof_tcam *prof = &hw->blk[i].prof;
+		struct ice_xlt1 *xlt1 = &hw->blk[i].xlt1;
+		struct ice_xlt2 *xlt2 = &hw->blk[i].xlt2;
+		struct ice_es *es = &hw->blk[i].es;
+		u16 j;
+
+		if (hw->blk[i].is_list_init)
+			continue;
+
+		ice_init_flow_profs(hw, i);
+		ice_init_lock(&es->prof_map_lock);
+		INIT_LIST_HEAD(&es->prof_map);
+		hw->blk[i].is_list_init = true;
+
+		hw->blk[i].overwrite = blk_sizes[i].overwrite;
+		es->reverse = blk_sizes[i].reverse;
+
+		xlt1->sid = ice_blk_sids[i][ICE_SID_XLT1_OFF];
+		xlt1->count = blk_sizes[i].xlt1;
+
+		xlt1->ptypes = (struct ice_ptg_ptype *)
+			ice_calloc(hw, xlt1->count, sizeof(*xlt1->ptypes));
+
+		if (!xlt1->ptypes)
+			goto err;
+
+		xlt1->ptg_tbl = (struct ice_ptg_entry *)
+			ice_calloc(hw, ICE_MAX_PTGS, sizeof(*xlt1->ptg_tbl));
+
+		if (!xlt1->ptg_tbl)
+			goto err;
+
+		xlt1->t = (u8 *)ice_calloc(hw, xlt1->count, sizeof(*xlt1->t));
+		if (!xlt1->t)
+			goto err;
+
+		xlt2->sid = ice_blk_sids[i][ICE_SID_XLT2_OFF];
+		xlt2->count = blk_sizes[i].xlt2;
+
+		xlt2->vsis = (struct ice_vsig_vsi *)
+			ice_calloc(hw, xlt2->count, sizeof(*xlt2->vsis));
+
+		if (!xlt2->vsis)
+			goto err;
+
+		xlt2->vsig_tbl = (struct ice_vsig_entry *)
+			ice_calloc(hw, xlt2->count, sizeof(*xlt2->vsig_tbl));
+		if (!xlt2->vsig_tbl)
+			goto err;
+
+		for (j = 0; j < xlt2->count; j++)
+			INIT_LIST_HEAD(&xlt2->vsig_tbl[j].prop_lst);
+
+		xlt2->t = (u16 *)ice_calloc(hw, xlt2->count, sizeof(*xlt2->t));
+		if (!xlt2->t)
+			goto err;
+
+		prof->sid = ice_blk_sids[i][ICE_SID_PR_OFF];
+		prof->count = blk_sizes[i].prof_tcam;
+		prof->max_prof_id = blk_sizes[i].prof_id;
+		prof->cdid_bits = blk_sizes[i].prof_cdid_bits;
+		prof->t = (struct ice_prof_tcam_entry *)
+			ice_calloc(hw, prof->count, sizeof(*prof->t));
+
+		if (!prof->t)
+			goto err;
+
+		prof_redir->sid = ice_blk_sids[i][ICE_SID_PR_REDIR_OFF];
+		prof_redir->count = blk_sizes[i].prof_redir;
+		prof_redir->t = (u8 *)ice_calloc(hw, prof_redir->count,
+						 sizeof(*prof_redir->t));
+
+		if (!prof_redir->t)
+			goto err;
+
+		es->sid = ice_blk_sids[i][ICE_SID_ES_OFF];
+		es->count = blk_sizes[i].es;
+		es->fvw = blk_sizes[i].fvw;
+		es->t = (struct ice_fv_word *)
+			ice_calloc(hw, (u32)(es->count * es->fvw),
+				   sizeof(*es->t));
+		if (!es->t)
+			goto err;
+
+		es->ref_count = (u16 *)
+			ice_calloc(hw, es->count, sizeof(*es->ref_count));
+
+		if (!es->ref_count)
+			goto err;
+
+		es->written = (u8 *)
+			ice_calloc(hw, es->count, sizeof(*es->written));
+
+		if (!es->written)
+			goto err;
+
+		es->mask_ena = (u32 *)
+			ice_calloc(hw, es->count, sizeof(*es->mask_ena));
+
+		if (!es->mask_ena)
+			goto err;
+	}
+	return ICE_SUCCESS;
+
+err:
+	ice_free_hw_tbls(hw);
+	return ICE_ERR_NO_MEMORY;
+}
+
 /**
  * ice_fill_blk_tbls - Read package context for tables
  * @hw: pointer to the hardware structure
@@ -2308,162 +2431,65 @@ void ice_clear_hw_tbls(struct ice_hw *hw)
 
 		ice_free_vsig_tbl(hw, (enum ice_block)i);
 
-		ice_memset(xlt1->ptypes, 0, xlt1->count * sizeof(*xlt1->ptypes),
-			   ICE_NONDMA_MEM);
-		ice_memset(xlt1->ptg_tbl, 0,
-			   ICE_MAX_PTGS * sizeof(*xlt1->ptg_tbl),
-			   ICE_NONDMA_MEM);
-		ice_memset(xlt1->t, 0, xlt1->count * sizeof(*xlt1->t),
-			   ICE_NONDMA_MEM);
-
-		ice_memset(xlt2->vsis, 0, xlt2->count * sizeof(*xlt2->vsis),
-			   ICE_NONDMA_MEM);
-		ice_memset(xlt2->vsig_tbl, 0,
-			   xlt2->count * sizeof(*xlt2->vsig_tbl),
-			   ICE_NONDMA_MEM);
-		ice_memset(xlt2->t, 0, xlt2->count * sizeof(*xlt2->t),
-			   ICE_NONDMA_MEM);
-
-		ice_memset(prof->t, 0, prof->count * sizeof(*prof->t),
-			   ICE_NONDMA_MEM);
-		ice_memset(prof_redir->t, 0,
-			   prof_redir->count * sizeof(*prof_redir->t),
-			   ICE_NONDMA_MEM);
-
-		ice_memset(es->t, 0, es->count * sizeof(*es->t) * es->fvw,
-			   ICE_NONDMA_MEM);
-		ice_memset(es->ref_count, 0, es->count * sizeof(*es->ref_count),
-			   ICE_NONDMA_MEM);
-		ice_memset(es->written, 0, es->count * sizeof(*es->written),
-			   ICE_NONDMA_MEM);
-		ice_memset(es->mask_ena, 0, es->count * sizeof(*es->mask_ena),
-			   ICE_NONDMA_MEM);
+		if (xlt1->ptypes)
+			ice_memset(xlt1->ptypes, 0,
+				   xlt1->count * sizeof(*xlt1->ptypes),
+				   ICE_NONDMA_MEM);
+
+		if (xlt1->ptg_tbl)
+			ice_memset(xlt1->ptg_tbl, 0,
+				   ICE_MAX_PTGS * sizeof(*xlt1->ptg_tbl),
+				   ICE_NONDMA_MEM);
+
+		if (xlt1->t)
+			ice_memset(xlt1->t, 0, xlt1->count * sizeof(*xlt1->t),
+				   ICE_NONDMA_MEM);
+
+		if (xlt2->vsis)
+			ice_memset(xlt2->vsis, 0,
+				   xlt2->count * sizeof(*xlt2->vsis),
+				   ICE_NONDMA_MEM);
+
+		if (xlt2->vsig_tbl)
+			ice_memset(xlt2->vsig_tbl, 0,
+				   xlt2->count * sizeof(*xlt2->vsig_tbl),
+				   ICE_NONDMA_MEM);
+
+		if (xlt2->t)
+			ice_memset(xlt2->t, 0, xlt2->count * sizeof(*xlt2->t),
+				   ICE_NONDMA_MEM);
+
+		if (prof->t)
+			ice_memset(prof->t, 0, prof->count * sizeof(*prof->t),
+				   ICE_NONDMA_MEM);
+
+		if (prof_redir->t)
+			ice_memset(prof_redir->t, 0,
+				   prof_redir->count * sizeof(*prof_redir->t),
+				   ICE_NONDMA_MEM);
+
+		if (es->t)
+			ice_memset(es->t, 0,
+				   es->count * sizeof(*es->t) * es->fvw,
+				   ICE_NONDMA_MEM);
+
+		if (es->ref_count)
+			ice_memset(es->ref_count, 0,
+				   es->count * sizeof(*es->ref_count),
+				   ICE_NONDMA_MEM);
+
+		if (es->written)
+			ice_memset(es->written, 0,
+				   es->count * sizeof(*es->written),
+				   ICE_NONDMA_MEM);
+
+		if (es->mask_ena)
+			ice_memset(es->mask_ena, 0,
+				   es->count * sizeof(*es->mask_ena),
+				   ICE_NONDMA_MEM);
 	}
 }
 
-/**
- * ice_init_hw_tbls - init hardware table memory
- * @hw: pointer to the hardware structure
- */
-enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
-{
-	u8 i;
-
-	ice_init_lock(&hw->rss_locks);
-	INIT_LIST_HEAD(&hw->rss_list_head);
-	if (!hw->dcf_enabled)
-		ice_init_all_prof_masks(hw);
-	for (i = 0; i < ICE_BLK_COUNT; i++) {
-		struct ice_prof_redir *prof_redir = &hw->blk[i].prof_redir;
-		struct ice_prof_tcam *prof = &hw->blk[i].prof;
-		struct ice_xlt1 *xlt1 = &hw->blk[i].xlt1;
-		struct ice_xlt2 *xlt2 = &hw->blk[i].xlt2;
-		struct ice_es *es = &hw->blk[i].es;
-		u16 j;
-
-		if (hw->blk[i].is_list_init)
-			continue;
-
-		ice_init_flow_profs(hw, i);
-		ice_init_lock(&es->prof_map_lock);
-		INIT_LIST_HEAD(&es->prof_map);
-		hw->blk[i].is_list_init = true;
-
-		hw->blk[i].overwrite = blk_sizes[i].overwrite;
-		es->reverse = blk_sizes[i].reverse;
-
-		xlt1->sid = ice_blk_sids[i][ICE_SID_XLT1_OFF];
-		xlt1->count = blk_sizes[i].xlt1;
-
-		xlt1->ptypes = (struct ice_ptg_ptype *)
-			ice_calloc(hw, xlt1->count, sizeof(*xlt1->ptypes));
-
-		if (!xlt1->ptypes)
-			goto err;
-
-		xlt1->ptg_tbl = (struct ice_ptg_entry *)
-			ice_calloc(hw, ICE_MAX_PTGS, sizeof(*xlt1->ptg_tbl));
-
-		if (!xlt1->ptg_tbl)
-			goto err;
-
-		xlt1->t = (u8 *)ice_calloc(hw, xlt1->count, sizeof(*xlt1->t));
-		if (!xlt1->t)
-			goto err;
-
-		xlt2->sid = ice_blk_sids[i][ICE_SID_XLT2_OFF];
-		xlt2->count = blk_sizes[i].xlt2;
-
-		xlt2->vsis = (struct ice_vsig_vsi *)
-			ice_calloc(hw, xlt2->count, sizeof(*xlt2->vsis));
-
-		if (!xlt2->vsis)
-			goto err;
-
-		xlt2->vsig_tbl = (struct ice_vsig_entry *)
-			ice_calloc(hw, xlt2->count, sizeof(*xlt2->vsig_tbl));
-		if (!xlt2->vsig_tbl)
-			goto err;
-
-		for (j = 0; j < xlt2->count; j++)
-			INIT_LIST_HEAD(&xlt2->vsig_tbl[j].prop_lst);
-
-		xlt2->t = (u16 *)ice_calloc(hw, xlt2->count, sizeof(*xlt2->t));
-		if (!xlt2->t)
-			goto err;
-
-		prof->sid = ice_blk_sids[i][ICE_SID_PR_OFF];
-		prof->count = blk_sizes[i].prof_tcam;
-		prof->max_prof_id = blk_sizes[i].prof_id;
-		prof->cdid_bits = blk_sizes[i].prof_cdid_bits;
-		prof->t = (struct ice_prof_tcam_entry *)
-			ice_calloc(hw, prof->count, sizeof(*prof->t));
-
-		if (!prof->t)
-			goto err;
-
-		prof_redir->sid = ice_blk_sids[i][ICE_SID_PR_REDIR_OFF];
-		prof_redir->count = blk_sizes[i].prof_redir;
-		prof_redir->t = (u8 *)ice_calloc(hw, prof_redir->count,
-						 sizeof(*prof_redir->t));
-
-		if (!prof_redir->t)
-			goto err;
-
-		es->sid = ice_blk_sids[i][ICE_SID_ES_OFF];
-		es->count = blk_sizes[i].es;
-		es->fvw = blk_sizes[i].fvw;
-		es->t = (struct ice_fv_word *)
-			ice_calloc(hw, (u32)(es->count * es->fvw),
-				   sizeof(*es->t));
-		if (!es->t)
-			goto err;
-
-		es->ref_count = (u16 *)
-			ice_calloc(hw, es->count, sizeof(*es->ref_count));
-
-		if (!es->ref_count)
-			goto err;
-
-		es->written = (u8 *)
-			ice_calloc(hw, es->count, sizeof(*es->written));
-
-		if (!es->written)
-			goto err;
-
-		es->mask_ena = (u32 *)
-			ice_calloc(hw, es->count, sizeof(*es->mask_ena));
-
-		if (!es->mask_ena)
-			goto err;
-	}
-	return ICE_SUCCESS;
-
-err:
-	ice_free_hw_tbls(hw);
-	return ICE_ERR_NO_MEMORY;
-}
-
 /**
  * ice_prof_gen_key - generate profile ID key
  * @hw: pointer to the HW struct
-- 
2.31.1


  parent reply	other threads:[~2022-08-14 23:06 UTC|newest]

Thread overview: 149+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-15  7:11 [PATCH 00/70] ice base code update Qi Zhang
2022-08-15  7:11 ` [PATCH 01/70] net/ice/base: add netlist helper functions Qi Zhang
2022-08-15  7:11 ` [PATCH 02/70] net/ice/base: get NVM CSS Header length from the CSS Header Qi Zhang
2022-08-15  7:11 ` [PATCH 03/70] net/ice/base: combine functions for VSI promisc Qi Zhang
2022-08-15  7:12 ` [PATCH 04/70] net/ice/base: make function names more generic Qi Zhang
2022-08-15  7:12 ` [PATCH 05/70] net/ice/base: fix incorrect division during E822 PTP init Qi Zhang
2022-08-15  7:12 ` [PATCH 06/70] net/ice/base: added auto drop blocking packets functionality Qi Zhang
2022-08-15  7:12 ` [PATCH 07/70] net/ice/base: fix 100M speed Qi Zhang
2022-08-15  7:12 ` [PATCH 08/70] net/ice/base: support VXLAN and GRE for RSS Qi Zhang
2022-08-15  7:12 ` [PATCH 09/70] net/ice/base: fix DSCP PFC TLV creation Qi Zhang
2022-08-15  7:12 ` [PATCH 10/70] net/ice/base: complete the health status codes Qi Zhang
2022-08-15  7:12 ` [PATCH 11/70] net/ice/base: explicitly name E822 HW-dependent functions Qi Zhang
2022-08-15  7:12 ` [PATCH 12/70] net/ice/base: move code block Qi Zhang
2022-08-15  7:12 ` [PATCH 13/70] net/ice/base: add PHY 56G destination address Qi Zhang
2022-08-15  7:12 ` [PATCH 14/70] net/ice/base: add 56G PHY register definitions Qi Zhang
2022-08-15  7:12 ` [PATCH 15/70] net/ice/base: implement 56G PHY access functions Qi Zhang
2022-08-15  7:12 ` [PATCH 16/70] net/ice/base: implement 56G PHY setup functions Qi Zhang
2022-08-15  7:12 ` [PATCH 17/70] net/ice/base: work around missing PTP caps Qi Zhang
2022-08-15  7:12 ` [PATCH 18/70] net/ice/base: enable calling of ETH56G functions Qi Zhang
2022-08-15  7:12 ` [PATCH 19/70] net/ice/base: fix PHY type 10G SFI C2C to media type mapping Qi Zhang
2022-08-15  7:12 ` [PATCH 20/70] net/ice/base: refactor DDP code Qi Zhang
2022-08-15  7:12 ` [PATCH 21/70] net/ice/base: add E822 generic PCI device ID Qi Zhang
2022-08-15  7:12 ` [PATCH 22/70] net/ice/base: support double VLAN rules Qi Zhang
2022-08-15  7:12 ` [PATCH 23/70] net/ice/base: report NVM version numbers on mismatch Qi Zhang
2022-08-15  7:12 ` [PATCH 24/70] net/ice/base: create duplicate detection for ACL rules Qi Zhang
2022-08-15  7:12 ` [PATCH 25/70] net/ice/base: fix incorrect function descriptions for parser Qi Zhang
2022-08-15  7:12 ` [PATCH 26/70] net/ice/base: fix endian format Qi Zhang
2022-08-15  7:12 ` [PATCH 27/70] net/ice/base: convert IO expander handle to u16 Qi Zhang
2022-08-15  7:12 ` [PATCH 28/70] net/ice/base: convert array of u8 to bitmap Qi Zhang
2022-08-15  7:12 ` [PATCH 29/70] net/ice/base: fix array overflow in add switch recipe code Qi Zhang
2022-08-15  7:12 ` [PATCH 30/70] net/ice/base: fix bit finding range over ptype bitmap Qi Zhang
2022-08-15  7:12 ` [PATCH 31/70] net/ice/base: move function to internal Qi Zhang
2022-08-15  7:12 ` [PATCH 32/70] net/ice/base: change PHY/QUAD/ports definitions Qi Zhang
2022-08-15  7:12 ` [PATCH 33/70] net/ice/base: add AQ command to config node attribute Qi Zhang
2022-08-15  7:12 ` Qi Zhang [this message]
2022-08-15  7:12 ` [PATCH 35/70] net/ice/base: refine default VSI config Qi Zhang
2022-08-15  7:12 ` [PATCH 36/70] net/ice/base: ice-shared: fix add mac rule Qi Zhang
2022-08-15  7:12 ` [PATCH 37/70] net/ice/base: support Tx topo config Qi Zhang
2022-08-15  7:12 ` [PATCH 38/70] net/ice/base: adjust the VSI/Aggregator layers Qi Zhang
2022-08-15  7:12 ` [PATCH 39/70] net/ice/base: add data typecasting to match sizes Qi Zhang
2022-08-15  7:12 ` [PATCH 40/70] net/ice/base: add helper function to check if device is E823 Qi Zhang
2022-08-15  7:12 ` [PATCH 41/70] net/ice/base: add low latency Tx timestamp read Qi Zhang
2022-08-15  7:12 ` [PATCH 42/70] net/ice/base: fix double VLAN error in promisc mode Qi Zhang
2022-08-15  7:12 ` [PATCH 43/70] net/ice/base: move functions Qi Zhang
2022-08-15  7:12 ` [PATCH 44/70] net/ice/base: complete support for Tx balancing Qi Zhang
2022-08-15  7:12 ` [PATCH 45/70] net/ice/base: update definitions for AQ internal debug dump Qi Zhang
2022-08-15  7:12 ` [PATCH 46/70] net/ice/base: update macros of L2TPv2 ptype value Qi Zhang
2022-08-15  7:12 ` [PATCH 47/70] net/ice/base: refine header file include Qi Zhang
2022-08-15  7:12 ` [PATCH 48/70] net/ice/base: ignore already exist error Qi Zhang
2022-08-15  7:12 ` [PATCH 49/70] net/ice/base: clean up with no lookups Qi Zhang
2022-08-15  7:12 ` [PATCH 50/70] net/ice/base: add support for Auto FEC with FEC disabled Qi Zhang
2022-08-15  7:12 ` [PATCH 51/70] net/ice/base: update PHY type high max index Qi Zhang
2022-08-15  7:12 ` [PATCH 52/70] net/ice/base: clean the main timer command register Qi Zhang
2022-08-15  7:12 ` [PATCH 53/70] net/ice/base: add support for custom WPC and LGB NICs Qi Zhang
2022-08-15  7:12 ` [PATCH 54/70] net/ice/base: add generic MAC with 3K signature segment Qi Zhang
2022-08-15  7:12 ` [PATCH 55/70] net/ice/base: enable RSS support for L2TPv2 session ID Qi Zhang
2022-08-15  7:12 ` [PATCH 56/70] net/ice/base: enable FDIR support for L2TPv2 Qi Zhang
2022-08-15  7:12 ` [PATCH 57/70] net/ice/base: add GRE Tap tunnel type Qi Zhang
2022-08-15  7:12 ` [PATCH 58/70] net/ice/base: fix wrong inputset of GTPoGRE packet Qi Zhang
2022-08-15  7:12 ` [PATCH 59/70] net/ice/base: add unload flag for control queue shutdown Qi Zhang
2022-08-15  7:12 ` [PATCH 60/70] net/ice/base: update comment for overloaded GCO bit Qi Zhang
2022-08-15  7:12 ` [PATCH 61/70] net/ice/base: complete pending LLDP MIB Qi Zhang
2022-08-15  7:12 ` [PATCH 62/70] net/ice/base: add function to parse DCBX config Qi Zhang
2022-08-15  7:12 ` [PATCH 63/70] net/ice/base: handle default VSI lookup type Qi Zhang
2022-08-15  7:13 ` [PATCH 64/70] net/ice/base: convert 1588 structs to use bitfields Qi Zhang
2022-08-15  7:13 ` [PATCH 65/70] net/ice/base: remove unnecessary fields Qi Zhang
2022-08-15  7:13 ` [PATCH 66/70] net/ice/base: add GTP tunnel Qi Zhang
2022-08-15  7:13 ` [PATCH 67/70] net/ice/base: check for PTP HW lock more frequently Qi Zhang
2022-08-15  7:13 ` [PATCH 68/70] net/ice/base: expose API for move sched element Qi Zhang
2022-08-15  7:13 ` [PATCH 69/70] net/ice/base: couple code clean Qi Zhang
2022-08-15  7:13 ` [PATCH 70/70] net/ice/base: update copyright Qi Zhang
2022-08-15  7:30 ` [PATCH v2 00/70] ice base code update Qi Zhang
2022-08-15  7:30   ` [PATCH v2 01/70] net/ice/base: add netlist helper functions Qi Zhang
2022-08-15  6:28     ` Yang, Qiming
2022-08-15  7:30   ` [PATCH v2 02/70] net/ice/base: get NVM CSS Header length from the CSS Header Qi Zhang
2022-08-15  7:30   ` [PATCH v2 03/70] net/ice/base: combine functions for VSI promisc Qi Zhang
2022-08-15  7:31   ` [PATCH v2 04/70] net/ice/base: make function names more generic Qi Zhang
2022-08-15  7:31   ` [PATCH v2 05/70] net/ice/base: fix incorrect division during E822 PTP init Qi Zhang
2022-08-15  7:31   ` [PATCH v2 06/70] net/ice/base: added auto drop blocking packets functionality Qi Zhang
2022-08-15  7:31   ` [PATCH v2 07/70] net/ice/base: fix 100M speed Qi Zhang
2022-08-15  7:31   ` [PATCH v2 08/70] net/ice/base: support VXLAN and GRE for RSS Qi Zhang
2022-08-15  7:31   ` [PATCH v2 09/70] net/ice/base: fix DSCP PFC TLV creation Qi Zhang
2022-08-15  7:31   ` [PATCH v2 10/70] net/ice/base: complete the health status codes Qi Zhang
2022-08-15  7:31   ` [PATCH v2 11/70] net/ice/base: explicitly name E822 HW-dependent functions Qi Zhang
2022-08-15  7:31   ` [PATCH v2 12/70] net/ice/base: move code block Qi Zhang
2022-08-15  6:30     ` Yang, Qiming
2022-08-15  7:31   ` [PATCH v2 13/70] net/ice/base: add PHY 56G destination address Qi Zhang
2022-08-15  7:31   ` [PATCH v2 14/70] net/ice/base: add 56G PHY register definitions Qi Zhang
2022-08-15  7:31   ` [PATCH v2 15/70] net/ice/base: implement 56G PHY access functions Qi Zhang
2022-08-15  7:31   ` [PATCH v2 16/70] net/ice/base: implement 56G PHY setup functions Qi Zhang
2022-08-15  7:31   ` [PATCH v2 17/70] net/ice/base: work around missing PTP caps Qi Zhang
2022-08-15  7:31   ` [PATCH v2 18/70] net/ice/base: enable calling of ETH56G functions Qi Zhang
2022-08-15  7:31   ` [PATCH v2 19/70] net/ice/base: fix PHY type 10G SFI C2C to media type mapping Qi Zhang
2022-08-15  7:31   ` [PATCH v2 20/70] net/ice/base: refactor DDP code Qi Zhang
2022-08-15  6:44     ` Yang, Qiming
2022-08-15  7:31   ` [PATCH v2 21/70] net/ice/base: add E822 generic PCI device ID Qi Zhang
2022-08-15  6:45     ` Yang, Qiming
2022-08-15  7:31   ` [PATCH v2 22/70] net/ice/base: support double VLAN rules Qi Zhang
2022-08-15  7:31   ` [PATCH v2 23/70] net/ice/base: report NVM version numbers on mismatch Qi Zhang
2022-08-15  7:31   ` [PATCH v2 24/70] net/ice/base: create duplicate detection for ACL rules Qi Zhang
2022-08-15  7:31   ` [PATCH v2 25/70] net/ice/base: fix incorrect function descriptions for parser Qi Zhang
2022-08-15  7:31   ` [PATCH v2 26/70] net/ice/base: fix endian format Qi Zhang
2022-08-15  7:31   ` [PATCH v2 27/70] net/ice/base: convert IO expander handle to u16 Qi Zhang
2022-08-15  7:31   ` [PATCH v2 28/70] net/ice/base: convert array of u8 to bitmap Qi Zhang
2022-08-15  7:31   ` [PATCH v2 29/70] net/ice/base: fix array overflow in add switch recipe code Qi Zhang
2022-08-15  7:31   ` [PATCH v2 30/70] net/ice/base: fix bit finding range over ptype bitmap Qi Zhang
2022-08-15  7:31   ` [PATCH v2 31/70] net/ice/base: move function to internal Qi Zhang
2022-08-22  5:34     ` Yang, Qiming
2022-08-15  7:31   ` [PATCH v2 32/70] net/ice/base: change PHY/QUAD/ports definitions Qi Zhang
2022-08-15  7:31   ` [PATCH v2 33/70] net/ice/base: add AQ command to config node attribute Qi Zhang
2022-08-15  7:31   ` [PATCH v2 34/70] net/ice/base: fix null pointer dereference during Qi Zhang
2022-08-15  7:31   ` [PATCH v2 35/70] net/ice/base: refine default VSI config Qi Zhang
2022-08-15  7:31   ` [PATCH v2 36/70] net/ice/base: fix add mac rule Qi Zhang
2022-08-15  7:31   ` [PATCH v2 37/70] net/ice/base: support Tx topo config Qi Zhang
2022-08-15  7:31   ` [PATCH v2 38/70] net/ice/base: adjust the VSI/Aggregator layers Qi Zhang
2022-08-15  7:31   ` [PATCH v2 39/70] net/ice/base: add data typecasting to match sizes Qi Zhang
2022-08-15  7:31   ` [PATCH v2 40/70] net/ice/base: add helper function to check if device is E823 Qi Zhang
2022-08-15  7:31   ` [PATCH v2 41/70] net/ice/base: add low latency Tx timestamp read Qi Zhang
2022-08-15  7:31   ` [PATCH v2 42/70] net/ice/base: fix double VLAN error in promisc mode Qi Zhang
2022-08-15  7:31   ` [PATCH v2 43/70] net/ice/base: move functions Qi Zhang
2022-08-15  7:31   ` [PATCH v2 44/70] net/ice/base: complete support for Tx balancing Qi Zhang
2022-08-15  7:31   ` [PATCH v2 45/70] net/ice/base: update definitions for AQ internal debug dump Qi Zhang
2022-08-15  7:31   ` [PATCH v2 46/70] net/ice/base: update macros of L2TPv2 ptype value Qi Zhang
2022-08-15  7:31   ` [PATCH v2 47/70] net/ice/base: refine header file include Qi Zhang
2022-08-15  7:31   ` [PATCH v2 48/70] net/ice/base: ignore already exist error Qi Zhang
2022-08-15  7:31   ` [PATCH v2 49/70] net/ice/base: clean up with no lookups Qi Zhang
2022-08-15  7:31   ` [PATCH v2 50/70] net/ice/base: add support for Auto FEC with FEC disabled Qi Zhang
2022-08-15  7:31   ` [PATCH v2 51/70] net/ice/base: update PHY type high max index Qi Zhang
2022-08-15  7:31   ` [PATCH v2 52/70] net/ice/base: clean the main timer command register Qi Zhang
2022-08-15  7:31   ` [PATCH v2 53/70] net/ice/base: add support for custom WPC and LGB NICs Qi Zhang
2022-08-15  7:31   ` [PATCH v2 54/70] net/ice/base: add generic MAC with 3K signature segment Qi Zhang
2022-08-15  7:31   ` [PATCH v2 55/70] net/ice/base: enable RSS support for L2TPv2 session ID Qi Zhang
2022-08-15  7:31   ` [PATCH v2 56/70] net/ice/base: enable FDIR support for L2TPv2 Qi Zhang
2022-08-15  7:31   ` [PATCH v2 57/70] net/ice/base: add GRE Tap tunnel type Qi Zhang
2022-08-15  7:31   ` [PATCH v2 58/70] net/ice/base: fix wrong inputset of GTPoGRE packet Qi Zhang
2022-08-15  7:31   ` [PATCH v2 59/70] net/ice/base: add unload flag for control queue shutdown Qi Zhang
2022-08-15  7:31   ` [PATCH v2 60/70] net/ice/base: update comment for overloaded GCO bit Qi Zhang
2022-08-15  7:31   ` [PATCH v2 61/70] net/ice/base: complete pending LLDP MIB Qi Zhang
2022-08-15  7:31   ` [PATCH v2 62/70] net/ice/base: add function to parse DCBX config Qi Zhang
2022-08-15  7:31   ` [PATCH v2 63/70] net/ice/base: handle default VSI lookup type Qi Zhang
2022-08-15  7:32   ` [PATCH v2 64/70] net/ice/base: convert 1588 structs to use bitfields Qi Zhang
2022-08-15  7:32   ` [PATCH v2 65/70] net/ice/base: remove unnecessary fields Qi Zhang
2022-08-15  7:32   ` [PATCH v2 66/70] net/ice/base: add GTP tunnel Qi Zhang
2022-08-15  7:32   ` [PATCH v2 67/70] net/ice/base: check for PTP HW lock more frequently Qi Zhang
2022-08-15  7:32   ` [PATCH v2 68/70] net/ice/base: expose API for move sched element Qi Zhang
2022-08-15  7:32   ` [PATCH v2 69/70] net/ice/base: couple code clean Qi Zhang
2022-08-15  7:32   ` [PATCH v2 70/70] net/ice/base: update copyright Qi Zhang
2022-08-22  5:36   ` [PATCH v2 00/70] ice base code update Yang, Qiming
2022-09-01 13:11     ` Zhang, Qi Z

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