From: Qi Zhang <qi.z.zhang@intel.com>
To: qiming.yang@intel.com
Cc: dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>
Subject: [PATCH v2 69/70] net/ice/base: couple code clean
Date: Mon, 15 Aug 2022 03:32:05 -0400 [thread overview]
Message-ID: <20220815073206.2917968-70-qi.z.zhang@intel.com> (raw)
In-Reply-To: <20220815073206.2917968-1-qi.z.zhang@intel.com>
1. remove unused code
2. reduce variable scope
3. fix comment
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 2 +-
drivers/net/ice/base/ice_flex_pipe.c | 20 ++++++--------------
drivers/net/ice/base/ice_flow.c | 1 -
drivers/net/ice/base/ice_nvm.c | 2 +-
drivers/net/ice/base/ice_ptp_hw.c | 13 +++++--------
drivers/net/ice/base/ice_sched.c | 12 ++++++++----
drivers/net/ice/base/ice_switch.c | 7 +++++--
7 files changed, 26 insertions(+), 31 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 3d4e05f2b0..29d4be6618 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -801,7 +801,7 @@ ice_fill_tx_timer_and_fc_thresh(struct ice_hw *hw,
* LFC. Thus, we will use index =
* PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
*
- * Also, because we are opearating on transmit timer and fc
+ * Also, because we are operating on transmit timer and fc
* threshold of LFC, we don't turn on any bit in tx_tmr_priority
*/
#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 63ddda2df9..aec6ec3323 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -8,17 +8,6 @@
#include "ice_protocol_type.h"
#include "ice_flow.h"
-/* For supporting double VLAN mode, it is necessary to enable or disable certain
- * boost tcam entries. The metadata labels names that match the following
- * prefixes will be saved to allow enabling double VLAN mode.
- */
-#define ICE_DVM_PRE "BOOST_MAC_VLAN_DVM" /* enable these entries */
-#define ICE_SVM_PRE "BOOST_MAC_VLAN_SVM" /* disable these entries */
-
-/* To support tunneling entries by PF, the package will append the PF number to
- * the label; for example TNL_VXLAN_PF0, TNL_VXLAN_PF1, TNL_VXLAN_PF2, etc.
- */
-#define ICE_TNL_PRE "TNL_"
static const struct ice_tunnel_type_scan tnls[] = {
{ TNL_VXLAN, "TNL_VXLAN_PF" },
{ TNL_GENEVE, "TNL_GENEVE_PF" },
@@ -526,10 +515,11 @@ ice_upd_dvm_boost_entry(struct ice_hw *hw, struct ice_dvm_entry *entry)
*/
enum ice_status ice_set_dvm_boost_entries(struct ice_hw *hw)
{
- enum ice_status status;
u16 i;
for (i = 0; i < hw->dvm_upd.count; i++) {
+ enum ice_status status;
+
status = ice_upd_dvm_boost_entry(hw, &hw->dvm_upd.tbl[i]);
if (status)
return status;
@@ -3414,12 +3404,13 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
u16 idx = vsig & ICE_VSIG_IDX_M;
struct ice_vsig_vsi *vsi_cur;
struct ice_vsig_prof *d, *t;
- enum ice_status status;
/* remove TCAM entries */
LIST_FOR_EACH_ENTRY_SAFE(d, t,
&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
ice_vsig_prof, list) {
+ enum ice_status status;
+
status = ice_rem_prof_id(hw, blk, d);
if (status)
return status;
@@ -3469,12 +3460,13 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
{
u16 idx = vsig & ICE_VSIG_IDX_M;
struct ice_vsig_prof *p, *t;
- enum ice_status status;
LIST_FOR_EACH_ENTRY_SAFE(p, t,
&hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
ice_vsig_prof, list)
if (p->profile_cookie == hdl) {
+ enum ice_status status;
+
if (ice_vsig_prof_id_count(hw, blk, vsig) == 1)
/* this is the last profile, remove the VSIG */
return ice_rem_vsig(hw, blk, vsig, chg);
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 33e97ec333..8a44823895 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -2583,7 +2583,6 @@ ice_flow_set_hw_prof(struct ice_hw *hw, u16 dest_vsi_handle,
struct ice_flow_prof_params *params;
u8 fv_words = hw->blk[blk].es.fvw;
enum ice_status status;
- u16 vsi_num;
int i, idx;
params = (struct ice_flow_prof_params *)ice_malloc(hw, sizeof(*params));
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 293b71905d..25a38e1610 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -725,7 +725,6 @@ ice_get_orom_civd_data(struct ice_hw *hw, enum ice_bank_select bank,
struct ice_orom_civd_info *civd)
{
struct ice_orom_civd_info tmp;
- enum ice_status status;
u32 offset;
/* The CIVD section is located in the Option ROM aligned to 512 bytes.
@@ -734,6 +733,7 @@ ice_get_orom_civd_data(struct ice_hw *hw, enum ice_bank_select bank,
* equal 0.
*/
for (offset = 0; (offset + 512) <= hw->flash.banks.orom_size; offset += 512) {
+ enum ice_status status;
u8 sum = 0, i;
status = ice_read_flash_module(hw, bank, ICE_SR_1ST_OROM_BANK_PTR,
diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
index 974c96f60c..e6b21809e0 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -4805,10 +4805,7 @@ enum ice_status ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data)
bool ice_is_pca9575_present(struct ice_hw *hw)
{
enum ice_status status;
- __le16 handle = 0;
-
- if (!ice_is_e810t(hw))
- return false;
+ u16 handle = 0;
status = ice_get_pca9575_handle(hw, &handle);
if (!status && handle)
@@ -4819,8 +4816,8 @@ bool ice_is_pca9575_present(struct ice_hw *hw)
/* Device agnostic functions
*
- * The following functions implement shared behavior common to both E822 and
- * E810 devices, possibly calling a device specific implementation where
+ * The following functions implement shared behavior common to both E822/E823
+ * and E810 devices, possibly calling a device specific implementation where
* necessary.
*/
@@ -5164,9 +5161,9 @@ ice_ptp_adj_clock_at_time(struct ice_hw *hw, u64 at_time, s32 adj)
}
/**
- * ice_read_phy_tstamp - Read a PHY timestamp from the timestamo block
+ * ice_read_phy_tstamp - Read a PHY timestamp from the timestamp block
* @hw: pointer to the HW struct
- * @block: the block to read from
+ * @block: the block/port to read from
* @idx: the timestamp index to read
* @tstamp: on return, the 40bit timestamp value
*
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 3162b528c0..0e2e26d95e 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1708,7 +1708,6 @@ ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
{
struct ice_sched_node *parent, *node;
struct ice_hw *hw = pi->hw;
- enum ice_status status;
u32 first_node_teid;
u16 num_added = 0;
u8 i, qgl, vsil;
@@ -1717,6 +1716,8 @@ ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle,
vsil = ice_sched_get_vsi_layer(hw);
parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle);
for (i = vsil + 1; i <= qgl; i++) {
+ enum ice_status status;
+
if (!parent)
return ICE_ERR_CFG;
@@ -1810,7 +1811,6 @@ ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
struct ice_sched_node *tc_node, u16 *num_nodes)
{
struct ice_sched_node *parent = tc_node;
- enum ice_status status;
u32 first_node_teid;
u16 num_added = 0;
u8 i, vsil;
@@ -1820,6 +1820,8 @@ ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle,
vsil = ice_sched_get_vsi_layer(pi->hw);
for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) {
+ enum ice_status status;
+
status = ice_sched_add_nodes_to_layer(pi, tc_node, parent,
i, num_nodes[i],
&first_node_teid,
@@ -4860,7 +4862,6 @@ ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
enum ice_agg_type agg_type, u8 tc)
{
struct ice_sched_node *node = NULL;
- struct ice_sched_node *child_node;
switch (agg_type) {
case ICE_AGG_TYPE_VSI: {
@@ -4891,13 +4892,16 @@ ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id,
node = ice_sched_find_node_by_teid(pi->root, id);
break;
- case ICE_AGG_TYPE_QG:
+ case ICE_AGG_TYPE_QG: {
+ struct ice_sched_node *child_node;
+
/* The current implementation allows single qg to modify */
child_node = ice_sched_find_node_by_teid(pi->root, id);
if (!child_node)
break;
node = child_node->parent;
break;
+ }
default:
break;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index bb7e76bd29..1cf8faeed5 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -4255,11 +4255,12 @@ ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info)
*/
enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw)
{
- struct ice_switch_info *sw = hw->switch_info;
struct ice_fltr_mgmt_list_entry *fm_entry;
enum ice_status status = ICE_SUCCESS;
struct LIST_HEAD_TYPE *rule_head;
struct ice_lock *rule_lock; /* Lock to protect filter rule list */
+ struct ice_switch_info *sw;
+ sw = hw->switch_info;
rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock;
rule_head = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rules;
@@ -9536,10 +9537,12 @@ enum ice_status
ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
u16 vsi_handle)
{
- struct ice_switch_info *sw = hw->switch_info;
+ struct ice_switch_info *sw;
enum ice_status status;
u8 i;
+ sw = hw->switch_info;
+
/* Update the recipes that were created */
for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
struct LIST_HEAD_TYPE *head;
--
2.31.1
next prev parent reply other threads:[~2022-08-14 23:28 UTC|newest]
Thread overview: 149+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-15 7:11 [PATCH 00/70] ice base code update Qi Zhang
2022-08-15 7:11 ` [PATCH 01/70] net/ice/base: add netlist helper functions Qi Zhang
2022-08-15 7:11 ` [PATCH 02/70] net/ice/base: get NVM CSS Header length from the CSS Header Qi Zhang
2022-08-15 7:11 ` [PATCH 03/70] net/ice/base: combine functions for VSI promisc Qi Zhang
2022-08-15 7:12 ` [PATCH 04/70] net/ice/base: make function names more generic Qi Zhang
2022-08-15 7:12 ` [PATCH 05/70] net/ice/base: fix incorrect division during E822 PTP init Qi Zhang
2022-08-15 7:12 ` [PATCH 06/70] net/ice/base: added auto drop blocking packets functionality Qi Zhang
2022-08-15 7:12 ` [PATCH 07/70] net/ice/base: fix 100M speed Qi Zhang
2022-08-15 7:12 ` [PATCH 08/70] net/ice/base: support VXLAN and GRE for RSS Qi Zhang
2022-08-15 7:12 ` [PATCH 09/70] net/ice/base: fix DSCP PFC TLV creation Qi Zhang
2022-08-15 7:12 ` [PATCH 10/70] net/ice/base: complete the health status codes Qi Zhang
2022-08-15 7:12 ` [PATCH 11/70] net/ice/base: explicitly name E822 HW-dependent functions Qi Zhang
2022-08-15 7:12 ` [PATCH 12/70] net/ice/base: move code block Qi Zhang
2022-08-15 7:12 ` [PATCH 13/70] net/ice/base: add PHY 56G destination address Qi Zhang
2022-08-15 7:12 ` [PATCH 14/70] net/ice/base: add 56G PHY register definitions Qi Zhang
2022-08-15 7:12 ` [PATCH 15/70] net/ice/base: implement 56G PHY access functions Qi Zhang
2022-08-15 7:12 ` [PATCH 16/70] net/ice/base: implement 56G PHY setup functions Qi Zhang
2022-08-15 7:12 ` [PATCH 17/70] net/ice/base: work around missing PTP caps Qi Zhang
2022-08-15 7:12 ` [PATCH 18/70] net/ice/base: enable calling of ETH56G functions Qi Zhang
2022-08-15 7:12 ` [PATCH 19/70] net/ice/base: fix PHY type 10G SFI C2C to media type mapping Qi Zhang
2022-08-15 7:12 ` [PATCH 20/70] net/ice/base: refactor DDP code Qi Zhang
2022-08-15 7:12 ` [PATCH 21/70] net/ice/base: add E822 generic PCI device ID Qi Zhang
2022-08-15 7:12 ` [PATCH 22/70] net/ice/base: support double VLAN rules Qi Zhang
2022-08-15 7:12 ` [PATCH 23/70] net/ice/base: report NVM version numbers on mismatch Qi Zhang
2022-08-15 7:12 ` [PATCH 24/70] net/ice/base: create duplicate detection for ACL rules Qi Zhang
2022-08-15 7:12 ` [PATCH 25/70] net/ice/base: fix incorrect function descriptions for parser Qi Zhang
2022-08-15 7:12 ` [PATCH 26/70] net/ice/base: fix endian format Qi Zhang
2022-08-15 7:12 ` [PATCH 27/70] net/ice/base: convert IO expander handle to u16 Qi Zhang
2022-08-15 7:12 ` [PATCH 28/70] net/ice/base: convert array of u8 to bitmap Qi Zhang
2022-08-15 7:12 ` [PATCH 29/70] net/ice/base: fix array overflow in add switch recipe code Qi Zhang
2022-08-15 7:12 ` [PATCH 30/70] net/ice/base: fix bit finding range over ptype bitmap Qi Zhang
2022-08-15 7:12 ` [PATCH 31/70] net/ice/base: move function to internal Qi Zhang
2022-08-15 7:12 ` [PATCH 32/70] net/ice/base: change PHY/QUAD/ports definitions Qi Zhang
2022-08-15 7:12 ` [PATCH 33/70] net/ice/base: add AQ command to config node attribute Qi Zhang
2022-08-15 7:12 ` [PATCH 34/70] net/ice/base: fix null pointer dereference during Qi Zhang
2022-08-15 7:12 ` [PATCH 35/70] net/ice/base: refine default VSI config Qi Zhang
2022-08-15 7:12 ` [PATCH 36/70] net/ice/base: ice-shared: fix add mac rule Qi Zhang
2022-08-15 7:12 ` [PATCH 37/70] net/ice/base: support Tx topo config Qi Zhang
2022-08-15 7:12 ` [PATCH 38/70] net/ice/base: adjust the VSI/Aggregator layers Qi Zhang
2022-08-15 7:12 ` [PATCH 39/70] net/ice/base: add data typecasting to match sizes Qi Zhang
2022-08-15 7:12 ` [PATCH 40/70] net/ice/base: add helper function to check if device is E823 Qi Zhang
2022-08-15 7:12 ` [PATCH 41/70] net/ice/base: add low latency Tx timestamp read Qi Zhang
2022-08-15 7:12 ` [PATCH 42/70] net/ice/base: fix double VLAN error in promisc mode Qi Zhang
2022-08-15 7:12 ` [PATCH 43/70] net/ice/base: move functions Qi Zhang
2022-08-15 7:12 ` [PATCH 44/70] net/ice/base: complete support for Tx balancing Qi Zhang
2022-08-15 7:12 ` [PATCH 45/70] net/ice/base: update definitions for AQ internal debug dump Qi Zhang
2022-08-15 7:12 ` [PATCH 46/70] net/ice/base: update macros of L2TPv2 ptype value Qi Zhang
2022-08-15 7:12 ` [PATCH 47/70] net/ice/base: refine header file include Qi Zhang
2022-08-15 7:12 ` [PATCH 48/70] net/ice/base: ignore already exist error Qi Zhang
2022-08-15 7:12 ` [PATCH 49/70] net/ice/base: clean up with no lookups Qi Zhang
2022-08-15 7:12 ` [PATCH 50/70] net/ice/base: add support for Auto FEC with FEC disabled Qi Zhang
2022-08-15 7:12 ` [PATCH 51/70] net/ice/base: update PHY type high max index Qi Zhang
2022-08-15 7:12 ` [PATCH 52/70] net/ice/base: clean the main timer command register Qi Zhang
2022-08-15 7:12 ` [PATCH 53/70] net/ice/base: add support for custom WPC and LGB NICs Qi Zhang
2022-08-15 7:12 ` [PATCH 54/70] net/ice/base: add generic MAC with 3K signature segment Qi Zhang
2022-08-15 7:12 ` [PATCH 55/70] net/ice/base: enable RSS support for L2TPv2 session ID Qi Zhang
2022-08-15 7:12 ` [PATCH 56/70] net/ice/base: enable FDIR support for L2TPv2 Qi Zhang
2022-08-15 7:12 ` [PATCH 57/70] net/ice/base: add GRE Tap tunnel type Qi Zhang
2022-08-15 7:12 ` [PATCH 58/70] net/ice/base: fix wrong inputset of GTPoGRE packet Qi Zhang
2022-08-15 7:12 ` [PATCH 59/70] net/ice/base: add unload flag for control queue shutdown Qi Zhang
2022-08-15 7:12 ` [PATCH 60/70] net/ice/base: update comment for overloaded GCO bit Qi Zhang
2022-08-15 7:12 ` [PATCH 61/70] net/ice/base: complete pending LLDP MIB Qi Zhang
2022-08-15 7:12 ` [PATCH 62/70] net/ice/base: add function to parse DCBX config Qi Zhang
2022-08-15 7:12 ` [PATCH 63/70] net/ice/base: handle default VSI lookup type Qi Zhang
2022-08-15 7:13 ` [PATCH 64/70] net/ice/base: convert 1588 structs to use bitfields Qi Zhang
2022-08-15 7:13 ` [PATCH 65/70] net/ice/base: remove unnecessary fields Qi Zhang
2022-08-15 7:13 ` [PATCH 66/70] net/ice/base: add GTP tunnel Qi Zhang
2022-08-15 7:13 ` [PATCH 67/70] net/ice/base: check for PTP HW lock more frequently Qi Zhang
2022-08-15 7:13 ` [PATCH 68/70] net/ice/base: expose API for move sched element Qi Zhang
2022-08-15 7:13 ` [PATCH 69/70] net/ice/base: couple code clean Qi Zhang
2022-08-15 7:13 ` [PATCH 70/70] net/ice/base: update copyright Qi Zhang
2022-08-15 7:30 ` [PATCH v2 00/70] ice base code update Qi Zhang
2022-08-15 7:30 ` [PATCH v2 01/70] net/ice/base: add netlist helper functions Qi Zhang
2022-08-15 6:28 ` Yang, Qiming
2022-08-15 7:30 ` [PATCH v2 02/70] net/ice/base: get NVM CSS Header length from the CSS Header Qi Zhang
2022-08-15 7:30 ` [PATCH v2 03/70] net/ice/base: combine functions for VSI promisc Qi Zhang
2022-08-15 7:31 ` [PATCH v2 04/70] net/ice/base: make function names more generic Qi Zhang
2022-08-15 7:31 ` [PATCH v2 05/70] net/ice/base: fix incorrect division during E822 PTP init Qi Zhang
2022-08-15 7:31 ` [PATCH v2 06/70] net/ice/base: added auto drop blocking packets functionality Qi Zhang
2022-08-15 7:31 ` [PATCH v2 07/70] net/ice/base: fix 100M speed Qi Zhang
2022-08-15 7:31 ` [PATCH v2 08/70] net/ice/base: support VXLAN and GRE for RSS Qi Zhang
2022-08-15 7:31 ` [PATCH v2 09/70] net/ice/base: fix DSCP PFC TLV creation Qi Zhang
2022-08-15 7:31 ` [PATCH v2 10/70] net/ice/base: complete the health status codes Qi Zhang
2022-08-15 7:31 ` [PATCH v2 11/70] net/ice/base: explicitly name E822 HW-dependent functions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 12/70] net/ice/base: move code block Qi Zhang
2022-08-15 6:30 ` Yang, Qiming
2022-08-15 7:31 ` [PATCH v2 13/70] net/ice/base: add PHY 56G destination address Qi Zhang
2022-08-15 7:31 ` [PATCH v2 14/70] net/ice/base: add 56G PHY register definitions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 15/70] net/ice/base: implement 56G PHY access functions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 16/70] net/ice/base: implement 56G PHY setup functions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 17/70] net/ice/base: work around missing PTP caps Qi Zhang
2022-08-15 7:31 ` [PATCH v2 18/70] net/ice/base: enable calling of ETH56G functions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 19/70] net/ice/base: fix PHY type 10G SFI C2C to media type mapping Qi Zhang
2022-08-15 7:31 ` [PATCH v2 20/70] net/ice/base: refactor DDP code Qi Zhang
2022-08-15 6:44 ` Yang, Qiming
2022-08-15 7:31 ` [PATCH v2 21/70] net/ice/base: add E822 generic PCI device ID Qi Zhang
2022-08-15 6:45 ` Yang, Qiming
2022-08-15 7:31 ` [PATCH v2 22/70] net/ice/base: support double VLAN rules Qi Zhang
2022-08-15 7:31 ` [PATCH v2 23/70] net/ice/base: report NVM version numbers on mismatch Qi Zhang
2022-08-15 7:31 ` [PATCH v2 24/70] net/ice/base: create duplicate detection for ACL rules Qi Zhang
2022-08-15 7:31 ` [PATCH v2 25/70] net/ice/base: fix incorrect function descriptions for parser Qi Zhang
2022-08-15 7:31 ` [PATCH v2 26/70] net/ice/base: fix endian format Qi Zhang
2022-08-15 7:31 ` [PATCH v2 27/70] net/ice/base: convert IO expander handle to u16 Qi Zhang
2022-08-15 7:31 ` [PATCH v2 28/70] net/ice/base: convert array of u8 to bitmap Qi Zhang
2022-08-15 7:31 ` [PATCH v2 29/70] net/ice/base: fix array overflow in add switch recipe code Qi Zhang
2022-08-15 7:31 ` [PATCH v2 30/70] net/ice/base: fix bit finding range over ptype bitmap Qi Zhang
2022-08-15 7:31 ` [PATCH v2 31/70] net/ice/base: move function to internal Qi Zhang
2022-08-22 5:34 ` Yang, Qiming
2022-08-15 7:31 ` [PATCH v2 32/70] net/ice/base: change PHY/QUAD/ports definitions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 33/70] net/ice/base: add AQ command to config node attribute Qi Zhang
2022-08-15 7:31 ` [PATCH v2 34/70] net/ice/base: fix null pointer dereference during Qi Zhang
2022-08-15 7:31 ` [PATCH v2 35/70] net/ice/base: refine default VSI config Qi Zhang
2022-08-15 7:31 ` [PATCH v2 36/70] net/ice/base: fix add mac rule Qi Zhang
2022-08-15 7:31 ` [PATCH v2 37/70] net/ice/base: support Tx topo config Qi Zhang
2022-08-15 7:31 ` [PATCH v2 38/70] net/ice/base: adjust the VSI/Aggregator layers Qi Zhang
2022-08-15 7:31 ` [PATCH v2 39/70] net/ice/base: add data typecasting to match sizes Qi Zhang
2022-08-15 7:31 ` [PATCH v2 40/70] net/ice/base: add helper function to check if device is E823 Qi Zhang
2022-08-15 7:31 ` [PATCH v2 41/70] net/ice/base: add low latency Tx timestamp read Qi Zhang
2022-08-15 7:31 ` [PATCH v2 42/70] net/ice/base: fix double VLAN error in promisc mode Qi Zhang
2022-08-15 7:31 ` [PATCH v2 43/70] net/ice/base: move functions Qi Zhang
2022-08-15 7:31 ` [PATCH v2 44/70] net/ice/base: complete support for Tx balancing Qi Zhang
2022-08-15 7:31 ` [PATCH v2 45/70] net/ice/base: update definitions for AQ internal debug dump Qi Zhang
2022-08-15 7:31 ` [PATCH v2 46/70] net/ice/base: update macros of L2TPv2 ptype value Qi Zhang
2022-08-15 7:31 ` [PATCH v2 47/70] net/ice/base: refine header file include Qi Zhang
2022-08-15 7:31 ` [PATCH v2 48/70] net/ice/base: ignore already exist error Qi Zhang
2022-08-15 7:31 ` [PATCH v2 49/70] net/ice/base: clean up with no lookups Qi Zhang
2022-08-15 7:31 ` [PATCH v2 50/70] net/ice/base: add support for Auto FEC with FEC disabled Qi Zhang
2022-08-15 7:31 ` [PATCH v2 51/70] net/ice/base: update PHY type high max index Qi Zhang
2022-08-15 7:31 ` [PATCH v2 52/70] net/ice/base: clean the main timer command register Qi Zhang
2022-08-15 7:31 ` [PATCH v2 53/70] net/ice/base: add support for custom WPC and LGB NICs Qi Zhang
2022-08-15 7:31 ` [PATCH v2 54/70] net/ice/base: add generic MAC with 3K signature segment Qi Zhang
2022-08-15 7:31 ` [PATCH v2 55/70] net/ice/base: enable RSS support for L2TPv2 session ID Qi Zhang
2022-08-15 7:31 ` [PATCH v2 56/70] net/ice/base: enable FDIR support for L2TPv2 Qi Zhang
2022-08-15 7:31 ` [PATCH v2 57/70] net/ice/base: add GRE Tap tunnel type Qi Zhang
2022-08-15 7:31 ` [PATCH v2 58/70] net/ice/base: fix wrong inputset of GTPoGRE packet Qi Zhang
2022-08-15 7:31 ` [PATCH v2 59/70] net/ice/base: add unload flag for control queue shutdown Qi Zhang
2022-08-15 7:31 ` [PATCH v2 60/70] net/ice/base: update comment for overloaded GCO bit Qi Zhang
2022-08-15 7:31 ` [PATCH v2 61/70] net/ice/base: complete pending LLDP MIB Qi Zhang
2022-08-15 7:31 ` [PATCH v2 62/70] net/ice/base: add function to parse DCBX config Qi Zhang
2022-08-15 7:31 ` [PATCH v2 63/70] net/ice/base: handle default VSI lookup type Qi Zhang
2022-08-15 7:32 ` [PATCH v2 64/70] net/ice/base: convert 1588 structs to use bitfields Qi Zhang
2022-08-15 7:32 ` [PATCH v2 65/70] net/ice/base: remove unnecessary fields Qi Zhang
2022-08-15 7:32 ` [PATCH v2 66/70] net/ice/base: add GTP tunnel Qi Zhang
2022-08-15 7:32 ` [PATCH v2 67/70] net/ice/base: check for PTP HW lock more frequently Qi Zhang
2022-08-15 7:32 ` [PATCH v2 68/70] net/ice/base: expose API for move sched element Qi Zhang
2022-08-15 7:32 ` Qi Zhang [this message]
2022-08-15 7:32 ` [PATCH v2 70/70] net/ice/base: update copyright Qi Zhang
2022-08-22 5:36 ` [PATCH v2 00/70] ice base code update Yang, Qiming
2022-09-01 13:11 ` Zhang, Qi Z
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