[PATCH 2/4] eal/arm: support reading ARM PMU events in runtime

[Tomasz Duszynski <tduszynski@marvell.com>]

Add support for reading ARM PMU events in runtime.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
---
 app/test/test_pmu.c               |   4 ++
 lib/eal/arm/include/meson.build   |   1 +
 lib/eal/arm/include/rte_pmu_pmc.h |  37 +++++++++++
 lib/eal/arm/meson.build           |   4 ++
 lib/eal/arm/rte_pmu.c             | 103 ++++++++++++++++++++++++++++++
 lib/eal/include/rte_pmu.h         |   3 +
 6 files changed, 152 insertions(+)
 create mode 100644 lib/eal/arm/include/rte_pmu_pmc.h
 create mode 100644 lib/eal/arm/rte_pmu.c

diff --git a/app/test/test_pmu.c b/app/test/test_pmu.c
index fd331af9ee..f94866dff9 100644
--- a/app/test/test_pmu.c
+++ b/app/test/test_pmu.c
@@ -13,6 +13,10 @@ test_pmu_read(void)
 	int tries = 10;
 	int event = -1;
 
+#if defined(RTE_ARCH_ARM64)
+	event = rte_pmu_add_event("cpu_cycles");
+#endif
+
 	while (tries--)
 		val += rte_pmu_read(event);
 
diff --git a/lib/eal/arm/include/meson.build b/lib/eal/arm/include/meson.build
index 657bf58569..ab13b0220a 100644
--- a/lib/eal/arm/include/meson.build
+++ b/lib/eal/arm/include/meson.build
@@ -20,6 +20,7 @@ arch_headers = files(
         'rte_pause_32.h',
         'rte_pause_64.h',
         'rte_pause.h',
+        'rte_pmu_pmc.h',
         'rte_power_intrinsics.h',
         'rte_prefetch_32.h',
         'rte_prefetch_64.h',
diff --git a/lib/eal/arm/include/rte_pmu_pmc.h b/lib/eal/arm/include/rte_pmu_pmc.h
new file mode 100644
index 0000000000..5efc851cb8
--- /dev/null
+++ b/lib/eal/arm/include/rte_pmu_pmc.h
@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2022 Marvell.
+ */
+
+#ifndef _RTE_PMU_PMC_ARM_H_
+#define _RTE_PMU_PMC_ARM_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static __rte_always_inline uint64_t
+rte_pmu_pmc_read(int index)
+{
+	uint64_t val;
+
+	if (index == 31) {
+		/* CPU Cycles (0x11) must be read via pmccntr_el0 */
+		asm volatile("mrs %0, pmccntr_el0" : "=r" (val));
+	} else {
+		asm volatile(
+			"msr pmselr_el0, %x0\n"
+			"mrs %0, pmxevcntr_el0\n"
+			: "=r" (val)
+			: "rZ" (index)
+		);
+	}
+
+	return val;
+}
+#define rte_pmu_pmc_read rte_pmu_pmc_read
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_PMU_PMC_ARM_H_ */
diff --git a/lib/eal/arm/meson.build b/lib/eal/arm/meson.build
index dca1106aae..0c5575b197 100644
--- a/lib/eal/arm/meson.build
+++ b/lib/eal/arm/meson.build
@@ -9,3 +9,7 @@ sources += files(
         'rte_hypervisor.c',
         'rte_power_intrinsics.c',
 )
+
+if is_linux
+    sources += files('rte_pmu.c')
+endif
diff --git a/lib/eal/arm/rte_pmu.c b/lib/eal/arm/rte_pmu.c
new file mode 100644
index 0000000000..6c50a1b3c4
--- /dev/null
+++ b/lib/eal/arm/rte_pmu.c
@@ -0,0 +1,103 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2022 Marvell International Ltd.
+ */
+
+#include <errno.h>
+#include <fcntl.h>
+#include <unistd.h>
+
+#include <rte_bitops.h>
+#include <rte_common.h>
+#include <rte_log.h>
+#include <rte_pmu.h>
+
+#include "pmu_private.h"
+
+#define PERF_USER_ACCESS_PATH "/proc/sys/kernel/perf_user_access"
+
+static int restore_uaccess;
+
+static int
+read_attr_int(const char *path, int *val)
+{
+	char buf[BUFSIZ];
+	int ret, fd;
+
+	fd = open(path, O_RDONLY);
+	if (fd == -1)
+		return -errno;
+
+	ret = read(fd, buf, sizeof(buf));
+	if (ret == -1) {
+		close(fd);
+
+		return -errno;
+	}
+
+	*val = strtol(buf, NULL, 10);
+	close(fd);
+
+	return 0;
+}
+
+static int
+write_attr_int(const char *path, int val)
+{
+	char buf[BUFSIZ];
+	int num, ret, fd;
+
+	fd = open(path, O_WRONLY);
+	if (fd == -1)
+		return -errno;
+
+	num = snprintf(buf, sizeof(buf), "%d", val);
+	ret = write(fd, buf, num);
+	if (ret == -1) {
+		close(fd);
+
+		return -errno;
+	}
+
+	close(fd);
+
+	return 0;
+}
+
+int
+pmu_arch_init(void)
+{
+	int ret;
+
+	ret = read_attr_int(PERF_USER_ACCESS_PATH, &restore_uaccess);
+	if (ret) {
+		RTE_LOG(ERR, EAL, "failed to read %s\n", PERF_USER_ACCESS_PATH);
+
+		return ret;
+	}
+
+	ret = write_attr_int(PERF_USER_ACCESS_PATH, 1);
+	if (ret) {
+		RTE_LOG(ERR, EAL, "failed to enable perf user access\n"
+			"try enabling manually 'echo 1 > %s'\n",
+			PERF_USER_ACCESS_PATH);
+
+		return ret;
+	}
+
+	return 0;
+}
+
+void
+pmu_arch_fini(void)
+{
+	write_attr_int(PERF_USER_ACCESS_PATH, restore_uaccess);
+}
+
+void
+pmu_arch_fixup_config(uint64_t config[3])
+{
+	/* select 64 bit counters */
+	config[1] |= RTE_BIT64(0);
+	/* enable userspace access */
+	config[1] |= RTE_BIT64(1);
+}
diff --git a/lib/eal/include/rte_pmu.h b/lib/eal/include/rte_pmu.h
index 5955c22779..67b1194a2a 100644
--- a/lib/eal/include/rte_pmu.h
+++ b/lib/eal/include/rte_pmu.h
@@ -20,6 +20,9 @@ extern "C" {
 #include <rte_branch_prediction.h>
 #include <rte_lcore.h>
 #include <rte_log.h>
+#if defined(RTE_ARCH_ARM64)
+#include <rte_pmu_pmc.h>
+#endif
 
 /**
  * @file
-- 
2.25.1