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From: "Yan, Xiaoping (NSB - CN/Hangzhou)" <xiaoping.yan@nokia-sbell.com>
To: "dev@dpdk.org" <dev@dpdk.org>
Subject: [dpdk-dev] incorrect vlan_tci in rte mbuf
Date: Fri, 15 May 2020 11:12:27 +0000
Message-ID: <301f18faf1184d7fb3b3958f1dbb1675@nokia-sbell.com> (raw)


I'm using i40e vf, dpdk 18.11, x86_64 CPU (rx function in use is i40e_recv_scattered_pkts_vec_avx2)
When enable hw vlan strip:

  *   If packet fit in one mbuf segment, the vlan_tci field is correct
  *   If packets are stored in several mbuf segment, the vlan_tci of last segment is correct, vlan_tci of other segments are invalid

It seems i40e_recv_scattered_pkts has correctly set the vlan_tci, by calling
i40e_rxd_to_vlan_tci(first_seg, &rxd);

Is this a bug in i40e_recv_scattered_pkts_vec_avx2?
(I didn't find setting vlan_tci for first segment, but it's a bit difficult for me to understand codes in i40e_recv_scattered_pkts_vec_avx2, so I'm not quite sure)
I checked the latest dpdk version 20.02 http://lxr.dpdk.org/dpdk/latest/source/drivers/net/i40e/i40e_rxtx_vec_avx2.c#L791
But seems no change for this.

Any comment please?
Thank you.

ps lscpu log in case helpful:
[cranuser2@controller-3 ~]$ lscpu
Architecture:        x86_64
CPU op-mode(s):      32-bit, 64-bit
Byte Order:          Little Endian
CPU(s):              20
On-line CPU(s) list: 0-19
Thread(s) per core:  1
Core(s) per socket:  20
Socket(s):           1
NUMA node(s):        1
Vendor ID:           GenuineIntel
CPU family:          6
Model:               85
Model name:          Intel(R) Xeon(R) Gold 6148 CPU @ 2.40GHz
Stepping:            4
CPU MHz:             1903.044
CPU max MHz:         2400.0000
CPU min MHz:         1000.0000
BogoMIPS:            4800.00
Virtualization:      VT-x
L1d cache:           32K
L1i cache:           32K
L2 cache:            1024K
L3 cache:            28160K
NUMA node0 CPU(s):   0-19
Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single pti intel_ppin ssbd mba ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm arat pln pts pku ospke md_clear flush_l1d

Best regards
Yan Xiaoping

             reply	other threads:[~2020-05-16 21:03 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-15 11:12 Yan, Xiaoping (NSB - CN/Hangzhou) [this message]
2020-05-18  7:24 ` Olivier Matz
2020-05-18  8:31   ` Yan, Xiaoping (NSB - CN/Hangzhou)
2020-05-19  7:00     ` Jeff Guo
2020-05-19  8:31       ` Yan, Xiaoping (NSB - CN/Hangzhou)
2020-05-19 12:27         ` Jeff Guo
2020-05-19 12:41         ` Zhang, Qi Z
2020-05-20  7:42           ` Yan, Xiaoping (NSB - CN/Hangzhou)
2020-05-20  7:48             ` Zhang, Qi Z

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