DPDK patches and discussions
 help / color / mirror / Atom feed
* [dpdk-dev] [PATCH v1 0/2] support two or more aeqs for chip
@ 2020-11-04  2:03 Guoyang Zhou
  2020-11-04  2:03 ` [dpdk-dev] [PATCH v1 1/2] net/hinic/base: " Guoyang Zhou
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Guoyang Zhou @ 2020-11-04  2:03 UTC (permalink / raw)
  To: dev
  Cc: ferruh.yigit, bluca, cloud.wangxiaoyun, yin.yinshi, luoxianjun,
	luojiachen, zhouguoyang, zhaohui8

This patch fixes can support two or more aeqs from chip 
config file and also support four aeqs before, and fix log
info for pf command channel when something is error.

--
v1:
  - support two or more aeqs for chip
  - fix log info for pf command channel when something is error

Guoyang Zhou (2):
  net/hinic/base: support two or more aeqs for chip
  net/hinic/base: fix log info for PF command channel

 drivers/net/hinic/base/hinic_pmd_eqs.c  |  8 ++---
 drivers/net/hinic/base/hinic_pmd_eqs.h  |  4 +++
 drivers/net/hinic/base/hinic_pmd_mbox.c | 60 ++++++++++++++++++++++++++++-----
 drivers/net/hinic/base/hinic_pmd_mbox.h |  5 +--
 drivers/net/hinic/base/hinic_pmd_mgmt.c |  4 ++-
 5 files changed, 63 insertions(+), 18 deletions(-)

-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [dpdk-dev] [PATCH v1 1/2] net/hinic/base: support two or more aeqs for chip
  2020-11-04  2:03 [dpdk-dev] [PATCH v1 0/2] support two or more aeqs for chip Guoyang Zhou
@ 2020-11-04  2:03 ` Guoyang Zhou
  2020-11-04  2:03 ` [dpdk-dev] [PATCH v1 2/2] net/hinic/base: fix log info for PF command channel Guoyang Zhou
  2020-11-04 14:10 ` [dpdk-dev] [PATCH v1 0/2] support two or more aeqs for chip Ferruh Yigit
  2 siblings, 0 replies; 4+ messages in thread
From: Guoyang Zhou @ 2020-11-04  2:03 UTC (permalink / raw)
  To: dev
  Cc: ferruh.yigit, bluca, cloud.wangxiaoyun, yin.yinshi, luoxianjun,
	luojiachen, zhouguoyang, zhaohui8, stable

For device initialize, driver only supports four aeqs before,
and now driver can supports two or more aeqs from chip
config file.

Fixes: 611faa5f46cc ("fix various typos found by Lintian")
Cc: stable@dpdk.org
Signed-off-by: Guoyang Zhou <zhouguoyang@huawei.com>
---
 drivers/net/hinic/base/hinic_pmd_eqs.c  |  8 ++---
 drivers/net/hinic/base/hinic_pmd_eqs.h  |  4 +++
 drivers/net/hinic/base/hinic_pmd_mbox.c | 60 ++++++++++++++++++++++++++++-----
 drivers/net/hinic/base/hinic_pmd_mbox.h |  5 +--
 4 files changed, 60 insertions(+), 17 deletions(-)

diff --git a/drivers/net/hinic/base/hinic_pmd_eqs.c b/drivers/net/hinic/base/hinic_pmd_eqs.c
index 79e1b20..fecb653 100644
--- a/drivers/net/hinic/base/hinic_pmd_eqs.c
+++ b/drivers/net/hinic/base/hinic_pmd_eqs.c
@@ -470,10 +470,10 @@ int hinic_comm_aeqs_init(struct hinic_hwdev *hwdev)
 	struct irq_info aeq_irqs[HINIC_MAX_AEQS];
 
 	num_aeqs = HINIC_HWIF_NUM_AEQS(hwdev->hwif);
-	if (num_aeqs < HINIC_MAX_AEQS) {
-		PMD_DRV_LOG(ERR, "Warning: PMD need %d AEQs, Chip have %d",
-			HINIC_MAX_AEQS, num_aeqs);
-		return HINIC_ERROR;
+	if (num_aeqs < HINIC_MIN_AEQS) {
+		PMD_DRV_LOG(ERR, "PMD need %d AEQs, Chip has %d\n",
+				HINIC_MIN_AEQS, num_aeqs);
+		return -EINVAL;
 	}
 
 	memset(aeq_irqs, 0, sizeof(aeq_irqs));
diff --git a/drivers/net/hinic/base/hinic_pmd_eqs.h b/drivers/net/hinic/base/hinic_pmd_eqs.h
index 16046ec..5e6dc39 100644
--- a/drivers/net/hinic/base/hinic_pmd_eqs.h
+++ b/drivers/net/hinic/base/hinic_pmd_eqs.h
@@ -9,6 +9,10 @@
 
 #define HINIC_AEQN_START		0
 #define HINIC_MAX_AEQS			4
+#define HINIC_MIN_AEQS			2
+#define HINIC_AEQN_0			0
+#define HINIC_AEQN_1			1
+#define HINIC_AEQN_2			2
 
 #define HINIC_EQ_MAX_PAGES		8
 
diff --git a/drivers/net/hinic/base/hinic_pmd_mbox.c b/drivers/net/hinic/base/hinic_pmd_mbox.c
index ab1106a..ff44c25 100644
--- a/drivers/net/hinic/base/hinic_pmd_mbox.c
+++ b/drivers/net/hinic/base/hinic_pmd_mbox.c
@@ -297,15 +297,52 @@ static void mbox_copy_header(struct hinic_send_mbox *mbox, u64 *header)
 				mbox->data + MBOX_HEADER_SZ + i * sizeof(u32));
 }
 
+static int mbox_msg_ack_aeqn(struct hinic_hwdev *hwdev)
+{
+	u16 aeq_num = HINIC_HWIF_NUM_AEQS(hwdev->hwif);
+	int msg_ack_aeqn;
+
+	if (aeq_num >= HINIC_MAX_AEQS - 1) {
+		msg_ack_aeqn = HINIC_AEQN_2;
+	} else if (aeq_num == HINIC_MIN_AEQS) {
+		/* This is used for ovs */
+		msg_ack_aeqn = HINIC_AEQN_1;
+	} else {
+		PMD_DRV_LOG(ERR, "Warning: Invalid aeq num: %d\n", aeq_num);
+		msg_ack_aeqn = -1;
+	}
+
+	return msg_ack_aeqn;
+}
+
+static u16 mbox_msg_dst_aeqn(struct hinic_hwdev *hwdev,
+			enum hinic_hwif_direction_type seq_dir)
+{
+	u16 dst_aeqn;
+
+	if (seq_dir == HINIC_HWIF_DIRECT_SEND)
+		dst_aeqn = HINIC_AEQN_0;
+	else
+		dst_aeqn = mbox_msg_ack_aeqn(hwdev);
+
+	return dst_aeqn;
+}
+
+static int mbox_seg_ack_aeqn(struct hinic_hwdev *hwdev)
+{
+	return mbox_msg_ack_aeqn(hwdev);
+}
+
 static void write_mbox_msg_attr(struct hinic_mbox_func_to_func *func_to_func,
-			u16 dst_func, u16 dst_aeqn,
+			u16 dst_func, u16 dst_aeqn, u16 seg_ack_aeqn,
 			__rte_unused u16 seg_len, int poll)
 {
 	u32 mbox_int, mbox_ctrl;
 
 	mbox_int = HINIC_MBOX_INT_SET(dst_func, DST_FUNC) |
 		HINIC_MBOX_INT_SET(dst_aeqn, DST_AEQN) |
-		HINIC_MBOX_INT_SET(HINIC_MBOX_RSP_AEQN, SRC_RESP_AEQN) |
+		/* N/A in polling mode */
+		HINIC_MBOX_INT_SET(seg_ack_aeqn, SRC_RESP_AEQN) |
 		HINIC_MBOX_INT_SET(NO_DMA_ATTRIBUTE_VAL, STAT_DMA) |
 		HINIC_MBOX_INT_SET(ALIGN(MBOX_SIZE, MBOX_SEG_LEN_ALIGN) >> 2,
 					TX_SIZE) |
@@ -551,19 +588,21 @@ static int send_mbox_seg(struct hinic_mbox_func_to_func *func_to_func,
 	struct hinic_send_mbox *send_mbox = &func_to_func->send_mbox;
 	struct hinic_hwdev *hwdev = func_to_func->hwdev;
 	u16 seq_dir = HINIC_MBOX_HEADER_GET(header, DIRECTION);
-	u16 dst_aeqn = (seq_dir == HINIC_HWIF_DIRECT_SEND) ?
-				HINIC_MBOX_RECV_AEQN : HINIC_MBOX_RSP_AEQN;
+	u16 dst_aeqn, seg_ack_aeqn;
 	u16 err_code, wb_status = 0;
 	u32 cnt = 0;
 
+	dst_aeqn = mbox_msg_dst_aeqn(hwdev, seq_dir);
+	seg_ack_aeqn = mbox_seg_ack_aeqn(hwdev);
+
 	clear_mbox_status(send_mbox);
 
 	mbox_copy_header(send_mbox, &header);
 
 	mbox_copy_send_data(send_mbox, seg, seg_len);
 
-	write_mbox_msg_attr(func_to_func, dst_func, dst_aeqn, seg_len,
-			    MBOX_SEND_MSG_POLL);
+	write_mbox_msg_attr(func_to_func, dst_func, dst_aeqn, seg_ack_aeqn,
+				seg_len, MBOX_SEND_MSG_POLL);
 
 	rte_wmb();
 
@@ -697,7 +736,7 @@ static int hinic_mbox_to_func(struct hinic_mbox_func_to_func *func_to_func,
 		goto send_err;
 
 	time = msecs_to_jiffies(timeout ? timeout : HINIC_MBOX_COMP_TIME_MS);
-	err = hinic_aeq_poll_msg(func_to_func->rsp_aeq, time, NULL);
+	err = hinic_aeq_poll_msg(func_to_func->ack_aeq, time, NULL);
 	if (err) {
 		set_mbox_to_func_event(func_to_func, EVENT_TIMEOUT);
 		PMD_DRV_LOG(ERR, "Send mailbox message time out");
@@ -920,13 +959,16 @@ void hinic_comm_func_to_func_free(struct hinic_hwdev *hwdev)
 int hinic_comm_func_to_func_init(struct hinic_hwdev *hwdev)
 {
 	int rc;
+	u16 msg_ack_aeqn;
 
 	rc = hinic_func_to_func_init(hwdev);
 	if (rc)
 		return rc;
 
-	hwdev->func_to_func->rsp_aeq = &hwdev->aeqs->aeq[HINIC_MBOX_RSP_AEQN];
-	hwdev->func_to_func->recv_aeq = &hwdev->aeqs->aeq[HINIC_MBOX_RECV_AEQN];
+	msg_ack_aeqn = mbox_msg_ack_aeqn(hwdev);
+
+	hwdev->func_to_func->ack_aeq = &hwdev->aeqs->aeq[msg_ack_aeqn];
+	hwdev->func_to_func->recv_aeq = &hwdev->aeqs->aeq[HINIC_AEQN_0];
 
 	return 0;
 }
diff --git a/drivers/net/hinic/base/hinic_pmd_mbox.h b/drivers/net/hinic/base/hinic_pmd_mbox.h
index bf7b490..dc08b99 100644
--- a/drivers/net/hinic/base/hinic_pmd_mbox.h
+++ b/drivers/net/hinic/base/hinic_pmd_mbox.h
@@ -5,9 +5,6 @@
 #ifndef _HINIC_PMD_MBOX_H_
 #define _HINIC_PMD_MBOX_H_
 
-#define HINIC_MBOX_RECV_AEQN		0
-#define HINIC_MBOX_RSP_AEQN		2
-
 #define HINIC_MBOX_PF_SEND_ERR		0x1
 #define HINIC_MBOX_PF_BUSY_ACTIVE_FW	0x2
 #define HINIC_MBOX_VF_CMD_ERROR		0x3
@@ -69,7 +66,7 @@ struct hinic_mbox_func_to_func {
 	struct hinic_recv_mbox mbox_resp[HINIC_MAX_FUNCTIONS];
 	struct hinic_recv_mbox mbox_send[HINIC_MAX_FUNCTIONS];
 
-	struct hinic_eq *rsp_aeq;
+	struct hinic_eq *ack_aeq;
 	struct hinic_eq *recv_aeq;
 
 	u8 send_msg_id;
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

* [dpdk-dev] [PATCH v1 2/2] net/hinic/base: fix log info for PF command channel
  2020-11-04  2:03 [dpdk-dev] [PATCH v1 0/2] support two or more aeqs for chip Guoyang Zhou
  2020-11-04  2:03 ` [dpdk-dev] [PATCH v1 1/2] net/hinic/base: " Guoyang Zhou
@ 2020-11-04  2:03 ` Guoyang Zhou
  2020-11-04 14:10 ` [dpdk-dev] [PATCH v1 0/2] support two or more aeqs for chip Ferruh Yigit
  2 siblings, 0 replies; 4+ messages in thread
From: Guoyang Zhou @ 2020-11-04  2:03 UTC (permalink / raw)
  To: dev
  Cc: ferruh.yigit, bluca, cloud.wangxiaoyun, yin.yinshi, luoxianjun,
	luojiachen, zhouguoyang, zhaohui8, stable

When PF command channel is error, the variables in the log has been
cleared, which is not printed yet.

Fixes: 214164a6bf7f ("net/hinic/base: remove unused function parameters")
Cc: stable@dpdk.org
Signed-off-by: Guoyang Zhou <zhouguoyang@huawei.com>
---
 drivers/net/hinic/base/hinic_pmd_mgmt.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/hinic/base/hinic_pmd_mgmt.c b/drivers/net/hinic/base/hinic_pmd_mgmt.c
index babb93a..fb31bc8 100644
--- a/drivers/net/hinic/base/hinic_pmd_mgmt.c
+++ b/drivers/net/hinic/base/hinic_pmd_mgmt.c
@@ -614,16 +614,18 @@ static int recv_mgmt_msg_handler(struct hinic_msg_pf_to_mgmt *pf_to_mgmt,
 	u8 *dest_msg;
 	u8 seq_id, seq_len;
 	u32 msg_buf_max = MAX_PF_MGMT_BUF_SIZE;
+	u8 front_id;
 
 	seq_id = HINIC_MSG_HEADER_GET(msg_header, SEQID);
 	seq_len = HINIC_MSG_HEADER_GET(msg_header, SEG_LEN);
+	front_id = recv_msg->sed_id;
 
 	if (!check_mgmt_seq_id_and_seg_len(recv_msg, seq_id, seq_len)) {
 		PMD_DRV_LOG(ERR,
 			"Mgmt msg sequence and segment check failed, "
 			"func id: 0x%x, front id: 0x%x, current id: 0x%x, seg len: 0x%x",
 			hinic_global_func_id(pf_to_mgmt->hwdev),
-			recv_msg->sed_id, seq_id, seq_len);
+			front_id, seq_id, seq_len);
 		return HINIC_ERROR;
 	}
 
-- 
1.8.3.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [dpdk-dev] [PATCH v1 0/2] support two or more aeqs for chip
  2020-11-04  2:03 [dpdk-dev] [PATCH v1 0/2] support two or more aeqs for chip Guoyang Zhou
  2020-11-04  2:03 ` [dpdk-dev] [PATCH v1 1/2] net/hinic/base: " Guoyang Zhou
  2020-11-04  2:03 ` [dpdk-dev] [PATCH v1 2/2] net/hinic/base: fix log info for PF command channel Guoyang Zhou
@ 2020-11-04 14:10 ` Ferruh Yigit
  2 siblings, 0 replies; 4+ messages in thread
From: Ferruh Yigit @ 2020-11-04 14:10 UTC (permalink / raw)
  To: Guoyang Zhou, dev
  Cc: bluca, cloud.wangxiaoyun, yin.yinshi, luoxianjun, luojiachen, zhaohui8

On 11/4/2020 2:03 AM, Guoyang Zhou wrote:
> This patch fixes can support two or more aeqs from chip
> config file and also support four aeqs before, and fix log
> info for pf command channel when something is error.
> 
> --
> v1:
>    - support two or more aeqs for chip
>    - fix log info for pf command channel when something is error
> 
> Guoyang Zhou (2):
>    net/hinic/base: support two or more aeqs for chip
>    net/hinic/base: fix log info for PF command channel
> 
Series applied to dpdk-next-net/main, thanks.

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2020-11-04 14:10 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-04  2:03 [dpdk-dev] [PATCH v1 0/2] support two or more aeqs for chip Guoyang Zhou
2020-11-04  2:03 ` [dpdk-dev] [PATCH v1 1/2] net/hinic/base: " Guoyang Zhou
2020-11-04  2:03 ` [dpdk-dev] [PATCH v1 2/2] net/hinic/base: fix log info for PF command channel Guoyang Zhou
2020-11-04 14:10 ` [dpdk-dev] [PATCH v1 0/2] support two or more aeqs for chip Ferruh Yigit

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).