* [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2
@ 2020-06-11 8:43 Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 01/10] net/ice/base: adjust profile id map locks Qi Zhang
` (10 more replies)
0 siblings, 11 replies; 15+ messages in thread
From: Qi Zhang @ 2020-06-11 8:43 UTC (permalink / raw)
To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang
Main changes:
1. support outer IP filter for GTPU (include IPv6)
2. recipe can be reused between PFs.
3. fix VSI ID mask
4. some code refactor and clean
Qi Zhang (10):
net/ice/base: adjust profile id map locks
net/ice/base: refactor to avoid need to retry
net/ice/base: add FD support for outer IP of GTPU
net/ice/base: add commands for system diagnostic
net/ice/base: rename misleading variable
net/ice/base: add FD support for GTPU with outer IPv6
net/ice/base: get tunnel type for recipe
net/ice/base: choose TCP dummy packet by protocol
net/ice/base: fix the VSI ID mask to be 10 bit
net/ice/base: replace RSS profile locks
drivers/net/ice/base/ice_adminq_cmd.h | 56 ++++++++++-
drivers/net/ice/base/ice_common.c | 53 ++++------
drivers/net/ice/base/ice_fdir.c | 42 +++++++-
drivers/net/ice/base/ice_fdir.h | 2 +
drivers/net/ice/base/ice_flex_pipe.c | 95 +++++++++---------
drivers/net/ice/base/ice_flow.c | 29 ++++--
drivers/net/ice/base/ice_switch.c | 184 +++++++++++++++++++++++++++++++++-
drivers/net/ice/base/ice_switch.h | 2 +
drivers/net/ice/base/ice_type.h | 1 +
9 files changed, 363 insertions(+), 101 deletions(-)
--
2.13.6
^ permalink raw reply [flat|nested] 15+ messages in thread
* [dpdk-dev] [PATCH 01/10] net/ice/base: adjust profile id map locks
2020-06-11 8:43 [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Qi Zhang
@ 2020-06-11 8:43 ` Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 02/10] net/ice/base: refactor to avoid need to retry Qi Zhang
` (9 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Qi Zhang @ 2020-06-11 8:43 UTC (permalink / raw)
To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Victor Raj, Paul M Stillwell Jr
The profile id map lock should be held till the caller completes
all references of that profile entries.
The current code releases the lock right after the match search.
This caused a driver issue when the profile map entries were
referenced after it was freed in other thread after the lock was
released earlier.
Also return type of get/set profile functions were changed to
return the ice status instead of the profile entry pointer.
This will prevent the caller referencing the profile fields
outside the lock.
Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 95 ++++++++++++++++++------------------
drivers/net/ice/base/ice_flow.c | 16 ++++--
2 files changed, 58 insertions(+), 53 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index f953d891d..016dc2b39 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -4710,22 +4710,21 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
}
/**
- * ice_search_prof_id_low - Search for a profile tracking ID low level
+ * ice_search_prof_id - Search for a profile tracking ID
* @hw: pointer to the HW struct
* @blk: hardware block
* @id: profile tracking ID
*
- * This will search for a profile tracking ID which was previously added. This
- * version assumes that the caller has already acquired the prof map lock.
+ * This will search for a profile tracking ID which was previously added.
+ * The profile map lock should be held before calling this function.
*/
-static struct ice_prof_map *
-ice_search_prof_id_low(struct ice_hw *hw, enum ice_block blk, u64 id)
+struct ice_prof_map *
+ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id)
{
struct ice_prof_map *entry = NULL;
struct ice_prof_map *map;
- LIST_FOR_EACH_ENTRY(map, &hw->blk[blk].es.prof_map, ice_prof_map,
- list)
+ LIST_FOR_EACH_ENTRY(map, &hw->blk[blk].es.prof_map, ice_prof_map, list)
if (map->profile_cookie == id) {
entry = map;
break;
@@ -4735,26 +4734,6 @@ ice_search_prof_id_low(struct ice_hw *hw, enum ice_block blk, u64 id)
}
/**
- * ice_search_prof_id - Search for a profile tracking ID
- * @hw: pointer to the HW struct
- * @blk: hardware block
- * @id: profile tracking ID
- *
- * This will search for a profile tracking ID which was previously added.
- */
-struct ice_prof_map *
-ice_search_prof_id(struct ice_hw *hw, enum ice_block blk, u64 id)
-{
- struct ice_prof_map *entry;
-
- ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
- entry = ice_search_prof_id_low(hw, blk, id);
- ice_release_lock(&hw->blk[blk].es.prof_map_lock);
-
- return entry;
-}
-
-/**
* ice_vsig_prof_id_count - count profiles in a VSIG
* @hw: pointer to the HW struct
* @blk: hardware block
@@ -4969,7 +4948,7 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
- pmap = ice_search_prof_id_low(hw, blk, id);
+ pmap = ice_search_prof_id(hw, blk, id);
if (!pmap) {
status = ICE_ERR_DOES_NOT_EXIST;
goto err_ice_rem_prof;
@@ -5002,21 +4981,27 @@ static enum ice_status
ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl,
struct LIST_HEAD_TYPE *chg)
{
+ enum ice_status status = ICE_SUCCESS;
struct ice_prof_map *map;
struct ice_chs_chg *p;
u16 i;
+ ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
/* Get the details on the profile specified by the handle ID */
map = ice_search_prof_id(hw, blk, hdl);
- if (!map)
- return ICE_ERR_DOES_NOT_EXIST;
+ if (!map) {
+ status = ICE_ERR_DOES_NOT_EXIST;
+ goto err_ice_get_prof;
+ }
for (i = 0; i < map->ptg_cnt; i++)
if (!hw->blk[blk].es.written[map->prof_id]) {
/* add ES to change list */
p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
- if (!p)
+ if (!p) {
+ status = ICE_ERR_NO_MEMORY;
goto err_ice_get_prof;
+ }
p->type = ICE_PTG_ES_ADD;
p->ptype = 0;
@@ -5032,11 +5017,10 @@ ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl,
LIST_ADD(&p->list_entry, chg);
}
- return ICE_SUCCESS;
-
err_ice_get_prof:
+ ice_release_lock(&hw->blk[blk].es.prof_map_lock);
/* let caller clean up the change list */
- return ICE_ERR_NO_MEMORY;
+ return status;
}
/**
@@ -5090,17 +5074,23 @@ static enum ice_status
ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
struct LIST_HEAD_TYPE *lst, u64 hdl)
{
+ enum ice_status status = ICE_SUCCESS;
struct ice_prof_map *map;
struct ice_vsig_prof *p;
u16 i;
+ ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
map = ice_search_prof_id(hw, blk, hdl);
- if (!map)
- return ICE_ERR_DOES_NOT_EXIST;
+ if (!map) {
+ status = ICE_ERR_DOES_NOT_EXIST;
+ goto err_ice_add_prof_to_lst;
+ }
p = (struct ice_vsig_prof *)ice_malloc(hw, sizeof(*p));
- if (!p)
- return ICE_ERR_NO_MEMORY;
+ if (!p) {
+ status = ICE_ERR_NO_MEMORY;
+ goto err_ice_add_prof_to_lst;
+ }
p->profile_cookie = map->profile_cookie;
p->prof_id = map->prof_id;
@@ -5115,7 +5105,9 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk,
LIST_ADD(&p->list, lst);
- return ICE_SUCCESS;
+err_ice_add_prof_to_lst:
+ ice_release_lock(&hw->blk[blk].es.prof_map_lock);
+ return status;
}
/**
@@ -5399,16 +5391,12 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
u8 vl_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
u8 dc_msk[ICE_TCAM_KEY_VAL_SZ] = { 0xFF, 0xFF, 0x00, 0x00, 0x00 };
u8 nm_msk[ICE_TCAM_KEY_VAL_SZ] = { 0x00, 0x00, 0x00, 0x00, 0x00 };
+ enum ice_status status = ICE_SUCCESS;
struct ice_prof_map *map;
struct ice_vsig_prof *t;
struct ice_chs_chg *p;
u16 vsig_idx, i;
- /* Get the details on the profile specified by the handle ID */
- map = ice_search_prof_id(hw, blk, hdl);
- if (!map)
- return ICE_ERR_DOES_NOT_EXIST;
-
/* Error, if this VSIG already has this profile */
if (ice_has_prof_vsig(hw, blk, vsig, hdl))
return ICE_ERR_ALREADY_EXISTS;
@@ -5418,19 +5406,28 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
if (!t)
return ICE_ERR_NO_MEMORY;
+ ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
+ /* Get the details on the profile specified by the handle ID */
+ map = ice_search_prof_id(hw, blk, hdl);
+ if (!map) {
+ status = ICE_ERR_DOES_NOT_EXIST;
+ goto err_ice_add_prof_id_vsig;
+ }
+
t->profile_cookie = map->profile_cookie;
t->prof_id = map->prof_id;
t->tcam_count = map->ptg_cnt;
/* create TCAM entries */
for (i = 0; i < map->ptg_cnt; i++) {
- enum ice_status status;
u16 tcam_idx;
/* add TCAM to change list */
p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
- if (!p)
+ if (!p) {
+ status = ICE_ERR_NO_MEMORY;
goto err_ice_add_prof_id_vsig;
+ }
/* allocate the TCAM entry index */
/* for entries with empty attribute masks, allocate entry from
@@ -5484,12 +5481,14 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
LIST_ADD(&t->list,
&hw->blk[blk].xlt2.vsig_tbl[vsig_idx].prop_lst);
- return ICE_SUCCESS;
+ ice_release_lock(&hw->blk[blk].es.prof_map_lock);
+ return status;
err_ice_add_prof_id_vsig:
+ ice_release_lock(&hw->blk[blk].es.prof_map_lock);
/* let caller clean up the change list */
ice_free(hw, t);
- return ICE_ERR_NO_MEMORY;
+ return status;
}
/**
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 1e944bf52..fb0e34e5f 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -2215,15 +2215,17 @@ enum ice_status
ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
u8 *hw_prof_id)
{
+ enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
struct ice_prof_map *map;
+ ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
map = ice_search_prof_id(hw, blk, prof_id);
if (map) {
*hw_prof_id = map->prof_id;
- return ICE_SUCCESS;
+ status = ICE_SUCCESS;
}
-
- return ICE_ERR_DOES_NOT_EXIST;
+ ice_release_lock(&hw->blk[blk].es.prof_map_lock);
+ return status;
}
/**
@@ -3456,9 +3458,13 @@ ice_rss_update_symm(struct ice_hw *hw,
struct ice_prof_map *map;
u8 prof_id, m;
+ ice_acquire_lock(&hw->blk[ICE_BLK_RSS].es.prof_map_lock);
map = ice_search_prof_id(hw, ICE_BLK_RSS, prof->id);
- prof_id = map->prof_id;
-
+ if (map)
+ prof_id = map->prof_id;
+ ice_release_lock(&hw->blk[ICE_BLK_RSS].es.prof_map_lock);
+ if (!map)
+ return;
/* clear to default */
for (m = 0; m < 6; m++)
wr32(hw, GLQF_HSYMM(prof_id, m), 0);
--
2.13.6
^ permalink raw reply [flat|nested] 15+ messages in thread
* [dpdk-dev] [PATCH 02/10] net/ice/base: refactor to avoid need to retry
2020-06-11 8:43 [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 01/10] net/ice/base: adjust profile id map locks Qi Zhang
@ 2020-06-11 8:43 ` Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 03/10] net/ice/base: add FD support for outer IP of GTPU Qi Zhang
` (8 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Qi Zhang @ 2020-06-11 8:43 UTC (permalink / raw)
To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Jacob Keller, Paul M Stillwell Jr
The ice_discover_caps function is used to read the device and function
capabilities, updating the hardware capabilities structures with
relevant data.
The exact number of capabilities returned by the hardware is unknown
ahead of time. The AdminQ command will report the total number of
capabilities in the return buffer.
The current implementation involves requesting capabilities once,
reading this returned size, and then re-requested with that size.
This isn't really necessary. The firmware interface has a maximum size
of ICE_AQ_MAX_BUF_LEN. Firmware can never return more than
ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem) capabilities.
Avoid the retry loop by simply allocating a buffer of size
ICE_AQ_MAX_BUF_LEN. This is significantly simpler than retrying. The
extra allocation isn't a big deal, as it will be released after we
finish parsing the capabilities.
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 43 +++++++++++----------------------------
1 file changed, 12 insertions(+), 31 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 2c822d7d4..85b6e1a37 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2054,40 +2054,21 @@ ice_discover_caps(struct ice_hw *hw, enum ice_adminq_opc opc)
{
enum ice_status status;
u32 cap_count;
- u16 cbuf_len;
- u8 retries;
-
- /* The driver doesn't know how many capabilities the device will return
- * so the buffer size required isn't known ahead of time. The driver
- * starts with cbuf_len and if this turns out to be insufficient, the
- * device returns ICE_AQ_RC_ENOMEM and also the cap_count it needs.
- * The driver then allocates the buffer based on the count and retries
- * the operation. So it follows that the retry count is 2.
- */
-#define ICE_GET_CAP_BUF_COUNT 40
-#define ICE_GET_CAP_RETRY_COUNT 2
-
- cap_count = ICE_GET_CAP_BUF_COUNT;
- retries = ICE_GET_CAP_RETRY_COUNT;
-
- do {
- void *cbuf;
-
- cbuf_len = (u16)(cap_count *
- sizeof(struct ice_aqc_list_caps_elem));
- cbuf = ice_malloc(hw, cbuf_len);
- if (!cbuf)
- return ICE_ERR_NO_MEMORY;
+ void *cbuf;
- status = ice_aq_discover_caps(hw, cbuf, cbuf_len, &cap_count,
- opc, NULL);
- ice_free(hw, cbuf);
+ cbuf = ice_malloc(hw, ICE_AQ_MAX_BUF_LEN);
+ if (!cbuf)
+ return ICE_ERR_NO_MEMORY;
- if (!status || hw->adminq.sq_last_status != ICE_AQ_RC_ENOMEM)
- break;
+ /* Although the driver doesn't know the number of capabilities the
+ * device will return, we can simply send a 4KB buffer, the maximum
+ * possible size that firmware can return.
+ */
+ cap_count = ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem);
- /* If ENOMEM is returned, try again with bigger buffer */
- } while (--retries);
+ status = ice_aq_discover_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &cap_count,
+ opc, NULL);
+ ice_free(hw, cbuf);
return status;
}
--
2.13.6
^ permalink raw reply [flat|nested] 15+ messages in thread
* [dpdk-dev] [PATCH 03/10] net/ice/base: add FD support for outer IP of GTPU
2020-06-11 8:43 [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 01/10] net/ice/base: adjust profile id map locks Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 02/10] net/ice/base: refactor to avoid need to retry Qi Zhang
@ 2020-06-11 8:43 ` Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 04/10] net/ice/base: add commands for system diagnostic Qi Zhang
` (7 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Qi Zhang @ 2020-06-11 8:43 UTC (permalink / raw)
To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr
Add outer IP address fields while generating the training packets for
GTPU, so that we can support FDIR based on outer IP of GTPU.
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_fdir.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 466e0ee36..ecdebd384 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -1026,10 +1026,10 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP:
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP:
case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER:
- ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
- input->ip.v4.src_ip);
ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
- input->ip.v4.dst_ip);
+ input->ip.v4.src_ip);
+ ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
+ input->ip.v4.dst_ip);
ice_pkt_insert_u32(loc, ICE_IPV4_GTPU_TEID_OFFSET,
input->gtpu_data.teid);
ice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET,
--
2.13.6
^ permalink raw reply [flat|nested] 15+ messages in thread
* [dpdk-dev] [PATCH 04/10] net/ice/base: add commands for system diagnostic
2020-06-11 8:43 [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Qi Zhang
` (2 preceding siblings ...)
2020-06-11 8:43 ` [dpdk-dev] [PATCH 03/10] net/ice/base: add FD support for outer IP of GTPU Qi Zhang
@ 2020-06-11 8:43 ` Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 05/10] net/ice/base: rename misleading variable Qi Zhang
` (6 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Qi Zhang @ 2020-06-11 8:43 UTC (permalink / raw)
To: qiming.yang
Cc: dev, xiaolong.ye, Qi Zhang, Sharon Haroni, Paul M Stillwell Jr
System diagnostic solution extend the ability to fetch FW
internal status data and error indication.
Signed-off-by: Sharon Haroni <sharon.haroni@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 54 +++++++++++++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index f480917cd..eaf6c3d0e 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -2646,6 +2646,50 @@ struct ice_aqc_event_lan_overflow {
u8 reserved[8];
};
+/* Set Health Status (direct 0xFF20) */
+struct ice_aqc_set_health_status_config {
+ u8 event_source;
+#define ICE_AQC_HEALTH_STATUS_SET_PF_SPECIFIC_MASK BIT(0)
+#define ICE_AQC_HEALTH_STATUS_SET_ALL_PF_MASK BIT(1)
+#define ICE_AQC_HEALTH_STATUS_SET_GLOBAL_MASK BIT(2)
+ u8 reserved[15];
+};
+
+/* Get Health Status codes (indirect 0xFF21) */
+struct ice_aqc_get_supported_health_status_codes {
+ __le16 health_code_count;
+ u8 reserved[6];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Get Health Status (indirect 0xFF22) */
+struct ice_aqc_get_health_status {
+ __le16 health_status_count;
+ u8 reserved[6];
+ __le32 addr_high;
+ __le32 addr_low;
+};
+
+/* Get Health Status event buffer entry, (0xFF22)
+ * repeated per reported health status
+ */
+struct ice_aqc_health_status_elem {
+ __le16 health_status_code;
+ __le16 event_source;
+#define ICE_AQC_HEALTH_STATUS_PF (0x1)
+#define ICE_AQC_HEALTH_STATUS_PORT (0x2)
+#define ICE_AQC_HEALTH_STATUS_GLOBAL (0x3)
+ __le32 internal_data1;
+#define ICE_AQC_HEALTH_STATUS_UNDEFINED_DATA (0xDEADBEEF)
+ __le32 internal_data2;
+};
+
+/* Clear Health Status (direct 0xFF23) */
+struct ice_aqc_clear_health_status {
+ __le32 reserved[4];
+};
+
/**
* struct ice_aq_desc - Admin Queue (AQ) descriptor
* @flags: ICE_AQ_FLAG_* flags
@@ -2750,6 +2794,10 @@ struct ice_aq_desc {
struct ice_aqc_get_link_status get_link_status;
struct ice_aqc_event_lan_overflow lan_overflow;
struct ice_aqc_get_link_topo get_link_topo;
+ struct ice_aqc_set_health_status_config set_health_status_config;
+ struct ice_aqc_get_supported_health_status_codes get_supported_health_status_codes;
+ struct ice_aqc_get_health_status get_health_status;
+ struct ice_aqc_clear_health_status clear_health_status;
} params;
};
@@ -2989,6 +3037,12 @@ enum ice_adminq_opc {
/* Standalone Commands/Events */
ice_aqc_opc_event_lan_overflow = 0x1001,
+
+ /* SystemDiagnostic commands */
+ ice_aqc_opc_set_health_status_config = 0xFF20,
+ ice_aqc_opc_get_supported_health_status_codes = 0xFF21,
+ ice_aqc_opc_get_health_status = 0xFF22,
+ ice_aqc_opc_clear_health_status = 0xFF23
};
#endif /* _ICE_ADMINQ_CMD_H_ */
--
2.13.6
^ permalink raw reply [flat|nested] 15+ messages in thread
* [dpdk-dev] [PATCH 05/10] net/ice/base: rename misleading variable
2020-06-11 8:43 [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Qi Zhang
` (3 preceding siblings ...)
2020-06-11 8:43 ` [dpdk-dev] [PATCH 04/10] net/ice/base: add commands for system diagnostic Qi Zhang
@ 2020-06-11 8:43 ` Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 06/10] net/ice/base: add FD support for GTPU with outer IPv6 Qi Zhang
` (5 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Qi Zhang @ 2020-06-11 8:43 UTC (permalink / raw)
To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Nick Nunley, Paul M Stillwell Jr
The grst_delay variable in ice_check_reset contains the maximum time
(in 100 msec units) that the driver will wait for a reset event to
transition to the Device Active state. The value is the sum of three
separate components:
1) The maximum time it may take for the firmware to process its
outstanding command before handling the reset request.
2) The value in RSTCTL.GRSTDEL (the delay firmware inserts between first
seeing the driver reset request and the actual hardware assertion).
3) The maximum expected reset processing time in hardware.
Referring to this total time as "grst_delay" is misleading and
potentially confusing to someone checking the code and cross-referencing
the hardware specification.
Fix this by renaming the variable to "grst_timeout", which is more
descriptive of its actual use.
Signed-off-by: Nick Nunley <nicholas.d.nunley@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_common.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 85b6e1a37..1683daf28 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -882,23 +882,23 @@ void ice_deinit_hw(struct ice_hw *hw)
*/
enum ice_status ice_check_reset(struct ice_hw *hw)
{
- u32 cnt, reg = 0, grst_delay, uld_mask;
+ u32 cnt, reg = 0, grst_timeout, uld_mask;
/* Poll for Device Active state in case a recent CORER, GLOBR,
* or EMPR has occurred. The grst delay value is in 100ms units.
* Add 1sec for outstanding AQ commands that can take a long time.
*/
- grst_delay = ((rd32(hw, GLGEN_RSTCTL) & GLGEN_RSTCTL_GRSTDEL_M) >>
- GLGEN_RSTCTL_GRSTDEL_S) + 10;
+ grst_timeout = ((rd32(hw, GLGEN_RSTCTL) & GLGEN_RSTCTL_GRSTDEL_M) >>
+ GLGEN_RSTCTL_GRSTDEL_S) + 10;
- for (cnt = 0; cnt < grst_delay; cnt++) {
+ for (cnt = 0; cnt < grst_timeout; cnt++) {
ice_msec_delay(100, true);
reg = rd32(hw, GLGEN_RSTAT);
if (!(reg & GLGEN_RSTAT_DEVSTATE_M))
break;
}
- if (cnt == grst_delay) {
+ if (cnt == grst_timeout) {
ice_debug(hw, ICE_DBG_INIT,
"Global reset polling failed to complete.\n");
return ICE_ERR_RESET_FAILED;
--
2.13.6
^ permalink raw reply [flat|nested] 15+ messages in thread
* [dpdk-dev] [PATCH 06/10] net/ice/base: add FD support for GTPU with outer IPv6
2020-06-11 8:43 [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Qi Zhang
` (4 preceding siblings ...)
2020-06-11 8:43 ` [dpdk-dev] [PATCH 05/10] net/ice/base: rename misleading variable Qi Zhang
@ 2020-06-11 8:43 ` Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 07/10] net/ice/base: get tunnel type for recipe Qi Zhang
` (4 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Qi Zhang @ 2020-06-11 8:43 UTC (permalink / raw)
To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr
Add FDir support for MAC_IPV6_GTPU type with outer IPv6 address, teid
and qfi fields matching.
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_fdir.c | 36 ++++++++++++++++++++++++++++++++++++
drivers/net/ice/base/ice_fdir.h | 2 ++
drivers/net/ice/base/ice_type.h | 1 +
3 files changed, 39 insertions(+)
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index ecdebd384..c5a20632c 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -102,6 +102,25 @@ static const u8 ice_fdir_ipv4_gtpu4_pkt[] = {
0x00, 0x00,
};
+static const u8 ice_fdir_ipv6_gtpu6_pkt[] = {
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+ 0x00, 0x00, 0x00, 0x44, 0x11, 0x40, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08, 0x68,
+ 0x08, 0x68, 0x00, 0x44, 0x7f, 0xed, 0x34, 0xff,
+ 0x00, 0x34, 0x12, 0x34, 0x56, 0x78, 0x00, 0x00,
+ 0x00, 0x85, 0x02, 0x00, 0x33, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x3b, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00,
+};
+
static const u8 ice_fdir_ipv4_l2tpv3_pkt[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
@@ -467,6 +486,13 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
ice_fdir_ipv4_gtpu4_pkt,
},
{
+ ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER,
+ sizeof(ice_fdir_ipv6_gtpu6_pkt),
+ ice_fdir_ipv6_gtpu6_pkt,
+ sizeof(ice_fdir_ipv6_gtpu6_pkt),
+ ice_fdir_ipv6_gtpu6_pkt,
+ },
+ {
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV3,
sizeof(ice_fdir_ipv4_l2tpv3_pkt), ice_fdir_ipv4_l2tpv3_pkt,
sizeof(ice_fdir_ipv4_l2tpv3_pkt), ice_fdir_ipv4_l2tpv3_pkt,
@@ -1035,6 +1061,16 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
ice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET,
input->gtpu_data.qfi);
break;
+ case ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER:
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
+ input->ip.v6.src_ip);
+ ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+ input->ip.v6.dst_ip);
+ ice_pkt_insert_u32(loc, ICE_IPV6_GTPU_TEID_OFFSET,
+ input->gtpu_data.teid);
+ ice_pkt_insert_u6_qfi(loc, ICE_IPV6_GTPU_QFI_OFFSET,
+ input->gtpu_data.qfi);
+ break;
case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV3:
ice_pkt_insert_u32(loc, ICE_IPV4_L2TPV3_SESS_ID_OFFSET,
input->l2tpv3_data.session_id);
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index e4f7b1387..1f31debe6 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -46,6 +46,8 @@
#define ICE_IPV6_PROTO_OFFSET 20
#define ICE_IPV4_GTPU_TEID_OFFSET 46
#define ICE_IPV4_GTPU_QFI_OFFSET 56
+#define ICE_IPV6_GTPU_TEID_OFFSET 66
+#define ICE_IPV6_GTPU_QFI_OFFSET 76
#define ICE_IPV4_L2TPV3_SESS_ID_OFFSET 34
#define ICE_IPV6_L2TPV3_SESS_ID_OFFSET 54
#define ICE_IPV4_ESP_SPI_OFFSET 34
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 41a1912bf..c13cd7b00 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -296,6 +296,7 @@ enum ice_fltr_ptype {
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER,
+ ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER,
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV3,
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV3,
ICE_FLTR_PTYPE_NONF_IPV4_ESP,
--
2.13.6
^ permalink raw reply [flat|nested] 15+ messages in thread
* [dpdk-dev] [PATCH 07/10] net/ice/base: get tunnel type for recipe
2020-06-11 8:43 [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Qi Zhang
` (5 preceding siblings ...)
2020-06-11 8:43 ` [dpdk-dev] [PATCH 06/10] net/ice/base: add FD support for GTPU with outer IPv6 Qi Zhang
@ 2020-06-11 8:43 ` Qi Zhang
2020-06-19 14:33 ` Ferruh Yigit
2020-06-11 8:43 ` [dpdk-dev] [PATCH 08/10] net/ice/base: choose TCP dummy packet by protocol Qi Zhang
` (3 subsequent siblings)
10 siblings, 1 reply; 15+ messages in thread
From: Qi Zhang @ 2020-06-11 8:43 UTC (permalink / raw)
To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Wei Zhao, Paul M Stillwell Jr
This patch add support to get tunnel type of recipe
after get recipe from fw. This will fix the issue in
function ice_find_recp() for tunnel type comparing.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 177 +++++++++++++++++++++++++++++++++++++-
drivers/net/ice/base/ice_switch.h | 2 +
2 files changed, 177 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 1b1693dbb..06d8f9c55 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1024,6 +1024,179 @@ static void ice_collect_result_idx(struct ice_aqc_recipe_data_elem *buf,
}
/**
+ * ice_get_tun_type_for_recipe - get tunnel type for the recipe
+ * @rid: recipe ID that we are populating
+ */
+static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
+{
+ u8 vxlan_profile[12] = {10, 11, 12, 16, 17, 18, 22, 23, 24, 25, 26, 27};
+ u8 gre_profile[12] = {13, 14, 15, 19, 20, 21, 28, 29, 30, 31, 32, 33};
+ u8 pppoe_profile[7] = {34, 35, 36, 37, 38, 39, 40};
+ u8 non_tun_profile[6] = {4, 5, 6, 7, 8, 9};
+ enum ice_sw_tunnel_type tun_type;
+ u16 i, j, profile_num = 0;
+ bool non_tun_valid = false;
+ bool pppoe_valid = false;
+ bool vxlan_valid = false;
+ bool gre_valid = false;
+ bool gtp_valid = false;
+ bool flag_valid = false;
+
+ for (j = 0; j < ICE_MAX_NUM_PROFILES; j++) {
+ if (!ice_is_bit_set(recipe_to_profile[rid], j))
+ continue;
+ else
+ profile_num++;
+
+ for (i = 0; i < 12; i++) {
+ if (gre_profile[i] == j)
+ gre_valid = true;
+ }
+
+ for (i = 0; i < 12; i++) {
+ if (vxlan_profile[i] == j)
+ vxlan_valid = true;
+ }
+
+ for (i = 0; i < 7; i++) {
+ if (pppoe_profile[i] == j)
+ pppoe_valid = true;
+ }
+
+ for (i = 0; i < 6; i++) {
+ if (non_tun_profile[i] == j)
+ non_tun_valid = true;
+ }
+
+ if (j >= ICE_PROFID_IPV4_GTPC_TEID &&
+ j <= ICE_PROFID_IPV6_GTPU_IPV6_OTHER)
+ gtp_valid = true;
+
+ if (j >= ICE_PROFID_IPV4_ESP &&
+ j <= ICE_PROFID_IPV6_PFCP_SESSION)
+ flag_valid = true;
+ }
+
+ if (!non_tun_valid && vxlan_valid)
+ tun_type = ICE_SW_TUN_VXLAN;
+ else if (!non_tun_valid && gre_valid)
+ tun_type = ICE_SW_TUN_NVGRE;
+ else if (!non_tun_valid && pppoe_valid)
+ tun_type = ICE_SW_TUN_PPPOE;
+ else if (!non_tun_valid && gtp_valid)
+ tun_type = ICE_SW_TUN_GTP;
+ else if ((non_tun_valid && vxlan_valid) ||
+ (non_tun_valid && gre_valid) ||
+ (non_tun_valid && gtp_valid) ||
+ (non_tun_valid && pppoe_valid))
+ tun_type = ICE_SW_TUN_AND_NON_TUN;
+ else if ((non_tun_valid && !vxlan_valid) ||
+ (non_tun_valid && !gre_valid) ||
+ (non_tun_valid && !gtp_valid) ||
+ (non_tun_valid && !pppoe_valid))
+ tun_type = ICE_NON_TUN;
+
+ if (profile_num > 1 && tun_type == ICE_SW_TUN_PPPOE) {
+ i = ice_is_bit_set(recipe_to_profile[rid],
+ ICE_PROFID_PPPOE_IPV4_OTHER);
+ j = ice_is_bit_set(recipe_to_profile[rid],
+ ICE_PROFID_PPPOE_IPV6_OTHER);
+ if (i && !j)
+ tun_type = ICE_SW_TUN_PPPOE_IPV4;
+ else if (!i && j)
+ tun_type = ICE_SW_TUN_PPPOE_IPV6;
+ }
+
+ if (profile_num == 1 && (flag_valid || non_tun_valid)) {
+ for (j = 0; j < ICE_MAX_NUM_PROFILES; j++) {
+ if (ice_is_bit_set(recipe_to_profile[rid], j)) {
+ switch (j) {
+ case ICE_PROFID_IPV4_TCP:
+ tun_type = ICE_SW_IPV4_TCP;
+ break;
+ case ICE_PROFID_IPV4_UDP:
+ tun_type = ICE_SW_IPV4_UDP;
+ break;
+ case ICE_PROFID_IPV6_TCP:
+ tun_type = ICE_SW_IPV6_TCP;
+ break;
+ case ICE_PROFID_IPV6_UDP:
+ tun_type = ICE_SW_IPV6_UDP;
+ break;
+ case ICE_PROFID_PPPOE_PAY:
+ tun_type = ICE_SW_TUN_PPPOE_PAY;
+ break;
+ case ICE_PROFID_PPPOE_IPV4_TCP:
+ tun_type = ICE_SW_TUN_PPPOE_IPV4_TCP;
+ break;
+ case ICE_PROFID_PPPOE_IPV4_UDP:
+ tun_type = ICE_SW_TUN_PPPOE_IPV4_UDP;
+ break;
+ case ICE_PROFID_PPPOE_IPV4_OTHER:
+ tun_type = ICE_SW_TUN_PPPOE_IPV4;
+ break;
+ case ICE_PROFID_PPPOE_IPV6_TCP:
+ tun_type = ICE_SW_TUN_PPPOE_IPV6_TCP;
+ break;
+ case ICE_PROFID_PPPOE_IPV6_UDP:
+ tun_type = ICE_SW_TUN_PPPOE_IPV4_UDP;
+ break;
+ case ICE_PROFID_PPPOE_IPV6_OTHER:
+ tun_type = ICE_SW_TUN_PPPOE_IPV6;
+ break;
+ case ICE_PROFID_IPV4_ESP:
+ tun_type = ICE_SW_TUN_IPV4_ESP;
+ break;
+ case ICE_PROFID_IPV6_ESP:
+ tun_type = ICE_SW_TUN_IPV6_ESP;
+ break;
+ case ICE_PROFID_IPV4_AH:
+ tun_type = ICE_SW_TUN_IPV4_AH;
+ break;
+ case ICE_PROFID_IPV6_AH:
+ tun_type = ICE_SW_TUN_IPV6_AH;
+ break;
+ case ICE_PROFID_IPV4_NAT_T:
+ tun_type = ICE_SW_TUN_IPV4_NAT_T;
+ break;
+ case ICE_PROFID_IPV6_NAT_T:
+ tun_type = ICE_SW_TUN_IPV6_NAT_T;
+ break;
+ case ICE_PROFID_IPV4_PFCP_NODE:
+ tun_type =
+ ICE_SW_TUN_PROFID_IPV4_PFCP_NODE;
+ break;
+ case ICE_PROFID_IPV6_PFCP_NODE:
+ tun_type =
+ ICE_SW_TUN_PROFID_IPV6_PFCP_NODE;
+ break;
+ case ICE_PROFID_IPV4_PFCP_SESSION:
+ tun_type =
+ ICE_SW_TUN_PROFID_IPV4_PFCP_SESSION;
+ break;
+ case ICE_PROFID_IPV6_PFCP_SESSION:
+ tun_type =
+ ICE_SW_TUN_PROFID_IPV6_PFCP_SESSION;
+ break;
+ case ICE_PROFID_MAC_IPV4_L2TPV3:
+ tun_type = ICE_SW_TUN_IPV4_L2TPV3;
+ break;
+ case ICE_PROFID_MAC_IPV6_L2TPV3:
+ tun_type = ICE_SW_TUN_IPV6_L2TPV3;
+ break;
+ default:
+ break;
+ }
+
+ return tun_type;
+ }
+ }
+ }
+
+ return tun_type;
+}
+
+/**
* ice_get_recp_frm_fw - update SW bookkeeping from FW recipe entries
* @hw: pointer to hardware structure
* @recps: struct that we need to populate
@@ -1166,6 +1339,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
lkup_exts->n_val_words = fv_word_idx;
recps[rid].big_recp = (num_recps > 1);
recps[rid].n_grp_count = (u8)num_recps;
+ recps[rid].tun_type = ice_get_tun_type_for_recipe(rid);
recps[rid].root_buf = (struct ice_aqc_recipe_data_elem *)
ice_memdup(hw, tmp, recps[rid].n_grp_count *
sizeof(*recps[rid].root_buf), ICE_NONDMA_TO_NONDMA);
@@ -5548,8 +5722,7 @@ static u16 ice_find_recp(struct ice_hw *hw, struct ice_prot_lkup_ext *lkup_exts,
/* If for "i"th recipe the found was never set to false
* then it means we found our match
*/
- if ((tun_type == recp[i].tun_type ||
- tun_type == ICE_SW_TUN_AND_NON_TUN) && found)
+ if (tun_type == recp[i].tun_type && found)
return i; /* Return the recipe ID */
}
}
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 1ba85b16b..cc3d2702e 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -27,6 +27,8 @@
#define ICE_PROFID_PPPOE_IPV6_TCP 38
#define ICE_PROFID_PPPOE_IPV6_UDP 39
#define ICE_PROFID_PPPOE_IPV6_OTHER 40
+#define ICE_PROFID_IPV4_GTPC_TEID 41
+#define ICE_PROFID_IPV6_GTPU_IPV6_OTHER 70
#define ICE_PROFID_IPV4_ESP 71
#define ICE_PROFID_IPV6_ESP 72
#define ICE_PROFID_IPV4_AH 73
--
2.13.6
^ permalink raw reply [flat|nested] 15+ messages in thread
* [dpdk-dev] [PATCH 08/10] net/ice/base: choose TCP dummy packet by protocol
2020-06-11 8:43 [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Qi Zhang
` (6 preceding siblings ...)
2020-06-11 8:43 ` [dpdk-dev] [PATCH 07/10] net/ice/base: get tunnel type for recipe Qi Zhang
@ 2020-06-11 8:43 ` Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 09/10] net/ice/base: fix the VSI ID mask to be 10 bit Qi Zhang
` (2 subsequent siblings)
10 siblings, 0 replies; 15+ messages in thread
From: Qi Zhang @ 2020-06-11 8:43 UTC (permalink / raw)
To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Wei Zhao, Paul M Stillwell Jr
In order to find proper dummy packets for switch filter,
it need to check ipv4 next protocol number, if it is 0x06,
which means next payload is TCP, we need to use TCP
format dummy packet.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_switch.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 06d8f9c55..ee0813b52 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -13,6 +13,7 @@
#define ICE_IPV4_NVGRE_PROTO_ID 0x002F
#define ICE_PPP_IPV6_PROTO_ID 0x0057
#define ICE_IPV6_ETHER_ID 0x86DD
+#define ICE_TCP_PROTO_ID 0x06
/* Dummy ethernet header needed in the ice_aqc_sw_rules_elem
* struct to configure any switch filter rules.
@@ -6836,6 +6837,12 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
lkups[i].m_u.ethertype.ethtype_id ==
0xFFFF)
ipv6 = true;
+ else if (lkups[i].type == ICE_IPV4_IL &&
+ lkups[i].h_u.ipv4_hdr.protocol ==
+ ICE_TCP_PROTO_ID &&
+ lkups[i].m_u.ipv4_hdr.protocol ==
+ 0xFF)
+ tcp = true;
}
if (tun_type == ICE_SW_TUN_IPV4_ESP) {
--
2.13.6
^ permalink raw reply [flat|nested] 15+ messages in thread
* [dpdk-dev] [PATCH 09/10] net/ice/base: fix the VSI ID mask to be 10 bit
2020-06-11 8:43 [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Qi Zhang
` (7 preceding siblings ...)
2020-06-11 8:43 ` [dpdk-dev] [PATCH 08/10] net/ice/base: choose TCP dummy packet by protocol Qi Zhang
@ 2020-06-11 8:43 ` Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 10/10] net/ice/base: replace RSS profile locks Qi Zhang
2020-06-18 6:04 ` [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Yang, Qiming
10 siblings, 0 replies; 15+ messages in thread
From: Qi Zhang @ 2020-06-11 8:43 UTC (permalink / raw)
To: qiming.yang
Cc: dev, xiaolong.ye, Qi Zhang, stable, Kiran Patil, Paul M Stillwell Jr
set_rss_lut failed due to incorrect vsi_id mask. vsi_id is 10 bit
but mask was 0x1FF whereas it should be 0x3FF.
For vsi_num >= 512, FW set_rss_lut has been failing with return code
EACCESS (vsi ownership issue) because software was providing
incorrect vsi_num (dropping 10th bit due to incorrect mask) for
set_rss_lut admin command
Fixes: a90fae1d0755 ("net/ice/base: add admin queue structures and commands")
Cc: stable@dpdk.org
Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_adminq_cmd.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index eaf6c3d0e..9ee5b4eb5 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1992,7 +1992,7 @@ struct ice_aqc_get_set_rss_keys {
struct ice_aqc_get_set_rss_lut {
#define ICE_AQC_GSET_RSS_LUT_VSI_VALID BIT(15)
#define ICE_AQC_GSET_RSS_LUT_VSI_ID_S 0
-#define ICE_AQC_GSET_RSS_LUT_VSI_ID_M (0x1FF << ICE_AQC_GSET_RSS_LUT_VSI_ID_S)
+#define ICE_AQC_GSET_RSS_LUT_VSI_ID_M (0x3FF << ICE_AQC_GSET_RSS_LUT_VSI_ID_S)
__le16 vsi_id;
#define ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_S 0
#define ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_M \
--
2.13.6
^ permalink raw reply [flat|nested] 15+ messages in thread
* [dpdk-dev] [PATCH 10/10] net/ice/base: replace RSS profile locks
2020-06-11 8:43 [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Qi Zhang
` (8 preceding siblings ...)
2020-06-11 8:43 ` [dpdk-dev] [PATCH 09/10] net/ice/base: fix the VSI ID mask to be 10 bit Qi Zhang
@ 2020-06-11 8:43 ` Qi Zhang
2020-06-18 6:04 ` [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Yang, Qiming
10 siblings, 0 replies; 15+ messages in thread
From: Qi Zhang @ 2020-06-11 8:43 UTC (permalink / raw)
To: qiming.yang
Cc: dev, xiaolong.ye, Qi Zhang, Vignesh Sridhar, Paul M Stillwell Jr
Replacing flow profile locks with RSS profile locks in the function to
remove all RSS rules for a given VSI. This is to align the locks used
for RSS rule addition to VSI and removal during VSI teardown to avoid
a race condition owing to several iterations of the above operations.
In function to get RSS rules for given VSI and protocol header replacing
the pointer reference of the RSS entry with a copy of hash value to
ensure thread safety.
Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flow.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index fb0e34e5f..6adcda844 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -3314,7 +3314,7 @@ enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
if (LIST_EMPTY(&hw->fl_profs[blk]))
return ICE_SUCCESS;
- ice_acquire_lock(&hw->fl_profs_locks[blk]);
+ ice_acquire_lock(&hw->rss_locks);
LIST_FOR_EACH_ENTRY_SAFE(p, t, &hw->fl_profs[blk], ice_flow_prof,
l_entry)
if (ice_is_bit_set(p->vsis, vsi_handle)) {
@@ -3323,12 +3323,12 @@ enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
break;
if (!ice_is_any_bit_set(p->vsis, ICE_MAX_VSI)) {
- status = ice_flow_rem_prof_sync(hw, blk, p);
+ status = ice_flow_rem_prof(hw, blk, p->id);
if (status)
break;
}
}
- ice_release_lock(&hw->fl_profs_locks[blk]);
+ ice_release_lock(&hw->rss_locks);
return status;
}
@@ -3820,7 +3820,8 @@ enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
*/
u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs)
{
- struct ice_rss_cfg *r, *rss_cfg = NULL;
+ u64 rss_hash = ICE_HASH_INVALID;
+ struct ice_rss_cfg *r;
/* verify if the protocol header is non zero and VSI is valid */
if (hdrs == ICE_FLOW_SEG_HDR_NONE || !ice_is_vsi_valid(hw, vsi_handle))
@@ -3831,10 +3832,10 @@ u64 ice_get_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u32 hdrs)
ice_rss_cfg, l_entry)
if (ice_is_bit_set(r->vsis, vsi_handle) &&
r->packet_hdr == hdrs) {
- rss_cfg = r;
+ rss_hash = r->hashed_flds;
break;
}
ice_release_lock(&hw->rss_locks);
- return rss_cfg ? rss_cfg->hashed_flds : ICE_HASH_INVALID;
+ return rss_hash;
}
--
2.13.6
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2
2020-06-11 8:43 [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Qi Zhang
` (9 preceding siblings ...)
2020-06-11 8:43 ` [dpdk-dev] [PATCH 10/10] net/ice/base: replace RSS profile locks Qi Zhang
@ 2020-06-18 6:04 ` Yang, Qiming
2020-06-19 4:24 ` Zhang, Qi Z
10 siblings, 1 reply; 15+ messages in thread
From: Yang, Qiming @ 2020-06-18 6:04 UTC (permalink / raw)
To: Zhang, Qi Z; +Cc: dev, Ye, Xiaolong
> -----Original Message-----
> From: Zhang, Qi Z <qi.z.zhang@intel.com>
> Sent: Thursday, June 11, 2020 16:43
> To: Yang, Qiming <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z
> <qi.z.zhang@intel.com>
> Subject: [PATCH 00/10] net/ice: base code update for 20.08 batch 2
>
> Main changes:
> 1. support outer IP filter for GTPU (include IPv6) 2. recipe can be reused
> between PFs.
> 3. fix VSI ID mask
> 4. some code refactor and clean
>
> Qi Zhang (10):
> net/ice/base: adjust profile id map locks
> net/ice/base: refactor to avoid need to retry
> net/ice/base: add FD support for outer IP of GTPU
> net/ice/base: add commands for system diagnostic
> net/ice/base: rename misleading variable
> net/ice/base: add FD support for GTPU with outer IPv6
> net/ice/base: get tunnel type for recipe
> net/ice/base: choose TCP dummy packet by protocol
> net/ice/base: fix the VSI ID mask to be 10 bit
> net/ice/base: replace RSS profile locks
>
> drivers/net/ice/base/ice_adminq_cmd.h | 56 ++++++++++-
> drivers/net/ice/base/ice_common.c | 53 ++++------
> drivers/net/ice/base/ice_fdir.c | 42 +++++++-
> drivers/net/ice/base/ice_fdir.h | 2 +
> drivers/net/ice/base/ice_flex_pipe.c | 95 +++++++++---------
> drivers/net/ice/base/ice_flow.c | 29 ++++--
> drivers/net/ice/base/ice_switch.c | 184
> +++++++++++++++++++++++++++++++++-
> drivers/net/ice/base/ice_switch.h | 2 +
> drivers/net/ice/base/ice_type.h | 1 +
> 9 files changed, 363 insertions(+), 101 deletions(-)
>
> --
> 2.13.6
Acked-by: Qiming Yang <qiming.yang@intel.com>
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2
2020-06-18 6:04 ` [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Yang, Qiming
@ 2020-06-19 4:24 ` Zhang, Qi Z
2020-06-23 10:15 ` Yang, Qiming
0 siblings, 1 reply; 15+ messages in thread
From: Zhang, Qi Z @ 2020-06-19 4:24 UTC (permalink / raw)
To: Yang, Qiming; +Cc: dev, Ye, Xiaolong
> -----Original Message-----
> From: Yang, Qiming <qiming.yang@intel.com>
> Sent: Thursday, June 18, 2020 2:04 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>
> Subject: RE: [PATCH 00/10] net/ice: base code update for 20.08 batch 2
>
> > -----Original Message-----
> > From: Zhang, Qi Z <qi.z.zhang@intel.com>
> > Sent: Thursday, June 11, 2020 16:43
> > To: Yang, Qiming <qiming.yang@intel.com>
> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z
> > <qi.z.zhang@intel.com>
> > Subject: [PATCH 00/10] net/ice: base code update for 20.08 batch 2
> >
> > Main changes:
> > 1. support outer IP filter for GTPU (include IPv6) 2. recipe can be
> > reused between PFs.
> > 3. fix VSI ID mask
> > 4. some code refactor and clean
> >
> > Qi Zhang (10):
> > net/ice/base: adjust profile id map locks
> > net/ice/base: refactor to avoid need to retry
> > net/ice/base: add FD support for outer IP of GTPU
> > net/ice/base: add commands for system diagnostic
> > net/ice/base: rename misleading variable
> > net/ice/base: add FD support for GTPU with outer IPv6
> > net/ice/base: get tunnel type for recipe
> > net/ice/base: choose TCP dummy packet by protocol
> > net/ice/base: fix the VSI ID mask to be 10 bit
> > net/ice/base: replace RSS profile locks
> >
> > drivers/net/ice/base/ice_adminq_cmd.h | 56 ++++++++++-
> > drivers/net/ice/base/ice_common.c | 53 ++++------
> > drivers/net/ice/base/ice_fdir.c | 42 +++++++-
> > drivers/net/ice/base/ice_fdir.h | 2 +
> > drivers/net/ice/base/ice_flex_pipe.c | 95 +++++++++---------
> > drivers/net/ice/base/ice_flow.c | 29 ++++--
> > drivers/net/ice/base/ice_switch.c | 184
> > +++++++++++++++++++++++++++++++++-
> > drivers/net/ice/base/ice_switch.h | 2 +
> > drivers/net/ice/base/ice_type.h | 1 +
> > 9 files changed, 363 insertions(+), 101 deletions(-)
> >
> > --
> > 2.13.6
>
> Acked-by: Qiming Yang <qiming.yang@intel.com>
Applied to dpdk-next-net-intel.
Thanks
Qi
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [dpdk-dev] [PATCH 07/10] net/ice/base: get tunnel type for recipe
2020-06-11 8:43 ` [dpdk-dev] [PATCH 07/10] net/ice/base: get tunnel type for recipe Qi Zhang
@ 2020-06-19 14:33 ` Ferruh Yigit
0 siblings, 0 replies; 15+ messages in thread
From: Ferruh Yigit @ 2020-06-19 14:33 UTC (permalink / raw)
To: Qi Zhang, qiming.yang; +Cc: dev, xiaolong.ye, Wei Zhao, Paul M Stillwell Jr
On 6/11/2020 9:43 AM, Qi Zhang wrote:
> This patch add support to get tunnel type of recipe
> after get recipe from fw. This will fix the issue in
> function ice_find_recp() for tunnel type comparing.
>
> Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
<...>
> /**
> + * ice_get_tun_type_for_recipe - get tunnel type for the recipe
> + * @rid: recipe ID that we are populating
> + */
> +static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
> +{
> + u8 vxlan_profile[12] = {10, 11, 12, 16, 17, 18, 22, 23, 24, 25, 26, 27};
> + u8 gre_profile[12] = {13, 14, 15, 19, 20, 21, 28, 29, 30, 31, 32, 33};
> + u8 pppoe_profile[7] = {34, 35, 36, 37, 38, 39, 40};
> + u8 non_tun_profile[6] = {4, 5, 6, 7, 8, 9};
> + enum ice_sw_tunnel_type tun_type;
> + u16 i, j, profile_num = 0;
> + bool non_tun_valid = false;
> + bool pppoe_valid = false;
> + bool vxlan_valid = false;
> + bool gre_valid = false;
> + bool gtp_valid = false;
> + bool flag_valid = false;
> +
> + for (j = 0; j < ICE_MAX_NUM_PROFILES; j++) {
> + if (!ice_is_bit_set(recipe_to_profile[rid], j))
> + continue;
> + else
> + profile_num++;
> +
> + for (i = 0; i < 12; i++) {
> + if (gre_profile[i] == j)
> + gre_valid = true;
> + }
> +
> + for (i = 0; i < 12; i++) {
> + if (vxlan_profile[i] == j)
> + vxlan_valid = true;
> + }
> +
> + for (i = 0; i < 7; i++) {
> + if (pppoe_profile[i] == j)
> + pppoe_valid = true;
> + }
> +
> + for (i = 0; i < 6; i++) {
> + if (non_tun_profile[i] == j)
> + non_tun_valid = true;
> + }
> +
> + if (j >= ICE_PROFID_IPV4_GTPC_TEID &&
> + j <= ICE_PROFID_IPV6_GTPU_IPV6_OTHER)
> + gtp_valid = true;
> +
> + if (j >= ICE_PROFID_IPV4_ESP &&
> + j <= ICE_PROFID_IPV6_PFCP_SESSION)
> + flag_valid = true;
> + }
> +
> + if (!non_tun_valid && vxlan_valid)
> + tun_type = ICE_SW_TUN_VXLAN;
> + else if (!non_tun_valid && gre_valid)
> + tun_type = ICE_SW_TUN_NVGRE;
> + else if (!non_tun_valid && pppoe_valid)
> + tun_type = ICE_SW_TUN_PPPOE;
> + else if (!non_tun_valid && gtp_valid)
> + tun_type = ICE_SW_TUN_GTP;
> + else if ((non_tun_valid && vxlan_valid) ||
> + (non_tun_valid && gre_valid) ||
> + (non_tun_valid && gtp_valid) ||
> + (non_tun_valid && pppoe_valid))
> + tun_type = ICE_SW_TUN_AND_NON_TUN;
> + else if ((non_tun_valid && !vxlan_valid) ||
> + (non_tun_valid && !gre_valid) ||
> + (non_tun_valid && !gtp_valid) ||
> + (non_tun_valid && !pppoe_valid))
> + tun_type = ICE_NON_TUN;
> +
> + if (profile_num > 1 && tun_type == ICE_SW_TUN_PPPOE) {
This is giving 'tun_type' may be used uninitialized warning [1], fixing it
setting a default value [2] while merging.
[1]
.../dpdk/drivers/net/ice/base/ice_switch.c: In function ‘ice_find_recp’:
.../dpdk/drivers/net/ice/base/ice_switch.c:1100:22: error: ‘tun_type’ may be
used uninitialized in this function [-Werror=maybe-uninitialized]
1100 | if (profile_num > 1 && tun_type == ICE_SW_TUN_PPPOE) {
| ~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
.../dpdk/drivers/net/ice/base/ice_switch.c:1037:26: note: ‘tun_type’ was
declared here
1037 | enum ice_sw_tunnel_type tun_type;
| ^~~~~~~~
[2]
- enum ice_sw_tunnel_type tun_type;
+ enum ice_sw_tunnel_type tun_type = ICE_NON_TUN;
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2
2020-06-19 4:24 ` Zhang, Qi Z
@ 2020-06-23 10:15 ` Yang, Qiming
0 siblings, 0 replies; 15+ messages in thread
From: Yang, Qiming @ 2020-06-23 10:15 UTC (permalink / raw)
To: Zhang, Qi Z; +Cc: dev, Ye, Xiaolong
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
> -----Original Message-----
> From: Zhang, Qi Z <qi.z.zhang@intel.com>
> Sent: Friday, June 19, 2020 12:25
> To: Yang, Qiming <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>
> Subject: RE: [PATCH 00/10] net/ice: base code update for 20.08 batch 2
>
>
>
> > -----Original Message-----
> > From: Yang, Qiming <qiming.yang@intel.com>
> > Sent: Thursday, June 18, 2020 2:04 PM
> > To: Zhang, Qi Z <qi.z.zhang@intel.com>
> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>
> > Subject: RE: [PATCH 00/10] net/ice: base code update for 20.08 batch 2
> >
> > > -----Original Message-----
> > > From: Zhang, Qi Z <qi.z.zhang@intel.com>
> > > Sent: Thursday, June 11, 2020 16:43
> > > To: Yang, Qiming <qiming.yang@intel.com>
> > > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z
> > > <qi.z.zhang@intel.com>
> > > Subject: [PATCH 00/10] net/ice: base code update for 20.08 batch 2
> > >
> > > Main changes:
> > > 1. support outer IP filter for GTPU (include IPv6) 2. recipe can be
> > > reused between PFs.
> > > 3. fix VSI ID mask
> > > 4. some code refactor and clean
> > >
> > > Qi Zhang (10):
> > > net/ice/base: adjust profile id map locks
> > > net/ice/base: refactor to avoid need to retry
> > > net/ice/base: add FD support for outer IP of GTPU
> > > net/ice/base: add commands for system diagnostic
> > > net/ice/base: rename misleading variable
> > > net/ice/base: add FD support for GTPU with outer IPv6
> > > net/ice/base: get tunnel type for recipe
> > > net/ice/base: choose TCP dummy packet by protocol
> > > net/ice/base: fix the VSI ID mask to be 10 bit
> > > net/ice/base: replace RSS profile locks
> > >
> > > drivers/net/ice/base/ice_adminq_cmd.h | 56 ++++++++++-
> > > drivers/net/ice/base/ice_common.c | 53 ++++------
> > > drivers/net/ice/base/ice_fdir.c | 42 +++++++-
> > > drivers/net/ice/base/ice_fdir.h | 2 +
> > > drivers/net/ice/base/ice_flex_pipe.c | 95 +++++++++---------
> > > drivers/net/ice/base/ice_flow.c | 29 ++++--
> > > drivers/net/ice/base/ice_switch.c | 184
> > > +++++++++++++++++++++++++++++++++-
> > > drivers/net/ice/base/ice_switch.h | 2 +
> > > drivers/net/ice/base/ice_type.h | 1 +
> > > 9 files changed, 363 insertions(+), 101 deletions(-)
> > >
> > > --
> > > 2.13.6
> >
> > Acked-by: Qiming Yang <qiming.yang@intel.com>
>
> Applied to dpdk-next-net-intel.
>
> Thanks
> Qi
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2020-06-23 10:15 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-06-11 8:43 [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 01/10] net/ice/base: adjust profile id map locks Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 02/10] net/ice/base: refactor to avoid need to retry Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 03/10] net/ice/base: add FD support for outer IP of GTPU Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 04/10] net/ice/base: add commands for system diagnostic Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 05/10] net/ice/base: rename misleading variable Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 06/10] net/ice/base: add FD support for GTPU with outer IPv6 Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 07/10] net/ice/base: get tunnel type for recipe Qi Zhang
2020-06-19 14:33 ` Ferruh Yigit
2020-06-11 8:43 ` [dpdk-dev] [PATCH 08/10] net/ice/base: choose TCP dummy packet by protocol Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 09/10] net/ice/base: fix the VSI ID mask to be 10 bit Qi Zhang
2020-06-11 8:43 ` [dpdk-dev] [PATCH 10/10] net/ice/base: replace RSS profile locks Qi Zhang
2020-06-18 6:04 ` [dpdk-dev] [PATCH 00/10] net/ice: base code update for 20.08 batch 2 Yang, Qiming
2020-06-19 4:24 ` Zhang, Qi Z
2020-06-23 10:15 ` Yang, Qiming
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