Re: [dpdk-dev] [PATCH v4 3/7] ixgbe: support l2 tunnel config

["He, Shaopeng" <shaopeng.he@intel.com>]

Hi Wenzhuo,

> -----Original Message-----
> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Wenzhuo Lu
> Sent: Thursday, February 18, 2016 10:46 AM
> To: dev@dpdk.org
> Subject: [dpdk-dev] [PATCH v4 3/7] ixgbe: support l2 tunnel config
> 
> Add support of l2 tunnel configuration.
> Support modifying ether type of a type of l2 tunnel.
> Support enabling and disabling the support of a type of l2 tunnel.
> Only E-tag tunnel is supported now.
> 
> Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
> ---
>  drivers/net/ixgbe/ixgbe_ethdev.c | 140
> +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 140 insertions(+)
> 
> diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c
> b/drivers/net/ixgbe/ixgbe_ethdev.c
> index b99e48e..b15a4b6 100644
> --- a/drivers/net/ixgbe/ixgbe_ethdev.c
> +++ b/drivers/net/ixgbe/ixgbe_ethdev.c
> @@ -139,6 +139,10 @@
>  #define IXGBE_CYCLECOUNTER_MASK   0xffffffffffffffffULL
> 
>  #define IXGBE_VT_CTL_POOLING_MODE_MASK         0x00030000
> +#define DEFAULT_ETAG_ETYPE                     0x893f
> +#define IXGBE_ETAG_ETYPE                       0x00005084
> +#define IXGBE_ETAG_ETYPE_MASK                  0x0000ffff
> +#define IXGBE_ETAG_ETYPE_VALID                 0x80000000
> 
>  static int eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev);
>  static int eth_ixgbe_dev_uninit(struct rte_eth_dev *eth_dev);
> @@ -339,6 +343,14 @@ static int ixgbe_timesync_read_time(struct
> rte_eth_dev *dev,
>  				   struct timespec *timestamp);
>  static int ixgbe_timesync_write_time(struct rte_eth_dev *dev,
>  				   const struct timespec *timestamp);
> +static int ixgbe_dev_l2_tunnel_eth_type_conf
> +	(struct rte_eth_dev *dev, struct rte_eth_l2_tunnel *l2_tunnel);
> +static int ixgbe_dev_l2_tunnel_enable
> +	(struct rte_eth_dev *dev,
> +	 enum rte_eth_l2_tunnel_type l2_tunnel_type);
> +static int ixgbe_dev_l2_tunnel_disable
> +	(struct rte_eth_dev *dev,
> +	 enum rte_eth_l2_tunnel_type l2_tunnel_type);
> 
>  /*
>   * Define VF Stats MACRO for Non "cleared on read" register
> @@ -497,6 +509,9 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops =
> {
>  	.timesync_adjust_time = ixgbe_timesync_adjust_time,
>  	.timesync_read_time   = ixgbe_timesync_read_time,
>  	.timesync_write_time  = ixgbe_timesync_write_time,
> +	.l2_tunnel_eth_type_conf = ixgbe_dev_l2_tunnel_eth_type_conf,
> +	.l2_tunnel_enable        = ixgbe_dev_l2_tunnel_enable,
> +	.l2_tunnel_disable       = ixgbe_dev_l2_tunnel_disable,
>  };
> 
>  /*
> @@ -6201,6 +6216,131 @@ ixgbe_dev_get_dcb_info(struct rte_eth_dev
> *dev,
>  	return 0;
>  }
> 
> +/* Update e-tag ether type */
> +static int
> +ixgbe_update_e_tag_eth_type(struct ixgbe_hw *hw,
> +			    uint16_t ether_type)
> +{
> +	uint32_t etag_etype;
> +
> +	if (hw->mac.type != ixgbe_mac_X550 &&
> +	    hw->mac.type != ixgbe_mac_X550EM_x) {
> +		return -ENOTSUP;
> +	}
> +
> +	etag_etype = IXGBE_READ_REG(hw, IXGBE_ETAG_ETYPE);
> +	etag_etype &= ~IXGBE_ETAG_ETYPE_MASK;
> +	etag_etype |= ether_type;
> +	IXGBE_WRITE_REG(hw, IXGBE_ETAG_ETYPE, etag_etype);
> +	IXGBE_WRITE_FLUSH(hw);
> +
> +	return 0;
> +}
> +
> +/* Config l2 tunnel ether type */
> +static int
> +ixgbe_dev_l2_tunnel_eth_type_conf(struct rte_eth_dev *dev,
> +				  struct rte_eth_l2_tunnel *l2_tunnel)
> +{
> +	int ret = 0;
> +	struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data-
> >dev_private);
> +
> +	if (l2_tunnel == NULL)
> +		return -EINVAL;
> +
> +	switch (l2_tunnel->l2_tunnel_type) {
> +	case RTE_L2_TUNNEL_TYPE_E_TAG:
> +		ret = ixgbe_update_e_tag_eth_type(hw, l2_tunnel-
> >ether_type);
> +		break;
> +	default:
> +		PMD_DRV_LOG(ERR, "Invalid tunnel type");
> +		ret = -1;

Better to use: ret = -EINVAL?

> +		break;
> +	}
> +
> +	return ret;
> +}
> +
> +/* Enable e-tag tunnel */
> +static int
> +ixgbe_e_tag_enable(struct ixgbe_hw *hw)
> +{
> +	uint32_t etag_etype;
> +
> +	if (hw->mac.type != ixgbe_mac_X550 &&
> +	    hw->mac.type != ixgbe_mac_X550EM_x) {
> +		return -ENOTSUP;
> +	}
> +
> +	etag_etype = IXGBE_READ_REG(hw, IXGBE_ETAG_ETYPE);
> +	etag_etype |= IXGBE_ETAG_ETYPE_VALID;
> +	IXGBE_WRITE_REG(hw, IXGBE_ETAG_ETYPE, etag_etype);
> +	IXGBE_WRITE_FLUSH(hw);
> +
> +	return 0;
> +}
> +
> +/* Enable l2 tunnel */
> +static int
> +ixgbe_dev_l2_tunnel_enable(struct rte_eth_dev *dev,
> +			   enum rte_eth_l2_tunnel_type l2_tunnel_type)
> +{
> +	int ret = 0;
> +	struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data-
> >dev_private);
> +
> +	switch (l2_tunnel_type) {
> +	case RTE_L2_TUNNEL_TYPE_E_TAG:
> +		ret = ixgbe_e_tag_enable(hw);
> +		break;
> +	default:
> +		PMD_DRV_LOG(ERR, "Invalid tunnel type");
> +		ret = -1;
> +		break;
> +	}
> +
> +	return ret;
> +}
> +
> +/* Disable e-tag tunnel */
> +static int
> +ixgbe_e_tag_disable(struct ixgbe_hw *hw)
> +{
> +	uint32_t etag_etype;
> +
> +	if (hw->mac.type != ixgbe_mac_X550 &&
> +	    hw->mac.type != ixgbe_mac_X550EM_x) {
> +		return -ENOTSUP;
> +	}
> +
> +	etag_etype = IXGBE_READ_REG(hw, IXGBE_ETAG_ETYPE);
> +	etag_etype &= ~IXGBE_ETAG_ETYPE_VALID;
> +	IXGBE_WRITE_REG(hw, IXGBE_ETAG_ETYPE, etag_etype);
> +	IXGBE_WRITE_FLUSH(hw);
> +
> +	return 0;
> +}
> +
> +/* Disable l2 tunnel */
> +static int
> +ixgbe_dev_l2_tunnel_disable(struct rte_eth_dev *dev,
> +			    enum rte_eth_l2_tunnel_type l2_tunnel_type)
> +{
> +	int ret = 0;
> +	struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data-
> >dev_private);
> +
> +	switch (l2_tunnel_type) {
> +	case RTE_L2_TUNNEL_TYPE_E_TAG:
> +		ret = ixgbe_e_tag_disable(hw);
> +		break;
> +	default:
> +		PMD_DRV_LOG(ERR, "Invalid tunnel type");
> +		ret = -1;
> +		break;
> +	}
> +
> +	return ret;
> +}
> +
>  static struct rte_driver rte_ixgbe_driver = {
>  	.type = PMD_PDEV,
>  	.init = rte_ixgbe_pmd_init,
> --
> 1.9.3