From: Kevin Traynor <ktraynor@redhat.com>
To: Shahed Shaikh <shshaikh@marvell.com>
Cc: dpdk stable <stable@dpdk.org>
Subject: [dpdk-stable] patch 'net/qede: fix odd number of queues usage in 100G mode' has been queued to LTS release 18.11.6
Date: Fri, 22 Nov 2019 14:41:26 +0000 [thread overview]
Message-ID: <20191122144131.21231-40-ktraynor@redhat.com> (raw)
In-Reply-To: <20191122144131.21231-1-ktraynor@redhat.com>
Hi,
FYI, your patch has been queued to LTS release 18.11.6
Note it hasn't been pushed to http://dpdk.org/browse/dpdk-stable yet.
It will be pushed if I get no objections before 11/29/19. So please
shout if anyone has objections.
Also note that after the patch there's a diff of the upstream commit vs the
patch applied to the branch. This will indicate if there was any rebasing
needed to apply to the stable branch. If there were code changes for rebasing
(ie: not only metadata diffs), please double check that the rebase was
correctly done.
Queued patches are on a temporary branch at:
https://github.com/kevintraynor/dpdk-stable-queue
This queued commit can be viewed at:
https://github.com/kevintraynor/dpdk-stable-queue/commit/eabce98f4b64f75aadc746760e221ad7b8bd4012
Thanks.
Kevin.
---
From eabce98f4b64f75aadc746760e221ad7b8bd4012 Mon Sep 17 00:00:00 2001
From: Shahed Shaikh <shshaikh@marvell.com>
Date: Thu, 12 Sep 2019 08:24:13 -0700
Subject: [PATCH] net/qede: fix odd number of queues usage in 100G mode
[ upstream commit 8de0c42019260813b71699748a08bc94b608b5d9 ]
As per HW design of 100Gb mode, device internally uses 2 engines
(eng0 and eng1), and both engines need to be configured symmetrically.
Based on this requirement, driver design chose an approach
to allow user to allocate only even number of queues and split
those queues on both engines equally.
This approach puts a limitation on number of queues to be allocated -
i.e. user can't configure odd number of queues on 100Gb mode.
OVS configures DPDK port with 1 rxq and 1 txq, which causes initialization
of qede port to fail.
Issue is fixed by changing the implementation of queue allocation and
assignment to hw engines only for 100Gb devices and allowing user to
configure odd number queues.
New approach works as below -
- Create 'struct qede_fastpath_cmt' to hold hw queue pair of both engines
and provide it to rte_ethdev's Rx/Tx queues structure.
- So ethdev will see only one queue for underlying queue pair created for
hw engine pair.
- Install separate Rx/Tx data path handlers for 100Gb mode and regular mode
- Rx/Tx handlers for 100Gb mode will split packet processing across both
engines by providing hw queue structures from 'struct qede_fastpath_cmt'
passed by Rx/Tx callbacks to respective engines.
Fixes: 2af14ca79c0a ("net/qede: support 100G")
Signed-off-by: Shahed Shaikh <shshaikh@marvell.com>
---
drivers/net/qede/qede_ethdev.c | 112 ++++++++++++-----------
drivers/net/qede/qede_ethdev.h | 5 +-
drivers/net/qede/qede_filter.c | 5 +-
drivers/net/qede/qede_rxtx.c | 161 +++++++++++++++++++++++++++------
drivers/net/qede/qede_rxtx.h | 26 +++++-
5 files changed, 219 insertions(+), 90 deletions(-)
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index c4f5ad1ed..de8e26f51 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -304,4 +304,5 @@ static void qede_print_adapter_info(struct qede_dev *qdev)
static void qede_reset_queue_stats(struct qede_dev *qdev, bool xstats)
{
+ struct rte_eth_dev *dev = (struct rte_eth_dev *)qdev->ethdev;
struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
unsigned int i = 0, j = 0, qid;
@@ -311,10 +312,10 @@ static void qede_reset_queue_stats(struct qede_dev *qdev, bool xstats)
DP_VERBOSE(edev, ECORE_MSG_DEBUG, "Clearing queue stats\n");
- rxq_stat_cntrs = RTE_MIN(QEDE_RSS_COUNT(qdev),
+ rxq_stat_cntrs = RTE_MIN(QEDE_RSS_COUNT(dev),
RTE_ETHDEV_QUEUE_STAT_CNTRS);
- txq_stat_cntrs = RTE_MIN(QEDE_TSS_COUNT(qdev),
+ txq_stat_cntrs = RTE_MIN(QEDE_TSS_COUNT(dev),
RTE_ETHDEV_QUEUE_STAT_CNTRS);
- for_each_rss(qid) {
+ for (qid = 0; qid < qdev->num_rx_queues; qid++) {
OSAL_MEMSET(((char *)(qdev->fp_array[qid].rxq)) +
offsetof(struct qede_rx_queue, rcv_pkts), 0,
@@ -342,5 +343,5 @@ static void qede_reset_queue_stats(struct qede_dev *qdev, bool xstats)
i = 0;
- for_each_tss(qid) {
+ for (qid = 0; qid < qdev->num_tx_queues; qid++) {
txq = qdev->fp_array[qid].txq;
@@ -989,5 +990,5 @@ int qede_config_rss(struct rte_eth_dev *eth_dev)
id = i / RTE_RETA_GROUP_SIZE;
pos = i % RTE_RETA_GROUP_SIZE;
- q = i % QEDE_RSS_COUNT(qdev);
+ q = i % QEDE_RSS_COUNT(eth_dev);
reta_conf[id].reta[pos] = q;
}
@@ -1163,20 +1164,4 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
PMD_INIT_FUNC_TRACE(edev);
- /* Check requirements for 100G mode */
- if (ECORE_IS_CMT(edev)) {
- if (eth_dev->data->nb_rx_queues < 2 ||
- eth_dev->data->nb_tx_queues < 2) {
- DP_ERR(edev, "100G mode needs min. 2 RX/TX queues\n");
- return -EINVAL;
- }
-
- if ((eth_dev->data->nb_rx_queues % 2 != 0) ||
- (eth_dev->data->nb_tx_queues % 2 != 0)) {
- DP_ERR(edev,
- "100G mode needs even no. of RX/TX queues\n");
- return -EINVAL;
- }
- }
-
/* We need to have min 1 RX queue.There is no min check in
* rte_eth_dev_configure(), so we are checking it here.
@@ -1205,6 +1190,7 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
qede_dealloc_fp_resc(eth_dev);
- qdev->num_tx_queues = eth_dev->data->nb_tx_queues;
- qdev->num_rx_queues = eth_dev->data->nb_rx_queues;
+ qdev->num_tx_queues = eth_dev->data->nb_tx_queues * edev->num_hwfns;
+ qdev->num_rx_queues = eth_dev->data->nb_rx_queues * edev->num_hwfns;
+
if (qede_alloc_fp_resc(qdev))
return -ENOMEM;
@@ -1231,5 +1217,10 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
DP_INFO(edev, "Device configured with RSS=%d TSS=%d\n",
- QEDE_RSS_COUNT(qdev), QEDE_TSS_COUNT(qdev));
+ QEDE_RSS_COUNT(eth_dev), QEDE_TSS_COUNT(eth_dev));
+
+ if (ECORE_IS_CMT(edev))
+ DP_INFO(edev, "Actual HW queues for CMT mode - RX = %d TX = %d\n",
+ qdev->num_rx_queues, qdev->num_tx_queues);
+
return 0;
@@ -1273,4 +1264,8 @@ qede_dev_info_get(struct rte_eth_dev *eth_dev,
dev_info->max_rx_queues = (uint16_t)RTE_MIN(
QEDE_MAX_RSS_CNT(qdev), ECORE_MAX_VF_CHAINS_PER_PF);
+ /* Since CMT mode internally doubles the number of queues */
+ if (ECORE_IS_CMT(edev))
+ dev_info->max_rx_queues = dev_info->max_rx_queues / 2;
+
dev_info->max_tx_queues = dev_info->max_rx_queues;
@@ -1516,10 +1511,10 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
/* Queue stats */
- rxq_stat_cntrs = RTE_MIN(QEDE_RSS_COUNT(qdev),
+ rxq_stat_cntrs = RTE_MIN(QEDE_RSS_COUNT(eth_dev),
RTE_ETHDEV_QUEUE_STAT_CNTRS);
- txq_stat_cntrs = RTE_MIN(QEDE_TSS_COUNT(qdev),
+ txq_stat_cntrs = RTE_MIN(QEDE_TSS_COUNT(eth_dev),
RTE_ETHDEV_QUEUE_STAT_CNTRS);
- if ((rxq_stat_cntrs != (unsigned int)QEDE_RSS_COUNT(qdev)) ||
- (txq_stat_cntrs != (unsigned int)QEDE_TSS_COUNT(qdev)))
+ if (rxq_stat_cntrs != (unsigned int)QEDE_RSS_COUNT(eth_dev) ||
+ txq_stat_cntrs != (unsigned int)QEDE_TSS_COUNT(eth_dev))
DP_VERBOSE(edev, ECORE_MSG_DEBUG,
"Not all the queue stats will be displayed. Set"
@@ -1527,5 +1522,5 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
" appropriately and retry.\n");
- for_each_rss(qid) {
+ for (qid = 0; qid < eth_dev->data->nb_rx_queues; qid++) {
eth_stats->q_ipackets[i] =
*(uint64_t *)(
@@ -1547,5 +1542,5 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
}
- for_each_tss(qid) {
+ for (qid = 0; qid < eth_dev->data->nb_tx_queues; qid++) {
txq = qdev->fp_array[qid].txq;
eth_stats->q_opackets[j] =
@@ -1564,16 +1559,16 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
static unsigned
qede_get_xstats_count(struct qede_dev *qdev) {
+ struct rte_eth_dev *dev = (struct rte_eth_dev *)qdev->ethdev;
+
if (ECORE_IS_BB(&qdev->edev))
return RTE_DIM(qede_xstats_strings) +
RTE_DIM(qede_bb_xstats_strings) +
(RTE_DIM(qede_rxq_xstats_strings) *
- RTE_MIN(QEDE_RSS_COUNT(qdev),
- RTE_ETHDEV_QUEUE_STAT_CNTRS));
+ QEDE_RSS_COUNT(dev) * qdev->edev.num_hwfns);
else
return RTE_DIM(qede_xstats_strings) +
RTE_DIM(qede_ah_xstats_strings) +
(RTE_DIM(qede_rxq_xstats_strings) *
- RTE_MIN(QEDE_RSS_COUNT(qdev),
- RTE_ETHDEV_QUEUE_STAT_CNTRS));
+ QEDE_RSS_COUNT(dev));
}
@@ -1616,5 +1611,5 @@ qede_get_xstats_names(struct rte_eth_dev *dev,
}
- rxq_stat_cntrs = RTE_MIN(QEDE_RSS_COUNT(qdev),
+ rxq_stat_cntrs = RTE_MIN(QEDE_RSS_COUNT(dev),
RTE_ETHDEV_QUEUE_STAT_CNTRS);
for (qid = 0; qid < rxq_stat_cntrs; qid++) {
@@ -1674,15 +1669,13 @@ qede_get_xstats(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
}
- rxq_stat_cntrs = RTE_MIN(QEDE_RSS_COUNT(qdev),
+ rxq_stat_cntrs = RTE_MIN(QEDE_RSS_COUNT(dev),
RTE_ETHDEV_QUEUE_STAT_CNTRS);
for (qid = 0; qid < rxq_stat_cntrs; qid++) {
- for_each_rss(qid) {
- for (i = 0; i < RTE_DIM(qede_rxq_xstats_strings); i++) {
- xstats[stat_idx].value = *(uint64_t *)(
- ((char *)(qdev->fp_array[qid].rxq)) +
- qede_rxq_xstats_strings[i].offset);
- xstats[stat_idx].id = stat_idx;
- stat_idx++;
- }
+ for (i = 0; i < RTE_DIM(qede_rxq_xstats_strings); i++) {
+ xstats[stat_idx].value = *(uint64_t *)
+ (((char *)(qdev->fp_array[qid].rxq)) +
+ qede_rxq_xstats_strings[i].offset);
+ xstats[stat_idx].id = stat_idx;
+ stat_idx++;
}
}
@@ -1938,5 +1931,6 @@ qede_dev_supported_ptypes_get(struct rte_eth_dev *eth_dev)
};
- if (eth_dev->rx_pkt_burst == qede_recv_pkts)
+ if (eth_dev->rx_pkt_burst == qede_recv_pkts ||
+ eth_dev->rx_pkt_burst == qede_recv_pkts_cmt)
return ptypes;
@@ -2005,5 +1999,5 @@ int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
/* pass the L2 handles instead of qids */
for (i = 0 ; i < ECORE_RSS_IND_TABLE_SIZE ; i++) {
- idx = i % QEDE_RSS_COUNT(qdev);
+ idx = i % QEDE_RSS_COUNT(eth_dev);
rss_params.rss_ind_table[i] = qdev->fp_array[idx].rxq->handle;
}
@@ -2257,5 +2251,5 @@ static int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
/* Fix up RX buf size for all queues of the port */
- for_each_rss(i) {
+ for (i = 0; i < qdev->num_rx_queues; i++) {
fp = &qdev->fp_array[i];
if (fp->rxq != NULL) {
@@ -2286,7 +2280,11 @@ static int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
dev->data->dev_conf.rxmode.max_rx_pkt_len = max_rx_pkt_len;
/* Reassign back */
- dev->rx_pkt_burst = qede_recv_pkts;
- dev->tx_pkt_burst = qede_xmit_pkts;
-
+ if (ECORE_IS_CMT(edev)) {
+ dev->rx_pkt_burst = qede_recv_pkts_cmt;
+ dev->tx_pkt_burst = qede_xmit_pkts_cmt;
+ } else {
+ dev->rx_pkt_burst = qede_recv_pkts;
+ dev->tx_pkt_burst = qede_xmit_pkts;
+ }
return 0;
}
@@ -2429,8 +2427,4 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
eth_dev->data->port_id);
- eth_dev->rx_pkt_burst = qede_recv_pkts;
- eth_dev->tx_pkt_burst = qede_xmit_pkts;
- eth_dev->tx_pkt_prepare = qede_xmit_prep_pkts;
-
if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
DP_ERR(edev, "Skipping device init from secondary process\n");
@@ -2490,4 +2484,14 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
QEDE_PMD_DRV_VER_STR_SIZE);
+ if (ECORE_IS_CMT(edev)) {
+ eth_dev->rx_pkt_burst = qede_recv_pkts_cmt;
+ eth_dev->tx_pkt_burst = qede_xmit_pkts_cmt;
+ } else {
+ eth_dev->rx_pkt_burst = qede_recv_pkts;
+ eth_dev->tx_pkt_burst = qede_xmit_pkts;
+ }
+
+ eth_dev->tx_pkt_prepare = qede_xmit_prep_pkts;
+
/* For CMT mode device do periodic polling for slowpath events.
* This is required since uio device uses only one MSI-x
diff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h
index c06274d94..735dfdb66 100644
--- a/drivers/net/qede/qede_ethdev.h
+++ b/drivers/net/qede/qede_ethdev.h
@@ -67,6 +67,6 @@
#define QEDE_QUEUE_CNT(qdev) ((qdev)->num_queues)
-#define QEDE_RSS_COUNT(qdev) ((qdev)->num_rx_queues)
-#define QEDE_TSS_COUNT(qdev) ((qdev)->num_tx_queues)
+#define QEDE_RSS_COUNT(dev) ((dev)->data->nb_rx_queues)
+#define QEDE_TSS_COUNT(dev) ((dev)->data->nb_tx_queues)
#define QEDE_DUPLEX_FULL 1
@@ -216,4 +216,5 @@ struct qede_dev {
struct ecore_sb_info *sb_array;
struct qede_fastpath *fp_array;
+ struct qede_fastpath_cmt *fp_array_cmt;
uint16_t mtu;
bool enable_tx_switching;
diff --git a/drivers/net/qede/qede_filter.c b/drivers/net/qede/qede_filter.c
index 0beade6d5..56ec91272 100644
--- a/drivers/net/qede/qede_filter.c
+++ b/drivers/net/qede/qede_filter.c
@@ -432,5 +432,5 @@ qede_fdir_filter_add(struct rte_eth_dev *eth_dev,
}
- if (fdir->action.rx_queue >= QEDE_RSS_COUNT(qdev)) {
+ if (fdir->action.rx_queue >= QEDE_RSS_COUNT(eth_dev)) {
DP_ERR(edev, "invalid queue number %u\n",
fdir->action.rx_queue);
@@ -1344,5 +1344,4 @@ qede_flow_parse_actions(struct rte_eth_dev *dev,
struct rte_flow *flow)
{
- struct qede_dev *qdev = QEDE_INIT_QDEV(dev);
const struct rte_flow_action_queue *queue;
@@ -1359,5 +1358,5 @@ qede_flow_parse_actions(struct rte_eth_dev *dev,
queue = actions->conf;
- if (queue->index >= QEDE_RSS_COUNT(qdev)) {
+ if (queue->index >= QEDE_RSS_COUNT(dev)) {
rte_flow_error_set(error, EINVAL,
RTE_FLOW_ERROR_TYPE_ACTION,
diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index 64fd9e063..ca1305f1b 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ b/drivers/net/qede/qede_rxtx.c
@@ -261,11 +261,28 @@ qede_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qid,
bufsz = rc;
- rxq = qede_alloc_rx_queue_mem(dev, qid, nb_desc,
- socket_id, mp, bufsz);
- if (!rxq)
- return -ENOMEM;
+ if (ECORE_IS_CMT(edev)) {
+ rxq = qede_alloc_rx_queue_mem(dev, qid * 2, nb_desc,
+ socket_id, mp, bufsz);
+ if (!rxq)
+ return -ENOMEM;
- dev->data->rx_queues[qid] = rxq;
- qdev->fp_array[qid].rxq = rxq;
+ qdev->fp_array[qid * 2].rxq = rxq;
+ rxq = qede_alloc_rx_queue_mem(dev, qid * 2 + 1, nb_desc,
+ socket_id, mp, bufsz);
+ if (!rxq)
+ return -ENOMEM;
+
+ qdev->fp_array[qid * 2 + 1].rxq = rxq;
+ /* provide per engine fp struct as rx queue */
+ dev->data->rx_queues[qid] = &qdev->fp_array_cmt[qid];
+ } else {
+ rxq = qede_alloc_rx_queue_mem(dev, qid, nb_desc,
+ socket_id, mp, bufsz);
+ if (!rxq)
+ return -ENOMEM;
+
+ dev->data->rx_queues[qid] = rxq;
+ qdev->fp_array[qid].rxq = rxq;
+ }
DP_INFO(edev, "rxq %d num_desc %u rx_buf_size=%u socket %u\n",
@@ -315,4 +332,5 @@ void qede_rx_queue_release(void *rx_queue)
{
struct qede_rx_queue *rxq = rx_queue;
+ struct qede_fastpath_cmt *fp_cmt;
struct qede_dev *qdev;
struct ecore_dev *edev;
@@ -322,5 +340,11 @@ void qede_rx_queue_release(void *rx_queue)
edev = QEDE_INIT_EDEV(qdev);
PMD_INIT_FUNC_TRACE(edev);
- _qede_rx_queue_release(qdev, edev, rxq);
+ if (ECORE_IS_CMT(edev)) {
+ fp_cmt = rx_queue;
+ _qede_rx_queue_release(qdev, edev, fp_cmt->fp0->rxq);
+ _qede_rx_queue_release(qdev, edev, fp_cmt->fp1->rxq);
+ } else {
+ _qede_rx_queue_release(qdev, edev, rxq);
+ }
}
}
@@ -455,11 +479,28 @@ qede_tx_queue_setup(struct rte_eth_dev *dev,
}
- txq = qede_alloc_tx_queue_mem(dev, queue_idx, nb_desc,
- socket_id, tx_conf);
- if (!txq)
- return -ENOMEM;
+ if (ECORE_IS_CMT(edev)) {
+ txq = qede_alloc_tx_queue_mem(dev, queue_idx * 2, nb_desc,
+ socket_id, tx_conf);
+ if (!txq)
+ return -ENOMEM;
- dev->data->tx_queues[queue_idx] = txq;
- qdev->fp_array[queue_idx].txq = txq;
+ qdev->fp_array[queue_idx * 2].txq = txq;
+ txq = qede_alloc_tx_queue_mem(dev, (queue_idx * 2) + 1, nb_desc,
+ socket_id, tx_conf);
+ if (!txq)
+ return -ENOMEM;
+
+ qdev->fp_array[(queue_idx * 2) + 1].txq = txq;
+ dev->data->tx_queues[queue_idx] =
+ &qdev->fp_array_cmt[queue_idx];
+ } else {
+ txq = qede_alloc_tx_queue_mem(dev, queue_idx, nb_desc,
+ socket_id, tx_conf);
+ if (!txq)
+ return -ENOMEM;
+
+ dev->data->tx_queues[queue_idx] = txq;
+ qdev->fp_array[queue_idx].txq = txq;
+ }
return 0;
@@ -504,4 +545,5 @@ void qede_tx_queue_release(void *tx_queue)
{
struct qede_tx_queue *txq = tx_queue;
+ struct qede_fastpath_cmt *fp_cmt;
struct qede_dev *qdev;
struct ecore_dev *edev;
@@ -511,5 +553,12 @@ void qede_tx_queue_release(void *tx_queue)
edev = QEDE_INIT_EDEV(qdev);
PMD_INIT_FUNC_TRACE(edev);
- _qede_tx_queue_release(qdev, edev, txq);
+
+ if (ECORE_IS_CMT(edev)) {
+ fp_cmt = tx_queue;
+ _qede_tx_queue_release(qdev, edev, fp_cmt->fp0->txq);
+ _qede_tx_queue_release(qdev, edev, fp_cmt->fp1->txq);
+ } else {
+ _qede_tx_queue_release(qdev, edev, txq);
+ }
}
}
@@ -549,4 +598,5 @@ int qede_alloc_fp_resc(struct qede_dev *qdev)
uint32_t num_sbs;
uint16_t sb_idx;
+ int i;
if (IS_VF(edev))
@@ -572,4 +622,26 @@ int qede_alloc_fp_resc(struct qede_dev *qdev)
sizeof(*qdev->fp_array));
+ if (ECORE_IS_CMT(edev)) {
+ qdev->fp_array_cmt = rte_calloc("fp_cmt",
+ QEDE_RXTX_MAX(qdev) / 2,
+ sizeof(*qdev->fp_array_cmt),
+ RTE_CACHE_LINE_SIZE);
+
+ if (!qdev->fp_array_cmt) {
+ DP_ERR(edev, "fp array for CMT allocation failed\n");
+ return -ENOMEM;
+ }
+
+ memset((void *)qdev->fp_array_cmt, 0,
+ (QEDE_RXTX_MAX(qdev) / 2) * sizeof(*qdev->fp_array_cmt));
+
+ /* Establish the mapping of fp_array with fp_array_cmt */
+ for (i = 0; i < QEDE_RXTX_MAX(qdev) / 2; i++) {
+ qdev->fp_array_cmt[i].qdev = qdev;
+ qdev->fp_array_cmt[i].fp0 = &qdev->fp_array[i * 2];
+ qdev->fp_array_cmt[i].fp1 = &qdev->fp_array[i * 2 + 1];
+ }
+ }
+
for (sb_idx = 0; sb_idx < QEDE_RXTX_MAX(qdev); sb_idx++) {
fp = &qdev->fp_array[sb_idx];
@@ -636,4 +708,8 @@ void qede_dealloc_fp_resc(struct rte_eth_dev *eth_dev)
rte_free(qdev->fp_array);
qdev->fp_array = NULL;
+
+ if (qdev->fp_array_cmt)
+ rte_free(qdev->fp_array_cmt);
+ qdev->fp_array_cmt = NULL;
}
@@ -687,7 +763,7 @@ qede_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)
int rc;
- if (rx_queue_id < eth_dev->data->nb_rx_queues) {
+ if (rx_queue_id < qdev->num_rx_queues) {
fp = &qdev->fp_array[rx_queue_id];
- rxq = eth_dev->data->rx_queues[rx_queue_id];
+ rxq = fp->rxq;
/* Allocate buffers for the Rx ring */
for (j = 0; j < rxq->nb_rx_desc; j++) {
@@ -758,7 +834,7 @@ qede_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
int rc;
- if (tx_queue_id < eth_dev->data->nb_tx_queues) {
- txq = eth_dev->data->tx_queues[tx_queue_id];
+ if (tx_queue_id < qdev->num_tx_queues) {
fp = &qdev->fp_array[tx_queue_id];
+ txq = fp->txq;
memset(¶ms, 0, sizeof(params));
params.queue_id = tx_queue_id / edev->num_hwfns;
@@ -901,6 +977,6 @@ static int qede_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)
int rc;
- if (tx_queue_id < eth_dev->data->nb_tx_queues) {
- txq = eth_dev->data->tx_queues[tx_queue_id];
+ if (tx_queue_id < qdev->num_tx_queues) {
+ txq = qdev->fp_array[tx_queue_id].txq;
/* Drain txq */
if (qede_drain_txq(qdev, txq, true))
@@ -933,5 +1009,5 @@ int qede_start_queues(struct rte_eth_dev *eth_dev)
int rc = -1;
- for_each_rss(id) {
+ for (id = 0; id < qdev->num_rx_queues; id++) {
rc = qede_rx_queue_start(eth_dev, id);
if (rc != ECORE_SUCCESS)
@@ -939,5 +1015,5 @@ int qede_start_queues(struct rte_eth_dev *eth_dev)
}
- for_each_tss(id) {
+ for (id = 0; id < qdev->num_tx_queues; id++) {
rc = qede_tx_queue_start(eth_dev, id);
if (rc != ECORE_SUCCESS)
@@ -954,11 +1030,9 @@ void qede_stop_queues(struct rte_eth_dev *eth_dev)
/* Stopping RX/TX queues */
- for_each_tss(id) {
+ for (id = 0; id < qdev->num_tx_queues; id++)
qede_tx_queue_stop(eth_dev, id);
- }
- for_each_rss(id) {
+ for (id = 0; id < qdev->num_rx_queues; id++)
qede_rx_queue_stop(eth_dev, id);
- }
}
@@ -1740,4 +1814,21 @@ next_cqe:
}
+uint16_t
+qede_recv_pkts_cmt(void *p_fp_cmt, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
+{
+ struct qede_fastpath_cmt *fp_cmt = p_fp_cmt;
+ uint16_t eng0_pkts, eng1_pkts;
+
+ eng0_pkts = nb_pkts / 2;
+
+ eng0_pkts = qede_recv_pkts(fp_cmt->fp0->rxq, rx_pkts, eng0_pkts);
+
+ eng1_pkts = nb_pkts - eng0_pkts;
+
+ eng1_pkts = qede_recv_pkts(fp_cmt->fp1->rxq, rx_pkts + eng0_pkts,
+ eng1_pkts);
+
+ return eng0_pkts + eng1_pkts;
+}
/* Populate scatter gather buffer descriptor fields */
@@ -2262,4 +2353,22 @@ qede_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
}
+uint16_t
+qede_xmit_pkts_cmt(void *p_fp_cmt, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
+{
+ struct qede_fastpath_cmt *fp_cmt = p_fp_cmt;
+ uint16_t eng0_pkts, eng1_pkts;
+
+ eng0_pkts = nb_pkts / 2;
+
+ eng0_pkts = qede_xmit_pkts(fp_cmt->fp0->txq, tx_pkts, eng0_pkts);
+
+ eng1_pkts = nb_pkts - eng0_pkts;
+
+ eng1_pkts = qede_xmit_pkts(fp_cmt->fp1->txq, tx_pkts + eng0_pkts,
+ eng1_pkts);
+
+ return eng0_pkts + eng1_pkts;
+}
+
uint16_t
qede_rxtx_pkts_dummy(__rte_unused void *p_rxq,
diff --git a/drivers/net/qede/qede_rxtx.h b/drivers/net/qede/qede_rxtx.h
index 5b249cbb2..4a1435663 100644
--- a/drivers/net/qede/qede_rxtx.h
+++ b/drivers/net/qede/qede_rxtx.h
@@ -82,8 +82,6 @@
ETH_RSS_GENEVE)
-#define for_each_rss(i) for (i = 0; i < qdev->num_rx_queues; i++)
-#define for_each_tss(i) for (i = 0; i < qdev->num_tx_queues; i++)
#define QEDE_RXTX_MAX(qdev) \
- (RTE_MAX(QEDE_RSS_COUNT(qdev), QEDE_TSS_COUNT(qdev)))
+ (RTE_MAX(qdev->num_rx_queues, qdev->num_tx_queues))
/* Macros for non-tunnel packet types lkup table */
@@ -180,4 +178,6 @@ struct qede_agg_info {
*/
struct qede_rx_queue {
+ /* Always keep qdev as first member */
+ struct qede_dev *qdev;
struct rte_mempool *mb_pool;
struct ecore_chain rx_bd_ring;
@@ -200,5 +200,4 @@ struct qede_rx_queue {
uint64_t rx_alloc_errors;
struct qede_agg_info tpa_info[ETH_TPA_MAX_AGGS_NUM];
- struct qede_dev *qdev;
void *handle;
};
@@ -218,4 +217,6 @@ union db_prod {
struct qede_tx_queue {
+ /* Always keep qdev as first member */
+ struct qede_dev *qdev;
struct ecore_chain tx_pbl;
struct qede_tx_entry *sw_tx_ring;
@@ -232,5 +233,4 @@ struct qede_tx_queue {
uint64_t xmit_pkts;
bool is_legacy;
- struct qede_dev *qdev;
void *handle;
};
@@ -242,4 +242,16 @@ struct qede_fastpath {
};
+/* This structure holds the inforation of fast path queues
+ * belonging to individual engines in CMT mode.
+ */
+struct qede_fastpath_cmt {
+ /* Always keep this a first element */
+ struct qede_dev *qdev;
+ /* fastpath info of engine 0 */
+ struct qede_fastpath *fp0;
+ /* fastpath info of engine 1 */
+ struct qede_fastpath *fp1;
+};
+
/*
* RX/TX function prototypes
@@ -262,4 +274,6 @@ void qede_tx_queue_release(void *tx_queue);
uint16_t qede_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts);
+uint16_t qede_xmit_pkts_cmt(void *p_txq, struct rte_mbuf **tx_pkts,
+ uint16_t nb_pkts);
uint16_t qede_xmit_prep_pkts(void *p_txq, struct rte_mbuf **tx_pkts,
@@ -268,4 +282,6 @@ uint16_t qede_xmit_prep_pkts(void *p_txq, struct rte_mbuf **tx_pkts,
uint16_t qede_recv_pkts(void *p_rxq, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts);
+uint16_t qede_recv_pkts_cmt(void *p_rxq, struct rte_mbuf **rx_pkts,
+ uint16_t nb_pkts);
uint16_t qede_rxtx_pkts_dummy(void *p_rxq,
--
2.21.0
---
Diff of the applied patch vs upstream commit (please double-check if non-empty:
---
--- - 2019-11-22 14:36:57.332808095 +0000
+++ 0040-net-qede-fix-odd-number-of-queues-usage-in-100G-mode.patch 2019-11-22 14:36:55.221148773 +0000
@@ -1 +1 @@
-From 8de0c42019260813b71699748a08bc94b608b5d9 Mon Sep 17 00:00:00 2001
+From eabce98f4b64f75aadc746760e221ad7b8bd4012 Mon Sep 17 00:00:00 2001
@@ -5,0 +6,2 @@
+[ upstream commit 8de0c42019260813b71699748a08bc94b608b5d9 ]
+
@@ -32 +33,0 @@
-Cc: stable@dpdk.org
@@ -44 +45 @@
-index 528b33e8c..308588cb8 100644
+index c4f5ad1ed..de8e26f51 100644
@@ -47 +48 @@
-@@ -305,4 +305,5 @@ static void qede_print_adapter_info(struct qede_dev *qdev)
+@@ -304,4 +304,5 @@ static void qede_print_adapter_info(struct qede_dev *qdev)
@@ -53 +54 @@
-@@ -312,10 +313,10 @@ static void qede_reset_queue_stats(struct qede_dev *qdev, bool xstats)
+@@ -311,10 +312,10 @@ static void qede_reset_queue_stats(struct qede_dev *qdev, bool xstats)
@@ -67 +68 @@
-@@ -343,5 +344,5 @@ static void qede_reset_queue_stats(struct qede_dev *qdev, bool xstats)
+@@ -342,5 +343,5 @@ static void qede_reset_queue_stats(struct qede_dev *qdev, bool xstats)
@@ -74 +75 @@
-@@ -992,5 +993,5 @@ int qede_config_rss(struct rte_eth_dev *eth_dev)
+@@ -989,5 +990,5 @@ int qede_config_rss(struct rte_eth_dev *eth_dev)
@@ -81 +82 @@
-@@ -1166,20 +1167,4 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
+@@ -1163,20 +1164,4 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
@@ -102 +103 @@
-@@ -1208,6 +1193,7 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
+@@ -1205,6 +1190,7 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
@@ -112 +113 @@
-@@ -1234,5 +1220,10 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
+@@ -1231,5 +1217,10 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)
@@ -124 +125 @@
-@@ -1276,4 +1267,8 @@ qede_dev_info_get(struct rte_eth_dev *eth_dev,
+@@ -1273,4 +1264,8 @@ qede_dev_info_get(struct rte_eth_dev *eth_dev,
@@ -133 +134 @@
-@@ -1519,10 +1514,10 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
+@@ -1516,10 +1511,10 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
@@ -148 +149 @@
-@@ -1530,5 +1525,5 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
+@@ -1527,5 +1522,5 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
@@ -155 +156 @@
-@@ -1550,5 +1545,5 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
+@@ -1547,5 +1542,5 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
@@ -162 +163 @@
-@@ -1567,16 +1562,16 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
+@@ -1564,16 +1559,16 @@ qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
@@ -213 +214 @@
-@@ -1939,5 +1932,6 @@ qede_dev_supported_ptypes_get(struct rte_eth_dev *eth_dev)
+@@ -1938,5 +1931,6 @@ qede_dev_supported_ptypes_get(struct rte_eth_dev *eth_dev)
@@ -221 +222 @@
-@@ -2006,5 +2000,5 @@ int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
+@@ -2005,5 +1999,5 @@ int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
@@ -228 +229 @@
-@@ -2258,5 +2252,5 @@ static int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
+@@ -2257,5 +2251,5 @@ static int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
@@ -235 +236 @@
-@@ -2287,7 +2281,11 @@ static int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
+@@ -2286,7 +2280,11 @@ static int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
@@ -250 +251 @@
-@@ -2430,8 +2428,4 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
+@@ -2429,8 +2427,4 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
@@ -259 +260 @@
-@@ -2491,4 +2485,14 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
+@@ -2490,4 +2484,14 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
@@ -275 +276 @@
-index d0e7c70be..5549d0bf3 100644
+index c06274d94..735dfdb66 100644
@@ -294 +295 @@
-index b3f62e0dd..81509f04b 100644
+index 0beade6d5..56ec91272 100644
@@ -304 +305 @@
-@@ -1346,5 +1346,4 @@ qede_flow_parse_actions(struct rte_eth_dev *dev,
+@@ -1344,5 +1344,4 @@ qede_flow_parse_actions(struct rte_eth_dev *dev,
@@ -310 +311 @@
-@@ -1361,5 +1360,5 @@ qede_flow_parse_actions(struct rte_eth_dev *dev,
+@@ -1359,5 +1358,5 @@ qede_flow_parse_actions(struct rte_eth_dev *dev,
@@ -318 +319 @@
-index cb8ac9bf6..dbb74fc64 100644
+index 64fd9e063..ca1305f1b 100644
@@ -529 +530 @@
-@@ -1742,4 +1816,21 @@ next_cqe:
+@@ -1740,4 +1814,21 @@ next_cqe:
@@ -551 +552 @@
-@@ -2264,4 +2355,22 @@ qede_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
+@@ -2262,4 +2353,22 @@ qede_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
@@ -575 +576 @@
-index 41a5f0f5c..75cc930fd 100644
+index 5b249cbb2..4a1435663 100644
next prev parent reply other threads:[~2019-11-22 14:43 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-22 14:40 [dpdk-stable] patch 'net/bonding: fix out of bound access in LACP " Kevin Traynor
2019-11-22 14:40 ` [dpdk-stable] patch 'net/bonding: fix LACP fast queue Rx handler' " Kevin Traynor
2019-11-22 14:40 ` [dpdk-stable] patch 'net/bonding: fix unicast packets filtering' " Kevin Traynor
2019-11-22 14:40 ` [dpdk-stable] patch 'net/i40e: fix VF runtime queues RSS config' " Kevin Traynor
2019-11-22 14:40 ` [dpdk-stable] patch 'ethdev: fix doc reference to FDIR disabled mode' " Kevin Traynor
2019-11-22 14:40 ` [dpdk-stable] patch 'net/af_packet: fix stale sockets' " Kevin Traynor
2019-11-22 14:40 ` [dpdk-stable] patch 'app/testpmd: remove duplicated Rx offload commands' " Kevin Traynor
2019-11-22 14:40 ` [dpdk-stable] patch 'net/atlantic: remove double function declaration' " Kevin Traynor
2019-11-22 14:40 ` [dpdk-stable] patch 'net/mlx4: fix build on ppc64' " Kevin Traynor
2019-11-22 14:40 ` [dpdk-stable] patch 'net/i40e: remove memory barrier from NEON Rx' " Kevin Traynor
2019-11-22 14:40 ` [dpdk-stable] patch 'net/i40e: remove compiler " Kevin Traynor
2019-11-22 14:40 ` [dpdk-stable] patch 'net/ixgbe: remove memory " Kevin Traynor
2019-11-22 14:40 ` [dpdk-stable] patch 'net/ixgbe: remove redundant assignment' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'net/vmxnet3: remove IP checksum from capabilities' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'ethdev: fix typos for ENOTSUP' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'net/ixgbe: fix queue interrupt for X552/557' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'net/ixgbe: enable new PF host mbox version' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'net/ixgbe: fix VF RSS offloads configuration' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'net/virtio: remove remaining simple Tx related stuff' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'doc: fix typo in virtio in-order Rx function name' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'doc: fix format in virtio guide' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'build: remove redundant libs from pkgconfig' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'net/mlx: fix meson build with custom dependency path' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'net/mlx: fix build with make and recent gcc' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'test/interrupt: account for race with callback' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'bus/pci: fix Intel IOMMU sysfs access check' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'examples/ipsec-secgw: fix unchecked return value' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'examples/ipsec-secgw: fix access to freed packet' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'security: fix doxygen fields' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'crypto/qat: fix digest length in XCBC capability' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'crypto/dpaa_sec: fix IOVA table' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'crypto/octeontx: enable unbinding' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'doc: fix AESNI-GCM limitations in crypto guide' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'examples/fips_validation: fix null dereferences' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'cryptodev: fix initialization on multi-process' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'drivers/crypto: remove some invalid comments' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'net/i40e: downgrade error log' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'net/mlx5: fix Rx CQ doorbell synchronization on aarch64' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'net/qede: refactor Rx and Tx queue setup' " Kevin Traynor
2019-11-22 14:41 ` Kevin Traynor [this message]
2019-11-22 14:41 ` [dpdk-stable] patch 'net/qede: fix RSS configuration as per new allocation method' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'net/qede: fix stats flow " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'ci: add missing dependencies for documentation' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'net/e1000: fix i219 hang on reset/close' " Kevin Traynor
2019-11-22 14:41 ` [dpdk-stable] patch 'net/e1000: fix memory barrier usage in Tx' " Kevin Traynor
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