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* [dpdk-dev] [PATCH 0/3] event/octeontx2: add support for event crypto adapter
@ 2020-09-08 10:09 Ankur Dwivedi
  2020-09-08 10:09 ` [dpdk-dev] [PATCH 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
                   ` (3 more replies)
  0 siblings, 4 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-09-08 10:09 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

This patch series adds support for event crypto adapter in op new
mode in the OCTEON TX2 event PMD. The functionality has been
verified with event crypto adapter test application. Build with
meson and ninja is supported.

Ankur Dwivedi (3):
  crypto/octeontx2: move functions to helper file
  event/octeontx2: add crypto adapter framework
  event/octeontx2: add crypto adapter datapath

 drivers/common/cpt/cpt_common.h               |  1 +
 drivers/crypto/octeontx2/meson.build          |  4 +-
 drivers/crypto/octeontx2/otx2_ca_helper.h     | 75 +++++++++++++++
 .../crypto/octeontx2/otx2_crypto_adapter.c    | 77 +++++++++++++++
 .../crypto/octeontx2/otx2_crypto_adapter.h    | 21 ++++
 .../octeontx2/otx2_cryptodev_hw_access.h      | 12 +++
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 96 ++++++++-----------
 .../octeontx2/otx2_cryptodev_ops_helper.h     | 74 ++++++++++++++
 drivers/crypto/octeontx2/otx2_cryptodev_qp.h  |  7 ++
 .../rte_pmd_octeontx2_crypto_version.map      | 11 +++
 drivers/event/octeontx2/meson.build           |  3 +-
 drivers/event/octeontx2/otx2_evdev.c          |  5 +
 drivers/event/octeontx2/otx2_worker.h         | 10 +-
 drivers/event/octeontx2/otx2_worker_dual.h    | 11 ++-
 14 files changed, 345 insertions(+), 62 deletions(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_ca_helper.h
 create mode 100644 drivers/crypto/octeontx2/otx2_crypto_adapter.c
 create mode 100644 drivers/crypto/octeontx2/otx2_crypto_adapter.h
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h

-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH 1/3] crypto/octeontx2: move functions to helper file
  2020-09-08 10:09 [dpdk-dev] [PATCH 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
@ 2020-09-08 10:09 ` Ankur Dwivedi
  2020-09-08 10:09 ` [dpdk-dev] [PATCH 2/3] event/octeontx2: add crypto adapter framework Ankur Dwivedi
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-09-08 10:09 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

Some functions are common across cryptodev pmd and the event
crypto adapter. This patch moves them into a helper file.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
---
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 65 +---------------
 .../octeontx2/otx2_cryptodev_ops_helper.h     | 74 +++++++++++++++++++
 2 files changed, 75 insertions(+), 64 deletions(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h

diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
index ccf566d5f..77842b4ad 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
@@ -13,6 +13,7 @@
 #include "otx2_cryptodev_hw_access.h"
 #include "otx2_cryptodev_mbox.h"
 #include "otx2_cryptodev_ops.h"
+#include "otx2_cryptodev_ops_helper.h"
 #include "otx2_ipsec_po_ops.h"
 #include "otx2_mbox.h"
 #include "otx2_sec_idev.h"
@@ -416,24 +417,6 @@ sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 	return -ENOTSUP;
 }
 
-static void
-sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
-{
-	void *priv = get_sym_session_private_data(sess, driver_id);
-	struct rte_mempool *pool;
-
-	if (priv == NULL)
-		return;
-
-	memset(priv, 0, cpt_get_session_size());
-
-	pool = rte_mempool_from_obj(priv);
-
-	set_sym_session_private_data(sess, driver_id, NULL);
-
-	rte_mempool_put(pool, priv);
-}
-
 static __rte_always_inline int32_t __rte_hot
 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 		     struct pending_queue *pend_q,
@@ -917,52 +900,6 @@ otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
 	}
 }
 
-static __rte_always_inline uint8_t
-otx2_cpt_compcode_get(struct cpt_request_info *req)
-{
-	volatile struct cpt_res_s_9s *res;
-	uint8_t ret;
-
-	res = (volatile struct cpt_res_s_9s *)req->completion_addr;
-
-	if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
-		if (rte_get_timer_cycles() < req->time_out)
-			return ERR_REQ_PENDING;
-
-		CPT_LOG_DP_ERR("Request timed out");
-		return ERR_REQ_TIMEOUT;
-	}
-
-	if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
-		ret = NO_ERR;
-		if (unlikely(res->uc_compcode)) {
-			ret = res->uc_compcode;
-			CPT_LOG_DP_DEBUG("Request failed with microcode error");
-			CPT_LOG_DP_DEBUG("MC completion code 0x%x",
-					 res->uc_compcode);
-		}
-	} else {
-		CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
-
-		ret = res->compcode;
-		switch (res->compcode) {
-		case CPT_9X_COMP_E_INSTERR:
-			CPT_LOG_DP_ERR("Request failed with instruction error");
-			break;
-		case CPT_9X_COMP_E_FAULT:
-			CPT_LOG_DP_ERR("Request failed with DMA fault");
-			break;
-		case CPT_9X_COMP_E_HWERR:
-			CPT_LOG_DP_ERR("Request failed with hardware error");
-			break;
-		default:
-			CPT_LOG_DP_ERR("Request failed with unknown completion code");
-		}
-	}
-
-	return ret;
-}
-
 static uint16_t
 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 {
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h b/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h
new file mode 100644
index 000000000..764daadea
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_CRYPTODEV_OPS_HELPER_H_
+#define _OTX2_CRYPTODEV_OPS_HELPER_H_
+
+#include "cpt_pmd_logs.h"
+
+static void
+sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
+{
+	void *priv = get_sym_session_private_data(sess, driver_id);
+	struct rte_mempool *pool;
+
+	if (priv == NULL)
+		return;
+
+	memset(priv, 0, cpt_get_session_size());
+
+	pool = rte_mempool_from_obj(priv);
+
+	set_sym_session_private_data(sess, driver_id, NULL);
+
+	rte_mempool_put(pool, priv);
+}
+
+static __rte_always_inline uint8_t
+otx2_cpt_compcode_get(struct cpt_request_info *req)
+{
+	volatile struct cpt_res_s_9s *res;
+	uint8_t ret;
+
+	res = (volatile struct cpt_res_s_9s *)req->completion_addr;
+
+	if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
+		if (rte_get_timer_cycles() < req->time_out)
+			return ERR_REQ_PENDING;
+
+		CPT_LOG_DP_ERR("Request timed out");
+		return ERR_REQ_TIMEOUT;
+	}
+
+	if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
+		ret = NO_ERR;
+		if (unlikely(res->uc_compcode)) {
+			ret = res->uc_compcode;
+			CPT_LOG_DP_DEBUG("Request failed with microcode error");
+			CPT_LOG_DP_DEBUG("MC completion code 0x%x",
+					 res->uc_compcode);
+		}
+	} else {
+		CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
+
+		ret = res->compcode;
+		switch (res->compcode) {
+		case CPT_9X_COMP_E_INSTERR:
+			CPT_LOG_DP_ERR("Request failed with instruction error");
+			break;
+		case CPT_9X_COMP_E_FAULT:
+			CPT_LOG_DP_ERR("Request failed with DMA fault");
+			break;
+		case CPT_9X_COMP_E_HWERR:
+			CPT_LOG_DP_ERR("Request failed with hardware error");
+			break;
+		default:
+			CPT_LOG_DP_ERR("Request failed with unknown completion code");
+		}
+	}
+
+	return ret;
+}
+
+#endif /* _OTX2_CRYPTODEV_OPS_HELPER_H_ */
-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH 2/3] event/octeontx2: add crypto adapter framework
  2020-09-08 10:09 [dpdk-dev] [PATCH 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  2020-09-08 10:09 ` [dpdk-dev] [PATCH 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
@ 2020-09-08 10:09 ` Ankur Dwivedi
  2020-09-08 10:09 ` [dpdk-dev] [PATCH 3/3] event/octeontx2: add crypto adapter datapath Ankur Dwivedi
  2020-09-17  5:16 ` [dpdk-dev] [PATCH v2 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  3 siblings, 0 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-09-08 10:09 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

The crypto adapter callback functions and associated data structures
are added.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
---
 drivers/crypto/octeontx2/meson.build          |  4 +-
 .../crypto/octeontx2/otx2_crypto_adapter.c    | 77 +++++++++++++++++++
 .../crypto/octeontx2/otx2_crypto_adapter.h    | 21 +++++
 .../octeontx2/otx2_cryptodev_hw_access.h      | 12 +++
 drivers/crypto/octeontx2/otx2_cryptodev_qp.h  |  7 ++
 .../rte_pmd_octeontx2_crypto_version.map      | 10 +++
 drivers/event/octeontx2/meson.build           |  2 +-
 drivers/event/octeontx2/otx2_evdev.c          |  5 ++
 8 files changed, 136 insertions(+), 2 deletions(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_crypto_adapter.c
 create mode 100644 drivers/crypto/octeontx2/otx2_crypto_adapter.h

diff --git a/drivers/crypto/octeontx2/meson.build b/drivers/crypto/octeontx2/meson.build
index 148ec184a..063a553f2 100644
--- a/drivers/crypto/octeontx2/meson.build
+++ b/drivers/crypto/octeontx2/meson.build
@@ -10,6 +10,7 @@ deps += ['bus_pci']
 deps += ['common_cpt']
 deps += ['common_octeontx2']
 deps += ['ethdev']
+deps += ['eventdev']
 deps += ['security']
 name = 'octeontx2_crypto'
 
@@ -18,7 +19,8 @@ sources = files('otx2_cryptodev.c',
 		'otx2_cryptodev_hw_access.c',
 		'otx2_cryptodev_mbox.c',
 		'otx2_cryptodev_ops.c',
-		'otx2_cryptodev_sec.c')
+		'otx2_cryptodev_sec.c',
+		'otx2_crypto_adapter.c')
 
 extra_flags = []
 # This integrated controller runs only on a arm64 machine, remove 32bit warnings
diff --git a/drivers/crypto/octeontx2/otx2_crypto_adapter.c b/drivers/crypto/octeontx2/otx2_crypto_adapter.c
new file mode 100644
index 000000000..cfde7ec4f
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_crypto_adapter.c
@@ -0,0 +1,77 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#include <rte_cryptodev.h>
+#include <rte_eventdev.h>
+
+#include "otx2_cryptodev_hw_access.h"
+#include "otx2_cryptodev_qp.h"
+#include "otx2_cryptodev_mbox.h"
+#include "otx2_crypto_adapter.h"
+
+int
+otx2_ca_caps_get(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cdev, uint32_t *caps)
+{
+	RTE_SET_USED(dev);
+	RTE_SET_USED(cdev);
+
+	*caps = RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND |
+		RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW;
+
+	return 0;
+}
+
+int
+otx2_ca_qp_add(const struct rte_eventdev *dev, const struct rte_cryptodev *cdev,
+		int32_t queue_pair_id, const struct rte_event *event)
+{
+	union otx2_cpt_af_lf_ctl2 af_lf_ctl2;
+	struct otx2_cpt_qp *qp;
+	int ret;
+
+	RTE_SET_USED(dev);
+
+	qp = cdev->data->queue_pairs[queue_pair_id];
+
+	qp->ca_enable = 1;
+	rte_memcpy(&qp->ev, event, sizeof(struct rte_event));
+
+	ret = otx2_cpt_af_reg_read(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			&af_lf_ctl2.u);
+	if (ret)
+		return ret;
+
+	af_lf_ctl2.s.sso_pf_func = otx2_sso_pf_func_get();
+	ret = otx2_cpt_af_reg_write(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			af_lf_ctl2.u);
+
+	return ret;
+}
+
+int
+otx2_ca_qp_del(const struct rte_eventdev *dev, const struct rte_cryptodev *cdev,
+		int32_t queue_pair_id)
+{
+	union otx2_cpt_af_lf_ctl2 af_lf_ctl2;
+	struct otx2_cpt_qp *qp;
+	int ret;
+
+	RTE_SET_USED(dev);
+
+	qp = cdev->data->queue_pairs[queue_pair_id];
+	qp->ca_enable = 0;
+	memset(&qp->ev, 0, sizeof(struct rte_event));
+
+	ret = otx2_cpt_af_reg_read(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			&af_lf_ctl2.u);
+	if (ret)
+		return ret;
+
+	af_lf_ctl2.s.sso_pf_func = 0;
+	ret = otx2_cpt_af_reg_write(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			af_lf_ctl2.u);
+
+	return ret;
+}
diff --git a/drivers/crypto/octeontx2/otx2_crypto_adapter.h b/drivers/crypto/octeontx2/otx2_crypto_adapter.h
new file mode 100644
index 000000000..c8f02c0af
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_crypto_adapter.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_CRYPTO_ADAPTER_H_
+#define _OTX2_CRYPTO_ADAPTER_H_
+
+__rte_internal
+int otx2_ca_caps_get(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cdev, uint32_t *caps);
+
+__rte_internal
+int otx2_ca_qp_add(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cdev, int32_t queue_pair_id,
+		const struct rte_event *event);
+
+__rte_internal
+int otx2_ca_qp_del(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cdev, int32_t queue_pair_id);
+
+#endif /* _OTX2_CRYPTO_ADAPTER_H_ */
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
index 43db6a642..a435818e0 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
@@ -42,6 +42,7 @@
 #define OTX2_CPT_LF_NQ(a)		(0x400ull | (uint64_t)(a) << 3)
 
 #define OTX2_CPT_AF_LF_CTL(a)		(0x27000ull | (uint64_t)(a) << 3)
+#define OTX2_CPT_AF_LF_CTL2(a)		(0x29000ull | (uint64_t)(a) << 3)
 
 #define OTX2_CPT_LF_BAR2(vf, q_id) \
 		((vf)->otx2_dev.bar2 + \
@@ -110,6 +111,17 @@ union otx2_cpt_af_lf_ctl {
 	} s;
 };
 
+union otx2_cpt_af_lf_ctl2 {
+	uint64_t u;
+	struct {
+		uint64_t exe_no_swap                 : 1;
+		uint64_t exe_ldwb                    : 1;
+		uint64_t reserved_2_31               : 30;
+		uint64_t sso_pf_func                 : 16;
+		uint64_t nix_pf_func                 : 16;
+	} s;
+};
+
 union otx2_cpt_lf_q_grp_ptr {
 	uint64_t u;
 	struct {
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_qp.h b/drivers/crypto/octeontx2/otx2_cryptodev_qp.h
index 9d48da45f..96ff4eb41 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_qp.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_qp.h
@@ -6,6 +6,7 @@
 #define _OTX2_CRYPTODEV_QP_H_
 
 #include <rte_common.h>
+#include <rte_eventdev.h>
 #include <rte_mempool.h>
 #include <rte_spinlock.h>
 
@@ -30,6 +31,12 @@ struct otx2_cpt_qp {
 	/**< Metabuf info required to support operations on the queue pair */
 	rte_iova_t iq_dma_addr;
 	/**< Instruction queue address */
+	struct rte_event ev;
+	/**< Event information required for binding cryptodev queue to
+	 * eventdev queue. Used by crypto adapter.
+	 */
+	uint8_t ca_enable;
+	/**< Set when queue pair is added to crypto adapter */
 };
 
 #endif /* _OTX2_CRYPTODEV_QP_H_ */
diff --git a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
index 4a76d1d52..b47a7ad3e 100644
--- a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
+++ b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
@@ -1,3 +1,13 @@
 DPDK_21 {
 	local: *;
 };
+
+INTERNAL {
+	global:
+
+	otx2_ca_caps_get;
+	otx2_ca_qp_add;
+	otx2_ca_qp_del;
+
+	local: *;
+};
diff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build
index 0ade51cec..8585c54e4 100644
--- a/drivers/event/octeontx2/meson.build
+++ b/drivers/event/octeontx2/meson.build
@@ -24,6 +24,6 @@ foreach flag: extra_flags
 	endif
 endforeach
 
-deps += ['bus_pci', 'common_octeontx2', 'mempool_octeontx2', 'pmd_octeontx2']
+deps += ['bus_pci', 'common_octeontx2', 'mempool_octeontx2', 'pmd_octeontx2', 'pmd_octeontx2_crypto']
 
 includes += include_directories('../../crypto/octeontx2')
diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c
index b8b57c388..fe21787b6 100644
--- a/drivers/event/octeontx2/otx2_evdev.c
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -12,6 +12,7 @@
 #include <rte_mbuf_pool_ops.h>
 #include <rte_pci.h>
 
+#include "otx2_crypto_adapter.h"
 #include "otx2_evdev_stats.h"
 #include "otx2_evdev.h"
 #include "otx2_irq.h"
@@ -1587,6 +1588,10 @@ static struct rte_eventdev_ops otx2_sso_ops = {
 
 	.timer_adapter_caps_get = otx2_tim_caps_get,
 
+	.crypto_adapter_caps_get = otx2_ca_caps_get,
+	.crypto_adapter_queue_pair_add = otx2_ca_qp_add,
+	.crypto_adapter_queue_pair_del = otx2_ca_qp_del,
+
 	.xstats_get       = otx2_sso_xstats_get,
 	.xstats_reset     = otx2_sso_xstats_reset,
 	.xstats_get_names = otx2_sso_xstats_get_names,
-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH 3/3] event/octeontx2: add crypto adapter datapath
  2020-09-08 10:09 [dpdk-dev] [PATCH 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  2020-09-08 10:09 ` [dpdk-dev] [PATCH 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
  2020-09-08 10:09 ` [dpdk-dev] [PATCH 2/3] event/octeontx2: add crypto adapter framework Ankur Dwivedi
@ 2020-09-08 10:09 ` Ankur Dwivedi
  2020-09-17  5:16 ` [dpdk-dev] [PATCH v2 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  3 siblings, 0 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-09-08 10:09 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

In the op new mode of crypto adapter, the completed crypto operation
is submitted to the event device by the OCTEON TX2 crypto PMD.
During event device dequeue the result of crypto operation is checked.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
---
 drivers/common/cpt/cpt_common.h               |  1 +
 drivers/crypto/octeontx2/otx2_ca_helper.h     | 75 +++++++++++++++++++
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 47 ++++++++++++
 .../rte_pmd_octeontx2_crypto_version.map      |  1 +
 drivers/event/octeontx2/meson.build           |  1 +
 drivers/event/octeontx2/otx2_worker.h         | 10 ++-
 drivers/event/octeontx2/otx2_worker_dual.h    | 11 ++-
 7 files changed, 142 insertions(+), 4 deletions(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_ca_helper.h

diff --git a/drivers/common/cpt/cpt_common.h b/drivers/common/cpt/cpt_common.h
index 0141b2aed..1ce28e90b 100644
--- a/drivers/common/cpt/cpt_common.h
+++ b/drivers/common/cpt/cpt_common.h
@@ -72,6 +72,7 @@ struct cpt_request_info {
 		uint64_t ei3;
 	} ist;
 	uint8_t *rptr;
+	const struct otx2_cpt_qp *qp;
 
 	/** Control path fields */
 	uint64_t time_out;
diff --git a/drivers/crypto/octeontx2/otx2_ca_helper.h b/drivers/crypto/octeontx2/otx2_ca_helper.h
new file mode 100644
index 000000000..a6c758cf9
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_ca_helper.h
@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_CA_HELPER_H_
+#define _OTX2_CA_HELPER_H_
+
+#include <rte_cryptodev.h>
+#include <rte_cryptodev_pmd.h>
+#include <rte_eventdev.h>
+
+#include "cpt_pmd_logs.h"
+#include "cpt_ucode.h"
+
+#include "otx2_cryptodev.h"
+#include "otx2_cryptodev_hw_access.h"
+#include "otx2_cryptodev_ops_helper.h"
+#include "otx2_cryptodev_qp.h"
+
+static inline void
+otx2_ca_deq_post_process(const struct otx2_cpt_qp *qp,
+			 struct rte_crypto_op *cop, uintptr_t *rsp,
+			 uint8_t cc)
+{
+	if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
+		if (likely(cc == NO_ERR)) {
+			/* Verify authentication data if required */
+			if (unlikely(rsp[2]))
+				compl_auth_verify(cop, (uint8_t *)rsp[2],
+						 rsp[3]);
+			else
+				cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+		} else {
+			if (cc == ERR_GC_ICV_MISCOMPARE)
+				cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
+			else
+				cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
+		}
+
+		if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
+			sym_session_clear(otx2_cryptodev_driver_id,
+					  cop->sym->session);
+			memset(cop->sym->session, 0,
+			rte_cryptodev_sym_get_existing_header_session_size(
+				cop->sym->session));
+			rte_mempool_put(qp->sess_mp, cop->sym->session);
+			cop->sym->session = NULL;
+		}
+	}
+
+}
+
+static __rte_always_inline uint64_t
+otx2_handle_crypto_event(uint64_t get_work1)
+{
+	struct cpt_request_info *req;
+	struct rte_crypto_op *cop;
+	uintptr_t *rsp;
+	void *metabuf;
+	uint8_t cc;
+
+	req = (struct cpt_request_info *)(get_work1 >> 3);
+	cc = otx2_cpt_compcode_get(req);
+
+	rsp = req->op;
+	metabuf = (void *)rsp[0];
+	cop = (void *)rsp[1];
+
+	otx2_ca_deq_post_process(req->qp, cop, rsp, cc);
+
+	rte_mempool_put(req->qp->meta_info.pool, metabuf);
+
+	return (uint64_t)(cop);
+}
+#endif /* _OTX2_CA_HELPER_H_ */
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
index 77842b4ad..53c118287 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
@@ -417,6 +417,48 @@ sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 	return -ENOTSUP;
 }
 
+static __rte_always_inline void __rte_hot
+otx2_ca_enqueue_req(const struct otx2_cpt_qp *qp,
+		    struct cpt_request_info *req,
+		    void *lmtline)
+{
+	union cpt_inst_s inst;
+	uint64_t lmt_status;
+
+	inst.u[0] = 0;
+	inst.s9x.res_addr = req->comp_baddr;
+	inst.u[2] = 0;
+	inst.u[3] = 0;
+
+	inst.s9x.ei0 = req->ist.ei0;
+	inst.s9x.ei1 = req->ist.ei1;
+	inst.s9x.ei2 = req->ist.ei2;
+	inst.s9x.ei3 = req->ist.ei3;
+
+	inst.s9x.qord = 1;
+	inst.s9x.grp = qp->ev.queue_id;
+	inst.s9x.tt = qp->ev.sched_type;
+	inst.s9x.tag = (RTE_EVENT_TYPE_CRYPTODEV << 28) |
+			qp->ev.flow_id;
+	inst.s9x.wq_ptr = (uint64_t)req;
+	req->qp = qp;
+
+	do {
+		/* Copy CPT command to LMTLINE */
+		memcpy(lmtline, &inst, sizeof(inst));
+
+		/*
+		 * Make sure compiler does not reorder memcpy and ldeor.
+		 * LMTST transactions are always flushed from the write
+		 * buffer immediately, a DMB is not required to push out
+		 * LMTSTs.
+		 */
+		rte_cio_wmb();
+		lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
+	} while (lmt_status == 0);
+
+}
+
 static __rte_always_inline int32_t __rte_hot
 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 		     struct pending_queue *pend_q,
@@ -426,6 +468,11 @@ otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 	union cpt_inst_s inst;
 	uint64_t lmt_status;
 
+	if (qp->ca_enable) {
+		otx2_ca_enqueue_req(qp, req, lmtline);
+		return 0;
+	}
+
 	if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
 		return -EAGAIN;
 
diff --git a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
index b47a7ad3e..d23764d2c 100644
--- a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
+++ b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
@@ -5,6 +5,7 @@ DPDK_21 {
 INTERNAL {
 	global:
 
+	otx2_cryptodev_driver_id;
 	otx2_ca_caps_get;
 	otx2_ca_qp_add;
 	otx2_ca_qp_del;
diff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build
index 8585c54e4..08863a3e3 100644
--- a/drivers/event/octeontx2/meson.build
+++ b/drivers/event/octeontx2/meson.build
@@ -27,3 +27,4 @@ endforeach
 deps += ['bus_pci', 'common_octeontx2', 'mempool_octeontx2', 'pmd_octeontx2', 'pmd_octeontx2_crypto']
 
 includes += include_directories('../../crypto/octeontx2')
+includes += include_directories('../../common/cpt')
diff --git a/drivers/event/octeontx2/otx2_worker.h b/drivers/event/octeontx2/otx2_worker.h
index 924ff7ff4..5ea2c2de2 100644
--- a/drivers/event/octeontx2/otx2_worker.h
+++ b/drivers/event/octeontx2/otx2_worker.h
@@ -9,6 +9,7 @@
 #include <rte_branch_prediction.h>
 
 #include <otx2_common.h>
+#include "otx2_ca_helper.h"
 #include "otx2_evdev.h"
 #include "otx2_ethdev_sec_tx.h"
 
@@ -66,8 +67,10 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev,
 	ws->cur_tt = event.sched_type;
 	ws->cur_grp = event.queue_id;
 
-	if (event.sched_type != SSO_TT_EMPTY &&
-	    event.event_type == RTE_EVENT_TYPE_ETHDEV) {
+	if (event.sched_type == SSO_TT_EMPTY)
+		goto setev_and_return;
+
+	if (event.event_type == RTE_EVENT_TYPE_ETHDEV) {
 		otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,
 				 (uint32_t) event.get_work0, flags, lookup_mem);
 		/* Extracting tstamp, if PTP enabled*/
@@ -76,8 +79,11 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev,
 		otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, ws->tstamp,
 					flags, (uint64_t *)tstamp_ptr);
 		get_work1 = mbuf;
+	} else if (event.event_type == RTE_EVENT_TYPE_CRYPTODEV) {
+		get_work1 = otx2_handle_crypto_event(get_work1);
 	}
 
+setev_and_return:
 	ev->event = event.get_work0;
 	ev->u64 = get_work1;
 
diff --git a/drivers/event/octeontx2/otx2_worker_dual.h b/drivers/event/octeontx2/otx2_worker_dual.h
index 60aa14cca..4bf4e0170 100644
--- a/drivers/event/octeontx2/otx2_worker_dual.h
+++ b/drivers/event/octeontx2/otx2_worker_dual.h
@@ -9,6 +9,8 @@
 #include <rte_common.h>
 
 #include <otx2_common.h>
+
+#include "otx2_ca_helper.h"
 #include "otx2_evdev.h"
 
 /* SSO Operations */
@@ -63,8 +65,10 @@ otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,
 	ws->cur_tt = event.sched_type;
 	ws->cur_grp = event.queue_id;
 
-	if (event.sched_type != SSO_TT_EMPTY &&
-	    event.event_type == RTE_EVENT_TYPE_ETHDEV) {
+	if (event.sched_type == SSO_TT_EMPTY)
+		goto setev_and_return;
+
+	if (event.event_type == RTE_EVENT_TYPE_ETHDEV) {
 		uint8_t port = event.sub_event_type;
 
 		event.sub_event_type = 0;
@@ -82,8 +86,11 @@ otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,
 		otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, tstamp, flags,
 					(uint64_t *)tstamp_ptr);
 		get_work1 = mbuf;
+	} else if (event.event_type == RTE_EVENT_TYPE_CRYPTODEV) {
+		get_work1 = otx2_handle_crypto_event(get_work1);
 	}
 
+setev_and_return:
 	ev->event = event.get_work0;
 	ev->u64 = get_work1;
 
-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH v2 0/3] event/octeontx2: add support for event crypto adapter
  2020-09-08 10:09 [dpdk-dev] [PATCH 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
                   ` (2 preceding siblings ...)
  2020-09-08 10:09 ` [dpdk-dev] [PATCH 3/3] event/octeontx2: add crypto adapter datapath Ankur Dwivedi
@ 2020-09-17  5:16 ` Ankur Dwivedi
  2020-09-17  5:16   ` [dpdk-dev] [PATCH v2 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
                     ` (3 more replies)
  3 siblings, 4 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-09-17  5:16 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

This patch series adds support for event crypto adapter in op new
mode in the OCTEON TX2 event PMD. The functionality has been
verified with event crypto adapter test application. Build with
meson and ninja is supported.

v2:
* In the "event/octeontx2: add crypto adapter datapath" patch, right
  shifting the req pointer by 3 bits before submit during enqueue.
  Because of this the right shift during dequeue is not required.

Ankur Dwivedi (3):
  crypto/octeontx2: move functions to helper file
  event/octeontx2: add crypto adapter framework
  event/octeontx2: add crypto adapter datapath

 drivers/common/cpt/cpt_common.h               |  1 +
 drivers/crypto/octeontx2/meson.build          |  4 +-
 drivers/crypto/octeontx2/otx2_ca_helper.h     | 75 +++++++++++++++
 .../crypto/octeontx2/otx2_crypto_adapter.c    | 77 +++++++++++++++
 .../crypto/octeontx2/otx2_crypto_adapter.h    | 21 ++++
 .../octeontx2/otx2_cryptodev_hw_access.h      | 12 +++
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 96 ++++++++-----------
 .../octeontx2/otx2_cryptodev_ops_helper.h     | 74 ++++++++++++++
 drivers/crypto/octeontx2/otx2_cryptodev_qp.h  |  7 ++
 .../rte_pmd_octeontx2_crypto_version.map      | 11 +++
 drivers/event/octeontx2/meson.build           |  3 +-
 drivers/event/octeontx2/otx2_evdev.c          |  5 +
 drivers/event/octeontx2/otx2_worker.h         | 10 +-
 drivers/event/octeontx2/otx2_worker_dual.h    | 11 ++-
 14 files changed, 345 insertions(+), 62 deletions(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_ca_helper.h
 create mode 100644 drivers/crypto/octeontx2/otx2_crypto_adapter.c
 create mode 100644 drivers/crypto/octeontx2/otx2_crypto_adapter.h
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h

-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH v2 1/3] crypto/octeontx2: move functions to helper file
  2020-09-17  5:16 ` [dpdk-dev] [PATCH v2 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
@ 2020-09-17  5:16   ` Ankur Dwivedi
  2020-09-17  5:16   ` [dpdk-dev] [PATCH v2 2/3] event/octeontx2: add crypto adapter framework Ankur Dwivedi
                     ` (2 subsequent siblings)
  3 siblings, 0 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-09-17  5:16 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

Some functions are common across cryptodev pmd and the event
crypto adapter. This patch moves them into a helper file.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
---
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 65 +---------------
 .../octeontx2/otx2_cryptodev_ops_helper.h     | 74 +++++++++++++++++++
 2 files changed, 75 insertions(+), 64 deletions(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h

diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
index ccf566d5f..77842b4ad 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
@@ -13,6 +13,7 @@
 #include "otx2_cryptodev_hw_access.h"
 #include "otx2_cryptodev_mbox.h"
 #include "otx2_cryptodev_ops.h"
+#include "otx2_cryptodev_ops_helper.h"
 #include "otx2_ipsec_po_ops.h"
 #include "otx2_mbox.h"
 #include "otx2_sec_idev.h"
@@ -416,24 +417,6 @@ sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 	return -ENOTSUP;
 }
 
-static void
-sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
-{
-	void *priv = get_sym_session_private_data(sess, driver_id);
-	struct rte_mempool *pool;
-
-	if (priv == NULL)
-		return;
-
-	memset(priv, 0, cpt_get_session_size());
-
-	pool = rte_mempool_from_obj(priv);
-
-	set_sym_session_private_data(sess, driver_id, NULL);
-
-	rte_mempool_put(pool, priv);
-}
-
 static __rte_always_inline int32_t __rte_hot
 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 		     struct pending_queue *pend_q,
@@ -917,52 +900,6 @@ otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
 	}
 }
 
-static __rte_always_inline uint8_t
-otx2_cpt_compcode_get(struct cpt_request_info *req)
-{
-	volatile struct cpt_res_s_9s *res;
-	uint8_t ret;
-
-	res = (volatile struct cpt_res_s_9s *)req->completion_addr;
-
-	if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
-		if (rte_get_timer_cycles() < req->time_out)
-			return ERR_REQ_PENDING;
-
-		CPT_LOG_DP_ERR("Request timed out");
-		return ERR_REQ_TIMEOUT;
-	}
-
-	if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
-		ret = NO_ERR;
-		if (unlikely(res->uc_compcode)) {
-			ret = res->uc_compcode;
-			CPT_LOG_DP_DEBUG("Request failed with microcode error");
-			CPT_LOG_DP_DEBUG("MC completion code 0x%x",
-					 res->uc_compcode);
-		}
-	} else {
-		CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
-
-		ret = res->compcode;
-		switch (res->compcode) {
-		case CPT_9X_COMP_E_INSTERR:
-			CPT_LOG_DP_ERR("Request failed with instruction error");
-			break;
-		case CPT_9X_COMP_E_FAULT:
-			CPT_LOG_DP_ERR("Request failed with DMA fault");
-			break;
-		case CPT_9X_COMP_E_HWERR:
-			CPT_LOG_DP_ERR("Request failed with hardware error");
-			break;
-		default:
-			CPT_LOG_DP_ERR("Request failed with unknown completion code");
-		}
-	}
-
-	return ret;
-}
-
 static uint16_t
 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 {
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h b/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h
new file mode 100644
index 000000000..764daadea
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_CRYPTODEV_OPS_HELPER_H_
+#define _OTX2_CRYPTODEV_OPS_HELPER_H_
+
+#include "cpt_pmd_logs.h"
+
+static void
+sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
+{
+	void *priv = get_sym_session_private_data(sess, driver_id);
+	struct rte_mempool *pool;
+
+	if (priv == NULL)
+		return;
+
+	memset(priv, 0, cpt_get_session_size());
+
+	pool = rte_mempool_from_obj(priv);
+
+	set_sym_session_private_data(sess, driver_id, NULL);
+
+	rte_mempool_put(pool, priv);
+}
+
+static __rte_always_inline uint8_t
+otx2_cpt_compcode_get(struct cpt_request_info *req)
+{
+	volatile struct cpt_res_s_9s *res;
+	uint8_t ret;
+
+	res = (volatile struct cpt_res_s_9s *)req->completion_addr;
+
+	if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
+		if (rte_get_timer_cycles() < req->time_out)
+			return ERR_REQ_PENDING;
+
+		CPT_LOG_DP_ERR("Request timed out");
+		return ERR_REQ_TIMEOUT;
+	}
+
+	if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
+		ret = NO_ERR;
+		if (unlikely(res->uc_compcode)) {
+			ret = res->uc_compcode;
+			CPT_LOG_DP_DEBUG("Request failed with microcode error");
+			CPT_LOG_DP_DEBUG("MC completion code 0x%x",
+					 res->uc_compcode);
+		}
+	} else {
+		CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
+
+		ret = res->compcode;
+		switch (res->compcode) {
+		case CPT_9X_COMP_E_INSTERR:
+			CPT_LOG_DP_ERR("Request failed with instruction error");
+			break;
+		case CPT_9X_COMP_E_FAULT:
+			CPT_LOG_DP_ERR("Request failed with DMA fault");
+			break;
+		case CPT_9X_COMP_E_HWERR:
+			CPT_LOG_DP_ERR("Request failed with hardware error");
+			break;
+		default:
+			CPT_LOG_DP_ERR("Request failed with unknown completion code");
+		}
+	}
+
+	return ret;
+}
+
+#endif /* _OTX2_CRYPTODEV_OPS_HELPER_H_ */
-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH v2 2/3] event/octeontx2: add crypto adapter framework
  2020-09-17  5:16 ` [dpdk-dev] [PATCH v2 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  2020-09-17  5:16   ` [dpdk-dev] [PATCH v2 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
@ 2020-09-17  5:16   ` Ankur Dwivedi
  2020-09-17  5:16   ` [dpdk-dev] [PATCH v2 3/3] event/octeontx2: add crypto adapter datapath Ankur Dwivedi
  2020-10-08  5:54   ` [dpdk-dev] [PATCH v3 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  3 siblings, 0 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-09-17  5:16 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

The crypto adapter callback functions and associated data structures
are added.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
---
 drivers/crypto/octeontx2/meson.build          |  4 +-
 .../crypto/octeontx2/otx2_crypto_adapter.c    | 77 +++++++++++++++++++
 .../crypto/octeontx2/otx2_crypto_adapter.h    | 21 +++++
 .../octeontx2/otx2_cryptodev_hw_access.h      | 12 +++
 drivers/crypto/octeontx2/otx2_cryptodev_qp.h  |  7 ++
 .../rte_pmd_octeontx2_crypto_version.map      | 10 +++
 drivers/event/octeontx2/meson.build           |  2 +-
 drivers/event/octeontx2/otx2_evdev.c          |  5 ++
 8 files changed, 136 insertions(+), 2 deletions(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_crypto_adapter.c
 create mode 100644 drivers/crypto/octeontx2/otx2_crypto_adapter.h

diff --git a/drivers/crypto/octeontx2/meson.build b/drivers/crypto/octeontx2/meson.build
index 148ec184a..063a553f2 100644
--- a/drivers/crypto/octeontx2/meson.build
+++ b/drivers/crypto/octeontx2/meson.build
@@ -10,6 +10,7 @@ deps += ['bus_pci']
 deps += ['common_cpt']
 deps += ['common_octeontx2']
 deps += ['ethdev']
+deps += ['eventdev']
 deps += ['security']
 name = 'octeontx2_crypto'
 
@@ -18,7 +19,8 @@ sources = files('otx2_cryptodev.c',
 		'otx2_cryptodev_hw_access.c',
 		'otx2_cryptodev_mbox.c',
 		'otx2_cryptodev_ops.c',
-		'otx2_cryptodev_sec.c')
+		'otx2_cryptodev_sec.c',
+		'otx2_crypto_adapter.c')
 
 extra_flags = []
 # This integrated controller runs only on a arm64 machine, remove 32bit warnings
diff --git a/drivers/crypto/octeontx2/otx2_crypto_adapter.c b/drivers/crypto/octeontx2/otx2_crypto_adapter.c
new file mode 100644
index 000000000..cfde7ec4f
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_crypto_adapter.c
@@ -0,0 +1,77 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#include <rte_cryptodev.h>
+#include <rte_eventdev.h>
+
+#include "otx2_cryptodev_hw_access.h"
+#include "otx2_cryptodev_qp.h"
+#include "otx2_cryptodev_mbox.h"
+#include "otx2_crypto_adapter.h"
+
+int
+otx2_ca_caps_get(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cdev, uint32_t *caps)
+{
+	RTE_SET_USED(dev);
+	RTE_SET_USED(cdev);
+
+	*caps = RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND |
+		RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW;
+
+	return 0;
+}
+
+int
+otx2_ca_qp_add(const struct rte_eventdev *dev, const struct rte_cryptodev *cdev,
+		int32_t queue_pair_id, const struct rte_event *event)
+{
+	union otx2_cpt_af_lf_ctl2 af_lf_ctl2;
+	struct otx2_cpt_qp *qp;
+	int ret;
+
+	RTE_SET_USED(dev);
+
+	qp = cdev->data->queue_pairs[queue_pair_id];
+
+	qp->ca_enable = 1;
+	rte_memcpy(&qp->ev, event, sizeof(struct rte_event));
+
+	ret = otx2_cpt_af_reg_read(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			&af_lf_ctl2.u);
+	if (ret)
+		return ret;
+
+	af_lf_ctl2.s.sso_pf_func = otx2_sso_pf_func_get();
+	ret = otx2_cpt_af_reg_write(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			af_lf_ctl2.u);
+
+	return ret;
+}
+
+int
+otx2_ca_qp_del(const struct rte_eventdev *dev, const struct rte_cryptodev *cdev,
+		int32_t queue_pair_id)
+{
+	union otx2_cpt_af_lf_ctl2 af_lf_ctl2;
+	struct otx2_cpt_qp *qp;
+	int ret;
+
+	RTE_SET_USED(dev);
+
+	qp = cdev->data->queue_pairs[queue_pair_id];
+	qp->ca_enable = 0;
+	memset(&qp->ev, 0, sizeof(struct rte_event));
+
+	ret = otx2_cpt_af_reg_read(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			&af_lf_ctl2.u);
+	if (ret)
+		return ret;
+
+	af_lf_ctl2.s.sso_pf_func = 0;
+	ret = otx2_cpt_af_reg_write(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			af_lf_ctl2.u);
+
+	return ret;
+}
diff --git a/drivers/crypto/octeontx2/otx2_crypto_adapter.h b/drivers/crypto/octeontx2/otx2_crypto_adapter.h
new file mode 100644
index 000000000..c8f02c0af
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_crypto_adapter.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_CRYPTO_ADAPTER_H_
+#define _OTX2_CRYPTO_ADAPTER_H_
+
+__rte_internal
+int otx2_ca_caps_get(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cdev, uint32_t *caps);
+
+__rte_internal
+int otx2_ca_qp_add(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cdev, int32_t queue_pair_id,
+		const struct rte_event *event);
+
+__rte_internal
+int otx2_ca_qp_del(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cdev, int32_t queue_pair_id);
+
+#endif /* _OTX2_CRYPTO_ADAPTER_H_ */
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
index 43db6a642..a435818e0 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
@@ -42,6 +42,7 @@
 #define OTX2_CPT_LF_NQ(a)		(0x400ull | (uint64_t)(a) << 3)
 
 #define OTX2_CPT_AF_LF_CTL(a)		(0x27000ull | (uint64_t)(a) << 3)
+#define OTX2_CPT_AF_LF_CTL2(a)		(0x29000ull | (uint64_t)(a) << 3)
 
 #define OTX2_CPT_LF_BAR2(vf, q_id) \
 		((vf)->otx2_dev.bar2 + \
@@ -110,6 +111,17 @@ union otx2_cpt_af_lf_ctl {
 	} s;
 };
 
+union otx2_cpt_af_lf_ctl2 {
+	uint64_t u;
+	struct {
+		uint64_t exe_no_swap                 : 1;
+		uint64_t exe_ldwb                    : 1;
+		uint64_t reserved_2_31               : 30;
+		uint64_t sso_pf_func                 : 16;
+		uint64_t nix_pf_func                 : 16;
+	} s;
+};
+
 union otx2_cpt_lf_q_grp_ptr {
 	uint64_t u;
 	struct {
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_qp.h b/drivers/crypto/octeontx2/otx2_cryptodev_qp.h
index 9d48da45f..96ff4eb41 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_qp.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_qp.h
@@ -6,6 +6,7 @@
 #define _OTX2_CRYPTODEV_QP_H_
 
 #include <rte_common.h>
+#include <rte_eventdev.h>
 #include <rte_mempool.h>
 #include <rte_spinlock.h>
 
@@ -30,6 +31,12 @@ struct otx2_cpt_qp {
 	/**< Metabuf info required to support operations on the queue pair */
 	rte_iova_t iq_dma_addr;
 	/**< Instruction queue address */
+	struct rte_event ev;
+	/**< Event information required for binding cryptodev queue to
+	 * eventdev queue. Used by crypto adapter.
+	 */
+	uint8_t ca_enable;
+	/**< Set when queue pair is added to crypto adapter */
 };
 
 #endif /* _OTX2_CRYPTODEV_QP_H_ */
diff --git a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
index 4a76d1d52..b47a7ad3e 100644
--- a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
+++ b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
@@ -1,3 +1,13 @@
 DPDK_21 {
 	local: *;
 };
+
+INTERNAL {
+	global:
+
+	otx2_ca_caps_get;
+	otx2_ca_qp_add;
+	otx2_ca_qp_del;
+
+	local: *;
+};
diff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build
index 0ade51cec..8585c54e4 100644
--- a/drivers/event/octeontx2/meson.build
+++ b/drivers/event/octeontx2/meson.build
@@ -24,6 +24,6 @@ foreach flag: extra_flags
 	endif
 endforeach
 
-deps += ['bus_pci', 'common_octeontx2', 'mempool_octeontx2', 'pmd_octeontx2']
+deps += ['bus_pci', 'common_octeontx2', 'mempool_octeontx2', 'pmd_octeontx2', 'pmd_octeontx2_crypto']
 
 includes += include_directories('../../crypto/octeontx2')
diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c
index b8b57c388..fe21787b6 100644
--- a/drivers/event/octeontx2/otx2_evdev.c
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -12,6 +12,7 @@
 #include <rte_mbuf_pool_ops.h>
 #include <rte_pci.h>
 
+#include "otx2_crypto_adapter.h"
 #include "otx2_evdev_stats.h"
 #include "otx2_evdev.h"
 #include "otx2_irq.h"
@@ -1587,6 +1588,10 @@ static struct rte_eventdev_ops otx2_sso_ops = {
 
 	.timer_adapter_caps_get = otx2_tim_caps_get,
 
+	.crypto_adapter_caps_get = otx2_ca_caps_get,
+	.crypto_adapter_queue_pair_add = otx2_ca_qp_add,
+	.crypto_adapter_queue_pair_del = otx2_ca_qp_del,
+
 	.xstats_get       = otx2_sso_xstats_get,
 	.xstats_reset     = otx2_sso_xstats_reset,
 	.xstats_get_names = otx2_sso_xstats_get_names,
-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH v2 3/3] event/octeontx2: add crypto adapter datapath
  2020-09-17  5:16 ` [dpdk-dev] [PATCH v2 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  2020-09-17  5:16   ` [dpdk-dev] [PATCH v2 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
  2020-09-17  5:16   ` [dpdk-dev] [PATCH v2 2/3] event/octeontx2: add crypto adapter framework Ankur Dwivedi
@ 2020-09-17  5:16   ` Ankur Dwivedi
  2020-09-27 12:27     ` Jerin Jacob
  2020-10-08  5:54   ` [dpdk-dev] [PATCH v3 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  3 siblings, 1 reply; 19+ messages in thread
From: Ankur Dwivedi @ 2020-09-17  5:16 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

In the op new mode of crypto adapter, the completed crypto operation
is submitted to the event device by the OCTEON TX2 crypto PMD.
During event device dequeue the result of crypto operation is checked.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
---
 drivers/common/cpt/cpt_common.h               |  1 +
 drivers/crypto/octeontx2/otx2_ca_helper.h     | 75 +++++++++++++++++++
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 47 ++++++++++++
 .../rte_pmd_octeontx2_crypto_version.map      |  1 +
 drivers/event/octeontx2/meson.build           |  1 +
 drivers/event/octeontx2/otx2_worker.h         | 10 ++-
 drivers/event/octeontx2/otx2_worker_dual.h    | 11 ++-
 7 files changed, 142 insertions(+), 4 deletions(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_ca_helper.h

diff --git a/drivers/common/cpt/cpt_common.h b/drivers/common/cpt/cpt_common.h
index 0141b2aed..1ce28e90b 100644
--- a/drivers/common/cpt/cpt_common.h
+++ b/drivers/common/cpt/cpt_common.h
@@ -72,6 +72,7 @@ struct cpt_request_info {
 		uint64_t ei3;
 	} ist;
 	uint8_t *rptr;
+	const struct otx2_cpt_qp *qp;
 
 	/** Control path fields */
 	uint64_t time_out;
diff --git a/drivers/crypto/octeontx2/otx2_ca_helper.h b/drivers/crypto/octeontx2/otx2_ca_helper.h
new file mode 100644
index 000000000..6e012cdfa
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_ca_helper.h
@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_CA_HELPER_H_
+#define _OTX2_CA_HELPER_H_
+
+#include <rte_cryptodev.h>
+#include <rte_cryptodev_pmd.h>
+#include <rte_eventdev.h>
+
+#include "cpt_pmd_logs.h"
+#include "cpt_ucode.h"
+
+#include "otx2_cryptodev.h"
+#include "otx2_cryptodev_hw_access.h"
+#include "otx2_cryptodev_ops_helper.h"
+#include "otx2_cryptodev_qp.h"
+
+static inline void
+otx2_ca_deq_post_process(const struct otx2_cpt_qp *qp,
+			 struct rte_crypto_op *cop, uintptr_t *rsp,
+			 uint8_t cc)
+{
+	if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
+		if (likely(cc == NO_ERR)) {
+			/* Verify authentication data if required */
+			if (unlikely(rsp[2]))
+				compl_auth_verify(cop, (uint8_t *)rsp[2],
+						 rsp[3]);
+			else
+				cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+		} else {
+			if (cc == ERR_GC_ICV_MISCOMPARE)
+				cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
+			else
+				cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
+		}
+
+		if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
+			sym_session_clear(otx2_cryptodev_driver_id,
+					  cop->sym->session);
+			memset(cop->sym->session, 0,
+			rte_cryptodev_sym_get_existing_header_session_size(
+				cop->sym->session));
+			rte_mempool_put(qp->sess_mp, cop->sym->session);
+			cop->sym->session = NULL;
+		}
+	}
+
+}
+
+static __rte_always_inline uint64_t
+otx2_handle_crypto_event(uint64_t get_work1)
+{
+	struct cpt_request_info *req;
+	struct rte_crypto_op *cop;
+	uintptr_t *rsp;
+	void *metabuf;
+	uint8_t cc;
+
+	req = (struct cpt_request_info *)(get_work1);
+	cc = otx2_cpt_compcode_get(req);
+
+	rsp = req->op;
+	metabuf = (void *)rsp[0];
+	cop = (void *)rsp[1];
+
+	otx2_ca_deq_post_process(req->qp, cop, rsp, cc);
+
+	rte_mempool_put(req->qp->meta_info.pool, metabuf);
+
+	return (uint64_t)(cop);
+}
+#endif /* _OTX2_CA_HELPER_H_ */
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
index 77842b4ad..4f3c52533 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
@@ -417,6 +417,48 @@ sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 	return -ENOTSUP;
 }
 
+static __rte_always_inline void __rte_hot
+otx2_ca_enqueue_req(const struct otx2_cpt_qp *qp,
+		    struct cpt_request_info *req,
+		    void *lmtline)
+{
+	union cpt_inst_s inst;
+	uint64_t lmt_status;
+
+	inst.u[0] = 0;
+	inst.s9x.res_addr = req->comp_baddr;
+	inst.u[2] = 0;
+	inst.u[3] = 0;
+
+	inst.s9x.ei0 = req->ist.ei0;
+	inst.s9x.ei1 = req->ist.ei1;
+	inst.s9x.ei2 = req->ist.ei2;
+	inst.s9x.ei3 = req->ist.ei3;
+
+	inst.s9x.qord = 1;
+	inst.s9x.grp = qp->ev.queue_id;
+	inst.s9x.tt = qp->ev.sched_type;
+	inst.s9x.tag = (RTE_EVENT_TYPE_CRYPTODEV << 28) |
+			qp->ev.flow_id;
+	inst.s9x.wq_ptr = (uint64_t)req >> 3;
+	req->qp = qp;
+
+	do {
+		/* Copy CPT command to LMTLINE */
+		memcpy(lmtline, &inst, sizeof(inst));
+
+		/*
+		 * Make sure compiler does not reorder memcpy and ldeor.
+		 * LMTST transactions are always flushed from the write
+		 * buffer immediately, a DMB is not required to push out
+		 * LMTSTs.
+		 */
+		rte_cio_wmb();
+		lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
+	} while (lmt_status == 0);
+
+}
+
 static __rte_always_inline int32_t __rte_hot
 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 		     struct pending_queue *pend_q,
@@ -426,6 +468,11 @@ otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 	union cpt_inst_s inst;
 	uint64_t lmt_status;
 
+	if (qp->ca_enable) {
+		otx2_ca_enqueue_req(qp, req, lmtline);
+		return 0;
+	}
+
 	if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
 		return -EAGAIN;
 
diff --git a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
index b47a7ad3e..d23764d2c 100644
--- a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
+++ b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
@@ -5,6 +5,7 @@ DPDK_21 {
 INTERNAL {
 	global:
 
+	otx2_cryptodev_driver_id;
 	otx2_ca_caps_get;
 	otx2_ca_qp_add;
 	otx2_ca_qp_del;
diff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build
index 8585c54e4..08863a3e3 100644
--- a/drivers/event/octeontx2/meson.build
+++ b/drivers/event/octeontx2/meson.build
@@ -27,3 +27,4 @@ endforeach
 deps += ['bus_pci', 'common_octeontx2', 'mempool_octeontx2', 'pmd_octeontx2', 'pmd_octeontx2_crypto']
 
 includes += include_directories('../../crypto/octeontx2')
+includes += include_directories('../../common/cpt')
diff --git a/drivers/event/octeontx2/otx2_worker.h b/drivers/event/octeontx2/otx2_worker.h
index 924ff7ff4..5ea2c2de2 100644
--- a/drivers/event/octeontx2/otx2_worker.h
+++ b/drivers/event/octeontx2/otx2_worker.h
@@ -9,6 +9,7 @@
 #include <rte_branch_prediction.h>
 
 #include <otx2_common.h>
+#include "otx2_ca_helper.h"
 #include "otx2_evdev.h"
 #include "otx2_ethdev_sec_tx.h"
 
@@ -66,8 +67,10 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev,
 	ws->cur_tt = event.sched_type;
 	ws->cur_grp = event.queue_id;
 
-	if (event.sched_type != SSO_TT_EMPTY &&
-	    event.event_type == RTE_EVENT_TYPE_ETHDEV) {
+	if (event.sched_type == SSO_TT_EMPTY)
+		goto setev_and_return;
+
+	if (event.event_type == RTE_EVENT_TYPE_ETHDEV) {
 		otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,
 				 (uint32_t) event.get_work0, flags, lookup_mem);
 		/* Extracting tstamp, if PTP enabled*/
@@ -76,8 +79,11 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev,
 		otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, ws->tstamp,
 					flags, (uint64_t *)tstamp_ptr);
 		get_work1 = mbuf;
+	} else if (event.event_type == RTE_EVENT_TYPE_CRYPTODEV) {
+		get_work1 = otx2_handle_crypto_event(get_work1);
 	}
 
+setev_and_return:
 	ev->event = event.get_work0;
 	ev->u64 = get_work1;
 
diff --git a/drivers/event/octeontx2/otx2_worker_dual.h b/drivers/event/octeontx2/otx2_worker_dual.h
index 60aa14cca..4bf4e0170 100644
--- a/drivers/event/octeontx2/otx2_worker_dual.h
+++ b/drivers/event/octeontx2/otx2_worker_dual.h
@@ -9,6 +9,8 @@
 #include <rte_common.h>
 
 #include <otx2_common.h>
+
+#include "otx2_ca_helper.h"
 #include "otx2_evdev.h"
 
 /* SSO Operations */
@@ -63,8 +65,10 @@ otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,
 	ws->cur_tt = event.sched_type;
 	ws->cur_grp = event.queue_id;
 
-	if (event.sched_type != SSO_TT_EMPTY &&
-	    event.event_type == RTE_EVENT_TYPE_ETHDEV) {
+	if (event.sched_type == SSO_TT_EMPTY)
+		goto setev_and_return;
+
+	if (event.event_type == RTE_EVENT_TYPE_ETHDEV) {
 		uint8_t port = event.sub_event_type;
 
 		event.sub_event_type = 0;
@@ -82,8 +86,11 @@ otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,
 		otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, tstamp, flags,
 					(uint64_t *)tstamp_ptr);
 		get_work1 = mbuf;
+	} else if (event.event_type == RTE_EVENT_TYPE_CRYPTODEV) {
+		get_work1 = otx2_handle_crypto_event(get_work1);
 	}
 
+setev_and_return:
 	ev->event = event.get_work0;
 	ev->u64 = get_work1;
 
-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [dpdk-dev] [PATCH v2 3/3] event/octeontx2: add crypto adapter datapath
  2020-09-17  5:16   ` [dpdk-dev] [PATCH v2 3/3] event/octeontx2: add crypto adapter datapath Ankur Dwivedi
@ 2020-09-27 12:27     ` Jerin Jacob
  0 siblings, 0 replies; 19+ messages in thread
From: Jerin Jacob @ 2020-09-27 12:27 UTC (permalink / raw)
  To: Ankur Dwivedi
  Cc: dpdk-dev, Jerin Jacob, Pavan Nikhilesh, Akhil Goyal, Anoob Joseph

On Thu, Sep 17, 2020 at 10:47 AM Ankur Dwivedi <adwivedi@marvell.com> wrote:
>
> In the op new mode of crypto adapter, the completed crypto operation
> is submitted to the event device by the OCTEON TX2 crypto PMD.
> During event device dequeue the result of crypto operation is checked.
>
> Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>

> @@ -66,8 +67,10 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev,
>         ws->cur_tt = event.sched_type;
>         ws->cur_grp = event.queue_id;
>
> -       if (event.sched_type != SSO_TT_EMPTY &&
> -           event.event_type == RTE_EVENT_TYPE_ETHDEV) {
> +       if (event.sched_type == SSO_TT_EMPTY)
> +               goto setev_and_return;

Please move the security updation under the security flag template to
avoid performance impact
on nonsecurity case.

> +
> +       if (event.event_type == RTE_EVENT_TYPE_ETHDEV) {
>                 otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,
>                                  (uint32_t) event.get_work0, flags, lookup_mem);
>                 /* Extracting tstamp, if PTP enabled*/
> @@ -76,8 +79,11 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev,
>                 otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, ws->tstamp,
>                                         flags, (uint64_t *)tstamp_ptr);
>                 get_work1 = mbuf;
> +       } else if (event.event_type == RTE_EVENT_TYPE_CRYPTODEV) {
> +               get_work1 = otx2_handle_crypto_event(get_work1);
>         }
>

^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH v3 0/3] event/octeontx2: add support for event crypto adapter
  2020-09-17  5:16 ` [dpdk-dev] [PATCH v2 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
                     ` (2 preceding siblings ...)
  2020-09-17  5:16   ` [dpdk-dev] [PATCH v2 3/3] event/octeontx2: add crypto adapter datapath Ankur Dwivedi
@ 2020-10-08  5:54   ` Ankur Dwivedi
  2020-10-08  5:54     ` [dpdk-dev] [PATCH v3 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
                       ` (3 more replies)
  3 siblings, 4 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-10-08  5:54 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

This patch series adds support for event crypto adapter in op new
mode in the OCTEON TX2 event PMD. The functionality has been
verified with event crypto adapter test application. Build with
meson and ninja is supported.

v3:
* In the "event/octeontx2: add crypto adapter framework" patch,
  the following changes were made:
  - Moved the crypto adapter files from crypto/octeontx2 to
    event/octeontx2 directory.
  - Reused the security flag for crypto adapter implementation.

* In the "event/octeontx2: add crypto adapter datapath" patch,
  the following changes were made:
  - In otx2_ssogws_get_work() and otx2_ssogws_dual_get_work(),
    the crypto adapter function is called if offload flag has
    security enabled. This is an additional check apart from
    checking event type.

v2:
* In the "event/octeontx2: add crypto adapter datapath" patch, right
  shifting the req pointer by 3 bits before submit during enqueue.
  Because of this the right shift during dequeue is not required.

Ankur Dwivedi (3):
  crypto/octeontx2: move functions to helper file
  event/octeontx2: add crypto adapter framework
  event/octeontx2: add crypto adapter datapath

 drivers/common/cpt/cpt_common.h               |  1 +
 drivers/crypto/octeontx2/meson.build          |  1 +
 .../octeontx2/otx2_cryptodev_hw_access.h      | 12 +++
 .../crypto/octeontx2/otx2_cryptodev_mbox.h    |  2 +
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 96 ++++++++-----------
 .../octeontx2/otx2_cryptodev_ops_helper.h     | 74 ++++++++++++++
 drivers/crypto/octeontx2/otx2_cryptodev_qp.h  |  7 ++
 .../rte_pmd_octeontx2_crypto_version.map      | 10 ++
 drivers/event/octeontx2/meson.build           |  4 +-
 drivers/event/octeontx2/otx2_evdev.c          |  4 +
 drivers/event/octeontx2/otx2_evdev.h          | 11 +++
 .../event/octeontx2/otx2_evdev_crypto_adptr.c | 81 ++++++++++++++++
 .../octeontx2/otx2_evdev_crypto_adptr_dp.h    | 75 +++++++++++++++
 drivers/event/octeontx2/otx2_worker.h         | 28 ++++--
 drivers/event/octeontx2/otx2_worker_dual.h    | 44 +++++----
 15 files changed, 365 insertions(+), 85 deletions(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h
 create mode 100644 drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
 create mode 100644 drivers/event/octeontx2/otx2_evdev_crypto_adptr_dp.h

-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH v3 1/3] crypto/octeontx2: move functions to helper file
  2020-10-08  5:54   ` [dpdk-dev] [PATCH v3 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
@ 2020-10-08  5:54     ` Ankur Dwivedi
  2020-10-08  5:54     ` [dpdk-dev] [PATCH v3 2/3] event/octeontx2: add crypto adapter framework Ankur Dwivedi
                       ` (2 subsequent siblings)
  3 siblings, 0 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-10-08  5:54 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

Some functions are common across cryptodev pmd and the event
crypto adapter. This patch moves them into a helper file.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
---
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 65 +---------------
 .../octeontx2/otx2_cryptodev_ops_helper.h     | 74 +++++++++++++++++++
 2 files changed, 75 insertions(+), 64 deletions(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h

diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
index 9d51b17dd..1a115e983 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
@@ -13,6 +13,7 @@
 #include "otx2_cryptodev_hw_access.h"
 #include "otx2_cryptodev_mbox.h"
 #include "otx2_cryptodev_ops.h"
+#include "otx2_cryptodev_ops_helper.h"
 #include "otx2_ipsec_po_ops.h"
 #include "otx2_mbox.h"
 #include "otx2_sec_idev.h"
@@ -416,24 +417,6 @@ sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 	return -ENOTSUP;
 }
 
-static void
-sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
-{
-	void *priv = get_sym_session_private_data(sess, driver_id);
-	struct rte_mempool *pool;
-
-	if (priv == NULL)
-		return;
-
-	memset(priv, 0, cpt_get_session_size());
-
-	pool = rte_mempool_from_obj(priv);
-
-	set_sym_session_private_data(sess, driver_id, NULL);
-
-	rte_mempool_put(pool, priv);
-}
-
 static __rte_always_inline int32_t __rte_hot
 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 		     struct pending_queue *pend_q,
@@ -914,52 +897,6 @@ otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
 	}
 }
 
-static __rte_always_inline uint8_t
-otx2_cpt_compcode_get(struct cpt_request_info *req)
-{
-	volatile struct cpt_res_s_9s *res;
-	uint8_t ret;
-
-	res = (volatile struct cpt_res_s_9s *)req->completion_addr;
-
-	if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
-		if (rte_get_timer_cycles() < req->time_out)
-			return ERR_REQ_PENDING;
-
-		CPT_LOG_DP_ERR("Request timed out");
-		return ERR_REQ_TIMEOUT;
-	}
-
-	if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
-		ret = NO_ERR;
-		if (unlikely(res->uc_compcode)) {
-			ret = res->uc_compcode;
-			CPT_LOG_DP_DEBUG("Request failed with microcode error");
-			CPT_LOG_DP_DEBUG("MC completion code 0x%x",
-					 res->uc_compcode);
-		}
-	} else {
-		CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
-
-		ret = res->compcode;
-		switch (res->compcode) {
-		case CPT_9X_COMP_E_INSTERR:
-			CPT_LOG_DP_ERR("Request failed with instruction error");
-			break;
-		case CPT_9X_COMP_E_FAULT:
-			CPT_LOG_DP_ERR("Request failed with DMA fault");
-			break;
-		case CPT_9X_COMP_E_HWERR:
-			CPT_LOG_DP_ERR("Request failed with hardware error");
-			break;
-		default:
-			CPT_LOG_DP_ERR("Request failed with unknown completion code");
-		}
-	}
-
-	return ret;
-}
-
 static uint16_t
 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 {
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h b/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h
new file mode 100644
index 000000000..764daadea
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_CRYPTODEV_OPS_HELPER_H_
+#define _OTX2_CRYPTODEV_OPS_HELPER_H_
+
+#include "cpt_pmd_logs.h"
+
+static void
+sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
+{
+	void *priv = get_sym_session_private_data(sess, driver_id);
+	struct rte_mempool *pool;
+
+	if (priv == NULL)
+		return;
+
+	memset(priv, 0, cpt_get_session_size());
+
+	pool = rte_mempool_from_obj(priv);
+
+	set_sym_session_private_data(sess, driver_id, NULL);
+
+	rte_mempool_put(pool, priv);
+}
+
+static __rte_always_inline uint8_t
+otx2_cpt_compcode_get(struct cpt_request_info *req)
+{
+	volatile struct cpt_res_s_9s *res;
+	uint8_t ret;
+
+	res = (volatile struct cpt_res_s_9s *)req->completion_addr;
+
+	if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
+		if (rte_get_timer_cycles() < req->time_out)
+			return ERR_REQ_PENDING;
+
+		CPT_LOG_DP_ERR("Request timed out");
+		return ERR_REQ_TIMEOUT;
+	}
+
+	if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
+		ret = NO_ERR;
+		if (unlikely(res->uc_compcode)) {
+			ret = res->uc_compcode;
+			CPT_LOG_DP_DEBUG("Request failed with microcode error");
+			CPT_LOG_DP_DEBUG("MC completion code 0x%x",
+					 res->uc_compcode);
+		}
+	} else {
+		CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
+
+		ret = res->compcode;
+		switch (res->compcode) {
+		case CPT_9X_COMP_E_INSTERR:
+			CPT_LOG_DP_ERR("Request failed with instruction error");
+			break;
+		case CPT_9X_COMP_E_FAULT:
+			CPT_LOG_DP_ERR("Request failed with DMA fault");
+			break;
+		case CPT_9X_COMP_E_HWERR:
+			CPT_LOG_DP_ERR("Request failed with hardware error");
+			break;
+		default:
+			CPT_LOG_DP_ERR("Request failed with unknown completion code");
+		}
+	}
+
+	return ret;
+}
+
+#endif /* _OTX2_CRYPTODEV_OPS_HELPER_H_ */
-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH v3 2/3] event/octeontx2: add crypto adapter framework
  2020-10-08  5:54   ` [dpdk-dev] [PATCH v3 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  2020-10-08  5:54     ` [dpdk-dev] [PATCH v3 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
@ 2020-10-08  5:54     ` Ankur Dwivedi
  2020-10-08  5:54     ` [dpdk-dev] [PATCH v3 3/3] event/octeontx2: add crypto adapter datapath Ankur Dwivedi
  2020-10-08 10:34     ` [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  3 siblings, 0 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-10-08  5:54 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

The crypto adapter callback functions and associated data structures
are added.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
---
 drivers/crypto/octeontx2/meson.build          |  1 +
 .../octeontx2/otx2_cryptodev_hw_access.h      | 12 +++
 .../crypto/octeontx2/otx2_cryptodev_mbox.h    |  2 +
 drivers/crypto/octeontx2/otx2_cryptodev_qp.h  |  7 ++
 .../rte_pmd_octeontx2_crypto_version.map      |  9 +++
 drivers/event/octeontx2/meson.build           |  4 +-
 drivers/event/octeontx2/otx2_evdev.c          |  4 +
 drivers/event/octeontx2/otx2_evdev.h          | 11 +++
 .../event/octeontx2/otx2_evdev_crypto_adptr.c | 81 +++++++++++++++++++
 9 files changed, 130 insertions(+), 1 deletion(-)
 create mode 100644 drivers/event/octeontx2/otx2_evdev_crypto_adptr.c

diff --git a/drivers/crypto/octeontx2/meson.build b/drivers/crypto/octeontx2/meson.build
index 148ec184a..41114a5c3 100644
--- a/drivers/crypto/octeontx2/meson.build
+++ b/drivers/crypto/octeontx2/meson.build
@@ -10,6 +10,7 @@ deps += ['bus_pci']
 deps += ['common_cpt']
 deps += ['common_octeontx2']
 deps += ['ethdev']
+deps += ['eventdev']
 deps += ['security']
 name = 'octeontx2_crypto'
 
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
index 43db6a642..a435818e0 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
@@ -42,6 +42,7 @@
 #define OTX2_CPT_LF_NQ(a)		(0x400ull | (uint64_t)(a) << 3)
 
 #define OTX2_CPT_AF_LF_CTL(a)		(0x27000ull | (uint64_t)(a) << 3)
+#define OTX2_CPT_AF_LF_CTL2(a)		(0x29000ull | (uint64_t)(a) << 3)
 
 #define OTX2_CPT_LF_BAR2(vf, q_id) \
 		((vf)->otx2_dev.bar2 + \
@@ -110,6 +111,17 @@ union otx2_cpt_af_lf_ctl {
 	} s;
 };
 
+union otx2_cpt_af_lf_ctl2 {
+	uint64_t u;
+	struct {
+		uint64_t exe_no_swap                 : 1;
+		uint64_t exe_ldwb                    : 1;
+		uint64_t reserved_2_31               : 30;
+		uint64_t sso_pf_func                 : 16;
+		uint64_t nix_pf_func                 : 16;
+	} s;
+};
+
 union otx2_cpt_lf_q_grp_ptr {
 	uint64_t u;
 	struct {
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h
index 4bc057774..05efb4049 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h
@@ -21,9 +21,11 @@ int otx2_cpt_queues_detach(const struct rte_cryptodev *dev);
 
 int otx2_cpt_msix_offsets_get(const struct rte_cryptodev *dev);
 
+__rte_internal
 int otx2_cpt_af_reg_read(const struct rte_cryptodev *dev, uint64_t reg,
 			 uint64_t *val);
 
+__rte_internal
 int otx2_cpt_af_reg_write(const struct rte_cryptodev *dev, uint64_t reg,
 			  uint64_t val);
 
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_qp.h b/drivers/crypto/octeontx2/otx2_cryptodev_qp.h
index 9d48da45f..96ff4eb41 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_qp.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_qp.h
@@ -6,6 +6,7 @@
 #define _OTX2_CRYPTODEV_QP_H_
 
 #include <rte_common.h>
+#include <rte_eventdev.h>
 #include <rte_mempool.h>
 #include <rte_spinlock.h>
 
@@ -30,6 +31,12 @@ struct otx2_cpt_qp {
 	/**< Metabuf info required to support operations on the queue pair */
 	rte_iova_t iq_dma_addr;
 	/**< Instruction queue address */
+	struct rte_event ev;
+	/**< Event information required for binding cryptodev queue to
+	 * eventdev queue. Used by crypto adapter.
+	 */
+	uint8_t ca_enable;
+	/**< Set when queue pair is added to crypto adapter */
 };
 
 #endif /* _OTX2_CRYPTODEV_QP_H_ */
diff --git a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
index 4a76d1d52..95ebda255 100644
--- a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
+++ b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
@@ -1,3 +1,12 @@
 DPDK_21 {
 	local: *;
 };
+
+INTERNAL {
+	global:
+
+	otx2_cpt_af_reg_read;
+	otx2_cpt_af_reg_write;
+
+	local: *;
+};
diff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build
index 0ade51cec..6dde86fc7 100644
--- a/drivers/event/octeontx2/meson.build
+++ b/drivers/event/octeontx2/meson.build
@@ -6,6 +6,7 @@ sources = files('otx2_worker.c',
 		'otx2_worker_dual.c',
 		'otx2_evdev.c',
 		'otx2_evdev_adptr.c',
+		'otx2_evdev_crypto_adptr.c',
 		'otx2_evdev_irq.c',
 		'otx2_evdev_selftest.c',
 		'otx2_tim_evdev.c',
@@ -24,6 +25,7 @@ foreach flag: extra_flags
 	endif
 endforeach
 
-deps += ['bus_pci', 'common_octeontx2', 'mempool_octeontx2', 'pmd_octeontx2']
+deps += ['bus_pci', 'common_octeontx2', 'mempool_octeontx2', 'pmd_octeontx2', 'pmd_octeontx2_crypto']
 
 includes += include_directories('../../crypto/octeontx2')
+includes += include_directories('../../common/cpt')
diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c
index b8b57c388..461ad57f5 100644
--- a/drivers/event/octeontx2/otx2_evdev.c
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -1587,6 +1587,10 @@ static struct rte_eventdev_ops otx2_sso_ops = {
 
 	.timer_adapter_caps_get = otx2_tim_caps_get,
 
+	.crypto_adapter_caps_get = otx2_ca_caps_get,
+	.crypto_adapter_queue_pair_add = otx2_ca_qp_add,
+	.crypto_adapter_queue_pair_del = otx2_ca_qp_del,
+
 	.xstats_get       = otx2_sso_xstats_get,
 	.xstats_reset     = otx2_sso_xstats_reset,
 	.xstats_get_names = otx2_sso_xstats_get_names,
diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h
index 873724dd4..4bf715c03 100644
--- a/drivers/event/octeontx2/otx2_evdev.h
+++ b/drivers/event/octeontx2/otx2_evdev.h
@@ -388,6 +388,17 @@ int otx2_sso_tx_adapter_queue_del(uint8_t id,
 				  const struct rte_eth_dev *eth_dev,
 				  int32_t tx_queue_id);
 
+/* Event crypto adapter API's */
+int otx2_ca_caps_get(const struct rte_eventdev *dev,
+		     const struct rte_cryptodev *cdev, uint32_t *caps);
+
+int otx2_ca_qp_add(const struct rte_eventdev *dev,
+		   const struct rte_cryptodev *cdev, int32_t queue_pair_id,
+		   const struct rte_event *event);
+
+int otx2_ca_qp_del(const struct rte_eventdev *dev,
+		   const struct rte_cryptodev *cdev, int32_t queue_pair_id);
+
 /* Clean up API's */
 typedef void (*otx2_handle_event_t)(void *arg, struct rte_event ev);
 void ssogws_flush_events(struct otx2_ssogws *ws, uint8_t queue_id,
diff --git a/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c b/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
new file mode 100644
index 000000000..7197815ae
--- /dev/null
+++ b/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#include <rte_cryptodev.h>
+#include <rte_eventdev.h>
+
+#include "otx2_cryptodev_hw_access.h"
+#include "otx2_cryptodev_qp.h"
+#include "otx2_cryptodev_mbox.h"
+#include "otx2_evdev.h"
+
+int
+otx2_ca_caps_get(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cdev, uint32_t *caps)
+{
+	RTE_SET_USED(dev);
+	RTE_SET_USED(cdev);
+
+	*caps = RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND |
+		RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW;
+
+	return 0;
+}
+
+int
+otx2_ca_qp_add(const struct rte_eventdev *dev, const struct rte_cryptodev *cdev,
+		int32_t queue_pair_id, const struct rte_event *event)
+{
+	struct otx2_sso_evdev *sso_evdev = sso_pmd_priv(dev);
+	union otx2_cpt_af_lf_ctl2 af_lf_ctl2;
+	struct otx2_cpt_qp *qp;
+	int ret;
+
+	qp = cdev->data->queue_pairs[queue_pair_id];
+
+	qp->ca_enable = 1;
+	rte_memcpy(&qp->ev, event, sizeof(struct rte_event));
+
+	ret = otx2_cpt_af_reg_read(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			&af_lf_ctl2.u);
+	if (ret)
+		return ret;
+
+	af_lf_ctl2.s.sso_pf_func = otx2_sso_pf_func_get();
+	ret = otx2_cpt_af_reg_write(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			af_lf_ctl2.u);
+	if (ret)
+		return ret;
+
+	sso_evdev->rx_offloads |= NIX_RX_OFFLOAD_SECURITY_F;
+	sso_fastpath_fns_set((struct rte_eventdev *)(uintptr_t)dev);
+
+	return 0;
+}
+
+int
+otx2_ca_qp_del(const struct rte_eventdev *dev, const struct rte_cryptodev *cdev,
+		int32_t queue_pair_id)
+{
+	union otx2_cpt_af_lf_ctl2 af_lf_ctl2;
+	struct otx2_cpt_qp *qp;
+	int ret;
+
+	RTE_SET_USED(dev);
+
+	qp = cdev->data->queue_pairs[queue_pair_id];
+	qp->ca_enable = 0;
+	memset(&qp->ev, 0, sizeof(struct rte_event));
+
+	ret = otx2_cpt_af_reg_read(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			&af_lf_ctl2.u);
+	if (ret)
+		return ret;
+
+	af_lf_ctl2.s.sso_pf_func = 0;
+	ret = otx2_cpt_af_reg_write(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			af_lf_ctl2.u);
+
+	return ret;
+}
-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH v3 3/3] event/octeontx2: add crypto adapter datapath
  2020-10-08  5:54   ` [dpdk-dev] [PATCH v3 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  2020-10-08  5:54     ` [dpdk-dev] [PATCH v3 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
  2020-10-08  5:54     ` [dpdk-dev] [PATCH v3 2/3] event/octeontx2: add crypto adapter framework Ankur Dwivedi
@ 2020-10-08  5:54     ` Ankur Dwivedi
  2020-10-08 10:34     ` [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  3 siblings, 0 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-10-08  5:54 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

In the op new mode of crypto adapter, the completed crypto operation
is submitted to the event device by the OCTEON TX2 crypto PMD.
During event device dequeue the result of crypto operation is checked.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
---
 drivers/common/cpt/cpt_common.h               |  1 +
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 47 ++++++++++++
 .../rte_pmd_octeontx2_crypto_version.map      |  1 +
 .../octeontx2/otx2_evdev_crypto_adptr_dp.h    | 75 +++++++++++++++++++
 drivers/event/octeontx2/otx2_worker.h         | 28 ++++---
 drivers/event/octeontx2/otx2_worker_dual.h    | 44 ++++++-----
 6 files changed, 168 insertions(+), 28 deletions(-)
 create mode 100644 drivers/event/octeontx2/otx2_evdev_crypto_adptr_dp.h

diff --git a/drivers/common/cpt/cpt_common.h b/drivers/common/cpt/cpt_common.h
index 0141b2aed..1ce28e90b 100644
--- a/drivers/common/cpt/cpt_common.h
+++ b/drivers/common/cpt/cpt_common.h
@@ -72,6 +72,7 @@ struct cpt_request_info {
 		uint64_t ei3;
 	} ist;
 	uint8_t *rptr;
+	const struct otx2_cpt_qp *qp;
 
 	/** Control path fields */
 	uint64_t time_out;
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
index 1a115e983..7f32029dd 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
@@ -417,6 +417,48 @@ sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 	return -ENOTSUP;
 }
 
+static __rte_always_inline void __rte_hot
+otx2_ca_enqueue_req(const struct otx2_cpt_qp *qp,
+		    struct cpt_request_info *req,
+		    void *lmtline)
+{
+	union cpt_inst_s inst;
+	uint64_t lmt_status;
+
+	inst.u[0] = 0;
+	inst.s9x.res_addr = req->comp_baddr;
+	inst.u[2] = 0;
+	inst.u[3] = 0;
+
+	inst.s9x.ei0 = req->ist.ei0;
+	inst.s9x.ei1 = req->ist.ei1;
+	inst.s9x.ei2 = req->ist.ei2;
+	inst.s9x.ei3 = req->ist.ei3;
+
+	inst.s9x.qord = 1;
+	inst.s9x.grp = qp->ev.queue_id;
+	inst.s9x.tt = qp->ev.sched_type;
+	inst.s9x.tag = (RTE_EVENT_TYPE_CRYPTODEV << 28) |
+			qp->ev.flow_id;
+	inst.s9x.wq_ptr = (uint64_t)req >> 3;
+	req->qp = qp;
+
+	do {
+		/* Copy CPT command to LMTLINE */
+		memcpy(lmtline, &inst, sizeof(inst));
+
+		/*
+		 * Make sure compiler does not reorder memcpy and ldeor.
+		 * LMTST transactions are always flushed from the write
+		 * buffer immediately, a DMB is not required to push out
+		 * LMTSTs.
+		 */
+		rte_cio_wmb();
+		lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
+	} while (lmt_status == 0);
+
+}
+
 static __rte_always_inline int32_t __rte_hot
 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 		     struct pending_queue *pend_q,
@@ -426,6 +468,11 @@ otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 	union cpt_inst_s inst;
 	uint64_t lmt_status;
 
+	if (qp->ca_enable) {
+		otx2_ca_enqueue_req(qp, req, lmtline);
+		return 0;
+	}
+
 	if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
 		return -EAGAIN;
 
diff --git a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
index 95ebda255..02684781b 100644
--- a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
+++ b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
@@ -5,6 +5,7 @@ DPDK_21 {
 INTERNAL {
 	global:
 
+	otx2_cryptodev_driver_id;
 	otx2_cpt_af_reg_read;
 	otx2_cpt_af_reg_write;
 
diff --git a/drivers/event/octeontx2/otx2_evdev_crypto_adptr_dp.h b/drivers/event/octeontx2/otx2_evdev_crypto_adptr_dp.h
new file mode 100644
index 000000000..70b63933e
--- /dev/null
+++ b/drivers/event/octeontx2/otx2_evdev_crypto_adptr_dp.h
@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_EVDEV_CRYPTO_ADPTR_DP_H_
+#define _OTX2_EVDEV_CRYPTO_ADPTR_DP_H_
+
+#include <rte_cryptodev.h>
+#include <rte_cryptodev_pmd.h>
+#include <rte_eventdev.h>
+
+#include "cpt_pmd_logs.h"
+#include "cpt_ucode.h"
+
+#include "otx2_cryptodev.h"
+#include "otx2_cryptodev_hw_access.h"
+#include "otx2_cryptodev_ops_helper.h"
+#include "otx2_cryptodev_qp.h"
+
+static inline void
+otx2_ca_deq_post_process(const struct otx2_cpt_qp *qp,
+			 struct rte_crypto_op *cop, uintptr_t *rsp,
+			 uint8_t cc)
+{
+	if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
+		if (likely(cc == NO_ERR)) {
+			/* Verify authentication data if required */
+			if (unlikely(rsp[2]))
+				compl_auth_verify(cop, (uint8_t *)rsp[2],
+						 rsp[3]);
+			else
+				cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+		} else {
+			if (cc == ERR_GC_ICV_MISCOMPARE)
+				cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
+			else
+				cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
+		}
+
+		if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
+			sym_session_clear(otx2_cryptodev_driver_id,
+					  cop->sym->session);
+			memset(cop->sym->session, 0,
+			rte_cryptodev_sym_get_existing_header_session_size(
+				cop->sym->session));
+			rte_mempool_put(qp->sess_mp, cop->sym->session);
+			cop->sym->session = NULL;
+		}
+	}
+
+}
+
+static inline uint64_t
+otx2_handle_crypto_event(uint64_t get_work1)
+{
+	struct cpt_request_info *req;
+	struct rte_crypto_op *cop;
+	uintptr_t *rsp;
+	void *metabuf;
+	uint8_t cc;
+
+	req = (struct cpt_request_info *)(get_work1);
+	cc = otx2_cpt_compcode_get(req);
+
+	rsp = req->op;
+	metabuf = (void *)rsp[0];
+	cop = (void *)rsp[1];
+
+	otx2_ca_deq_post_process(req->qp, cop, rsp, cc);
+
+	rte_mempool_put(req->qp->meta_info.pool, metabuf);
+
+	return (uint64_t)(cop);
+}
+#endif /* _OTX2_EVDEV_CRYPTO_ADPTR_DP_H_ */
diff --git a/drivers/event/octeontx2/otx2_worker.h b/drivers/event/octeontx2/otx2_worker.h
index 924ff7ff4..ac6bc511c 100644
--- a/drivers/event/octeontx2/otx2_worker.h
+++ b/drivers/event/octeontx2/otx2_worker.h
@@ -10,6 +10,7 @@
 
 #include <otx2_common.h>
 #include "otx2_evdev.h"
+#include "otx2_evdev_crypto_adptr_dp.h"
 #include "otx2_ethdev_sec_tx.h"
 
 /* SSO Operations */
@@ -66,16 +67,23 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev,
 	ws->cur_tt = event.sched_type;
 	ws->cur_grp = event.queue_id;
 
-	if (event.sched_type != SSO_TT_EMPTY &&
-	    event.event_type == RTE_EVENT_TYPE_ETHDEV) {
-		otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,
-				 (uint32_t) event.get_work0, flags, lookup_mem);
-		/* Extracting tstamp, if PTP enabled*/
-		tstamp_ptr = *(uint64_t *)(((struct nix_wqe_hdr_s *)get_work1)
-					     + OTX2_SSO_WQE_SG_PTR);
-		otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, ws->tstamp,
-					flags, (uint64_t *)tstamp_ptr);
-		get_work1 = mbuf;
+	if (event.sched_type != SSO_TT_EMPTY) {
+		if ((flags & NIX_RX_OFFLOAD_SECURITY_F) &&
+		    (event.event_type == RTE_EVENT_TYPE_CRYPTODEV)) {
+			get_work1 = otx2_handle_crypto_event(get_work1);
+		} else if (event.event_type == RTE_EVENT_TYPE_ETHDEV) {
+			otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,
+					 (uint32_t) event.get_work0, flags,
+					 lookup_mem);
+			/* Extracting tstamp, if PTP enabled*/
+			tstamp_ptr = *(uint64_t *)(((struct nix_wqe_hdr_s *)
+						     get_work1) +
+						     OTX2_SSO_WQE_SG_PTR);
+			otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf,
+						ws->tstamp, flags,
+						(uint64_t *)tstamp_ptr);
+			get_work1 = mbuf;
+		}
 	}
 
 	ev->event = event.get_work0;
diff --git a/drivers/event/octeontx2/otx2_worker_dual.h b/drivers/event/octeontx2/otx2_worker_dual.h
index 60aa14cca..6e6061821 100644
--- a/drivers/event/octeontx2/otx2_worker_dual.h
+++ b/drivers/event/octeontx2/otx2_worker_dual.h
@@ -10,6 +10,7 @@
 
 #include <otx2_common.h>
 #include "otx2_evdev.h"
+#include "otx2_evdev_crypto_adptr_dp.h"
 
 /* SSO Operations */
 static __rte_always_inline uint16_t
@@ -63,25 +64,32 @@ otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,
 	ws->cur_tt = event.sched_type;
 	ws->cur_grp = event.queue_id;
 
-	if (event.sched_type != SSO_TT_EMPTY &&
-	    event.event_type == RTE_EVENT_TYPE_ETHDEV) {
-		uint8_t port = event.sub_event_type;
+	if (event.sched_type != SSO_TT_EMPTY) {
+		if ((flags & NIX_RX_OFFLOAD_SECURITY_F) &&
+		    (event.event_type == RTE_EVENT_TYPE_CRYPTODEV)) {
+			get_work1 = otx2_handle_crypto_event(get_work1);
+		} else if (event.event_type == RTE_EVENT_TYPE_ETHDEV) {
+			uint8_t port = event.sub_event_type;
 
-		event.sub_event_type = 0;
-		otx2_wqe_to_mbuf(get_work1, mbuf, port,
-				 event.flow_id, flags, lookup_mem);
-		/* Extracting tstamp, if PTP enabled. CGX will prepend the
-		 * timestamp at starting of packet data and it can be derieved
-		 * from WQE 9 dword which corresponds to SG iova.
-		 * rte_pktmbuf_mtod_offset can be used for this purpose but it
-		 * brings down the performance as it reads mbuf->buf_addr which
-		 * is not part of cache in general fast path.
-		 */
-		tstamp_ptr = *(uint64_t *)(((struct nix_wqe_hdr_s *)get_work1)
-					     + OTX2_SSO_WQE_SG_PTR);
-		otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, tstamp, flags,
-					(uint64_t *)tstamp_ptr);
-		get_work1 = mbuf;
+			event.sub_event_type = 0;
+			otx2_wqe_to_mbuf(get_work1, mbuf, port,
+					 event.flow_id, flags, lookup_mem);
+			/* Extracting tstamp, if PTP enabled. CGX will prepend
+			 * the timestamp at starting of packet data and it can
+			 * be derieved from WQE 9 dword which corresponds to SG
+			 * iova.
+			 * rte_pktmbuf_mtod_offset can be used for this purpose
+			 * but it brings down the performance as it reads
+			 * mbuf->buf_addr which is not part of cache in general
+			 * fast path.
+			 */
+			tstamp_ptr = *(uint64_t *)(((struct nix_wqe_hdr_s *)
+						     get_work1) +
+						     OTX2_SSO_WQE_SG_PTR);
+			otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, tstamp,
+						flags, (uint64_t *)tstamp_ptr);
+			get_work1 = mbuf;
+		}
 	}
 
 	ev->event = event.get_work0;
-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter
  2020-10-08  5:54   ` [dpdk-dev] [PATCH v3 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
                       ` (2 preceding siblings ...)
  2020-10-08  5:54     ` [dpdk-dev] [PATCH v3 3/3] event/octeontx2: add crypto adapter datapath Ankur Dwivedi
@ 2020-10-08 10:34     ` Ankur Dwivedi
  2020-10-08 10:34       ` [dpdk-dev] [PATCH v4 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
                         ` (3 more replies)
  3 siblings, 4 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-10-08 10:34 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

This patch series adds support for event crypto adapter in op new
mode in the OCTEON TX2 event PMD. The functionality has been
verified with event crypto adapter test application. Build with
meson and ninja is supported.

v4:
* In the "event/octeontx2: add crypto adapter datapath" patch,
  replaced rte_cio_wmb with rte_io_wmb, to resolve compilation
  error.

v3:
* In the "event/octeontx2: add crypto adapter framework" patch,
  the following changes were made:
  - Moved the crypto adapter files from crypto/octeontx2 to
    event/octeontx2 directory.
  - Reused the security flag for crypto adapter implementation.

* In the "event/octeontx2: add crypto adapter datapath" patch,
  the following changes were made:
  - In otx2_ssogws_get_work() and otx2_ssogws_dual_get_work(),
    the crypto adapter function is called if offload flag has
    security enabled. This is an additional check apart from
    checking event type.

v2:
* In the "event/octeontx2: add crypto adapter datapath" patch, right
  shifting the req pointer by 3 bits before submit during enqueue.
  Because of this the right shift during dequeue is not required.

Ankur Dwivedi (3):
  crypto/octeontx2: move functions to helper file
  event/octeontx2: add crypto adapter framework
  event/octeontx2: add crypto adapter datapath

 drivers/common/cpt/cpt_common.h               |  1 +
 drivers/crypto/octeontx2/meson.build          |  1 +
 .../octeontx2/otx2_cryptodev_hw_access.h      | 12 +++
 .../crypto/octeontx2/otx2_cryptodev_mbox.h    |  2 +
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 96 ++++++++-----------
 .../octeontx2/otx2_cryptodev_ops_helper.h     | 74 ++++++++++++++
 drivers/crypto/octeontx2/otx2_cryptodev_qp.h  |  7 ++
 .../rte_pmd_octeontx2_crypto_version.map      | 10 ++
 drivers/event/octeontx2/meson.build           |  4 +-
 drivers/event/octeontx2/otx2_evdev.c          |  4 +
 drivers/event/octeontx2/otx2_evdev.h          | 11 +++
 .../event/octeontx2/otx2_evdev_crypto_adptr.c | 81 ++++++++++++++++
 .../octeontx2/otx2_evdev_crypto_adptr_dp.h    | 75 +++++++++++++++
 drivers/event/octeontx2/otx2_worker.h         | 28 ++++--
 drivers/event/octeontx2/otx2_worker_dual.h    | 44 +++++----
 15 files changed, 365 insertions(+), 85 deletions(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h
 create mode 100644 drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
 create mode 100644 drivers/event/octeontx2/otx2_evdev_crypto_adptr_dp.h

-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH v4 1/3] crypto/octeontx2: move functions to helper file
  2020-10-08 10:34     ` [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
@ 2020-10-08 10:34       ` Ankur Dwivedi
  2020-10-08 10:34       ` [dpdk-dev] [PATCH v4 2/3] event/octeontx2: add crypto adapter framework Ankur Dwivedi
                         ` (2 subsequent siblings)
  3 siblings, 0 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-10-08 10:34 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

Some functions are common across cryptodev pmd and the event
crypto adapter. This patch moves them into a helper file.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
---
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 65 +---------------
 .../octeontx2/otx2_cryptodev_ops_helper.h     | 74 +++++++++++++++++++
 2 files changed, 75 insertions(+), 64 deletions(-)
 create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h

diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
index d38365a33..027fd0d47 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
@@ -13,6 +13,7 @@
 #include "otx2_cryptodev_hw_access.h"
 #include "otx2_cryptodev_mbox.h"
 #include "otx2_cryptodev_ops.h"
+#include "otx2_cryptodev_ops_helper.h"
 #include "otx2_ipsec_po_ops.h"
 #include "otx2_mbox.h"
 #include "otx2_sec_idev.h"
@@ -416,24 +417,6 @@ sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 	return -ENOTSUP;
 }
 
-static void
-sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
-{
-	void *priv = get_sym_session_private_data(sess, driver_id);
-	struct rte_mempool *pool;
-
-	if (priv == NULL)
-		return;
-
-	memset(priv, 0, cpt_get_session_size());
-
-	pool = rte_mempool_from_obj(priv);
-
-	set_sym_session_private_data(sess, driver_id, NULL);
-
-	rte_mempool_put(pool, priv);
-}
-
 static __rte_always_inline int32_t __rte_hot
 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 		     struct pending_queue *pend_q,
@@ -919,52 +902,6 @@ otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop,
 	}
 }
 
-static __rte_always_inline uint8_t
-otx2_cpt_compcode_get(struct cpt_request_info *req)
-{
-	volatile struct cpt_res_s_9s *res;
-	uint8_t ret;
-
-	res = (volatile struct cpt_res_s_9s *)req->completion_addr;
-
-	if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
-		if (rte_get_timer_cycles() < req->time_out)
-			return ERR_REQ_PENDING;
-
-		CPT_LOG_DP_ERR("Request timed out");
-		return ERR_REQ_TIMEOUT;
-	}
-
-	if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
-		ret = NO_ERR;
-		if (unlikely(res->uc_compcode)) {
-			ret = res->uc_compcode;
-			CPT_LOG_DP_DEBUG("Request failed with microcode error");
-			CPT_LOG_DP_DEBUG("MC completion code 0x%x",
-					 res->uc_compcode);
-		}
-	} else {
-		CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
-
-		ret = res->compcode;
-		switch (res->compcode) {
-		case CPT_9X_COMP_E_INSTERR:
-			CPT_LOG_DP_ERR("Request failed with instruction error");
-			break;
-		case CPT_9X_COMP_E_FAULT:
-			CPT_LOG_DP_ERR("Request failed with DMA fault");
-			break;
-		case CPT_9X_COMP_E_HWERR:
-			CPT_LOG_DP_ERR("Request failed with hardware error");
-			break;
-		default:
-			CPT_LOG_DP_ERR("Request failed with unknown completion code");
-		}
-	}
-
-	return ret;
-}
-
 static uint16_t
 otx2_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 {
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h b/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h
new file mode 100644
index 000000000..764daadea
--- /dev/null
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_CRYPTODEV_OPS_HELPER_H_
+#define _OTX2_CRYPTODEV_OPS_HELPER_H_
+
+#include "cpt_pmd_logs.h"
+
+static void
+sym_session_clear(int driver_id, struct rte_cryptodev_sym_session *sess)
+{
+	void *priv = get_sym_session_private_data(sess, driver_id);
+	struct rte_mempool *pool;
+
+	if (priv == NULL)
+		return;
+
+	memset(priv, 0, cpt_get_session_size());
+
+	pool = rte_mempool_from_obj(priv);
+
+	set_sym_session_private_data(sess, driver_id, NULL);
+
+	rte_mempool_put(pool, priv);
+}
+
+static __rte_always_inline uint8_t
+otx2_cpt_compcode_get(struct cpt_request_info *req)
+{
+	volatile struct cpt_res_s_9s *res;
+	uint8_t ret;
+
+	res = (volatile struct cpt_res_s_9s *)req->completion_addr;
+
+	if (unlikely(res->compcode == CPT_9X_COMP_E_NOTDONE)) {
+		if (rte_get_timer_cycles() < req->time_out)
+			return ERR_REQ_PENDING;
+
+		CPT_LOG_DP_ERR("Request timed out");
+		return ERR_REQ_TIMEOUT;
+	}
+
+	if (likely(res->compcode == CPT_9X_COMP_E_GOOD)) {
+		ret = NO_ERR;
+		if (unlikely(res->uc_compcode)) {
+			ret = res->uc_compcode;
+			CPT_LOG_DP_DEBUG("Request failed with microcode error");
+			CPT_LOG_DP_DEBUG("MC completion code 0x%x",
+					 res->uc_compcode);
+		}
+	} else {
+		CPT_LOG_DP_DEBUG("HW completion code 0x%x", res->compcode);
+
+		ret = res->compcode;
+		switch (res->compcode) {
+		case CPT_9X_COMP_E_INSTERR:
+			CPT_LOG_DP_ERR("Request failed with instruction error");
+			break;
+		case CPT_9X_COMP_E_FAULT:
+			CPT_LOG_DP_ERR("Request failed with DMA fault");
+			break;
+		case CPT_9X_COMP_E_HWERR:
+			CPT_LOG_DP_ERR("Request failed with hardware error");
+			break;
+		default:
+			CPT_LOG_DP_ERR("Request failed with unknown completion code");
+		}
+	}
+
+	return ret;
+}
+
+#endif /* _OTX2_CRYPTODEV_OPS_HELPER_H_ */
-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH v4 2/3] event/octeontx2: add crypto adapter framework
  2020-10-08 10:34     ` [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  2020-10-08 10:34       ` [dpdk-dev] [PATCH v4 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
@ 2020-10-08 10:34       ` Ankur Dwivedi
  2020-10-08 10:34       ` [dpdk-dev] [PATCH v4 3/3] event/octeontx2: add crypto adapter datapath Ankur Dwivedi
  2020-10-08 15:05       ` [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter Pavan Nikhilesh Bhagavatula
  3 siblings, 0 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-10-08 10:34 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

The crypto adapter callback functions and associated data structures
are added.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
---
 drivers/crypto/octeontx2/meson.build          |  1 +
 .../octeontx2/otx2_cryptodev_hw_access.h      | 12 +++
 .../crypto/octeontx2/otx2_cryptodev_mbox.h    |  2 +
 drivers/crypto/octeontx2/otx2_cryptodev_qp.h  |  7 ++
 .../rte_pmd_octeontx2_crypto_version.map      |  9 +++
 drivers/event/octeontx2/meson.build           |  4 +-
 drivers/event/octeontx2/otx2_evdev.c          |  4 +
 drivers/event/octeontx2/otx2_evdev.h          | 11 +++
 .../event/octeontx2/otx2_evdev_crypto_adptr.c | 81 +++++++++++++++++++
 9 files changed, 130 insertions(+), 1 deletion(-)
 create mode 100644 drivers/event/octeontx2/otx2_evdev_crypto_adptr.c

diff --git a/drivers/crypto/octeontx2/meson.build b/drivers/crypto/octeontx2/meson.build
index 148ec184a..41114a5c3 100644
--- a/drivers/crypto/octeontx2/meson.build
+++ b/drivers/crypto/octeontx2/meson.build
@@ -10,6 +10,7 @@ deps += ['bus_pci']
 deps += ['common_cpt']
 deps += ['common_octeontx2']
 deps += ['ethdev']
+deps += ['eventdev']
 deps += ['security']
 name = 'octeontx2_crypto'
 
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
index 43db6a642..a435818e0 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_hw_access.h
@@ -42,6 +42,7 @@
 #define OTX2_CPT_LF_NQ(a)		(0x400ull | (uint64_t)(a) << 3)
 
 #define OTX2_CPT_AF_LF_CTL(a)		(0x27000ull | (uint64_t)(a) << 3)
+#define OTX2_CPT_AF_LF_CTL2(a)		(0x29000ull | (uint64_t)(a) << 3)
 
 #define OTX2_CPT_LF_BAR2(vf, q_id) \
 		((vf)->otx2_dev.bar2 + \
@@ -110,6 +111,17 @@ union otx2_cpt_af_lf_ctl {
 	} s;
 };
 
+union otx2_cpt_af_lf_ctl2 {
+	uint64_t u;
+	struct {
+		uint64_t exe_no_swap                 : 1;
+		uint64_t exe_ldwb                    : 1;
+		uint64_t reserved_2_31               : 30;
+		uint64_t sso_pf_func                 : 16;
+		uint64_t nix_pf_func                 : 16;
+	} s;
+};
+
 union otx2_cpt_lf_q_grp_ptr {
 	uint64_t u;
 	struct {
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h
index 4bc057774..05efb4049 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.h
@@ -21,9 +21,11 @@ int otx2_cpt_queues_detach(const struct rte_cryptodev *dev);
 
 int otx2_cpt_msix_offsets_get(const struct rte_cryptodev *dev);
 
+__rte_internal
 int otx2_cpt_af_reg_read(const struct rte_cryptodev *dev, uint64_t reg,
 			 uint64_t *val);
 
+__rte_internal
 int otx2_cpt_af_reg_write(const struct rte_cryptodev *dev, uint64_t reg,
 			  uint64_t val);
 
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_qp.h b/drivers/crypto/octeontx2/otx2_cryptodev_qp.h
index 9d48da45f..96ff4eb41 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_qp.h
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_qp.h
@@ -6,6 +6,7 @@
 #define _OTX2_CRYPTODEV_QP_H_
 
 #include <rte_common.h>
+#include <rte_eventdev.h>
 #include <rte_mempool.h>
 #include <rte_spinlock.h>
 
@@ -30,6 +31,12 @@ struct otx2_cpt_qp {
 	/**< Metabuf info required to support operations on the queue pair */
 	rte_iova_t iq_dma_addr;
 	/**< Instruction queue address */
+	struct rte_event ev;
+	/**< Event information required for binding cryptodev queue to
+	 * eventdev queue. Used by crypto adapter.
+	 */
+	uint8_t ca_enable;
+	/**< Set when queue pair is added to crypto adapter */
 };
 
 #endif /* _OTX2_CRYPTODEV_QP_H_ */
diff --git a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
index 4a76d1d52..95ebda255 100644
--- a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
+++ b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
@@ -1,3 +1,12 @@
 DPDK_21 {
 	local: *;
 };
+
+INTERNAL {
+	global:
+
+	otx2_cpt_af_reg_read;
+	otx2_cpt_af_reg_write;
+
+	local: *;
+};
diff --git a/drivers/event/octeontx2/meson.build b/drivers/event/octeontx2/meson.build
index 0ade51cec..6dde86fc7 100644
--- a/drivers/event/octeontx2/meson.build
+++ b/drivers/event/octeontx2/meson.build
@@ -6,6 +6,7 @@ sources = files('otx2_worker.c',
 		'otx2_worker_dual.c',
 		'otx2_evdev.c',
 		'otx2_evdev_adptr.c',
+		'otx2_evdev_crypto_adptr.c',
 		'otx2_evdev_irq.c',
 		'otx2_evdev_selftest.c',
 		'otx2_tim_evdev.c',
@@ -24,6 +25,7 @@ foreach flag: extra_flags
 	endif
 endforeach
 
-deps += ['bus_pci', 'common_octeontx2', 'mempool_octeontx2', 'pmd_octeontx2']
+deps += ['bus_pci', 'common_octeontx2', 'mempool_octeontx2', 'pmd_octeontx2', 'pmd_octeontx2_crypto']
 
 includes += include_directories('../../crypto/octeontx2')
+includes += include_directories('../../common/cpt')
diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c
index b8b57c388..461ad57f5 100644
--- a/drivers/event/octeontx2/otx2_evdev.c
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -1587,6 +1587,10 @@ static struct rte_eventdev_ops otx2_sso_ops = {
 
 	.timer_adapter_caps_get = otx2_tim_caps_get,
 
+	.crypto_adapter_caps_get = otx2_ca_caps_get,
+	.crypto_adapter_queue_pair_add = otx2_ca_qp_add,
+	.crypto_adapter_queue_pair_del = otx2_ca_qp_del,
+
 	.xstats_get       = otx2_sso_xstats_get,
 	.xstats_reset     = otx2_sso_xstats_reset,
 	.xstats_get_names = otx2_sso_xstats_get_names,
diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h
index 873724dd4..4bf715c03 100644
--- a/drivers/event/octeontx2/otx2_evdev.h
+++ b/drivers/event/octeontx2/otx2_evdev.h
@@ -388,6 +388,17 @@ int otx2_sso_tx_adapter_queue_del(uint8_t id,
 				  const struct rte_eth_dev *eth_dev,
 				  int32_t tx_queue_id);
 
+/* Event crypto adapter API's */
+int otx2_ca_caps_get(const struct rte_eventdev *dev,
+		     const struct rte_cryptodev *cdev, uint32_t *caps);
+
+int otx2_ca_qp_add(const struct rte_eventdev *dev,
+		   const struct rte_cryptodev *cdev, int32_t queue_pair_id,
+		   const struct rte_event *event);
+
+int otx2_ca_qp_del(const struct rte_eventdev *dev,
+		   const struct rte_cryptodev *cdev, int32_t queue_pair_id);
+
 /* Clean up API's */
 typedef void (*otx2_handle_event_t)(void *arg, struct rte_event ev);
 void ssogws_flush_events(struct otx2_ssogws *ws, uint8_t queue_id,
diff --git a/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c b/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
new file mode 100644
index 000000000..7197815ae
--- /dev/null
+++ b/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
@@ -0,0 +1,81 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#include <rte_cryptodev.h>
+#include <rte_eventdev.h>
+
+#include "otx2_cryptodev_hw_access.h"
+#include "otx2_cryptodev_qp.h"
+#include "otx2_cryptodev_mbox.h"
+#include "otx2_evdev.h"
+
+int
+otx2_ca_caps_get(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cdev, uint32_t *caps)
+{
+	RTE_SET_USED(dev);
+	RTE_SET_USED(cdev);
+
+	*caps = RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND |
+		RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW;
+
+	return 0;
+}
+
+int
+otx2_ca_qp_add(const struct rte_eventdev *dev, const struct rte_cryptodev *cdev,
+		int32_t queue_pair_id, const struct rte_event *event)
+{
+	struct otx2_sso_evdev *sso_evdev = sso_pmd_priv(dev);
+	union otx2_cpt_af_lf_ctl2 af_lf_ctl2;
+	struct otx2_cpt_qp *qp;
+	int ret;
+
+	qp = cdev->data->queue_pairs[queue_pair_id];
+
+	qp->ca_enable = 1;
+	rte_memcpy(&qp->ev, event, sizeof(struct rte_event));
+
+	ret = otx2_cpt_af_reg_read(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			&af_lf_ctl2.u);
+	if (ret)
+		return ret;
+
+	af_lf_ctl2.s.sso_pf_func = otx2_sso_pf_func_get();
+	ret = otx2_cpt_af_reg_write(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			af_lf_ctl2.u);
+	if (ret)
+		return ret;
+
+	sso_evdev->rx_offloads |= NIX_RX_OFFLOAD_SECURITY_F;
+	sso_fastpath_fns_set((struct rte_eventdev *)(uintptr_t)dev);
+
+	return 0;
+}
+
+int
+otx2_ca_qp_del(const struct rte_eventdev *dev, const struct rte_cryptodev *cdev,
+		int32_t queue_pair_id)
+{
+	union otx2_cpt_af_lf_ctl2 af_lf_ctl2;
+	struct otx2_cpt_qp *qp;
+	int ret;
+
+	RTE_SET_USED(dev);
+
+	qp = cdev->data->queue_pairs[queue_pair_id];
+	qp->ca_enable = 0;
+	memset(&qp->ev, 0, sizeof(struct rte_event));
+
+	ret = otx2_cpt_af_reg_read(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			&af_lf_ctl2.u);
+	if (ret)
+		return ret;
+
+	af_lf_ctl2.s.sso_pf_func = 0;
+	ret = otx2_cpt_af_reg_write(cdev, OTX2_CPT_AF_LF_CTL2(qp->id),
+			af_lf_ctl2.u);
+
+	return ret;
+}
-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* [dpdk-dev] [PATCH v4 3/3] event/octeontx2: add crypto adapter datapath
  2020-10-08 10:34     ` [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
  2020-10-08 10:34       ` [dpdk-dev] [PATCH v4 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
  2020-10-08 10:34       ` [dpdk-dev] [PATCH v4 2/3] event/octeontx2: add crypto adapter framework Ankur Dwivedi
@ 2020-10-08 10:34       ` Ankur Dwivedi
  2020-10-08 15:05       ` [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter Pavan Nikhilesh Bhagavatula
  3 siblings, 0 replies; 19+ messages in thread
From: Ankur Dwivedi @ 2020-10-08 10:34 UTC (permalink / raw)
  To: dev; +Cc: jerinj, pbhagavatula, akhil.goyal, anoobj, Ankur Dwivedi

In the op new mode of crypto adapter, the completed crypto operation
is submitted to the event device by the OCTEON TX2 crypto PMD.
During event device dequeue the result of crypto operation is checked.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
---
 drivers/common/cpt/cpt_common.h               |  1 +
 drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 47 ++++++++++++
 .../rte_pmd_octeontx2_crypto_version.map      |  1 +
 .../octeontx2/otx2_evdev_crypto_adptr_dp.h    | 75 +++++++++++++++++++
 drivers/event/octeontx2/otx2_worker.h         | 28 ++++---
 drivers/event/octeontx2/otx2_worker_dual.h    | 44 ++++++-----
 6 files changed, 168 insertions(+), 28 deletions(-)
 create mode 100644 drivers/event/octeontx2/otx2_evdev_crypto_adptr_dp.h

diff --git a/drivers/common/cpt/cpt_common.h b/drivers/common/cpt/cpt_common.h
index 0141b2aed..1ce28e90b 100644
--- a/drivers/common/cpt/cpt_common.h
+++ b/drivers/common/cpt/cpt_common.h
@@ -72,6 +72,7 @@ struct cpt_request_info {
 		uint64_t ei3;
 	} ist;
 	uint8_t *rptr;
+	const struct otx2_cpt_qp *qp;
 
 	/** Control path fields */
 	uint64_t time_out;
diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
index 027fd0d47..9125369d3 100644
--- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
+++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c
@@ -417,6 +417,48 @@ sym_session_configure(int driver_id, struct rte_crypto_sym_xform *xform,
 	return -ENOTSUP;
 }
 
+static __rte_always_inline void __rte_hot
+otx2_ca_enqueue_req(const struct otx2_cpt_qp *qp,
+		    struct cpt_request_info *req,
+		    void *lmtline)
+{
+	union cpt_inst_s inst;
+	uint64_t lmt_status;
+
+	inst.u[0] = 0;
+	inst.s9x.res_addr = req->comp_baddr;
+	inst.u[2] = 0;
+	inst.u[3] = 0;
+
+	inst.s9x.ei0 = req->ist.ei0;
+	inst.s9x.ei1 = req->ist.ei1;
+	inst.s9x.ei2 = req->ist.ei2;
+	inst.s9x.ei3 = req->ist.ei3;
+
+	inst.s9x.qord = 1;
+	inst.s9x.grp = qp->ev.queue_id;
+	inst.s9x.tt = qp->ev.sched_type;
+	inst.s9x.tag = (RTE_EVENT_TYPE_CRYPTODEV << 28) |
+			qp->ev.flow_id;
+	inst.s9x.wq_ptr = (uint64_t)req >> 3;
+	req->qp = qp;
+
+	do {
+		/* Copy CPT command to LMTLINE */
+		memcpy(lmtline, &inst, sizeof(inst));
+
+		/*
+		 * Make sure compiler does not reorder memcpy and ldeor.
+		 * LMTST transactions are always flushed from the write
+		 * buffer immediately, a DMB is not required to push out
+		 * LMTSTs.
+		 */
+		rte_io_wmb();
+		lmt_status = otx2_lmt_submit(qp->lf_nq_reg);
+	} while (lmt_status == 0);
+
+}
+
 static __rte_always_inline int32_t __rte_hot
 otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 		     struct pending_queue *pend_q,
@@ -426,6 +468,11 @@ otx2_cpt_enqueue_req(const struct otx2_cpt_qp *qp,
 	union cpt_inst_s inst;
 	uint64_t lmt_status;
 
+	if (qp->ca_enable) {
+		otx2_ca_enqueue_req(qp, req, lmtline);
+		return 0;
+	}
+
 	if (unlikely(pend_q->pending_count >= OTX2_CPT_DEFAULT_CMD_QLEN))
 		return -EAGAIN;
 
diff --git a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
index 95ebda255..02684781b 100644
--- a/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
+++ b/drivers/crypto/octeontx2/rte_pmd_octeontx2_crypto_version.map
@@ -5,6 +5,7 @@ DPDK_21 {
 INTERNAL {
 	global:
 
+	otx2_cryptodev_driver_id;
 	otx2_cpt_af_reg_read;
 	otx2_cpt_af_reg_write;
 
diff --git a/drivers/event/octeontx2/otx2_evdev_crypto_adptr_dp.h b/drivers/event/octeontx2/otx2_evdev_crypto_adptr_dp.h
new file mode 100644
index 000000000..70b63933e
--- /dev/null
+++ b/drivers/event/octeontx2/otx2_evdev_crypto_adptr_dp.h
@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#ifndef _OTX2_EVDEV_CRYPTO_ADPTR_DP_H_
+#define _OTX2_EVDEV_CRYPTO_ADPTR_DP_H_
+
+#include <rte_cryptodev.h>
+#include <rte_cryptodev_pmd.h>
+#include <rte_eventdev.h>
+
+#include "cpt_pmd_logs.h"
+#include "cpt_ucode.h"
+
+#include "otx2_cryptodev.h"
+#include "otx2_cryptodev_hw_access.h"
+#include "otx2_cryptodev_ops_helper.h"
+#include "otx2_cryptodev_qp.h"
+
+static inline void
+otx2_ca_deq_post_process(const struct otx2_cpt_qp *qp,
+			 struct rte_crypto_op *cop, uintptr_t *rsp,
+			 uint8_t cc)
+{
+	if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {
+		if (likely(cc == NO_ERR)) {
+			/* Verify authentication data if required */
+			if (unlikely(rsp[2]))
+				compl_auth_verify(cop, (uint8_t *)rsp[2],
+						 rsp[3]);
+			else
+				cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+		} else {
+			if (cc == ERR_GC_ICV_MISCOMPARE)
+				cop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;
+			else
+				cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
+		}
+
+		if (unlikely(cop->sess_type == RTE_CRYPTO_OP_SESSIONLESS)) {
+			sym_session_clear(otx2_cryptodev_driver_id,
+					  cop->sym->session);
+			memset(cop->sym->session, 0,
+			rte_cryptodev_sym_get_existing_header_session_size(
+				cop->sym->session));
+			rte_mempool_put(qp->sess_mp, cop->sym->session);
+			cop->sym->session = NULL;
+		}
+	}
+
+}
+
+static inline uint64_t
+otx2_handle_crypto_event(uint64_t get_work1)
+{
+	struct cpt_request_info *req;
+	struct rte_crypto_op *cop;
+	uintptr_t *rsp;
+	void *metabuf;
+	uint8_t cc;
+
+	req = (struct cpt_request_info *)(get_work1);
+	cc = otx2_cpt_compcode_get(req);
+
+	rsp = req->op;
+	metabuf = (void *)rsp[0];
+	cop = (void *)rsp[1];
+
+	otx2_ca_deq_post_process(req->qp, cop, rsp, cc);
+
+	rte_mempool_put(req->qp->meta_info.pool, metabuf);
+
+	return (uint64_t)(cop);
+}
+#endif /* _OTX2_EVDEV_CRYPTO_ADPTR_DP_H_ */
diff --git a/drivers/event/octeontx2/otx2_worker.h b/drivers/event/octeontx2/otx2_worker.h
index cde1288d9..3a3ec0fd4 100644
--- a/drivers/event/octeontx2/otx2_worker.h
+++ b/drivers/event/octeontx2/otx2_worker.h
@@ -10,6 +10,7 @@
 
 #include <otx2_common.h>
 #include "otx2_evdev.h"
+#include "otx2_evdev_crypto_adptr_dp.h"
 #include "otx2_ethdev_sec_tx.h"
 
 /* SSO Operations */
@@ -66,16 +67,23 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev,
 	ws->cur_tt = event.sched_type;
 	ws->cur_grp = event.queue_id;
 
-	if (event.sched_type != SSO_TT_EMPTY &&
-	    event.event_type == RTE_EVENT_TYPE_ETHDEV) {
-		otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,
-				 (uint32_t) event.get_work0, flags, lookup_mem);
-		/* Extracting tstamp, if PTP enabled*/
-		tstamp_ptr = *(uint64_t *)(((struct nix_wqe_hdr_s *)get_work1)
-					     + OTX2_SSO_WQE_SG_PTR);
-		otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, ws->tstamp,
-					flags, (uint64_t *)tstamp_ptr);
-		get_work1 = mbuf;
+	if (event.sched_type != SSO_TT_EMPTY) {
+		if ((flags & NIX_RX_OFFLOAD_SECURITY_F) &&
+		    (event.event_type == RTE_EVENT_TYPE_CRYPTODEV)) {
+			get_work1 = otx2_handle_crypto_event(get_work1);
+		} else if (event.event_type == RTE_EVENT_TYPE_ETHDEV) {
+			otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,
+					 (uint32_t) event.get_work0, flags,
+					 lookup_mem);
+			/* Extracting tstamp, if PTP enabled*/
+			tstamp_ptr = *(uint64_t *)(((struct nix_wqe_hdr_s *)
+						     get_work1) +
+						     OTX2_SSO_WQE_SG_PTR);
+			otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf,
+						ws->tstamp, flags,
+						(uint64_t *)tstamp_ptr);
+			get_work1 = mbuf;
+		}
 	}
 
 	ev->event = event.get_work0;
diff --git a/drivers/event/octeontx2/otx2_worker_dual.h b/drivers/event/octeontx2/otx2_worker_dual.h
index 60aa14cca..6e6061821 100644
--- a/drivers/event/octeontx2/otx2_worker_dual.h
+++ b/drivers/event/octeontx2/otx2_worker_dual.h
@@ -10,6 +10,7 @@
 
 #include <otx2_common.h>
 #include "otx2_evdev.h"
+#include "otx2_evdev_crypto_adptr_dp.h"
 
 /* SSO Operations */
 static __rte_always_inline uint16_t
@@ -63,25 +64,32 @@ otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,
 	ws->cur_tt = event.sched_type;
 	ws->cur_grp = event.queue_id;
 
-	if (event.sched_type != SSO_TT_EMPTY &&
-	    event.event_type == RTE_EVENT_TYPE_ETHDEV) {
-		uint8_t port = event.sub_event_type;
+	if (event.sched_type != SSO_TT_EMPTY) {
+		if ((flags & NIX_RX_OFFLOAD_SECURITY_F) &&
+		    (event.event_type == RTE_EVENT_TYPE_CRYPTODEV)) {
+			get_work1 = otx2_handle_crypto_event(get_work1);
+		} else if (event.event_type == RTE_EVENT_TYPE_ETHDEV) {
+			uint8_t port = event.sub_event_type;
 
-		event.sub_event_type = 0;
-		otx2_wqe_to_mbuf(get_work1, mbuf, port,
-				 event.flow_id, flags, lookup_mem);
-		/* Extracting tstamp, if PTP enabled. CGX will prepend the
-		 * timestamp at starting of packet data and it can be derieved
-		 * from WQE 9 dword which corresponds to SG iova.
-		 * rte_pktmbuf_mtod_offset can be used for this purpose but it
-		 * brings down the performance as it reads mbuf->buf_addr which
-		 * is not part of cache in general fast path.
-		 */
-		tstamp_ptr = *(uint64_t *)(((struct nix_wqe_hdr_s *)get_work1)
-					     + OTX2_SSO_WQE_SG_PTR);
-		otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, tstamp, flags,
-					(uint64_t *)tstamp_ptr);
-		get_work1 = mbuf;
+			event.sub_event_type = 0;
+			otx2_wqe_to_mbuf(get_work1, mbuf, port,
+					 event.flow_id, flags, lookup_mem);
+			/* Extracting tstamp, if PTP enabled. CGX will prepend
+			 * the timestamp at starting of packet data and it can
+			 * be derieved from WQE 9 dword which corresponds to SG
+			 * iova.
+			 * rte_pktmbuf_mtod_offset can be used for this purpose
+			 * but it brings down the performance as it reads
+			 * mbuf->buf_addr which is not part of cache in general
+			 * fast path.
+			 */
+			tstamp_ptr = *(uint64_t *)(((struct nix_wqe_hdr_s *)
+						     get_work1) +
+						     OTX2_SSO_WQE_SG_PTR);
+			otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, tstamp,
+						flags, (uint64_t *)tstamp_ptr);
+			get_work1 = mbuf;
+		}
 	}
 
 	ev->event = event.get_work0;
-- 
2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter
  2020-10-08 10:34     ` [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
                         ` (2 preceding siblings ...)
  2020-10-08 10:34       ` [dpdk-dev] [PATCH v4 3/3] event/octeontx2: add crypto adapter datapath Ankur Dwivedi
@ 2020-10-08 15:05       ` Pavan Nikhilesh Bhagavatula
  2020-10-08 16:21         ` Jerin Jacob
  3 siblings, 1 reply; 19+ messages in thread
From: Pavan Nikhilesh Bhagavatula @ 2020-10-08 15:05 UTC (permalink / raw)
  To: Ankur Dwivedi, dev
  Cc: Jerin Jacob Kollanukkaran, akhil.goyal, Anoob Joseph, Ankur Dwivedi

Series-Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>

>This patch series adds support for event crypto adapter in op new
>mode in the OCTEON TX2 event PMD. The functionality has been
>verified with event crypto adapter test application. Build with
>meson and ninja is supported.
>
>v4:
>* In the "event/octeontx2: add crypto adapter datapath" patch,
>  replaced rte_cio_wmb with rte_io_wmb, to resolve compilation
>  error.
>
>v3:
>* In the "event/octeontx2: add crypto adapter framework" patch,
>  the following changes were made:
>  - Moved the crypto adapter files from crypto/octeontx2 to
>    event/octeontx2 directory.
>  - Reused the security flag for crypto adapter implementation.
>
>* In the "event/octeontx2: add crypto adapter datapath" patch,
>  the following changes were made:
>  - In otx2_ssogws_get_work() and otx2_ssogws_dual_get_work(),
>    the crypto adapter function is called if offload flag has
>    security enabled. This is an additional check apart from
>    checking event type.
>
>v2:
>* In the "event/octeontx2: add crypto adapter datapath" patch, right
>  shifting the req pointer by 3 bits before submit during enqueue.
>  Because of this the right shift during dequeue is not required.
>
>Ankur Dwivedi (3):
>  crypto/octeontx2: move functions to helper file
>  event/octeontx2: add crypto adapter framework
>  event/octeontx2: add crypto adapter datapath
>
> drivers/common/cpt/cpt_common.h               |  1 +
> drivers/crypto/octeontx2/meson.build          |  1 +
> .../octeontx2/otx2_cryptodev_hw_access.h      | 12 +++
> .../crypto/octeontx2/otx2_cryptodev_mbox.h    |  2 +
> drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 96 ++++++++---------
>--
> .../octeontx2/otx2_cryptodev_ops_helper.h     | 74 ++++++++++++++
> drivers/crypto/octeontx2/otx2_cryptodev_qp.h  |  7 ++
> .../rte_pmd_octeontx2_crypto_version.map      | 10 ++
> drivers/event/octeontx2/meson.build           |  4 +-
> drivers/event/octeontx2/otx2_evdev.c          |  4 +
> drivers/event/octeontx2/otx2_evdev.h          | 11 +++
> .../event/octeontx2/otx2_evdev_crypto_adptr.c | 81
>++++++++++++++++
> .../octeontx2/otx2_evdev_crypto_adptr_dp.h    | 75 +++++++++++++++
> drivers/event/octeontx2/otx2_worker.h         | 28 ++++--
> drivers/event/octeontx2/otx2_worker_dual.h    | 44 +++++----
> 15 files changed, 365 insertions(+), 85 deletions(-)
> create mode 100644
>drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h
> create mode 100644
>drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
> create mode 100644
>drivers/event/octeontx2/otx2_evdev_crypto_adptr_dp.h
>
>--
>2.28.0


^ permalink raw reply	[flat|nested] 19+ messages in thread

* Re: [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter
  2020-10-08 15:05       ` [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter Pavan Nikhilesh Bhagavatula
@ 2020-10-08 16:21         ` Jerin Jacob
  0 siblings, 0 replies; 19+ messages in thread
From: Jerin Jacob @ 2020-10-08 16:21 UTC (permalink / raw)
  To: Pavan Nikhilesh Bhagavatula
  Cc: Ankur Dwivedi, dev, Jerin Jacob Kollanukkaran, akhil.goyal, Anoob Joseph

On Thu, Oct 8, 2020 at 8:35 PM Pavan Nikhilesh Bhagavatula
<pbhagavatula@marvell.com> wrote:
>
> Series-Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>


Series applied to dpdk-next-eventdev/for-main. Thanks.


> >This patch series adds support for event crypto adapter in op new
> >mode in the OCTEON TX2 event PMD. The functionality has been
> >verified with event crypto adapter test application. Build with
> >meson and ninja is supported.
> >
> >v4:
> >* In the "event/octeontx2: add crypto adapter datapath" patch,
> >  replaced rte_cio_wmb with rte_io_wmb, to resolve compilation
> >  error.
> >
> >v3:
> >* In the "event/octeontx2: add crypto adapter framework" patch,
> >  the following changes were made:
> >  - Moved the crypto adapter files from crypto/octeontx2 to
> >    event/octeontx2 directory.
> >  - Reused the security flag for crypto adapter implementation.
> >
> >* In the "event/octeontx2: add crypto adapter datapath" patch,
> >  the following changes were made:
> >  - In otx2_ssogws_get_work() and otx2_ssogws_dual_get_work(),
> >    the crypto adapter function is called if offload flag has
> >    security enabled. This is an additional check apart from
> >    checking event type.
> >
> >v2:
> >* In the "event/octeontx2: add crypto adapter datapath" patch, right
> >  shifting the req pointer by 3 bits before submit during enqueue.
> >  Because of this the right shift during dequeue is not required.
> >
> >Ankur Dwivedi (3):
> >  crypto/octeontx2: move functions to helper file
> >  event/octeontx2: add crypto adapter framework
> >  event/octeontx2: add crypto adapter datapath
> >
> > drivers/common/cpt/cpt_common.h               |  1 +
> > drivers/crypto/octeontx2/meson.build          |  1 +
> > .../octeontx2/otx2_cryptodev_hw_access.h      | 12 +++
> > .../crypto/octeontx2/otx2_cryptodev_mbox.h    |  2 +
> > drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 96 ++++++++---------
> >--
> > .../octeontx2/otx2_cryptodev_ops_helper.h     | 74 ++++++++++++++
> > drivers/crypto/octeontx2/otx2_cryptodev_qp.h  |  7 ++
> > .../rte_pmd_octeontx2_crypto_version.map      | 10 ++
> > drivers/event/octeontx2/meson.build           |  4 +-
> > drivers/event/octeontx2/otx2_evdev.c          |  4 +
> > drivers/event/octeontx2/otx2_evdev.h          | 11 +++
> > .../event/octeontx2/otx2_evdev_crypto_adptr.c | 81
> >++++++++++++++++
> > .../octeontx2/otx2_evdev_crypto_adptr_dp.h    | 75 +++++++++++++++
> > drivers/event/octeontx2/otx2_worker.h         | 28 ++++--
> > drivers/event/octeontx2/otx2_worker_dual.h    | 44 +++++----
> > 15 files changed, 365 insertions(+), 85 deletions(-)
> > create mode 100644
> >drivers/crypto/octeontx2/otx2_cryptodev_ops_helper.h
> > create mode 100644
> >drivers/event/octeontx2/otx2_evdev_crypto_adptr.c
> > create mode 100644
> >drivers/event/octeontx2/otx2_evdev_crypto_adptr_dp.h
> >
> >--
> >2.28.0
>

^ permalink raw reply	[flat|nested] 19+ messages in thread

end of thread, other threads:[~2020-10-08 16:21 UTC | newest]

Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-08 10:09 [dpdk-dev] [PATCH 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
2020-09-08 10:09 ` [dpdk-dev] [PATCH 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
2020-09-08 10:09 ` [dpdk-dev] [PATCH 2/3] event/octeontx2: add crypto adapter framework Ankur Dwivedi
2020-09-08 10:09 ` [dpdk-dev] [PATCH 3/3] event/octeontx2: add crypto adapter datapath Ankur Dwivedi
2020-09-17  5:16 ` [dpdk-dev] [PATCH v2 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
2020-09-17  5:16   ` [dpdk-dev] [PATCH v2 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
2020-09-17  5:16   ` [dpdk-dev] [PATCH v2 2/3] event/octeontx2: add crypto adapter framework Ankur Dwivedi
2020-09-17  5:16   ` [dpdk-dev] [PATCH v2 3/3] event/octeontx2: add crypto adapter datapath Ankur Dwivedi
2020-09-27 12:27     ` Jerin Jacob
2020-10-08  5:54   ` [dpdk-dev] [PATCH v3 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
2020-10-08  5:54     ` [dpdk-dev] [PATCH v3 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
2020-10-08  5:54     ` [dpdk-dev] [PATCH v3 2/3] event/octeontx2: add crypto adapter framework Ankur Dwivedi
2020-10-08  5:54     ` [dpdk-dev] [PATCH v3 3/3] event/octeontx2: add crypto adapter datapath Ankur Dwivedi
2020-10-08 10:34     ` [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter Ankur Dwivedi
2020-10-08 10:34       ` [dpdk-dev] [PATCH v4 1/3] crypto/octeontx2: move functions to helper file Ankur Dwivedi
2020-10-08 10:34       ` [dpdk-dev] [PATCH v4 2/3] event/octeontx2: add crypto adapter framework Ankur Dwivedi
2020-10-08 10:34       ` [dpdk-dev] [PATCH v4 3/3] event/octeontx2: add crypto adapter datapath Ankur Dwivedi
2020-10-08 15:05       ` [dpdk-dev] [PATCH v4 0/3] event/octeontx2: add support for event crypto adapter Pavan Nikhilesh Bhagavatula
2020-10-08 16:21         ` Jerin Jacob

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