* AMD power monitor support @ 2023-11-29 10:33 Pattan, Reshma 2023-11-29 11:18 ` Tummala, Sivaprasad 0 siblings, 1 reply; 4+ messages in thread From: Pattan, Reshma @ 2023-11-29 10:33 UTC (permalink / raw) To: sivaprasad.tummala, users [-- Attachment #1: Type: text/plain, Size: 524 bytes --] Hi Sivaprasad, I am running dpdk l3fwd-power application in "monitor mode" on AMD Genoa using below command. ./dpdk-l3fwd-power -l 1-3 -- -p 0x1 --config="(0,0,2),(0,1,3)" --pmd-mgmt=monitor Does it allow cores to use DPDK AMD power monitor support feature based of mwaitx (https://patchwork.dpdk.org/project/dpdk/patch/20231009140546.862553-3-sivaprasad.tummala@amd.com/)? If so how do I confirm if the cores are entering implementation dependant C1 State. If any pointers please let me know. Thanks, Reshma [-- Attachment #2: Type: text/html, Size: 2667 bytes --] ^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: AMD power monitor support 2023-11-29 10:33 AMD power monitor support Pattan, Reshma @ 2023-11-29 11:18 ` Tummala, Sivaprasad 2023-11-29 13:30 ` Pattan, Reshma 0 siblings, 1 reply; 4+ messages in thread From: Tummala, Sivaprasad @ 2023-11-29 11:18 UTC (permalink / raw) To: Pattan, Reshma, users [-- Attachment #1: Type: text/plain, Size: 1076 bytes --] [AMD Official Use Only - General] Hi Reshma, Yes, with pmd-mgmt="monitor" allows AMD power monitor on Genoa. You can monitor the same using "cpupower -c <n> monitor" tool. Thanks & Regards, Sivaprasad From: Pattan, Reshma <reshma.pattan@intel.com> Sent: Wednesday, November 29, 2023 4:04 PM To: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com>; users@dpdk.org Subject: AMD power monitor support Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding. Hi Sivaprasad, I am running dpdk l3fwd-power application in "monitor mode" on AMD Genoa using below command. ./dpdk-l3fwd-power -l 1-3 -- -p 0x1 --config="(0,0,2),(0,1,3)" --pmd-mgmt=monitor Does it allow cores to use DPDK AMD power monitor support feature based of mwaitx (https://patchwork.dpdk.org/project/dpdk/patch/20231009140546.862553-3-sivaprasad.tummala@amd.com/)? If so how do I confirm if the cores are entering implementation dependant C1 State. If any pointers please let me know. Thanks, Reshma [-- Attachment #2: Type: text/html, Size: 5882 bytes --] ^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: AMD power monitor support 2023-11-29 11:18 ` Tummala, Sivaprasad @ 2023-11-29 13:30 ` Pattan, Reshma 2023-11-29 16:46 ` Tummala, Sivaprasad 0 siblings, 1 reply; 4+ messages in thread From: Pattan, Reshma @ 2023-11-29 13:30 UTC (permalink / raw) To: Tummala, Sivaprasad, users [-- Attachment #1: Type: text/plain, Size: 1743 bytes --] Hi Siva, Thanks for the information. Could you please clarify below 1. So should we see C1 increment in below stats. Or is it CX? 2. Are there any specific kernel boot parameter setting we need? to get into MWAITX. # cpupower -c 2 monitor | Mperf || Idle_Stats CPU| C0 | Cx | Freq || POLL | C1 | C2 Thanks, Reshma From: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com> Sent: Wednesday, November 29, 2023 11:19 AM To: Pattan, Reshma <reshma.pattan@intel.com>; users@dpdk.org Subject: RE: AMD power monitor support [AMD Official Use Only - General] Hi Reshma, Yes, with pmd-mgmt="monitor" allows AMD power monitor on Genoa. You can monitor the same using "cpupower -c <n> monitor" tool. Thanks & Regards, Sivaprasad From: Pattan, Reshma <reshma.pattan@intel.com<mailto:reshma.pattan@intel.com>> Sent: Wednesday, November 29, 2023 4:04 PM To: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com<mailto:Sivaprasad.Tummala@amd.com>>; users@dpdk.org<mailto:users@dpdk.org> Subject: AMD power monitor support Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding. Hi Sivaprasad, I am running dpdk l3fwd-power application in "monitor mode" on AMD Genoa using below command. ./dpdk-l3fwd-power -l 1-3 -- -p 0x1 --config="(0,0,2),(0,1,3)" --pmd-mgmt=monitor Does it allow cores to use DPDK AMD power monitor support feature based of mwaitx (https://patchwork.dpdk.org/project/dpdk/patch/20231009140546.862553-3-sivaprasad.tummala@amd.com/)? If so how do I confirm if the cores are entering implementation dependant C1 State. If any pointers please let me know. Thanks, Reshma [-- Attachment #2: Type: text/html, Size: 10308 bytes --] ^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: AMD power monitor support 2023-11-29 13:30 ` Pattan, Reshma @ 2023-11-29 16:46 ` Tummala, Sivaprasad 0 siblings, 0 replies; 4+ messages in thread From: Tummala, Sivaprasad @ 2023-11-29 16:46 UTC (permalink / raw) To: Pattan, Reshma, users [-- Attachment #1: Type: text/plain, Size: 2417 bytes --] [AMD Official Use Only - General] Hi Reshma, Please find my response inline. Thanks & Regards, Sivaprasad From: Pattan, Reshma <reshma.pattan@intel.com> Sent: Wednesday, November 29, 2023 7:00 PM To: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com>; users@dpdk.org Subject: RE: AMD power monitor support [AMD Official Use Only - General] Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding. Hi Siva, Thanks for the information. Could you please clarify below 1. So should we see C1 increment in below stats. Or is it CX? [Siva] It ll be accounted in "Cx" 1. Are there any specific kernel boot parameter setting we need? to get into MWAITX. [Siva] No additional boot parameters required. # cpupower -c 2 monitor | Mperf || Idle_Stats CPU| C0 | Cx | Freq || POLL | C1 | C2 Thanks, Reshma From: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com<mailto:Sivaprasad.Tummala@amd.com>> Sent: Wednesday, November 29, 2023 11:19 AM To: Pattan, Reshma <reshma.pattan@intel.com<mailto:reshma.pattan@intel.com>>; users@dpdk.org<mailto:users@dpdk.org> Subject: RE: AMD power monitor support [AMD Official Use Only - General] Hi Reshma, Yes, with pmd-mgmt="monitor" allows AMD power monitor on Genoa. You can monitor the same using "cpupower -c <n> monitor" tool. Thanks & Regards, Sivaprasad From: Pattan, Reshma <reshma.pattan@intel.com<mailto:reshma.pattan@intel.com>> Sent: Wednesday, November 29, 2023 4:04 PM To: Tummala, Sivaprasad <Sivaprasad.Tummala@amd.com<mailto:Sivaprasad.Tummala@amd.com>>; users@dpdk.org<mailto:users@dpdk.org> Subject: AMD power monitor support Caution: This message originated from an External Source. Use proper caution when opening attachments, clicking links, or responding. Hi Sivaprasad, I am running dpdk l3fwd-power application in "monitor mode" on AMD Genoa using below command. ./dpdk-l3fwd-power -l 1-3 -- -p 0x1 --config="(0,0,2),(0,1,3)" --pmd-mgmt=monitor Does it allow cores to use DPDK AMD power monitor support feature based of mwaitx (https://patchwork.dpdk.org/project/dpdk/patch/20231009140546.862553-3-sivaprasad.tummala@amd.com/)? If so how do I confirm if the cores are entering implementation dependant C1 State. If any pointers please let me know. Thanks, Reshma [-- Attachment #2: Type: text/html, Size: 13613 bytes --] ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2023-11-29 16:46 UTC | newest] Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2023-11-29 10:33 AMD power monitor support Pattan, Reshma 2023-11-29 11:18 ` Tummala, Sivaprasad 2023-11-29 13:30 ` Pattan, Reshma 2023-11-29 16:46 ` Tummala, Sivaprasad
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