From: Jiawen Wu <jiawenwu@trustnetic.com>
To: dev@dpdk.org
Cc: Jiawen Wu <jiawenwu@trustnetic.com>
Subject: [dpdk-dev] [PATCH v3 56/56] net/txgbe: add Rx and Tx descriptor status
Date: Wed, 14 Oct 2020 13:55:17 +0800 [thread overview]
Message-ID: <20201014055517.1214386-57-jiawenwu@trustnetic.com> (raw)
In-Reply-To: <20201014055517.1214386-1-jiawenwu@trustnetic.com>
Supports check the status of Rx and Tx descriptors.
Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
doc/guides/nics/features/txgbe.ini | 2 +
drivers/net/txgbe/txgbe_ethdev.c | 5 +
drivers/net/txgbe/txgbe_ethdev.h | 8 ++
drivers/net/txgbe/txgbe_rxtx.c | 180 +++++++++++++++++++++++++++++
drivers/net/txgbe/txgbe_rxtx.h | 1 +
5 files changed, 196 insertions(+)
diff --git a/doc/guides/nics/features/txgbe.ini b/doc/guides/nics/features/txgbe.ini
index 1684bcc7e..7c457fede 100644
--- a/doc/guides/nics/features/txgbe.ini
+++ b/doc/guides/nics/features/txgbe.ini
@@ -37,6 +37,8 @@ Inner L3 checksum = P
Inner L4 checksum = P
Packet type parsing = Y
Timesync = Y
+Rx descriptor status = Y
+Tx descriptor status = Y
Basic stats = Y
Extended stats = Y
Stats per queue = Y
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 77292f07f..c625f1795 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -480,6 +480,10 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
PMD_INIT_FUNC_TRACE();
eth_dev->dev_ops = &txgbe_eth_dev_ops;
+ eth_dev->rx_queue_count = txgbe_dev_rx_queue_count;
+ eth_dev->rx_descriptor_done = txgbe_dev_rx_descriptor_done;
+ eth_dev->rx_descriptor_status = txgbe_dev_rx_descriptor_status;
+ eth_dev->tx_descriptor_status = txgbe_dev_tx_descriptor_status;
eth_dev->rx_pkt_burst = &txgbe_recv_pkts;
eth_dev->tx_pkt_burst = &txgbe_xmit_pkts;
eth_dev->tx_pkt_prepare = &txgbe_prep_pkts;
@@ -4250,6 +4254,7 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {
.timesync_adjust_time = txgbe_timesync_adjust_time,
.timesync_read_time = txgbe_timesync_read_time,
.timesync_write_time = txgbe_timesync_write_time,
+ .tx_done_cleanup = txgbe_dev_tx_done_cleanup,
};
RTE_PMD_REGISTER_PCI(net_txgbe, rte_txgbe_pmd);
diff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h
index 2ee0290b7..b708e6d43 100644
--- a/drivers/net/txgbe/txgbe_ethdev.h
+++ b/drivers/net/txgbe/txgbe_ethdev.h
@@ -219,6 +219,14 @@ int txgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
uint16_t nb_tx_desc, unsigned int socket_id,
const struct rte_eth_txconf *tx_conf);
+uint32_t txgbe_dev_rx_queue_count(struct rte_eth_dev *dev,
+ uint16_t rx_queue_id);
+
+int txgbe_dev_rx_descriptor_done(void *rx_queue, uint16_t offset);
+
+int txgbe_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);
+int txgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);
+
int txgbe_dev_rx_init(struct rte_eth_dev *dev);
void txgbe_dev_tx_init(struct rte_eth_dev *dev);
diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 4dee4ac16..c78a8b6b0 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -1951,6 +1951,95 @@ txgbe_tx_queue_release_mbufs(struct txgbe_tx_queue *txq)
}
}
+static int
+txgbe_tx_done_cleanup_full(struct txgbe_tx_queue *txq, uint32_t free_cnt)
+{
+ struct txgbe_tx_entry *swr_ring = txq->sw_ring;
+ uint16_t i, tx_last, tx_id;
+ uint16_t nb_tx_free_last;
+ uint16_t nb_tx_to_clean;
+ uint32_t pkt_cnt;
+
+ /* Start free mbuf from the next of tx_tail */
+ tx_last = txq->tx_tail;
+ tx_id = swr_ring[tx_last].next_id;
+
+ if (txq->nb_tx_free == 0 && txgbe_xmit_cleanup(txq))
+ return 0;
+
+ nb_tx_to_clean = txq->nb_tx_free;
+ nb_tx_free_last = txq->nb_tx_free;
+ if (!free_cnt)
+ free_cnt = txq->nb_tx_desc;
+
+ /* Loop through swr_ring to count the amount of
+ * freeable mubfs and packets.
+ */
+ for (pkt_cnt = 0; pkt_cnt < free_cnt; ) {
+ for (i = 0; i < nb_tx_to_clean &&
+ pkt_cnt < free_cnt &&
+ tx_id != tx_last; i++) {
+ if (swr_ring[tx_id].mbuf != NULL) {
+ rte_pktmbuf_free_seg(swr_ring[tx_id].mbuf);
+ swr_ring[tx_id].mbuf = NULL;
+
+ /*
+ * last segment in the packet,
+ * increment packet count
+ */
+ pkt_cnt += (swr_ring[tx_id].last_id == tx_id);
+ }
+
+ tx_id = swr_ring[tx_id].next_id;
+ }
+
+ if (pkt_cnt < free_cnt) {
+ if (txgbe_xmit_cleanup(txq))
+ break;
+
+ nb_tx_to_clean = txq->nb_tx_free - nb_tx_free_last;
+ nb_tx_free_last = txq->nb_tx_free;
+ }
+ }
+
+ return (int)pkt_cnt;
+}
+
+static int
+txgbe_tx_done_cleanup_simple(struct txgbe_tx_queue *txq,
+ uint32_t free_cnt)
+{
+ int i, n, cnt;
+
+ if (free_cnt == 0 || free_cnt > txq->nb_tx_desc)
+ free_cnt = txq->nb_tx_desc;
+
+ cnt = free_cnt - free_cnt % txq->tx_free_thresh;
+
+ for (i = 0; i < cnt; i += n) {
+ if (txq->nb_tx_desc - txq->nb_tx_free < txq->tx_free_thresh)
+ break;
+
+ n = txgbe_tx_free_bufs(txq);
+
+ if (n == 0)
+ break;
+ }
+
+ return i;
+}
+
+int
+txgbe_dev_tx_done_cleanup(void *tx_queue, uint32_t free_cnt)
+{
+ struct txgbe_tx_queue *txq = (struct txgbe_tx_queue *)tx_queue;
+ if (txq->offloads == 0 &&
+ txq->tx_free_thresh >= RTE_PMD_TXGBE_TX_MAX_BURST)
+ return txgbe_tx_done_cleanup_simple(txq, free_cnt);
+
+ return txgbe_tx_done_cleanup_full(txq, free_cnt);
+}
+
static void __rte_cold
txgbe_tx_free_swring(struct txgbe_tx_queue *txq)
{
@@ -2536,6 +2625,97 @@ txgbe_dev_rx_queue_setup(struct rte_eth_dev *dev,
return 0;
}
+uint32_t
+txgbe_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
+{
+#define TXGBE_RXQ_SCAN_INTERVAL 4
+ volatile struct txgbe_rx_desc *rxdp;
+ struct txgbe_rx_queue *rxq;
+ uint32_t desc = 0;
+
+ rxq = dev->data->rx_queues[rx_queue_id];
+ rxdp = &rxq->rx_ring[rxq->rx_tail];
+
+ while ((desc < rxq->nb_rx_desc) &&
+ (rxdp->qw1.lo.status &
+ rte_cpu_to_le_32(TXGBE_RXD_STAT_DD))) {
+ desc += TXGBE_RXQ_SCAN_INTERVAL;
+ rxdp += TXGBE_RXQ_SCAN_INTERVAL;
+ if (rxq->rx_tail + desc >= rxq->nb_rx_desc)
+ rxdp = &(rxq->rx_ring[rxq->rx_tail +
+ desc - rxq->nb_rx_desc]);
+ }
+
+ return desc;
+}
+
+int
+txgbe_dev_rx_descriptor_done(void *rx_queue, uint16_t offset)
+{
+ volatile struct txgbe_rx_desc *rxdp;
+ struct txgbe_rx_queue *rxq = rx_queue;
+ uint32_t desc;
+
+ if (unlikely(offset >= rxq->nb_rx_desc))
+ return 0;
+ desc = rxq->rx_tail + offset;
+ if (desc >= rxq->nb_rx_desc)
+ desc -= rxq->nb_rx_desc;
+
+ rxdp = &rxq->rx_ring[desc];
+ return !!(rxdp->qw1.lo.status &
+ rte_cpu_to_le_32(TXGBE_RXD_STAT_DD));
+}
+
+int
+txgbe_dev_rx_descriptor_status(void *rx_queue, uint16_t offset)
+{
+ struct txgbe_rx_queue *rxq = rx_queue;
+ volatile uint32_t *status;
+ uint32_t nb_hold, desc;
+
+ if (unlikely(offset >= rxq->nb_rx_desc))
+ return -EINVAL;
+
+ nb_hold = rxq->nb_rx_hold;
+ if (offset >= rxq->nb_rx_desc - nb_hold)
+ return RTE_ETH_RX_DESC_UNAVAIL;
+
+ desc = rxq->rx_tail + offset;
+ if (desc >= rxq->nb_rx_desc)
+ desc -= rxq->nb_rx_desc;
+
+ status = &rxq->rx_ring[desc].qw1.lo.status;
+ if (*status & rte_cpu_to_le_32(TXGBE_RXD_STAT_DD))
+ return RTE_ETH_RX_DESC_DONE;
+
+ return RTE_ETH_RX_DESC_AVAIL;
+}
+
+int
+txgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset)
+{
+ struct txgbe_tx_queue *txq = tx_queue;
+ volatile uint32_t *status;
+ uint32_t desc;
+
+ if (unlikely(offset >= txq->nb_tx_desc))
+ return -EINVAL;
+
+ desc = txq->tx_tail + offset;
+ if (desc >= txq->nb_tx_desc) {
+ desc -= txq->nb_tx_desc;
+ if (desc >= txq->nb_tx_desc)
+ desc -= txq->nb_tx_desc;
+ }
+
+ status = &txq->tx_ring[desc].dw3;
+ if (*status & rte_cpu_to_le_32(TXGBE_TXD_DD))
+ return RTE_ETH_TX_DESC_DONE;
+
+ return RTE_ETH_TX_DESC_FULL;
+}
+
void __rte_cold
txgbe_dev_clear_queues(struct rte_eth_dev *dev)
{
diff --git a/drivers/net/txgbe/txgbe_rxtx.h b/drivers/net/txgbe/txgbe_rxtx.h
index 8c36698c3..120c2547f 100644
--- a/drivers/net/txgbe/txgbe_rxtx.h
+++ b/drivers/net/txgbe/txgbe_rxtx.h
@@ -407,6 +407,7 @@ struct txgbe_txq_ops {
void txgbe_set_tx_function(struct rte_eth_dev *dev, struct txgbe_tx_queue *txq);
void txgbe_set_rx_function(struct rte_eth_dev *dev);
+int txgbe_dev_tx_done_cleanup(void *tx_queue, uint32_t free_cnt);
uint64_t txgbe_get_tx_port_offloads(struct rte_eth_dev *dev);
uint64_t txgbe_get_rx_queue_offloads(struct rte_eth_dev *dev);
--
2.18.4
next prev parent reply other threads:[~2020-10-14 6:16 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-14 5:54 [dpdk-dev] [PATCH v3 00/56] net: txgbe PMD Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 01/56] net/txgbe: add build and doc infrastructure Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 02/56] net/txgbe: add ethdev probe and remove Jiawen Wu
2020-10-15 0:56 ` Ferruh Yigit
2020-10-16 9:52 ` Jiawen Wu
2020-10-16 10:33 ` Ferruh Yigit
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 03/56] net/txgbe: add device init and uninit Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 04/56] net/txgbe: add error types and registers Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 05/56] net/txgbe: add MAC type and bus lan id Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 06/56] net/txgbe: add HW infrastructure and dummy function Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 07/56] net/txgbe: add EEPROM functions Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 08/56] net/txgbe: add HW init and reset operation Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 09/56] net/txgbe: add PHY init Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 10/56] net/txgbe: add module identify Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 11/56] net/txgbe: add PHY reset Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 12/56] net/txgbe: add info get operation Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 13/56] net/txgbe: add interrupt operation Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 14/56] net/txgbe: add device configure operation Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 15/56] net/txgbe: add link status change Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 16/56] net/txgbe: add multi-speed link setup Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 17/56] net/txgbe: add autoc read and write Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 18/56] net/txgbe: add MAC address operations Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 19/56] net/txgbe: add unicast hash bitmap Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 20/56] net/txgbe: add Rx and Tx init Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 21/56] net/txgbe: add Rx and Tx queues setup and release Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 22/56] net/txgbe: add Rx and Tx start and stop Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 23/56] net/txgbe: add packet type Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 24/56] net/txgbe: fill simple transmit function Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 25/56] net/txgbe: fill transmit function with hardware offload Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 26/56] net/txgbe: fill Tx prepare function Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 27/56] net/txgbe: fill receive functions Jiawen Wu
2020-10-15 0:55 ` Ferruh Yigit
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 28/56] net/txgbe: add device start operation Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 29/56] net/txgbe: add Rx and Tx data path start and stop Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 30/56] net/txgbe: add device stop and close operations Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 31/56] net/txgbe: support Rx interrupt Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 32/56] net/txgbe: add Rx and Tx queue info get Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 33/56] net/txgbe: add device stats get Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 34/56] net/txgbe: add device xstats get Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 35/56] net/txgbe: add queue stats mapping Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 36/56] net/txgbe: add VLAN handle support Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 37/56] net/txgbe: add SWFW semaphore and lock Jiawen Wu
2020-10-14 5:54 ` [dpdk-dev] [PATCH v3 38/56] net/txgbe: add PF module init and uninit for SRIOV Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 39/56] net/txgbe: add process mailbox operation Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 40/56] net/txgbe: add PF module configure for SRIOV Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 41/56] net/txgbe: add VMDq configure Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 42/56] net/txgbe: add RSS support Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 43/56] net/txgbe: add DCB support Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 44/56] net/txgbe: add flow control support Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 45/56] net/txgbe: add FC auto negotiation support Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 46/56] net/txgbe: add priority flow control support Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 47/56] net/txgbe: add device promiscuous and allmulticast mode Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 48/56] net/txgbe: add MTU set operation Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 49/56] net/txgbe: add FW version get operation Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 50/56] net/txgbe: add EEPROM info " Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 51/56] net/txgbe: add register dump support Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 52/56] net/txgbe: support device LED on and off Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 53/56] net/txgbe: add mirror rule operations Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 54/56] net/txgbe: add PTP support Jiawen Wu
2020-10-14 5:55 ` [dpdk-dev] [PATCH v3 55/56] net/txgbe: add DCB info get operation Jiawen Wu
2020-10-14 5:55 ` Jiawen Wu [this message]
2020-10-15 0:55 ` [dpdk-dev] [PATCH v3 56/56] net/txgbe: add Rx and Tx descriptor status Ferruh Yigit
2020-10-15 0:56 ` [dpdk-dev] [PATCH v3 00/56] net: txgbe PMD Ferruh Yigit
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