[PATCH 0/4] cryptodev: add SM3 and SM4 algorithms

[PATCH 0/4] cryptodev: add SM3 and SM4 algorithms

[Arek Kusztal]

ShangMi 4 (SM4) is a block cipher used in the Chinese National Standard for
Wireless LAN WAPI and also used with Transport Layer Security.
ShangMi 3 (SM3) is a cryptographic hash function used in the
Chinese National Standard.

This patcheset adds both to the Cryptodev.

Arek Kusztal (4):
  cryptodev: add SM4 encryption algorithm
  cryptodev: add SM3 hash algorithm
  crypto/qat: add SM4 encryption algorithm
  crypto/qat : add SM3 hash algorithm

 doc/guides/cryptodevs/features/default.ini   |  4 ++++
 doc/guides/cryptodevs/features/qat.ini       |  4 ++++
 doc/guides/rel_notes/release_22_11.rst       | 16 ++++++++++++++
 drivers/common/qat/qat_adf/icp_qat_hw.h      |  2 +-
 drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c |  9 ++++++++
 drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c |  9 ++++++++
 drivers/crypto/qat/qat_sym_session.c         | 32 +++++++++++++++++++++++++++-
 lib/cryptodev/rte_crypto_sym.h               | 13 +++++++++--
 lib/cryptodev/rte_cryptodev.c                |  8 +++++--
 9 files changed, 91 insertions(+), 6 deletions(-)

-- 
2.13.6

[PATCH 1/4] cryptodev: add SM4 encryption algorithm

[Arek Kusztal]

SM4 is a block cipher used in the Chinese National Standard for
Wireless LAN WAPI and also used with Transport Layer Security.

- Added SM4 encryption algorithm.
Supported modes are ECB, CBC and CTR.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
 doc/guides/cryptodevs/features/default.ini | 3 +++
 doc/guides/rel_notes/release_22_11.rst     | 4 ++++
 lib/cryptodev/rte_crypto_sym.h             | 9 ++++++++-
 lib/cryptodev/rte_cryptodev.c              | 5 ++++-
 4 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/doc/guides/cryptodevs/features/default.ini b/doc/guides/cryptodevs/features/default.ini
index 7371ca6644..1608426b12 100644
--- a/doc/guides/cryptodevs/features/default.ini
+++ b/doc/guides/cryptodevs/features/default.ini
@@ -61,6 +61,9 @@ DES DOCSIS BPI =
 SNOW3G UEA2    =
 KASUMI F8      =
 ZUC EEA3       =
+SM4 ECB        =
+SM4 CBC        =
+SM4 CTR        =
 
 ;
 ; Supported authentication algorithms of a default crypto driver.
diff --git a/doc/guides/rel_notes/release_22_11.rst b/doc/guides/rel_notes/release_22_11.rst
index 8c021cf050..15fc6ec40a 100644
--- a/doc/guides/rel_notes/release_22_11.rst
+++ b/doc/guides/rel_notes/release_22_11.rst
@@ -55,6 +55,10 @@ New Features
      Also, make sure to start the actual text at the margin.
      =======================================================
 
+* **Added SM4 encryption algorithm in ECB, CBC and CTR mode.**
+
+   Added SM4 encryption algorithm to the Cryptodev API.
+   Supported modes are ECB, CBC and CTR.
 
 Removed Items
 -------------
diff --git a/lib/cryptodev/rte_crypto_sym.h b/lib/cryptodev/rte_crypto_sym.h
index daa090b978..33420e0b36 100644
--- a/lib/cryptodev/rte_crypto_sym.h
+++ b/lib/cryptodev/rte_crypto_sym.h
@@ -160,12 +160,19 @@ enum rte_crypto_cipher_algorithm {
 	 * for m_src and m_dst in the rte_crypto_sym_op must be NULL.
 	 */
 
-	RTE_CRYPTO_CIPHER_DES_DOCSISBPI
+	RTE_CRYPTO_CIPHER_DES_DOCSISBPI,
 	/**< DES algorithm using modes required by
 	 * DOCSIS Baseline Privacy Plus Spec.
 	 * Chained mbufs are not supported in this mode, i.e. rte_mbuf.next
 	 * for m_src and m_dst in the rte_crypto_sym_op must be NULL.
 	 */
+
+	RTE_CRYPTO_CIPHER_SM4_ECB,
+	/**< SM4 algorithm in ECB mode */
+	RTE_CRYPTO_CIPHER_SM4_CBC,
+	/**< SM4 algorithm in CBC mode */
+	RTE_CRYPTO_CIPHER_SM4_CTR
+	/**< SM4 algorithm in CTR mode */
 };
 
 /** Cipher algorithm name strings */
diff --git a/lib/cryptodev/rte_cryptodev.c b/lib/cryptodev/rte_cryptodev.c
index 42f3221052..266804f0fe 100644
--- a/lib/cryptodev/rte_cryptodev.c
+++ b/lib/cryptodev/rte_cryptodev.c
@@ -89,7 +89,10 @@ rte_crypto_cipher_algorithm_strings[] = {
 
 	[RTE_CRYPTO_CIPHER_KASUMI_F8]	= "kasumi-f8",
 	[RTE_CRYPTO_CIPHER_SNOW3G_UEA2]	= "snow3g-uea2",
-	[RTE_CRYPTO_CIPHER_ZUC_EEA3]	= "zuc-eea3"
+	[RTE_CRYPTO_CIPHER_ZUC_EEA3]	= "zuc-eea3",
+	[RTE_CRYPTO_CIPHER_SM4_ECB]	= "sm4-ecb",
+	[RTE_CRYPTO_CIPHER_SM4_CBC]	= "sm4-cbc",
+	[RTE_CRYPTO_CIPHER_SM4_CTR]	= "sm4-ctr"
 };
 
 /**
-- 
2.13.6

[PATCH 2/4] cryptodev: add SM3 hash algorithm

[Arek Kusztal]

SM3 is a cryptographic hash function used in
the Chinese National Standard.

- Added SM3 algorithm

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
 doc/guides/cryptodevs/features/default.ini | 1 +
 doc/guides/rel_notes/release_22_11.rst     | 5 +++++
 lib/cryptodev/rte_crypto_sym.h             | 4 +++-
 lib/cryptodev/rte_cryptodev.c              | 3 ++-
 4 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/doc/guides/cryptodevs/features/default.ini b/doc/guides/cryptodevs/features/default.ini
index 1608426b12..d51d80ff80 100644
--- a/doc/guides/cryptodevs/features/default.ini
+++ b/doc/guides/cryptodevs/features/default.ini
@@ -98,6 +98,7 @@ SHA3_384        =
 SHA3_384 HMAC   =
 SHA3_512        =
 SHA3_512 HMAC   =
+SM3             =
 
 ;
 ; Supported AEAD algorithms of a default crypto driver.
diff --git a/doc/guides/rel_notes/release_22_11.rst b/doc/guides/rel_notes/release_22_11.rst
index 15fc6ec40a..0609652b07 100644
--- a/doc/guides/rel_notes/release_22_11.rst
+++ b/doc/guides/rel_notes/release_22_11.rst
@@ -60,6 +60,11 @@ New Features
    Added SM4 encryption algorithm to the Cryptodev API.
    Supported modes are ECB, CBC and CTR.
 
+* **Added SM3 hash algorithm.**
+
+   Added SM3 hash algorithm to the Cryptodev API.
+
+
 Removed Items
 -------------
 
diff --git a/lib/cryptodev/rte_crypto_sym.h b/lib/cryptodev/rte_crypto_sym.h
index 33420e0b36..1b07e832c3 100644
--- a/lib/cryptodev/rte_crypto_sym.h
+++ b/lib/cryptodev/rte_crypto_sym.h
@@ -370,8 +370,10 @@ enum rte_crypto_auth_algorithm {
 	/**< HMAC using 384 bit SHA3 algorithm. */
 	RTE_CRYPTO_AUTH_SHA3_512,
 	/**< 512 bit SHA3 algorithm. */
-	RTE_CRYPTO_AUTH_SHA3_512_HMAC
+	RTE_CRYPTO_AUTH_SHA3_512_HMAC,
 	/**< HMAC using 512 bit SHA3 algorithm. */
+	RTE_CRYPTO_AUTH_SM3
+	/**< SM3 algorithm */
 };
 
 /** Authentication algorithm name strings */
diff --git a/lib/cryptodev/rte_cryptodev.c b/lib/cryptodev/rte_cryptodev.c
index 266804f0fe..2b6c7de930 100644
--- a/lib/cryptodev/rte_cryptodev.c
+++ b/lib/cryptodev/rte_cryptodev.c
@@ -135,7 +135,8 @@ rte_crypto_auth_algorithm_strings[] = {
 
 	[RTE_CRYPTO_AUTH_KASUMI_F9]	= "kasumi-f9",
 	[RTE_CRYPTO_AUTH_SNOW3G_UIA2]	= "snow3g-uia2",
-	[RTE_CRYPTO_AUTH_ZUC_EIA3]	= "zuc-eia3"
+	[RTE_CRYPTO_AUTH_ZUC_EIA3]	= "zuc-eia3",
+	[RTE_CRYPTO_AUTH_SM3]		= "zuc-sm3"
 };
 
 /**
-- 
2.13.6

[PATCH 3/4] crypto/qat: add SM4 encryption algorithm

[Arek Kusztal]

- Added SM4 encryption algorithms.
Supported modes: ECB, CBC, CTR.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
 doc/guides/cryptodevs/features/qat.ini       |  3 +++
 doc/guides/rel_notes/release_22_11.rst       |  4 ++++
 drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c |  9 +++++++++
 drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c |  9 +++++++++
 drivers/crypto/qat/qat_sym_session.c         | 12 ++++++++++++
 5 files changed, 37 insertions(+)

diff --git a/doc/guides/cryptodevs/features/qat.ini b/doc/guides/cryptodevs/features/qat.ini
index b9755a757e..edabc030d7 100644
--- a/doc/guides/cryptodevs/features/qat.ini
+++ b/doc/guides/cryptodevs/features/qat.ini
@@ -40,6 +40,9 @@ KASUMI F8      = Y
 AES DOCSIS BPI = Y
 DES DOCSIS BPI = Y
 ZUC EEA3       = Y
+SM4 ECB        = Y
+SM4 CBC        = Y
+SM4 CTR        = Y
 ;
 ; Supported authentication algorithms of the 'qat' crypto driver.
 ;
diff --git a/doc/guides/rel_notes/release_22_11.rst b/doc/guides/rel_notes/release_22_11.rst
index 0609652b07..c6638ded82 100644
--- a/doc/guides/rel_notes/release_22_11.rst
+++ b/doc/guides/rel_notes/release_22_11.rst
@@ -64,6 +64,10 @@ New Features
 
    Added SM3 hash algorithm to the Cryptodev API.
 
+* **Updated the Intel QuickAssist Technology (QAT) symmetric crypto PMD.**
+
+   Added SM4 encryption algorithm to the QAT PMD.
+   Supported modes are ECB, CBC and CTR.
 
 Removed Items
 -------------
diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
index 2d5f10aeac..d1285cdbd4 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c
@@ -131,6 +131,15 @@ static struct rte_cryptodev_capabilities qat_sym_crypto_caps_gen3[] = {
 		CAP_RNG(key_size, 32, 32, 0),
 		CAP_RNG(digest_size, 16, 16, 0),
 		CAP_RNG(aad_size, 0, 240, 1), CAP_RNG(iv_size, 12, 12, 0)),
+	QAT_SYM_CIPHER_CAP(SM4_ECB,
+		CAP_SET(block_size, 16),
+		CAP_RNG(key_size, 16, 16, 0), CAP_RNG(iv_size, 0, 0, 0)),
+	QAT_SYM_CIPHER_CAP(SM4_CBC,
+		CAP_SET(block_size, 16),
+		CAP_RNG(key_size, 16, 16, 0), CAP_RNG(iv_size, 16, 16, 0)),
+	QAT_SYM_CIPHER_CAP(SM4_CTR,
+		CAP_SET(block_size, 16),
+		CAP_RNG(key_size, 16, 16, 0), CAP_RNG(iv_size, 16, 16, 0)),
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c
index a9457d9278..efbbbda4b6 100644
--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c
+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c
@@ -91,6 +91,15 @@ static struct rte_cryptodev_capabilities qat_sym_crypto_caps_gen4[] = {
 		CAP_RNG(key_size, 32, 32, 0),
 		CAP_RNG(digest_size, 16, 16, 0),
 		CAP_RNG(aad_size, 0, 240, 1), CAP_RNG(iv_size, 12, 12, 0)),
+	QAT_SYM_CIPHER_CAP(SM4_ECB,
+		CAP_SET(block_size, 16),
+		CAP_RNG(key_size, 16, 16, 0), CAP_RNG(iv_size, 0, 0, 0)),
+	QAT_SYM_CIPHER_CAP(SM4_CBC,
+		CAP_SET(block_size, 16),
+		CAP_RNG(key_size, 16, 16, 0), CAP_RNG(iv_size, 16, 16, 0)),
+	QAT_SYM_CIPHER_CAP(SM4_CTR,
+		CAP_SET(block_size, 16),
+		CAP_RNG(key_size, 16, 16, 0), CAP_RNG(iv_size, 16, 16, 0)),
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
diff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c
index b30396487e..f4e0faa8e1 100644
--- a/drivers/crypto/qat/qat_sym_session.c
+++ b/drivers/crypto/qat/qat_sym_session.c
@@ -432,6 +432,18 @@ qat_sym_session_configure_cipher(struct rte_cryptodev *dev,
 		}
 		session->qat_mode = ICP_QAT_HW_CIPHER_XTS_MODE;
 		break;
+	case RTE_CRYPTO_CIPHER_SM4_ECB:
+		session->qat_cipher_alg = ICP_QAT_HW_CIPHER_ALGO_SM4;
+		session->qat_mode = ICP_QAT_HW_CIPHER_ECB_MODE;
+		break;
+	case RTE_CRYPTO_CIPHER_SM4_CBC:
+		session->qat_cipher_alg = ICP_QAT_HW_CIPHER_ALGO_SM4;
+		session->qat_mode = ICP_QAT_HW_CIPHER_CBC_MODE;
+		break;
+	case RTE_CRYPTO_CIPHER_SM4_CTR:
+		session->qat_cipher_alg = ICP_QAT_HW_CIPHER_ALGO_SM4;
+		session->qat_mode = ICP_QAT_HW_CIPHER_CTR_MODE;
+		break;
 	case RTE_CRYPTO_CIPHER_3DES_ECB:
 	case RTE_CRYPTO_CIPHER_AES_ECB:
 	case RTE_CRYPTO_CIPHER_AES_F8:
-- 
2.13.6

[PATCH 4/4] crypto/qat : add SM3 hash algorithm

[Arek Kusztal]

- Added SM3 hash algorithm.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
 doc/guides/cryptodevs/features/qat.ini  |  1 +
 doc/guides/rel_notes/release_22_11.rst  |  3 +++
 drivers/common/qat/qat_adf/icp_qat_hw.h |  2 +-
 drivers/crypto/qat/qat_sym_session.c    | 20 +++++++++++++++++++-
 4 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/doc/guides/cryptodevs/features/qat.ini b/doc/guides/cryptodevs/features/qat.ini
index edabc030d7..4508becc56 100644
--- a/doc/guides/cryptodevs/features/qat.ini
+++ b/doc/guides/cryptodevs/features/qat.ini
@@ -65,6 +65,7 @@ KASUMI F9    = Y
 AES XCBC MAC = Y
 ZUC EIA3     = Y
 AES CMAC (128) = Y
+SM3          = Y
 
 ;
 ; Supported AEAD algorithms of the 'qat' crypto driver.
diff --git a/doc/guides/rel_notes/release_22_11.rst b/doc/guides/rel_notes/release_22_11.rst
index c6638ded82..5fb79f741c 100644
--- a/doc/guides/rel_notes/release_22_11.rst
+++ b/doc/guides/rel_notes/release_22_11.rst
@@ -69,6 +69,9 @@ New Features
    Added SM4 encryption algorithm to the QAT PMD.
    Supported modes are ECB, CBC and CTR.
 
+   Added SM3 hash algorithm to the QAT PMD.
+
+
 Removed Items
 -------------
 
diff --git a/drivers/common/qat/qat_adf/icp_qat_hw.h b/drivers/common/qat/qat_adf/icp_qat_hw.h
index b1e6a1fa15..f6875b5242 100644
--- a/drivers/common/qat/qat_adf/icp_qat_hw.h
+++ b/drivers/common/qat/qat_adf/icp_qat_hw.h
@@ -46,7 +46,7 @@ enum icp_qat_hw_auth_algo {
 	ICP_QAT_HW_AUTH_ALGO_KASUMI_F9 = 12,
 	ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2 = 13,
 	ICP_QAT_HW_AUTH_ALGO_ZUC_3G_128_EIA3 = 14,
-	ICP_QAT_HW_AUTH_RESERVED_1 = 15,
+	ICP_QAT_HW_AUTH_ALGO_SM3 = 15,
 	ICP_QAT_HW_AUTH_RESERVED_2 = 16,
 	ICP_QAT_HW_AUTH_ALGO_SHA3_256 = 17,
 	ICP_QAT_HW_AUTH_RESERVED_3 = 18,
diff --git a/drivers/crypto/qat/qat_sym_session.c b/drivers/crypto/qat/qat_sym_session.c
index f4e0faa8e1..6996c3499b 100644
--- a/drivers/crypto/qat/qat_sym_session.c
+++ b/drivers/crypto/qat/qat_sym_session.c
@@ -687,6 +687,10 @@ qat_sym_session_configure_auth(struct rte_cryptodev *dev,
 	session->digest_length = auth_xform->digest_length;
 
 	switch (auth_xform->algo) {
+	case RTE_CRYPTO_AUTH_SM3:
+		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SM3;
+		session->auth_mode = ICP_QAT_HW_AUTH_MODE2;
+		break;
 	case RTE_CRYPTO_AUTH_SHA1:
 		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;
 		session->auth_mode = ICP_QAT_HW_AUTH_MODE0;
@@ -1092,6 +1096,8 @@ static int qat_hash_get_block_size(enum icp_qat_hw_auth_algo qat_hash_alg)
 		return ICP_QAT_HW_AES_BLK_SZ;
 	case ICP_QAT_HW_AUTH_ALGO_MD5:
 		return MD5_CBLOCK;
+	case ICP_QAT_HW_AUTH_ALGO_SM3:
+		return 64;
 	case ICP_QAT_HW_AUTH_ALGO_DELIMITER:
 		/* return maximum block size in this case */
 		return SHA512_CBLOCK;
@@ -2035,7 +2041,7 @@ int qat_sym_cd_auth_set(struct qat_sym_session *cdesc,
 		|| cdesc->is_cnt_zero
 			)
 		hash->auth_counter.counter = 0;
-	else {
+	else if (cdesc->auth_mode == ICP_QAT_HW_AUTH_MODE1) {
 		int block_size = qat_hash_get_block_size(cdesc->qat_hash_alg);
 
 		if (block_size < 0)
@@ -2048,7 +2054,19 @@ int qat_sym_cd_auth_set(struct qat_sym_session *cdesc,
 	/*
 	 * cd_cur_ptr now points at the state1 information.
 	 */
+	uint8_t state1[] = {
+		0x73, 0x80, 0x16, 0x6f, 0x49, 0x14, 0xb2, 0xb9,
+		0x17, 0x24, 0x42, 0xd7, 0xda, 0x8a, 0x06, 0x00,
+		0xa9, 0x6f, 0x30, 0xbc, 0x16, 0x31, 0x38, 0xaa,
+		0xe3, 0x8d, 0xee, 0x4d, 0xb0, 0xfb, 0x0e, 0x4e
+	};
 	switch (cdesc->qat_hash_alg) {
+	case ICP_QAT_HW_AUTH_ALGO_SM3:
+		rte_memcpy(cdesc->cd_cur_ptr, state1,
+				sizeof(state1));
+		state1_size = 32;
+		state2_size = 32;
+		break;
 	case ICP_QAT_HW_AUTH_ALGO_SHA1:
 		if (cdesc->auth_mode == ICP_QAT_HW_AUTH_MODE0) {
 			/* Plain SHA-1 */
-- 
2.13.6

RE: [EXT] [PATCH 2/4] cryptodev: add SM3 hash algorithm

[Anoob Joseph]

Hi Arek,

Please see inline.

Thanks,
Anoob

> 
> External Email
> 
> ----------------------------------------------------------------------
> SM3 is a cryptographic hash function used in the Chinese National Standard.
> 
> - Added SM3 algorithm
> 
> Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
> ---

[snip]

> a/lib/cryptodev/rte_cryptodev.c b/lib/cryptodev/rte_cryptodev.c index
> 266804f0fe..2b6c7de930 100644
> --- a/lib/cryptodev/rte_cryptodev.c
> +++ b/lib/cryptodev/rte_cryptodev.c
> @@ -135,7 +135,8 @@ rte_crypto_auth_algorithm_strings[] = {
> 
>  	[RTE_CRYPTO_AUTH_KASUMI_F9]	= "kasumi-f9",
>  	[RTE_CRYPTO_AUTH_SNOW3G_UIA2]	= "snow3g-uia2",
> -	[RTE_CRYPTO_AUTH_ZUC_EIA3]	= "zuc-eia3"
> +	[RTE_CRYPTO_AUTH_ZUC_EIA3]	= "zuc-eia3",
> +	[RTE_CRYPTO_AUTH_SM3]		= "zuc-sm3"

[Anoob] Should the string be "sm3" instead of "zuc-sm3"?

RE: [EXT] [PATCH 4/4] crypto/qat : add SM3 hash algorithm

[Akhil Goyal]

> -----Original Message-----
> From: Arek Kusztal <arkadiuszx.kusztal@intel.com>
> Sent: Wednesday, August 17, 2022 11:39 AM
> To: dev@dpdk.org
> Cc: Akhil Goyal <gakhil@marvell.com>; kai.ji@intel.com; Arek Kusztal
> <arkadiuszx.kusztal@intel.com>
> Subject: [EXT] [PATCH 4/4] crypto/qat : add SM3 hash algorithm
> 
> External Email
> 
> ----------------------------------------------------------------------
> - Added SM3 hash algorithm.
> 
> Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
> ---
>  doc/guides/cryptodevs/features/qat.ini  |  1 +
>  doc/guides/rel_notes/release_22_11.rst  |  3 +++
>  drivers/common/qat/qat_adf/icp_qat_hw.h |  2 +-
>  drivers/crypto/qat/qat_sym_session.c    | 20 +++++++++++++++++++-
>  4 files changed, 24 insertions(+), 2 deletions(-)
> 
> diff --git a/doc/guides/cryptodevs/features/qat.ini
> b/doc/guides/cryptodevs/features/qat.ini
> index edabc030d7..4508becc56 100644
> --- a/doc/guides/cryptodevs/features/qat.ini
> +++ b/doc/guides/cryptodevs/features/qat.ini
> @@ -65,6 +65,7 @@ KASUMI F9    = Y
>  AES XCBC MAC = Y
>  ZUC EIA3     = Y
>  AES CMAC (128) = Y
> +SM3          = Y
> 
>  ;
>  ; Supported AEAD algorithms of the 'qat' crypto driver.
> diff --git a/doc/guides/rel_notes/release_22_11.rst
> b/doc/guides/rel_notes/release_22_11.rst
> index c6638ded82..5fb79f741c 100644
> --- a/doc/guides/rel_notes/release_22_11.rst
> +++ b/doc/guides/rel_notes/release_22_11.rst
> @@ -69,6 +69,9 @@ New Features
>     Added SM4 encryption algorithm to the QAT PMD.
>     Supported modes are ECB, CBC and CTR.
> 
> +   Added SM3 hash algorithm to the QAT PMD.
> +
> +
>  Removed Items
>  -------------
> 
> diff --git a/drivers/common/qat/qat_adf/icp_qat_hw.h
> b/drivers/common/qat/qat_adf/icp_qat_hw.h
> index b1e6a1fa15..f6875b5242 100644
> --- a/drivers/common/qat/qat_adf/icp_qat_hw.h
> +++ b/drivers/common/qat/qat_adf/icp_qat_hw.h
> @@ -46,7 +46,7 @@ enum icp_qat_hw_auth_algo {
>  	ICP_QAT_HW_AUTH_ALGO_KASUMI_F9 = 12,
>  	ICP_QAT_HW_AUTH_ALGO_SNOW_3G_UIA2 = 13,
>  	ICP_QAT_HW_AUTH_ALGO_ZUC_3G_128_EIA3 = 14,
> -	ICP_QAT_HW_AUTH_RESERVED_1 = 15,
> +	ICP_QAT_HW_AUTH_ALGO_SM3 = 15,
>  	ICP_QAT_HW_AUTH_RESERVED_2 = 16,
>  	ICP_QAT_HW_AUTH_ALGO_SHA3_256 = 17,
>  	ICP_QAT_HW_AUTH_RESERVED_3 = 18,
> diff --git a/drivers/crypto/qat/qat_sym_session.c
> b/drivers/crypto/qat/qat_sym_session.c
> index f4e0faa8e1..6996c3499b 100644
> --- a/drivers/crypto/qat/qat_sym_session.c
> +++ b/drivers/crypto/qat/qat_sym_session.c
> @@ -687,6 +687,10 @@ qat_sym_session_configure_auth(struct rte_cryptodev
> *dev,
>  	session->digest_length = auth_xform->digest_length;
> 
>  	switch (auth_xform->algo) {
> +	case RTE_CRYPTO_AUTH_SM3:
> +		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SM3;
> +		session->auth_mode = ICP_QAT_HW_AUTH_MODE2;
> +		break;
>  	case RTE_CRYPTO_AUTH_SHA1:
>  		session->qat_hash_alg = ICP_QAT_HW_AUTH_ALGO_SHA1;
>  		session->auth_mode = ICP_QAT_HW_AUTH_MODE0;
> @@ -1092,6 +1096,8 @@ static int qat_hash_get_block_size(enum
> icp_qat_hw_auth_algo qat_hash_alg)
>  		return ICP_QAT_HW_AES_BLK_SZ;
>  	case ICP_QAT_HW_AUTH_ALGO_MD5:
>  		return MD5_CBLOCK;
> +	case ICP_QAT_HW_AUTH_ALGO_SM3:
> +		return 64;

Remove hardcode

>  	case ICP_QAT_HW_AUTH_ALGO_DELIMITER:
>  		/* return maximum block size in this case */
>  		return SHA512_CBLOCK;
> @@ -2035,7 +2041,7 @@ int qat_sym_cd_auth_set(struct qat_sym_session
> *cdesc,
>  		|| cdesc->is_cnt_zero
>  			)
>  		hash->auth_counter.counter = 0;
> -	else {
> +	else if (cdesc->auth_mode == ICP_QAT_HW_AUTH_MODE1) {
>  		int block_size = qat_hash_get_block_size(cdesc->qat_hash_alg);
> 
>  		if (block_size < 0)
> @@ -2048,7 +2054,19 @@ int qat_sym_cd_auth_set(struct qat_sym_session
> *cdesc,
>  	/*
>  	 * cd_cur_ptr now points at the state1 information.
>  	 */
> +	uint8_t state1[] = {
> +		0x73, 0x80, 0x16, 0x6f, 0x49, 0x14, 0xb2, 0xb9,
> +		0x17, 0x24, 0x42, 0xd7, 0xda, 0x8a, 0x06, 0x00,
> +		0xa9, 0x6f, 0x30, 0xbc, 0x16, 0x31, 0x38, 0xaa,
> +		0xe3, 0x8d, 0xee, 0x4d, 0xb0, 0xfb, 0x0e, 0x4e
> +	};
>  	switch (cdesc->qat_hash_alg) {
> +	case ICP_QAT_HW_AUTH_ALGO_SM3:
> +		rte_memcpy(cdesc->cd_cur_ptr, state1,
> +				sizeof(state1));
> +		state1_size = 32;
> +		state2_size = 32;
> +		break;
>  	case ICP_QAT_HW_AUTH_ALGO_SHA1:
>  		if (cdesc->auth_mode == ICP_QAT_HW_AUTH_MODE0) {
>  			/* Plain SHA-1 */
> --
> 2.13.6

RE: [EXT] [PATCH 0/4] cryptodev: add SM3 and SM4 algorithms

[Akhil Goyal]

> -----Original Message-----
> From: Arek Kusztal <arkadiuszx.kusztal@intel.com>
> Sent: Wednesday, August 17, 2022 11:39 AM
> To: dev@dpdk.org
> Cc: Akhil Goyal <gakhil@marvell.com>; kai.ji@intel.com; Arek Kusztal
> <arkadiuszx.kusztal@intel.com>
> Subject: [EXT] [PATCH 0/4] cryptodev: add SM3 and SM4 algorithms
> 
> External Email
> 
> ----------------------------------------------------------------------
> ShangMi 4 (SM4) is a block cipher used in the Chinese National Standard for
> Wireless LAN WAPI and also used with Transport Layer Security.
> ShangMi 3 (SM3) is a cryptographic hash function used in the
> Chinese National Standard.

Add these full forms in comments of the enums that are added in patch 1 and 2

> 
> This patcheset adds both to the Cryptodev.
> 
> Arek Kusztal (4):
>   cryptodev: add SM4 encryption algorithm
>   cryptodev: add SM3 hash algorithm
>   crypto/qat: add SM4 encryption algorithm
>   crypto/qat : add SM3 hash algorithm
> 
>  doc/guides/cryptodevs/features/default.ini   |  4 ++++
>  doc/guides/cryptodevs/features/qat.ini       |  4 ++++
>  doc/guides/rel_notes/release_22_11.rst       | 16 ++++++++++++++
>  drivers/common/qat/qat_adf/icp_qat_hw.h      |  2 +-
>  drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c |  9 ++++++++
>  drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c |  9 ++++++++
>  drivers/crypto/qat/qat_sym_session.c         | 32
> +++++++++++++++++++++++++++-
>  lib/cryptodev/rte_crypto_sym.h               | 13 +++++++++--
>  lib/cryptodev/rte_cryptodev.c                |  8 +++++--
>  9 files changed, 91 insertions(+), 6 deletions(-)
> 
> --
> 2.13.6

RE: [EXT] [PATCH 0/4] cryptodev: add SM3 and SM4 algorithms

[Kusztal, ArkadiuszX]

> -----Original Message-----
> From: Akhil Goyal <gakhil@marvell.com>
> Sent: Wednesday, September 21, 2022 9:37 PM
> To: Kusztal, ArkadiuszX <arkadiuszx.kusztal@intel.com>; dev@dpdk.org
> Cc: Ji, Kai <kai.ji@intel.com>
> Subject: RE: [EXT] [PATCH 0/4] cryptodev: add SM3 and SM4 algorithms
> 
> 
> 
> > -----Original Message-----
> > From: Arek Kusztal <arkadiuszx.kusztal@intel.com>
> > Sent: Wednesday, August 17, 2022 11:39 AM
> > To: dev@dpdk.org
> > Cc: Akhil Goyal <gakhil@marvell.com>; kai.ji@intel.com; Arek Kusztal
> > <arkadiuszx.kusztal@intel.com>
> > Subject: [EXT] [PATCH 0/4] cryptodev: add SM3 and SM4 algorithms
> >
> > External Email
> >
> > ----------------------------------------------------------------------
> > ShangMi 4 (SM4) is a block cipher used in the Chinese National
> > Standard for Wireless LAN WAPI and also used with Transport Layer Security.
> > ShangMi 3 (SM3) is a cryptographic hash function used in the Chinese
> > National Standard.
> 
> Add these full forms in comments of the enums that are added in patch 1 and 2
I do not think we should, it is just current description of usage state of SM3/4.
Especially that we do not put much effort into other algorithms, particularly with 3gpp algorithms which are all over the place with naming and comments.
> 
> >
> > This patcheset adds both to the Cryptodev.
> >
> > Arek Kusztal (4):
> >   cryptodev: add SM4 encryption algorithm
> >   cryptodev: add SM3 hash algorithm
> >   crypto/qat: add SM4 encryption algorithm
> >   crypto/qat : add SM3 hash algorithm
> >
> >  doc/guides/cryptodevs/features/default.ini   |  4 ++++
> >  doc/guides/cryptodevs/features/qat.ini       |  4 ++++
> >  doc/guides/rel_notes/release_22_11.rst       | 16 ++++++++++++++
> >  drivers/common/qat/qat_adf/icp_qat_hw.h      |  2 +-
> >  drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c |  9 ++++++++
> > drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c |  9 ++++++++
> >  drivers/crypto/qat/qat_sym_session.c         | 32
> > +++++++++++++++++++++++++++-
> >  lib/cryptodev/rte_crypto_sym.h               | 13 +++++++++--
> >  lib/cryptodev/rte_cryptodev.c                |  8 +++++--
> >  9 files changed, 91 insertions(+), 6 deletions(-)
> >
> > --
> > 2.13.6

RE: [EXT] [PATCH 0/4] cryptodev: add SM3 and SM4 algorithms

[Akhil Goyal]

> > > ShangMi 4 (SM4) is a block cipher used in the Chinese National
> > > Standard for Wireless LAN WAPI and also used with Transport Layer Security.
> > > ShangMi 3 (SM3) is a cryptographic hash function used in the Chinese
> > > National Standard.
> >
> > Add these full forms in comments of the enums that are added in patch 1 and 2
> I do not think we should, it is just current description of usage state of SM3/4.
> Especially that we do not put much effort into other algorithms, particularly with
> 3gpp algorithms which are all over the place with naming and comments.

Yes, we do not do so, as those algos are very common and does not have any other full form.
But SM3 and SM4 are relatively new and does not come up easily in search results if we just type SM3.
However, if we search for ShangMi 3, we get the RFC on first result.

RE: [EXT] [PATCH 0/4] cryptodev: add SM3 and SM4 algorithms

[Kusztal, ArkadiuszX]

> -----Original Message-----
> From: Akhil Goyal <gakhil@marvell.com>
> Sent: Wednesday, September 28, 2022 1:05 PM
> To: Kusztal, ArkadiuszX <arkadiuszx.kusztal@intel.com>; dev@dpdk.org
> Cc: Ji, Kai <kai.ji@intel.com>
> Subject: RE: [EXT] [PATCH 0/4] cryptodev: add SM3 and SM4 algorithms
> 
> > > > ShangMi 4 (SM4) is a block cipher used in the Chinese National
> > > > Standard for Wireless LAN WAPI and also used with Transport Layer
> Security.
> > > > ShangMi 3 (SM3) is a cryptographic hash function used in the
> > > > Chinese National Standard.
> > >
> > > Add these full forms in comments of the enums that are added in
> > > patch 1 and 2
> > I do not think we should, it is just current description of usage state of SM3/4.
> > Especially that we do not put much effort into other algorithms,
> > particularly with 3gpp algorithms which are all over the place with naming and
> comments.
> 
> Yes, we do not do so, as those algos are very common and does not have any
> other full form.
> But SM3 and SM4 are relatively new and does not come up easily in search
> results if we just type SM3.
> However, if we search for ShangMi 3, we get the RFC on first result.
Ok, you meant algorithm full name - not full comment.
I misunderstood you, yes of course I will add full name.