From: Jerin Jacob <jerinjacobk@gmail.com> To: Harry van Haaren <harry.van.haaren@intel.com> Cc: dpdk-dev <dev@dpdk.org>, Pavan Nikhilesh <pbhagavatula@marvell.com> Subject: Re: [dpdk-dev] [PATCH v2] eal: add new prefetch write variants Date: Thu, 8 Oct 2020 14:24:39 +0530 Message-ID: <CALBAE1OfUMM6=0p_JFcOkiHGtwkVj4f_3bN6V=R_OxPQdmpyqA@mail.gmail.com> (raw) In-Reply-To: <20200914151021.23806-1-harry.van.haaren@intel.com> On Mon, Sep 14, 2020 at 8:39 PM Harry van Haaren <harry.van.haaren@intel.com> wrote: > > This commit adds a new rte_prefetch0_write() variants, suggesting to the > compiler to use a prefetch instruction with intention to write. As a > compiler builtin, the compiler can choose based on compilation target > what the best implementation for this instruction is. > > Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com> > > --- > > v2: > - Add L1, L2, and L3 variants as ARM64 uarch supports them (Pavan) > > The integer constants passed to the builtin are not available as > a #define value, and doing #defines just for this write variant > does not seems a nice solution to me... particularly for those using > IDEs where any #define value is auto-hinted for code-completion. > --- > lib/librte_eal/include/generic/rte_prefetch.h | 49 +++++++++++++++++++ > 1 file changed, 49 insertions(+) > > diff --git a/lib/librte_eal/include/generic/rte_prefetch.h b/lib/librte_eal/include/generic/rte_prefetch.h > index 6e47bdfbad..3dfca77a74 100644 > --- a/lib/librte_eal/include/generic/rte_prefetch.h > +++ b/lib/librte_eal/include/generic/rte_prefetch.h > @@ -51,4 +51,53 @@ static inline void rte_prefetch2(const volatile void *p); > */ > static inline void rte_prefetch_non_temporal(const volatile void *p); > > +/** > + * Prefetch a cache line into all cache levels, with intention to write. This > + * prefetch variant hints to the CPU that the program is expecting to write to > + * the cache line being prefetched. > + * > + * @param p Address to prefetch > + */ > +static inline void rte_prefetch0_write(const void *p) Typically DPDK coding standards is to have static inline void rte_prefetch0_write(const void *p) vs static inline void rte_prefetch0_write(const void *p) Either way: Reviewed-by: Jerin Jacob <jerinj@marvell.com> > +{ > + /* 1 indicates intention to write, 3 sets target cache level to L1. See > + * GCC docs where these integer constants are described in more detail: > + * https://gcc.gnu.org/onlinedocs/gcc/Other-Builtins.html > + */ > + __builtin_prefetch(p, 1, 3); > +} > + > +/** > + * Prefetch a cache line into all cache levels, except the 0th, with intention > + * to write. This prefetch variant hints to the CPU that the program is > + * expecting to write to the cache line being prefetched. > + * > + * @param p Address to prefetch > + */ > +static inline void rte_prefetch1_write(const void *p) > +{ > + /* 1 indicates intention to write, 2 sets target cache level to L2. See > + * GCC docs where these integer constants are described in more detail: > + * https://gcc.gnu.org/onlinedocs/gcc/Other-Builtins.html > + */ > + __builtin_prefetch(p, 1, 2); > +} > + > +/** > + * Prefetch a cache line into all cache levels, except the 0th and 1st, with > + * intention to write. This prefetch variant hints to the CPU that the program > + * is expecting to write to the cache line being prefetched. > + * > + * @param p Address to prefetch > + */ > +static inline void rte_prefetch2_write(const void *p) > +{ > + /* 1 indicates intention to write, 1 sets target cache level to L3. See > + * GCC docs where these integer constants are described in more detail: > + * https://gcc.gnu.org/onlinedocs/gcc/Other-Builtins.html > + */ > + __builtin_prefetch(p, 1, 1); > +} > + > + > #endif /* _RTE_PREFETCH_H_ */ > -- > 2.17.1 >
next prev parent reply other threads:[~2020-10-08 8:55 UTC|newest] Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-11 9:19 [dpdk-dev] [PATCH] eal: add new prefetch0_write variant Harry van Haaren 2020-09-13 20:11 ` Pavan Nikhilesh Bhagavatula 2020-09-14 8:12 ` Van Haaren, Harry 2020-09-14 10:39 ` Pavan Nikhilesh Bhagavatula 2020-09-14 15:10 ` Van Haaren, Harry 2020-09-14 15:10 ` [dpdk-dev] [PATCH v2] eal: add new prefetch write variants Harry van Haaren 2020-10-08 7:42 ` David Marchand 2020-10-08 8:34 ` Van Haaren, Harry 2020-10-08 8:39 ` Van Haaren, Harry 2020-10-08 8:54 ` Jerin Jacob [this message] 2020-10-10 10:21 ` Ruifeng Wang 2020-10-15 8:18 ` David Marchand 2020-10-15 8:44 ` Van Haaren, Harry 2020-10-15 10:32 ` [dpdk-dev] [PATCH v3] " Harry van Haaren 2020-10-15 20:27 ` David Marchand
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to='CALBAE1OfUMM6=0p_JFcOkiHGtwkVj4f_3bN6V=R_OxPQdmpyqA@mail.gmail.com' \ --to=jerinjacobk@gmail.com \ --cc=dev@dpdk.org \ --cc=harry.van.haaren@intel.com \ --cc=pbhagavatula@marvell.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: link
DPDK patches and discussions This inbox may be cloned and mirrored by anyone: git clone --mirror https://inbox.dpdk.org/dev/0 dev/git/0.git # If you have public-inbox 1.1+ installed, you may # initialize and index your mirror using the following commands: public-inbox-init -V2 dev dev/ https://inbox.dpdk.org/dev \ dev@dpdk.org public-inbox-index dev Example config snippet for mirrors. Newsgroup available over NNTP: nntp://inbox.dpdk.org/inbox.dpdk.dev AGPL code for this site: git clone https://public-inbox.org/public-inbox.git