From: Ruifeng Wang <Ruifeng.Wang@arm.com>
To: Harry van Haaren <harry.van.haaren@intel.com>,
"dev@dpdk.org" <dev@dpdk.org>
Cc: "pbhagavatula@marvell.com" <pbhagavatula@marvell.com>, nd <nd@arm.com>
Subject: Re: [dpdk-dev] [PATCH v2] eal: add new prefetch write variants
Date: Sat, 10 Oct 2020 10:21:57 +0000 [thread overview]
Message-ID: <VI1PR0802MB235192A92E0853276CB309A79E090@VI1PR0802MB2351.eurprd08.prod.outlook.com> (raw)
In-Reply-To: <20200914151021.23806-1-harry.van.haaren@intel.com>
> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Harry van Haaren
> Sent: Monday, September 14, 2020 11:10 PM
> To: dev@dpdk.org
> Cc: pbhagavatula@marvell.com; Harry van Haaren
> <harry.van.haaren@intel.com>
> Subject: [dpdk-dev] [PATCH v2] eal: add new prefetch write variants
>
> This commit adds a new rte_prefetch0_write() variants, suggesting to the
> compiler to use a prefetch instruction with intention to write. As a compiler
> builtin, the compiler can choose based on compilation target what the best
> implementation for this instruction is.
>
> Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
>
> ---
>
> v2:
> - Add L1, L2, and L3 variants as ARM64 uarch supports them (Pavan)
>
> The integer constants passed to the builtin are not available as a #define
> value, and doing #defines just for this write variant does not seems a nice
> solution to me... particularly for those using IDEs where any #define value is
> auto-hinted for code-completion.
> ---
> lib/librte_eal/include/generic/rte_prefetch.h | 49 +++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/lib/librte_eal/include/generic/rte_prefetch.h
> b/lib/librte_eal/include/generic/rte_prefetch.h
> index 6e47bdfbad..3dfca77a74 100644
> --- a/lib/librte_eal/include/generic/rte_prefetch.h
> +++ b/lib/librte_eal/include/generic/rte_prefetch.h
> @@ -51,4 +51,53 @@ static inline void rte_prefetch2(const volatile void *p);
> */
> static inline void rte_prefetch_non_temporal(const volatile void *p);
>
> +/**
> + * Prefetch a cache line into all cache levels, with intention to
> +write. This
> + * prefetch variant hints to the CPU that the program is expecting to
> +write to
> + * the cache line being prefetched.
> + *
> + * @param p Address to prefetch
> + */
> +static inline void rte_prefetch0_write(const void *p) {
> + /* 1 indicates intention to write, 3 sets target cache level to L1. See
> + * GCC docs where these integer constants are described in more
> detail:
> + * https://gcc.gnu.org/onlinedocs/gcc/Other-Builtins.html
> + */
> + __builtin_prefetch(p, 1, 3);
> +}
> +
> +/**
> + * Prefetch a cache line into all cache levels, except the 0th, with
> +intention
> + * to write. This prefetch variant hints to the CPU that the program is
> + * expecting to write to the cache line being prefetched.
> + *
> + * @param p Address to prefetch
> + */
> +static inline void rte_prefetch1_write(const void *p) {
> + /* 1 indicates intention to write, 2 sets target cache level to L2. See
> + * GCC docs where these integer constants are described in more
> detail:
> + * https://gcc.gnu.org/onlinedocs/gcc/Other-Builtins.html
> + */
> + __builtin_prefetch(p, 1, 2);
> +}
> +
> +/**
> + * Prefetch a cache line into all cache levels, except the 0th and 1st,
> +with
> + * intention to write. This prefetch variant hints to the CPU that the
> +program
> + * is expecting to write to the cache line being prefetched.
> + *
> + * @param p Address to prefetch
> + */
> +static inline void rte_prefetch2_write(const void *p) {
> + /* 1 indicates intention to write, 1 sets target cache level to L3. See
> + * GCC docs where these integer constants are described in more
> detail:
> + * https://gcc.gnu.org/onlinedocs/gcc/Other-Builtins.html
> + */
> + __builtin_prefetch(p, 1, 1);
> +}
> +
> +
> #endif /* _RTE_PREFETCH_H_ */
> --
> 2.17.1
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
next prev parent reply other threads:[~2020-10-10 10:22 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-11 9:19 [dpdk-dev] [PATCH] eal: add new prefetch0_write variant Harry van Haaren
2020-09-13 20:11 ` Pavan Nikhilesh Bhagavatula
2020-09-14 8:12 ` Van Haaren, Harry
2020-09-14 10:39 ` Pavan Nikhilesh Bhagavatula
2020-09-14 15:10 ` Van Haaren, Harry
2020-09-14 15:10 ` [dpdk-dev] [PATCH v2] eal: add new prefetch write variants Harry van Haaren
2020-10-08 7:42 ` David Marchand
2020-10-08 8:34 ` Van Haaren, Harry
2020-10-08 8:39 ` Van Haaren, Harry
2020-10-08 8:54 ` Jerin Jacob
2020-10-10 10:21 ` Ruifeng Wang [this message]
2020-10-15 8:18 ` David Marchand
2020-10-15 8:44 ` Van Haaren, Harry
2020-10-15 10:32 ` [dpdk-dev] [PATCH v3] " Harry van Haaren
2020-10-15 20:27 ` David Marchand
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