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From: Pavan Nikhilesh Bhagavatula <pbhagavatula@marvell.com>
To: "thomas@monjalon.net" <thomas@monjalon.net>,
	Jerin Jacob Kollanukkaran <jerinj@marvell.com>,
	"bluca@debian.org" <bluca@debian.org>,
	"yskoh@mellanox.com" <yskoh@mellanox.com>
Cc: "shahafs@mellanox.com" <shahafs@mellanox.com>,
	"honnappa.nagarahalli@arm.com" <honnappa.nagarahalli@arm.com>,
	"Gavin.Hu@arm.com" <Gavin.Hu@arm.com>,
	"tspeier@qti.qualcomm.com" <tspeier@qti.qualcomm.com>,
	"dev@dpdk.org" <dev@dpdk.org>
Subject: Re: [dpdk-dev] [EXT] Re: [PATCH] config: change default cache line size for ARMv8 with meson
Date: Wed, 9 Jan 2019 16:36:11 +0000	[thread overview]
Message-ID: <15526e9645417bffc8c0c745b81a2946cd812407.camel@marvell.com> (raw)
In-Reply-To: <1547048493.6022.65.camel@debian.org>

On Wed, 2019-01-09 at 15:41 +0000, Luca Boccassi wrote:
> External Email
> 
> -------------------------------------------------------------------
> ---
> On Wed, 2019-01-09 at 15:34 +0000, Jerin Jacob Kollanukkaran wrote:
> > > > Please check below thread and patch.
> > > > 
> > > > http://mails.dpdk.org/archives/dev/2019-January/122676.html
> > > > https://patches.dpdk.org/patch/49477/
> > > > 
> > > > Debian folks are building like this for the _generic_ image.
> > > > What ever works for every distros, I am fine with that.
> > > > 
> > > > meson configure -Dmachine=default
> > > > meson build
> > > > cd build
> > > > ninja
> > > > ninja install
> > > 
> > > I think we agree on the idea of having different configs
> > > for unmodified A72 core and generic build working for all.
> > 
> > Yes, I agree. config or some scheme to address the generic and
> > default
> > usecase.
> > 
> > > The remaining bits to discuss are:
> > > 	- do we want to use the armv8 config for unmodified A72?
> > > 	- what should be the name of the generic config?
> > 
> > If all distros following "meson configure -Dmachine=default" scheme
> > why not follow that to make generic image. i.e when machine=default
> > set then Cache lize size 128B CL specific stuff be kicked in else
> > it probe the value based on MIDR from sysfs.
> > 

When we are not cross-compiling  can read CTR_EL0[1] register
(DminLine) to detect the cacheline size based on the native machine.
This method would satisfy all requirements and we need not maintain a
mapping for cacheline_sizes w.r.t part numbers.


[1] 
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.100095_0001_02_en/way1382037583047.html

(newer kernels expose it as a sysfs entry
 /sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size, we can
use meson run_command to either run a python program with c byte code
or use cc.run('<program>') to get result directly).


> > 
> > > When digging more the config files in meson, I found this:
> > > 	
> > > http://mesonbuild.com/Cross-compilation.html#cross-file-locations
> > > It says that distros or compilers should provide some config
> > > files.
> > > It means we should check if some standard names are emerging
> > > and try to follow the same naming, or even re-use existing config
> > > files.
> > 
> > I think this for cross compilation. if I understand it correctly,
> > distro folks build arm64 image on arm64 target(not on x86) with
> > generic
> > images with lowest denominator cpu flags and such that works for
> > all
> > platforms.
> > 
> > Something similar found in arch linux website for arm64.
> > https://archlinuxarm.org/platforms/armv8/generic
> > 
> > See Platforms: ARMv8
> > 
> > Anyway I am leaving this decision to distro folks or whoever is
> > expert
> > in meson based distro build generic creation.
> 
> Just a comment to confirm that yes, in general distributions do not
> do
> cross-builds, but native builds. That is certainly the case for
> Debian,
> and I am 99% sure it is also the case for Ubuntu and SUSE.
> 

Regards,
Pavan.

  reply	other threads:[~2019-01-09 16:36 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-09  9:39 [dpdk-dev] " Yongseok Koh
2019-01-09 10:09 ` [dpdk-dev] [EXT] " Jerin Jacob Kollanukkaran
2019-01-09 10:19   ` Luca Boccassi
2019-01-09 10:52     ` Jerin Jacob Kollanukkaran
2019-01-09 13:14       ` Luca Boccassi
2019-01-09 10:22   ` Yongseok Koh
2019-01-09 10:49     ` Jerin Jacob Kollanukkaran
2019-01-09 11:28       ` Thomas Monjalon
2019-01-09 12:47         ` Jerin Jacob Kollanukkaran
2019-01-09 13:30           ` Thomas Monjalon
2019-01-09 14:23             ` Jerin Jacob Kollanukkaran
2019-01-09 14:57               ` Thomas Monjalon
2019-01-09 15:34                 ` [dpdk-dev] " Jerin Jacob Kollanukkaran
2019-01-09 15:41                   ` Luca Boccassi
2019-01-09 16:36                     ` Pavan Nikhilesh Bhagavatula [this message]
2019-01-09 16:52                       ` [dpdk-dev] [EXT] " Luca Boccassi
2019-01-09 17:01                         ` Pavan Nikhilesh Bhagavatula
2019-01-14  4:32                 ` [dpdk-dev] [EXT] " Yongseok Koh
2019-01-14  7:44                   ` Honnappa Nagarahalli
2019-01-16  2:02                     ` Honnappa Nagarahalli
2019-01-19  7:09                       ` Yongseok Koh
2019-01-22 18:51                         ` Honnappa Nagarahalli
2019-01-23  8:56                           ` Jerin Jacob Kollanukkaran
2019-01-23 16:24                             ` Honnappa Nagarahalli
2019-01-23 17:19                               ` Jerin Jacob Kollanukkaran

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