[PATCH 00/83] move alignment attribute on types

[PATCH 00/83] move alignment attribute on types

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

After having established this as the conventional standard for lib/*
this series is intended to convert the remainder of the source tree to
use the same location for __rte_aligned(a) and alignas(a) for
consistency.

Tyler Retzlaff (83):
  examples: move alignment attribute on types
  net/ark: move alignment attribute on types
  net/avp: move alignment attribute on types
  net/axgbe: move alignment attribute on types
  net/bnxt: move alignment attribute on types
  net/bonding: move alignment attribute on types
  net/cxgbe: move alignment attribute on types
  net/e1000: move alignment attribute on types
  net/ena: move alignment attribute on types
  net/enic: move alignment attribute on types
  net/fm10k: move alignment attribute on types
  net/hinic: move alignment attribute on types
  net/hns3: move alignment attribute on types
  net/i40e: move alignment attribute on types
  net/iavf: move alignment attribute on types
  net/ice: move alignment attribute on types
  net/igc: move alignment attribute on types
  net/ionic: move alignment attribute on types
  net/ixgbe: move alignment attribute on types
  net/memif: move alignment attribute on types
  net/mlx5: move alignment attribute on types
  net/mlx4: move alignment attribute on types
  net/mvpp2: move alignment attribute on types
  net/netvsc: move alignment attribute on types
  net/nfp: move alignment attribute on types
  net/ngbe: move alignment attribute on types
  net/octeontx: move alignment attribute on types
  net/pfe: move alignment attribute on types
  net/qede: move alignment attribute on types
  net/softnic: move alignment attribute on types
  net/tap: move alignment attribute on types
  net/thunderx: move alignment attribute on types
  net/txgbe: move alignment attribute on types
  net/virtio: move alignment attribute on types
  vdpa/mlx5: move alignment attribute on types
  regex/cn9k: move alignment attribute on types
  raw/ntb: move alignment attribute on types
  ml/cnxk: move alignment attribute on types
  mempool/cnxk: move alignment attribute on types
  event/sw: move alignment attribute on types
  event/skeleton: move alignment attribute on types
  event/opdl: move alignment attribute on types
  event/octeontx: move alignment attribute on types
  event/dsw: move alignment attribute on types
  event/dlb2: move alignment attribute on types
  event/cnxk: move alignment attribute on types
  dma/skeleton: move alignment attribute on types
  dma/ioat: move alignment attribute on types
  dma/idxd: move alignment attribute on types
  crypto/uadk: move alignment attribute on types
  crypto/scheduler: move alignment attribute on types
  crypto/qat: move alignment attribute on types
  crypto/openssl: move alignment attribute on types
  crypto/octeontx: move alignment attribute on types
  crypto/null: move alignment attribute on types
  crypto/mvsam: move alignment attribute on types
  crypto/mlx5: move alignment attribute on types
  crypto/ipsec_mb: move alignment attribute on types
  crypto/cnxk: move alignment attribute on types
  crypto/ccp: move alignment attribute on types
  crypto/caam_jr: move alignment attribute on types
  crypto/bcmfs: move alignment attribute on types
  crypto/armv8: move alignment attribute on types
  compress/zlib: move alignment attribute on types
  compress/qat: move alignment attribute on types
  compress/octeontx: move alignment attribute on types
  compress/nitrox: move alignment attribute on types
  compress/isal: move alignment attribute on types
  common/qat: move alignment attribute on types
  common/mlx5: move alignment attribute on types
  common/idpf: move alignment attribute on types
  common/cpt: move alignment attribute on types
  bus/fslmc: move alignment attribute on types
  baseband/turbo_sw: move alignment attribute on types
  baseband/null: move alignment attribute on types
  app/test: move alignment attribute on types
  app/test-pipeline: move alignment attribute on types
  app/test-mldev: move alignment attribute on types
  app/test-flow-perf: move alignment attribute on types
  app/test-eventdev: move alignment attribute on types
  app/pdump: move alignment attribute on types
  app/graph: move alignment attribute on types
  bus/dpaa: move alignment attribute on types

 app/graph/ethdev_rx.h                              |  4 +-
 app/graph/ethdev_rx_priv.h                         |  4 +-
 app/pdump/main.c                                   |  4 +-
 app/test-eventdev/test_order_common.h              |  4 +-
 app/test-eventdev/test_perf_common.h               | 24 +++++-----
 app/test-eventdev/test_pipeline_common.h           | 18 ++++----
 app/test-flow-perf/actions_gen.c                   | 51 ++++++++++++----------
 app/test-flow-perf/items_gen.c                     | 22 +++++-----
 app/test-flow-perf/main.c                          |  8 ++--
 app/test-mldev/test_device_ops.h                   |  4 +-
 app/test-mldev/test_inference_common.h             |  4 +-
 app/test-mldev/test_model_ops.h                    |  4 +-
 app/test-pipeline/main.h                           |  4 +-
 app/test/test_cryptodev_aead_test_vectors.h        |  6 +--
 app/test/test_cryptodev_blockcipher.h              |  2 +-
 app/test/test_cryptodev_kasumi_test_vectors.h      |  2 +-
 app/test/test_cryptodev_mixed_test_vectors.h       |  2 +-
 .../test_cryptodev_security_docsis_test_vectors.h  |  2 +-
 app/test/test_cryptodev_snow3g_test_vectors.h      |  2 +-
 app/test/test_cryptodev_zuc_test_vectors.h         |  2 +-
 app/test/test_distributor.c                        | 12 ++---
 app/test/test_distributor_perf.c                   |  6 +--
 app/test/test_mempool_perf.c                       |  6 +--
 app/test/test_pmd_perf.c                           |  4 +-
 app/test/test_ring_stress_impl.h                   | 10 ++---
 app/test/test_rwlock.c                             |  8 ++--
 app/test/test_seqlock.c                            |  8 ++--
 app/test/test_ticketlock.c                         |  4 +-
 app/test/test_trace_perf.c                         |  8 ++--
 drivers/baseband/null/bbdev_null.c                 |  4 +-
 drivers/baseband/turbo_sw/bbdev_turbo_software.c   |  4 +-
 drivers/bus/dpaa/base/qbman/qman.c                 |  3 +-
 drivers/bus/dpaa/include/fsl_bman.h                |  4 +-
 drivers/bus/dpaa/include/fsl_qman.h                | 20 ++++-----
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h            |  4 +-
 drivers/common/cpt/cpt_common.h                    |  4 +-
 drivers/common/idpf/idpf_common_device.h           |  2 +-
 drivers/common/mlx5/linux/mlx5_glue.c              |  2 +-
 drivers/common/mlx5/linux/mlx5_nl.c                |  2 +-
 drivers/common/mlx5/mlx5_common_mr.h               |  4 +-
 drivers/common/mlx5/mlx5_common_utils.h            | 12 ++---
 drivers/common/mlx5/mlx5_prm.h                     |  4 +-
 drivers/common/qat/qat_adf/icp_qat_hw.h            |  8 ++--
 drivers/common/qat/qat_common.h                    |  4 +-
 drivers/common/qat/qat_qp.h                        |  6 +--
 drivers/compress/isal/isal_compress_pmd_private.h  |  8 ++--
 drivers/compress/nitrox/nitrox_comp_reqmgr.c       |  2 +-
 drivers/compress/octeontx/otx_zip.h                | 16 +++----
 drivers/compress/qat/qat_comp.h                    |  4 +-
 drivers/compress/zlib/zlib_pmd_private.h           | 12 ++---
 drivers/crypto/armv8/armv8_pmd_private.h           | 14 +++---
 drivers/crypto/bcmfs/bcmfs_qp.h                    |  4 +-
 drivers/crypto/bcmfs/bcmfs_sym_session.h           |  4 +-
 drivers/crypto/caam_jr/caam_jr_desc.h              |  8 ++--
 drivers/crypto/ccp/ccp_crypto.h                    |  4 +-
 drivers/crypto/ccp/ccp_dev.h                       |  8 ++--
 drivers/crypto/ccp/ccp_pmd_private.h               |  8 ++--
 drivers/crypto/cnxk/cn10k_cryptodev_sec.h          |  4 +-
 drivers/crypto/cnxk/cn10k_ipsec.h                  |  4 +-
 drivers/crypto/cnxk/cn10k_tls.h                    |  4 +-
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c           |  2 +-
 drivers/crypto/cnxk/cn9k_ipsec.h                   |  8 ++--
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h           |  4 +-
 drivers/crypto/cnxk/cnxk_se.h                      |  4 +-
 drivers/crypto/ipsec_mb/pmd_aesni_mb.c             |  4 +-
 drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h        | 24 +++++-----
 drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h     |  4 +-
 drivers/crypto/ipsec_mb/pmd_kasumi_priv.h          |  4 +-
 drivers/crypto/ipsec_mb/pmd_snow3g_priv.h          |  4 +-
 drivers/crypto/ipsec_mb/pmd_zuc_priv.h             |  4 +-
 drivers/crypto/mlx5/mlx5_crypto.h                  |  4 +-
 drivers/crypto/mvsam/mrvl_pmd_private.h            | 12 ++---
 drivers/crypto/mvsam/rte_mrvl_pmd.c                | 12 +++--
 drivers/crypto/null/null_crypto_pmd_private.h      |  8 ++--
 drivers/crypto/octeontx/otx_cryptodev_hw_access.h  |  4 +-
 drivers/crypto/openssl/openssl_pmd_private.h       | 12 ++---
 drivers/crypto/qat/qat_asym.h                      | 15 +++----
 drivers/crypto/qat/qat_sym.h                       |  8 ++--
 drivers/crypto/qat/qat_sym_session.h               | 10 ++---
 .../crypto/scheduler/scheduler_pkt_size_distr.c    |  4 +-
 drivers/crypto/scheduler/scheduler_pmd_private.h   |  8 ++--
 drivers/crypto/uadk/uadk_crypto_pmd_private.h      | 12 ++---
 drivers/dma/idxd/idxd_hw_defs.h                    | 38 ++++++++--------
 drivers/dma/ioat/ioat_internal.h                   |  4 +-
 drivers/dma/skeleton/skeleton_dmadev.h             |  4 +-
 drivers/event/cnxk/cn10k_eventdev.h                |  8 ++--
 drivers/event/cnxk/cnxk_eventdev.h                 | 24 +++++-----
 drivers/event/cnxk/cnxk_tim_evdev.h                |  4 +-
 drivers/event/cnxk/cnxk_tim_worker.c               |  2 +-
 drivers/event/dlb2/dlb2_priv.h                     | 16 +++----
 drivers/event/dsw/dsw_evdev.h                      | 20 ++++-----
 drivers/event/octeontx/ssovf_evdev.h               |  8 ++--
 drivers/event/octeontx/timvf_evdev.h               |  8 ++--
 drivers/event/octeontx/timvf_worker.c              |  2 +-
 drivers/event/opdl/opdl_evdev.h                    |  6 +--
 drivers/event/opdl/opdl_ring.c                     | 19 ++++----
 drivers/event/skeleton/skeleton_eventdev.h         |  8 ++--
 drivers/event/sw/event_ring.h                      |  2 +-
 drivers/event/sw/iq_chunk.h                        |  4 +-
 drivers/event/sw/sw_evdev.h                        | 18 ++++----
 drivers/mempool/cnxk/cn10k_mempool_ops.c           |  4 +-
 drivers/ml/cnxk/cnxk_ml_ops.h                      |  4 +-
 drivers/net/ark/ark_ethdev_rx.c                    |  6 +--
 drivers/net/ark/ark_ethdev_tx.c                    |  6 +--
 drivers/net/avp/avp_ethdev.c                       |  8 ++--
 drivers/net/avp/rte_avp_common.h                   |  4 +-
 drivers/net/axgbe/axgbe_rxtx.h                     |  8 ++--
 drivers/net/bnxt/bnxt_rxr.c                        |  2 +-
 drivers/net/bonding/rte_eth_bond_8023ad.h          | 28 ++++++------
 drivers/net/cxgbe/base/adapter.h                   | 14 +++---
 drivers/net/cxgbe/cxgbe_ofld.h                     |  2 +-
 drivers/net/e1000/igb_rxtx.c                       |  4 +-
 drivers/net/ena/ena_ethdev.h                       | 17 ++++----
 drivers/net/enic/enic_rxtx_common.h                |  2 +-
 drivers/net/fm10k/fm10k_rxtx.c                     |  5 +--
 drivers/net/hinic/hinic_pmd_rx.h                   |  8 ++--
 drivers/net/hns3/hns3_ethdev.h                     |  4 +-
 drivers/net/hns3/hns3_fdir.c                       |  4 +-
 drivers/net/hns3/hns3_rxtx.h                       |  4 +-
 drivers/net/i40e/i40e_ethdev.h                     |  4 +-
 drivers/net/i40e/i40e_rxtx.h                       |  2 +-
 drivers/net/iavf/iavf.h                            |  2 +-
 drivers/net/iavf/iavf_rxtx.c                       |  3 +-
 drivers/net/ice/ice_ethdev.h                       |  2 +-
 drivers/net/ice/ice_rxtx.c                         |  3 +-
 drivers/net/igc/igc_txrx.c                         |  4 +-
 drivers/net/ionic/ionic_lif.h                      |  2 +-
 drivers/net/ionic/ionic_rxtx.c                     |  6 +--
 drivers/net/ixgbe/ixgbe_ipsec.h                    |  4 +-
 drivers/net/ixgbe/ixgbe_rxtx.c                     | 10 ++---
 drivers/net/memif/memif.h                          |  2 +-
 drivers/net/mlx4/mlx4_rxtx.c                       |  2 +-
 drivers/net/mlx5/hws/mlx5dr_send.h                 |  4 +-
 drivers/net/mlx5/mlx5.h                            |  6 +--
 drivers/net/mlx5/mlx5_flow.h                       |  4 +-
 drivers/net/mlx5/mlx5_hws_cnt.h                    | 14 +++---
 drivers/net/mlx5/mlx5_rx.h                         |  4 +-
 drivers/net/mlx5/mlx5_rxtx.c                       |  6 +--
 drivers/net/mlx5/mlx5_tx.h                         | 10 ++---
 drivers/net/mlx5/mlx5_utils.h                      |  2 +-
 drivers/net/mvpp2/mrvl_ethdev.h                    |  4 +-
 drivers/net/netvsc/hn_var.h                        |  4 +-
 drivers/net/nfp/flower/nfp_flower_flow.c           |  4 +-
 drivers/net/nfp/nfp_ipsec.h                        |  4 +-
 drivers/net/nfp/nfp_rxtx.h                         |  8 ++--
 drivers/net/ngbe/ngbe_ptypes.c                     |  2 +-
 drivers/net/ngbe/ngbe_rxtx.c                       |  2 +-
 drivers/net/octeontx/octeontx_ethdev.c             |  4 +-
 drivers/net/octeontx/octeontx_ethdev.h             | 12 ++---
 drivers/net/octeontx/octeontx_rxtx.h               |  2 +-
 drivers/net/pfe/base/pfe.h                         |  4 +-
 drivers/net/qede/qede_rxtx.c                       | 14 +++---
 drivers/net/softnic/rte_eth_softnic_internals.h    |  4 +-
 drivers/net/tap/tap_bpf.h                          |  4 +-
 drivers/net/thunderx/nicvf_rxtx.c                  |  8 ++--
 drivers/net/thunderx/nicvf_struct.h                | 16 +++----
 drivers/net/txgbe/txgbe_ipsec.h                    |  4 +-
 drivers/net/txgbe/txgbe_ptypes.c                   | 10 ++---
 drivers/net/txgbe/txgbe_rxtx.c                     |  2 +-
 drivers/net/virtio/virtqueue.h                     |  4 +-
 drivers/raw/ntb/ntb.h                              |  6 +--
 drivers/regex/cn9k/cn9k_regexdev.h                 |  4 +-
 drivers/vdpa/mlx5/mlx5_vdpa.h                      |  4 +-
 examples/bbdev_app/main.c                          |  8 ++--
 examples/bond/main.c                               |  2 +-
 examples/distributor/main.c                        | 32 +++++++-------
 examples/eventdev_pipeline/pipeline_common.h       |  8 ++--
 examples/ip_fragmentation/main.c                   |  4 +-
 examples/ip_pipeline/thread.c                      |  4 +-
 examples/ip_reassembly/main.c                      |  4 +-
 examples/ipsec-secgw/ipsec-secgw.c                 |  4 +-
 examples/ipsec-secgw/ipsec-secgw.h                 |  8 ++--
 examples/ipsec-secgw/ipsec.h                       | 22 +++++-----
 examples/ipsec-secgw/ipsec_worker.h                |  4 +-
 examples/ipv4_multicast/main.c                     |  4 +-
 examples/l2fwd-crypto/main.c                       | 12 ++---
 examples/l2fwd-event/l2fwd_common.h                |  8 ++--
 examples/l2fwd-event/l2fwd_poll.h                  |  4 +-
 examples/l2fwd-jobstats/main.c                     |  8 ++--
 examples/l2fwd-keepalive/main.c                    |  8 ++--
 examples/l2fwd-macsec/main.c                       | 12 ++---
 examples/l2fwd/main.c                              | 12 ++---
 examples/l3fwd-graph/main.c                        |  8 ++--
 examples/l3fwd-power/main.c                        | 24 +++++-----
 examples/l3fwd-power/main.h                        |  4 +-
 examples/l3fwd-power/perf_core.c                   |  4 +-
 examples/l3fwd/l3fwd.h                             |  8 ++--
 examples/l3fwd/l3fwd_em.c                          |  4 +-
 examples/l3fwd/main.c                              |  4 +-
 examples/link_status_interrupt/main.c              |  8 ++--
 .../multi_process/client_server_mp/shared/common.h |  8 ++--
 examples/multi_process/symmetric_mp/main.c         |  4 +-
 examples/ntb/ntb_fwd.c                             |  4 +-
 examples/packet_ordering/main.c                    | 16 +++----
 examples/pipeline/thread.c                         |  4 +-
 examples/qos_sched/app_thread.c                    |  2 +-
 examples/qos_sched/main.h                          |  4 +-
 examples/server_node_efd/shared/common.h           | 12 ++---
 examples/vhost/main.h                              |  4 +-
 examples/vhost_blk/vhost_blk.h                     |  4 +-
 examples/vhost_crypto/main.c                       |  4 +-
 examples/vm_power_manager/power_manager.c          |  4 +-
 202 files changed, 726 insertions(+), 732 deletions(-)

-- 
1.8.3.1

[PATCH 01/83] examples: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 examples/bbdev_app/main.c                          |  8 +++---
 examples/bond/main.c                               |  2 +-
 examples/distributor/main.c                        | 32 +++++++++++-----------
 examples/eventdev_pipeline/pipeline_common.h       |  8 +++---
 examples/ip_fragmentation/main.c                   |  4 +--
 examples/ip_pipeline/thread.c                      |  4 +--
 examples/ip_reassembly/main.c                      |  4 +--
 examples/ipsec-secgw/ipsec-secgw.c                 |  4 +--
 examples/ipsec-secgw/ipsec-secgw.h                 |  8 +++---
 examples/ipsec-secgw/ipsec.h                       | 22 +++++++--------
 examples/ipsec-secgw/ipsec_worker.h                |  4 +--
 examples/ipv4_multicast/main.c                     |  4 +--
 examples/l2fwd-crypto/main.c                       | 12 ++++----
 examples/l2fwd-event/l2fwd_common.h                |  8 +++---
 examples/l2fwd-event/l2fwd_poll.h                  |  4 +--
 examples/l2fwd-jobstats/main.c                     |  8 +++---
 examples/l2fwd-keepalive/main.c                    |  8 +++---
 examples/l2fwd-macsec/main.c                       | 12 ++++----
 examples/l2fwd/main.c                              | 12 ++++----
 examples/l3fwd-graph/main.c                        |  8 +++---
 examples/l3fwd-power/main.c                        | 24 ++++++++--------
 examples/l3fwd-power/main.h                        |  4 +--
 examples/l3fwd-power/perf_core.c                   |  4 +--
 examples/l3fwd/l3fwd.h                             |  8 +++---
 examples/l3fwd/l3fwd_em.c                          |  4 +--
 examples/l3fwd/main.c                              |  4 +--
 examples/link_status_interrupt/main.c              |  8 +++---
 .../multi_process/client_server_mp/shared/common.h |  8 +++---
 examples/multi_process/symmetric_mp/main.c         |  4 +--
 examples/ntb/ntb_fwd.c                             |  4 +--
 examples/packet_ordering/main.c                    | 16 +++++------
 examples/pipeline/thread.c                         |  4 +--
 examples/qos_sched/app_thread.c                    |  2 +-
 examples/qos_sched/main.h                          |  4 +--
 examples/server_node_efd/shared/common.h           | 12 ++++----
 examples/vhost/main.h                              |  4 +--
 examples/vhost_blk/vhost_blk.h                     |  4 +--
 examples/vhost_crypto/main.c                       |  4 +--
 examples/vm_power_manager/power_manager.c          |  4 +--
 39 files changed, 151 insertions(+), 151 deletions(-)

diff --git a/examples/bbdev_app/main.c b/examples/bbdev_app/main.c
index 16599ae..d4c686c 100644
--- a/examples/bbdev_app/main.c
+++ b/examples/bbdev_app/main.c
@@ -120,16 +120,16 @@ struct app_config_params {
 	uint16_t num_dec_cores;
 };
 
-struct lcore_statistics {
+struct __rte_cache_aligned lcore_statistics {
 	unsigned int enqueued;
 	unsigned int dequeued;
 	unsigned int rx_lost_packets;
 	unsigned int enc_to_dec_lost_packets;
 	unsigned int tx_lost_packets;
-} __rte_cache_aligned;
+};
 
 /** each lcore configuration */
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint64_t core_type;
 
 	unsigned int port_id;
@@ -148,7 +148,7 @@ struct lcore_conf {
 	struct rte_ring *enc_to_dec_ring;
 
 	struct lcore_statistics *lcore_stats;
-} __rte_cache_aligned;
+};
 
 struct stats_lcore_params {
 	struct lcore_conf *lconf;
diff --git a/examples/bond/main.c b/examples/bond/main.c
index 8528abf..9f38b63 100644
--- a/examples/bond/main.c
+++ b/examples/bond/main.c
@@ -346,7 +346,7 @@ struct global_flag_stru_t {
  */
 static int lcore_main(__rte_unused void *arg1)
 {
-	struct rte_mbuf *pkts[MAX_PKT_BURST] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *pkts[MAX_PKT_BURST];
 	struct rte_ether_addr dst_addr;
 
 	struct rte_ether_addr bond_mac_addr;
diff --git a/examples/distributor/main.c b/examples/distributor/main.c
index 542f76c..ddbc387 100644
--- a/examples/distributor/main.c
+++ b/examples/distributor/main.c
@@ -44,39 +44,39 @@
 unsigned int num_workers;
 
 static volatile struct app_stats {
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint64_t rx_pkts;
 		uint64_t returned_pkts;
 		uint64_t enqueued_pkts;
 		uint64_t enqdrop_pkts;
-	} rx __rte_cache_aligned;
-	int pad1 __rte_cache_aligned;
+	} rx;
+	alignas(RTE_CACHE_LINE_SIZE) int pad1;
 
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint64_t in_pkts;
 		uint64_t ret_pkts;
 		uint64_t sent_pkts;
 		uint64_t enqdrop_pkts;
-	} dist __rte_cache_aligned;
-	int pad2 __rte_cache_aligned;
+	} dist;
+	alignas(RTE_CACHE_LINE_SIZE) int pad2;
 
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint64_t dequeue_pkts;
 		uint64_t tx_pkts;
 		uint64_t enqdrop_pkts;
-	} tx __rte_cache_aligned;
-	int pad3 __rte_cache_aligned;
+	} tx;
+	alignas(RTE_CACHE_LINE_SIZE) int pad3;
 
-	uint64_t worker_pkts[64] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t worker_pkts[64];
 
-	int pad4 __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int pad4;
 
-	uint64_t worker_bursts[64][8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t worker_bursts[64][8];
 
-	int pad5 __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int pad5;
 
-	uint64_t port_rx_pkts[64] __rte_cache_aligned;
-	uint64_t port_tx_pkts[64] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t port_rx_pkts[64];
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t port_tx_pkts[64];
 } app_stats;
 
 struct app_stats prev_app_stats;
@@ -642,7 +642,7 @@ struct lcore_params {
 	 * port, otherwise we send traffic from 0 to 1, 2 to 3, and vice versa
 	 */
 	const unsigned xor_val = (rte_eth_dev_count_avail() > 1);
-	struct rte_mbuf *buf[8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *buf[8];
 
 	for (i = 0; i < 8; i++)
 		buf[i] = NULL;
diff --git a/examples/eventdev_pipeline/pipeline_common.h b/examples/eventdev_pipeline/pipeline_common.h
index 28b6ab8..21b4c7e 100644
--- a/examples/eventdev_pipeline/pipeline_common.h
+++ b/examples/eventdev_pipeline/pipeline_common.h
@@ -24,10 +24,10 @@
 #define BATCH_SIZE 16
 #define MAX_NUM_CORE 64
 
-struct worker_data {
+struct __rte_cache_aligned worker_data {
 	uint8_t dev_id;
 	uint8_t port_id;
-} __rte_cache_aligned;
+};
 
 typedef int (*worker_loop)(void *);
 typedef void (*schedule_loop)(unsigned int);
@@ -43,7 +43,7 @@ struct setup_data {
 	opt_check check_opt;
 };
 
-struct fastpath_data {
+struct __rte_cache_aligned fastpath_data {
 	volatile int done;
 	uint32_t evdev_service_id;
 	uint32_t rxadptr_service_id;
@@ -56,7 +56,7 @@ struct fastpath_data {
 	uint64_t sched_core[MAX_NUM_CORE];
 	uint64_t worker_core[MAX_NUM_CORE];
 	struct setup_data cap;
-} __rte_cache_aligned;
+};
 
 struct config_data {
 	unsigned int active_cores;
diff --git a/examples/ip_fragmentation/main.c b/examples/ip_fragmentation/main.c
index 744a1aa..736eae6 100644
--- a/examples/ip_fragmentation/main.c
+++ b/examples/ip_fragmentation/main.c
@@ -135,12 +135,12 @@ struct rx_queue {
 
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	uint16_t n_rx_queue;
 	uint16_t tx_queue_id[RTE_MAX_ETHPORTS];
 	struct rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 	struct mbuf_table tx_mbufs[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 
 static struct rte_eth_conf port_conf = {
diff --git a/examples/ip_pipeline/thread.c b/examples/ip_pipeline/thread.c
index b46f64b..8a912dc 100644
--- a/examples/ip_pipeline/thread.c
+++ b/examples/ip_pipeline/thread.c
@@ -63,7 +63,7 @@ struct pipeline_data {
 	uint8_t buffer[TABLE_RULE_ACTION_SIZE_MAX];
 };
 
-struct thread_data {
+struct __rte_cache_aligned thread_data {
 	struct rte_pipeline *p[THREAD_PIPELINES_MAX];
 	uint32_t n_pipelines;
 
@@ -73,7 +73,7 @@ struct thread_data {
 	uint64_t timer_period; /* Measured in CPU cycles. */
 	uint64_t time_next;
 	uint64_t time_next_min;
-} __rte_cache_aligned;
+};
 
 static struct thread_data thread_data[RTE_MAX_LCORE];
 
diff --git a/examples/ip_reassembly/main.c b/examples/ip_reassembly/main.c
index bd0b1d3..c701907 100644
--- a/examples/ip_reassembly/main.c
+++ b/examples/ip_reassembly/main.c
@@ -148,14 +148,14 @@ struct tx_lcore_stat {
 #define MAX_TX_QUEUE_PER_PORT 16
 #define MAX_RX_QUEUE_PER_PORT 128
 
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	uint16_t n_rx_queue;
 	struct rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 	uint16_t tx_queue_id[RTE_MAX_ETHPORTS];
 	struct rte_ip_frag_death_row death_row;
 	struct mbuf_table *tx_mbufs[RTE_MAX_ETHPORTS];
 	struct tx_lcore_stat tx_stat;
-} __rte_cache_aligned;
+};
 static struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 
 static struct rte_eth_conf port_conf = {
diff --git a/examples/ipsec-secgw/ipsec-secgw.c b/examples/ipsec-secgw/ipsec-secgw.c
index 45a3038..d7c18be 100644
--- a/examples/ipsec-secgw/ipsec-secgw.c
+++ b/examples/ipsec-secgw/ipsec-secgw.c
@@ -218,11 +218,11 @@ struct app_sa_prm app_sa_prm = {
 		};
 static const char *cfgfile;
 
-struct lcore_params {
+struct __rte_cache_aligned lcore_params {
 	uint16_t port_id;
 	uint8_t queue_id;
 	uint8_t lcore_id;
-} __rte_cache_aligned;
+};
 
 static struct lcore_params lcore_params_array[MAX_LCORE_PARAMS];
 
diff --git a/examples/ipsec-secgw/ipsec-secgw.h b/examples/ipsec-secgw/ipsec-secgw.h
index ec33a98..b4ef4b6 100644
--- a/examples/ipsec-secgw/ipsec-secgw.h
+++ b/examples/ipsec-secgw/ipsec-secgw.h
@@ -54,13 +54,13 @@
 #define IPSEC_NAT_T_PORT 4500
 #define MBUF_PTYPE_TUNNEL_ESP_IN_UDP (RTE_PTYPE_TUNNEL_ESP | RTE_PTYPE_L4_UDP)
 
-struct traffic_type {
+struct __rte_cache_aligned traffic_type {
 	uint32_t num;
 	struct rte_mbuf *pkts[MAX_PKTS];
 	const uint8_t *data[MAX_PKTS];
 	void *saptr[MAX_PKTS];
 	uint32_t res[MAX_PKTS];
-} __rte_cache_aligned;
+};
 
 struct ipsec_traffic {
 	struct traffic_type ipsec;
@@ -98,7 +98,7 @@ struct ipsec_sa_stats {
 	uint64_t miss;
 };
 
-struct ipsec_core_statistics {
+struct __rte_cache_aligned ipsec_core_statistics {
 	uint64_t tx;
 	uint64_t rx;
 	uint64_t rx_call;
@@ -126,7 +126,7 @@ struct ipsec_core_statistics {
 	struct {
 		uint64_t miss;
 	} lpm6;
-} __rte_cache_aligned;
+};
 
 extern struct ipsec_core_statistics core_statistics[RTE_MAX_LCORE];
 
diff --git a/examples/ipsec-secgw/ipsec.h b/examples/ipsec-secgw/ipsec.h
index bdcada1..4cf4c9d 100644
--- a/examples/ipsec-secgw/ipsec.h
+++ b/examples/ipsec-secgw/ipsec.h
@@ -112,7 +112,7 @@ enum {
 	return (struct ipsec_sa *)i;
 }
 
-struct ipsec_sa {
+struct __rte_cache_aligned ipsec_sa {
 	struct rte_ipsec_session sessions[IPSEC_SESSION_MAX];
 	uint32_t spi;
 	struct cdev_qp *cqp[RTE_MAX_LCORE];
@@ -170,7 +170,7 @@ struct ipsec_sa {
 	struct rte_flow_item_esp esp_spec;
 	struct rte_flow *flow;
 	struct rte_security_session_conf sess_conf;
-} __rte_cache_aligned;
+};
 
 struct ipsec_xf {
 	struct rte_crypto_sym_xform a;
@@ -190,12 +190,12 @@ struct sa_ctx {
 	struct ipsec_sa sa[];
 };
 
-struct ipsec_mbuf_metadata {
+struct __rte_cache_aligned ipsec_mbuf_metadata {
 	struct ipsec_sa *sa;
 	struct rte_crypto_op cop;
 	struct rte_crypto_sym_op sym_cop;
 	uint8_t buf[32];
-} __rte_cache_aligned;
+};
 
 #define IS_TRANSPORT(flags) ((flags) & TRANSPORT)
 
@@ -224,7 +224,7 @@ struct cdev_qp {
 	uint16_t qp;
 	uint16_t in_flight;
 	uint16_t len;
-	struct rte_crypto_op *buf[MAX_PKT_BURST] __rte_aligned(sizeof(void *));
+	alignas(sizeof(void *)) struct rte_crypto_op *buf[MAX_PKT_BURST];
 };
 
 struct ipsec_ctx {
@@ -235,7 +235,7 @@ struct ipsec_ctx {
 	uint16_t nb_qps;
 	uint16_t last_qp;
 	struct cdev_qp tbl[MAX_QP_PER_LCORE];
-	struct rte_mbuf *ol_pkts[MAX_PKT_BURST] __rte_aligned(sizeof(void *));
+	alignas(sizeof(void *)) struct rte_mbuf *ol_pkts[MAX_PKT_BURST];
 	uint16_t ol_pkts_cnt;
 	uint64_t ipv4_offloads;
 	uint64_t ipv6_offloads;
@@ -283,18 +283,18 @@ struct cnt_blk {
 	uint32_t cnt;
 } __rte_packed;
 
-struct lcore_rx_queue {
+struct __rte_cache_aligned lcore_rx_queue {
 	uint16_t port_id;
 	uint8_t queue_id;
 	void *sec_ctx;
-} __rte_cache_aligned;
+};
 
 struct buffer {
 	uint16_t len;
-	struct rte_mbuf *m_table[MAX_PKT_BURST] __rte_aligned(sizeof(void *));
+	alignas(sizeof(void *)) struct rte_mbuf *m_table[MAX_PKT_BURST];
 };
 
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint16_t nb_rx_queue;
 	struct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 	uint16_t tx_queue_id[RTE_MAX_ETHPORTS];
@@ -308,7 +308,7 @@ struct lcore_conf {
 		struct rte_mempool *pool_indir;
 		struct rte_ip_frag_death_row dr;
 	} frag;
-} __rte_cache_aligned;
+};
 
 extern struct lcore_conf lcore_conf[RTE_MAX_LCORE];
 
diff --git a/examples/ipsec-secgw/ipsec_worker.h b/examples/ipsec-secgw/ipsec_worker.h
index 8e937fd..8f6a1c0 100644
--- a/examples/ipsec-secgw/ipsec_worker.h
+++ b/examples/ipsec-secgw/ipsec_worker.h
@@ -37,11 +37,11 @@ struct route_table {
 /*
  * Conf required by event mode worker with tx internal port
  */
-struct lcore_conf_ev_tx_int_port_wrkr {
+struct __rte_cache_aligned lcore_conf_ev_tx_int_port_wrkr {
 	struct ipsec_ctx inbound;
 	struct ipsec_ctx outbound;
 	struct route_table rt;
-} __rte_cache_aligned;
+};
 
 void ipsec_poll_mode_worker(void);
 void ipsec_poll_mode_wrkr_inl_pr(void);
diff --git a/examples/ipv4_multicast/main.c b/examples/ipv4_multicast/main.c
index 6d0a850..1eed645 100644
--- a/examples/ipv4_multicast/main.c
+++ b/examples/ipv4_multicast/main.c
@@ -98,13 +98,13 @@ struct mbuf_table {
 
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	uint64_t tx_tsc;
 	uint16_t n_rx_queue;
 	uint8_t rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 	uint16_t tx_queue_id[MAX_PORTS];
 	struct mbuf_table tx_mbufs[MAX_PORTS];
-} __rte_cache_aligned;
+};
 static struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 
 static struct rte_eth_conf port_conf = {
diff --git a/examples/l2fwd-crypto/main.c b/examples/l2fwd-crypto/main.c
index 19db0a2..a441312 100644
--- a/examples/l2fwd-crypto/main.c
+++ b/examples/l2fwd-crypto/main.c
@@ -201,7 +201,7 @@ struct l2fwd_crypto_params {
 };
 
 /** lcore configuration */
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	unsigned nb_rx_ports;
 	uint16_t rx_port_list[MAX_RX_QUEUE_PER_LCORE];
 
@@ -210,7 +210,7 @@ struct lcore_queue_conf {
 
 	struct op_buffer op_buf[RTE_CRYPTO_MAX_DEVS];
 	struct pkt_buffer pkt_buf[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 
@@ -230,7 +230,7 @@ struct lcore_queue_conf {
 } session_pool_socket[RTE_MAX_NUMA_NODES];
 
 /* Per-port statistics struct */
-struct l2fwd_port_statistics {
+struct __rte_cache_aligned l2fwd_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
 
@@ -238,14 +238,14 @@ struct l2fwd_port_statistics {
 	uint64_t crypto_dequeued;
 
 	uint64_t dropped;
-} __rte_cache_aligned;
+};
 
-struct l2fwd_crypto_statistics {
+struct __rte_cache_aligned l2fwd_crypto_statistics {
 	uint64_t enqueued;
 	uint64_t dequeued;
 
 	uint64_t errors;
-} __rte_cache_aligned;
+};
 
 struct l2fwd_port_statistics port_statistics[RTE_MAX_ETHPORTS];
 struct l2fwd_crypto_statistics crypto_statistics[RTE_CRYPTO_MAX_DEVS];
diff --git a/examples/l2fwd-event/l2fwd_common.h b/examples/l2fwd-event/l2fwd_common.h
index 07f84cb..c56b3e7 100644
--- a/examples/l2fwd-event/l2fwd_common.h
+++ b/examples/l2fwd-event/l2fwd_common.h
@@ -59,11 +59,11 @@
 #define VECTOR_TMO_NS_DEFAULT 1E6 /* 1ms */
 
 /* Per-port statistics struct */
-struct l2fwd_port_statistics {
+struct __rte_cache_aligned l2fwd_port_statistics {
 	uint64_t dropped;
 	uint64_t tx;
 	uint64_t rx;
-} __rte_cache_aligned;
+};
 
 /* Event vector attributes */
 struct l2fwd_event_vector_params {
@@ -72,7 +72,7 @@ struct l2fwd_event_vector_params {
 	uint64_t timeout_ns;
 };
 
-struct l2fwd_resources {
+struct __rte_cache_aligned l2fwd_resources {
 	volatile uint8_t force_quit;
 	uint8_t event_mode;
 	uint8_t sched_type;
@@ -91,7 +91,7 @@ struct l2fwd_resources {
 	struct l2fwd_event_vector_params evt_vec;
 	void *evt_rsrc;
 	void *poll_rsrc;
-} __rte_cache_aligned;
+};
 
 static __rte_always_inline void
 l2fwd_mac_updating(struct rte_mbuf *m, uint32_t dest_port_id,
diff --git a/examples/l2fwd-event/l2fwd_poll.h b/examples/l2fwd-event/l2fwd_poll.h
index d59b0c8..9d72008 100644
--- a/examples/l2fwd-event/l2fwd_poll.h
+++ b/examples/l2fwd-event/l2fwd_poll.h
@@ -9,10 +9,10 @@
 
 typedef void (*poll_main_loop_cb)(struct l2fwd_resources *rsrc);
 
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	uint32_t rx_port_list[MAX_RX_QUEUE_PER_LCORE];
 	uint32_t n_rx_port;
-} __rte_cache_aligned;
+};
 
 struct l2fwd_poll_resources {
 	poll_main_loop_cb poll_main_loop;
diff --git a/examples/l2fwd-jobstats/main.c b/examples/l2fwd-jobstats/main.c
index 2653db4..cb7582a 100644
--- a/examples/l2fwd-jobstats/main.c
+++ b/examples/l2fwd-jobstats/main.c
@@ -67,7 +67,7 @@
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
 /* List of queues to be polled for given lcore. 8< */
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	unsigned n_rx_port;
 	unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE];
 	uint64_t next_flush_time[RTE_MAX_ETHPORTS];
@@ -82,7 +82,7 @@ struct lcore_queue_conf {
 
 	uint16_t stats_read_pending;
 	rte_spinlock_t lock;
-} __rte_cache_aligned;
+};
 /* >8 End of list of queues to be polled for given lcore. */
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 
@@ -97,11 +97,11 @@ struct lcore_queue_conf {
 struct rte_mempool *l2fwd_pktmbuf_pool = NULL;
 
 /* Per-port statistics struct */
-struct l2fwd_port_statistics {
+struct __rte_cache_aligned l2fwd_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
 	uint64_t dropped;
-} __rte_cache_aligned;
+};
 struct l2fwd_port_statistics port_statistics[RTE_MAX_ETHPORTS];
 
 /* 1 day max */
diff --git a/examples/l2fwd-keepalive/main.c b/examples/l2fwd-keepalive/main.c
index 1463cef..c3ead9e 100644
--- a/examples/l2fwd-keepalive/main.c
+++ b/examples/l2fwd-keepalive/main.c
@@ -69,10 +69,10 @@
 
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	unsigned n_rx_port;
 	unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE];
-} __rte_cache_aligned;
+};
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 
 struct rte_eth_dev_tx_buffer *tx_buffer[RTE_MAX_ETHPORTS];
@@ -86,11 +86,11 @@ struct lcore_queue_conf {
 struct rte_mempool *l2fwd_pktmbuf_pool = NULL;
 
 /* Per-port statistics struct */
-struct l2fwd_port_statistics {
+struct __rte_cache_aligned l2fwd_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
 	uint64_t dropped;
-} __rte_cache_aligned;
+};
 struct l2fwd_port_statistics port_statistics[RTE_MAX_ETHPORTS];
 
 /* A tsc-based timer responsible for triggering statistics printout */
diff --git a/examples/l2fwd-macsec/main.c b/examples/l2fwd-macsec/main.c
index a5d7a84..294ee11 100644
--- a/examples/l2fwd-macsec/main.c
+++ b/examples/l2fwd-macsec/main.c
@@ -72,10 +72,10 @@
 /* list of enabled ports */
 static uint32_t l2fwd_dst_ports[RTE_MAX_ETHPORTS];
 
-struct port_pair_params {
+struct __rte_cache_aligned port_pair_params {
 #define NUM_PORTS	2
 	uint16_t port[NUM_PORTS];
-} __rte_cache_aligned;
+};
 
 static struct port_pair_params port_pair_params_array[RTE_MAX_ETHPORTS / 2];
 static struct port_pair_params *port_pair_params;
@@ -86,10 +86,10 @@ struct port_pair_params {
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
 /* List of queues to be polled for a given lcore. 8< */
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	unsigned int n_rx_port;
 	unsigned int rx_port_list[MAX_RX_QUEUE_PER_LCORE];
-} __rte_cache_aligned;
+};
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 /* >8 End of list of queues to be polled for a given lcore. */
 
@@ -105,11 +105,11 @@ struct lcore_queue_conf {
 struct rte_mempool *l2fwd_pktmbuf_pool;
 
 /* Per-port statistics struct */
-struct l2fwd_port_statistics {
+struct __rte_cache_aligned l2fwd_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
 	uint64_t dropped;
-} __rte_cache_aligned;
+};
 struct l2fwd_port_statistics port_statistics[RTE_MAX_ETHPORTS];
 
 #define MAX_TIMER_PERIOD 86400 /* 1 day max */
diff --git a/examples/l2fwd/main.c b/examples/l2fwd/main.c
index 96fb331..c6fafdd 100644
--- a/examples/l2fwd/main.c
+++ b/examples/l2fwd/main.c
@@ -69,10 +69,10 @@
 /* list of enabled ports */
 static uint32_t l2fwd_dst_ports[RTE_MAX_ETHPORTS];
 
-struct port_pair_params {
+struct __rte_cache_aligned port_pair_params {
 #define NUM_PORTS	2
 	uint16_t port[NUM_PORTS];
-} __rte_cache_aligned;
+};
 
 static struct port_pair_params port_pair_params_array[RTE_MAX_ETHPORTS / 2];
 static struct port_pair_params *port_pair_params;
@@ -83,10 +83,10 @@ struct port_pair_params {
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
 /* List of queues to be polled for a given lcore. 8< */
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	unsigned n_rx_port;
 	unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE];
-} __rte_cache_aligned;
+};
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 /* >8 End of list of queues to be polled for a given lcore. */
 
@@ -101,11 +101,11 @@ struct lcore_queue_conf {
 struct rte_mempool * l2fwd_pktmbuf_pool = NULL;
 
 /* Per-port statistics struct */
-struct l2fwd_port_statistics {
+struct __rte_cache_aligned l2fwd_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
 	uint64_t dropped;
-} __rte_cache_aligned;
+};
 struct l2fwd_port_statistics port_statistics[RTE_MAX_ETHPORTS];
 
 #define MAX_TIMER_PERIOD 86400 /* 1 day max */
diff --git a/examples/l3fwd-graph/main.c b/examples/l3fwd-graph/main.c
index 96cb1c8..ec4d8c9 100644
--- a/examples/l3fwd-graph/main.c
+++ b/examples/l3fwd-graph/main.c
@@ -97,22 +97,22 @@ struct lcore_rx_queue {
 static uint8_t model_conf = RTE_GRAPH_MODEL_DEFAULT;
 
 /* Lcore conf */
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint16_t n_rx_queue;
 	struct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 
 	struct rte_graph *graph;
 	char name[RTE_GRAPH_NAMESIZE];
 	rte_graph_t graph_id;
-} __rte_cache_aligned;
+};
 
 static struct lcore_conf lcore_conf[RTE_MAX_LCORE];
 
-struct lcore_params {
+struct __rte_cache_aligned lcore_params {
 	uint16_t port_id;
 	uint8_t queue_id;
 	uint8_t lcore_id;
-} __rte_cache_aligned;
+};
 
 static struct lcore_params lcore_params_array[MAX_LCORE_PARAMS];
 static struct lcore_params lcore_params_array_default[] = {
diff --git a/examples/l3fwd-power/main.c b/examples/l3fwd-power/main.c
index f4adcf4..fba11da 100644
--- a/examples/l3fwd-power/main.c
+++ b/examples/l3fwd-power/main.c
@@ -212,13 +212,13 @@ enum freq_scale_hint_t
 	FREQ_HIGHEST  =       2
 };
 
-struct lcore_rx_queue {
+struct __rte_cache_aligned lcore_rx_queue {
 	uint16_t port_id;
 	uint8_t queue_id;
 	enum freq_scale_hint_t freq_up_hint;
 	uint32_t zero_rx_packet_count;
 	uint32_t idle_hint;
-} __rte_cache_aligned;
+};
 
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT RTE_MAX_ETHPORTS
@@ -329,8 +329,8 @@ struct ipv6_l3fwd_route {
 
 #define L3FWD_HASH_ENTRIES	1024
 
-static uint16_t ipv4_l3fwd_out_if[L3FWD_HASH_ENTRIES] __rte_cache_aligned;
-static uint16_t ipv6_l3fwd_out_if[L3FWD_HASH_ENTRIES] __rte_cache_aligned;
+static alignas(RTE_CACHE_LINE_SIZE) uint16_t ipv4_l3fwd_out_if[L3FWD_HASH_ENTRIES];
+static alignas(RTE_CACHE_LINE_SIZE) uint16_t ipv6_l3fwd_out_if[L3FWD_HASH_ENTRIES];
 #endif
 
 #if (APP_LOOKUP_METHOD == APP_LOOKUP_LPM)
@@ -357,7 +357,7 @@ struct ipv4_l3fwd_route {
 static lookup_struct_t *ipv4_l3fwd_lookup_struct[NB_SOCKETS];
 #endif
 
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint16_t n_rx_queue;
 	struct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 	uint16_t n_tx_port;
@@ -366,9 +366,9 @@ struct lcore_conf {
 	struct rte_eth_dev_tx_buffer *tx_buffer[RTE_MAX_ETHPORTS];
 	lookup_struct_t * ipv4_lookup_struct;
 	lookup_struct_t * ipv6_lookup_struct;
-} __rte_cache_aligned;
+};
 
-struct lcore_stats {
+struct __rte_cache_aligned lcore_stats {
 	/* total sleep time in ms since last frequency scaling down */
 	uint32_t sleep_time;
 	/* number of long sleep recently */
@@ -399,10 +399,10 @@ struct lcore_stats {
 	uint64_t fp_nfp[2];
 	enum busy_rate br;
 	rte_spinlock_t telemetry_lock;
-} __rte_cache_aligned;
+};
 
-static struct lcore_conf lcore_conf[RTE_MAX_LCORE] __rte_cache_aligned;
-static struct lcore_stats stats[RTE_MAX_LCORE] __rte_cache_aligned;
+static alignas(RTE_CACHE_LINE_SIZE) struct lcore_conf lcore_conf[RTE_MAX_LCORE];
+static alignas(RTE_CACHE_LINE_SIZE) struct lcore_stats stats[RTE_MAX_LCORE];
 static struct rte_timer power_timers[RTE_MAX_LCORE];
 
 static inline uint32_t power_idle_heuristic(uint32_t zero_rx_packet_count);
@@ -832,9 +832,9 @@ static int is_done(void)
 	 * back to sleep again without log spamming. Avoid cache line sharing
 	 * to prevent threads stepping on each others' toes.
 	 */
-	static struct {
+	static alignas(RTE_CACHE_LINE_SIZE) struct {
 		bool wakeup;
-	} __rte_cache_aligned status[RTE_MAX_LCORE];
+	} status[RTE_MAX_LCORE];
 	struct rte_epoll_event event[num];
 	int n, i;
 	uint16_t port_id;
diff --git a/examples/l3fwd-power/main.h b/examples/l3fwd-power/main.h
index 258de98..e85e14b 100644
--- a/examples/l3fwd-power/main.h
+++ b/examples/l3fwd-power/main.h
@@ -7,11 +7,11 @@
 
 
 #define MAX_LCORE_PARAMS 1024
-struct lcore_params {
+struct __rte_cache_aligned lcore_params {
 	uint16_t port_id;
 	uint8_t queue_id;
 	uint8_t lcore_id;
-} __rte_cache_aligned;
+};
 
 extern struct lcore_params *lcore_params;
 extern uint16_t nb_lcore_params;
diff --git a/examples/l3fwd-power/perf_core.c b/examples/l3fwd-power/perf_core.c
index 41ef6d0..c8fc69e 100644
--- a/examples/l3fwd-power/perf_core.c
+++ b/examples/l3fwd-power/perf_core.c
@@ -20,12 +20,12 @@
 static uint16_t hp_lcores[RTE_MAX_LCORE];
 static uint16_t nb_hp_lcores;
 
-struct perf_lcore_params {
+struct __rte_cache_aligned perf_lcore_params {
 	uint16_t port_id;
 	uint8_t queue_id;
 	uint8_t high_perf;
 	uint8_t lcore_idx;
-} __rte_cache_aligned;
+};
 
 static struct perf_lcore_params prf_lc_prms[MAX_LCORE_PARAMS];
 static uint16_t nb_prf_lc_prms;
diff --git a/examples/l3fwd/l3fwd.h b/examples/l3fwd/l3fwd.h
index e7ae0e5..f51da43 100644
--- a/examples/l3fwd/l3fwd.h
+++ b/examples/l3fwd/l3fwd.h
@@ -72,12 +72,12 @@ struct mbuf_table {
 	struct rte_mbuf *m_table[MAX_PKT_BURST];
 };
 
-struct lcore_rx_queue {
+struct __rte_cache_aligned lcore_rx_queue {
 	uint16_t port_id;
 	uint8_t queue_id;
-} __rte_cache_aligned;
+};
 
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint16_t n_rx_queue;
 	struct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 	uint16_t n_tx_port;
@@ -86,7 +86,7 @@ struct lcore_conf {
 	struct mbuf_table tx_mbufs[RTE_MAX_ETHPORTS];
 	void *ipv4_lookup_struct;
 	void *ipv6_lookup_struct;
-} __rte_cache_aligned;
+};
 
 extern volatile bool force_quit;
 
diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
index 40e102b..d98e66e 100644
--- a/examples/l3fwd/l3fwd_em.c
+++ b/examples/l3fwd/l3fwd_em.c
@@ -208,8 +208,8 @@
 	return init_val;
 }
 
-static uint8_t ipv4_l3fwd_out_if[L3FWD_HASH_ENTRIES] __rte_cache_aligned;
-static uint8_t ipv6_l3fwd_out_if[L3FWD_HASH_ENTRIES] __rte_cache_aligned;
+static alignas(RTE_CACHE_LINE_SIZE) uint8_t ipv4_l3fwd_out_if[L3FWD_HASH_ENTRIES];
+static alignas(RTE_CACHE_LINE_SIZE) uint8_t ipv6_l3fwd_out_if[L3FWD_HASH_ENTRIES];
 
 static rte_xmm_t mask0;
 static rte_xmm_t mask1;
diff --git a/examples/l3fwd/main.c b/examples/l3fwd/main.c
index 8d32ae1..ad28ba9 100644
--- a/examples/l3fwd/main.c
+++ b/examples/l3fwd/main.c
@@ -96,11 +96,11 @@ enum L3FWD_LOOKUP_MODE {
 
 struct parm_cfg parm_config;
 
-struct lcore_params {
+struct __rte_cache_aligned lcore_params {
 	uint16_t port_id;
 	uint8_t queue_id;
 	uint8_t lcore_id;
-} __rte_cache_aligned;
+};
 
 static struct lcore_params lcore_params_array[MAX_LCORE_PARAMS];
 static struct lcore_params lcore_params_array_default[] = {
diff --git a/examples/link_status_interrupt/main.c b/examples/link_status_interrupt/main.c
index a8423d5..ac9c7f6 100644
--- a/examples/link_status_interrupt/main.c
+++ b/examples/link_status_interrupt/main.c
@@ -66,11 +66,11 @@
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
 /* List of queues must be polled for a give lcore. 8< */
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	unsigned n_rx_port;
 	unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE];
 	unsigned tx_queue_id;
-} __rte_cache_aligned;
+};
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 /* >8 End of list of queues to be polled. */
 
@@ -90,11 +90,11 @@ struct lcore_queue_conf {
 struct rte_mempool * lsi_pktmbuf_pool = NULL;
 
 /* Per-port statistics struct */
-struct lsi_port_statistics {
+struct __rte_cache_aligned lsi_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
 	uint64_t dropped;
-} __rte_cache_aligned;
+};
 struct lsi_port_statistics port_statistics[RTE_MAX_ETHPORTS];
 
 /* A tsc-based timer responsible for triggering statistics printout */
diff --git a/examples/multi_process/client_server_mp/shared/common.h b/examples/multi_process/client_server_mp/shared/common.h
index 76beca0..b3f3a41 100644
--- a/examples/multi_process/client_server_mp/shared/common.h
+++ b/examples/multi_process/client_server_mp/shared/common.h
@@ -18,14 +18,14 @@
  * themselves are written by the clients, so we have a distinct set, on different
  * cache lines for each client to use.
  */
-struct rx_stats{
+struct __rte_cache_aligned rx_stats {
 	uint64_t rx[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 
-struct tx_stats{
+struct __rte_cache_aligned tx_stats {
 	uint64_t tx[RTE_MAX_ETHPORTS];
 	uint64_t tx_drop[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 
 struct port_info {
 	uint16_t num_ports;
diff --git a/examples/multi_process/symmetric_mp/main.c b/examples/multi_process/symmetric_mp/main.c
index 1ff8587..f7d8439 100644
--- a/examples/multi_process/symmetric_mp/main.c
+++ b/examples/multi_process/symmetric_mp/main.c
@@ -61,11 +61,11 @@ struct lcore_ports{
 
 /* structure to record the rx and tx packets. Put two per cache line as ports
  * used in pairs */
-struct port_stats{
+struct __rte_aligned(RTE_CACHE_LINE_SIZE / 2) port_stats{
 	unsigned rx;
 	unsigned tx;
 	unsigned drop;
-} __rte_aligned(RTE_CACHE_LINE_SIZE / 2);
+};
 
 static int proc_id = -1;
 static unsigned num_procs = 0;
diff --git a/examples/ntb/ntb_fwd.c b/examples/ntb/ntb_fwd.c
index 95a6148..56c7672 100644
--- a/examples/ntb/ntb_fwd.c
+++ b/examples/ntb/ntb_fwd.c
@@ -24,10 +24,10 @@
 #include "commands.h"
 
 /* Per-port statistics struct */
-struct ntb_port_statistics {
+struct __rte_cache_aligned ntb_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
-} __rte_cache_aligned;
+};
 /* Port 0: NTB dev, Port 1: ethdev when iofwd. */
 struct ntb_port_statistics ntb_port_stats[2];
 
diff --git a/examples/packet_ordering/main.c b/examples/packet_ordering/main.c
index f839db9..5ffdf72 100644
--- a/examples/packet_ordering/main.c
+++ b/examples/packet_ordering/main.c
@@ -58,19 +58,19 @@ struct send_thread_args {
 };
 
 volatile struct app_stats {
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint64_t rx_pkts;
 		uint64_t enqueue_pkts;
 		uint64_t enqueue_failed_pkts;
-	} rx __rte_cache_aligned;
+	} rx;
 
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint64_t dequeue_pkts;
 		uint64_t enqueue_pkts;
 		uint64_t enqueue_failed_pkts;
-	} wkr __rte_cache_aligned;
+	} wkr;
 
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint64_t dequeue_pkts;
 		/* Too early pkts transmitted directly w/o reordering */
 		uint64_t early_pkts_txtd_woro;
@@ -78,15 +78,15 @@ struct send_thread_args {
 		uint64_t early_pkts_tx_failed_woro;
 		uint64_t ro_tx_pkts;
 		uint64_t ro_tx_failed_pkts;
-	} tx __rte_cache_aligned;
+	} tx;
 } app_stats;
 
 /* per worker lcore stats */
-struct wkr_stats_per {
+struct __rte_cache_aligned wkr_stats_per {
 		uint64_t deq_pkts;
 		uint64_t enq_pkts;
 		uint64_t enq_failed_pkts;
-} __rte_cache_aligned;
+};
 
 static struct wkr_stats_per wkr_stats[RTE_MAX_LCORE] = { {0} };
 /**
diff --git a/examples/pipeline/thread.c b/examples/pipeline/thread.c
index dc3ea73..cf2af55 100644
--- a/examples/pipeline/thread.c
+++ b/examples/pipeline/thread.c
@@ -47,13 +47,13 @@ struct block {
 	void *block;
 };
 
-struct thread {
+struct __rte_cache_aligned thread {
 	struct rte_swx_pipeline *pipelines[THREAD_PIPELINES_MAX];
 	struct block *blocks[THREAD_BLOCKS_MAX];
 	volatile uint64_t n_pipelines;
 	volatile uint64_t n_blocks;
 	int enabled;
-} __rte_cache_aligned;
+};
 
 static struct thread threads[RTE_MAX_LCORE];
 
diff --git a/examples/qos_sched/app_thread.c b/examples/qos_sched/app_thread.c
index 059c470..e50cc33 100644
--- a/examples/qos_sched/app_thread.c
+++ b/examples/qos_sched/app_thread.c
@@ -62,7 +62,7 @@
 app_rx_thread(struct thread_conf **confs)
 {
 	uint32_t i, nb_rx;
-	struct rte_mbuf *rx_mbufs[burst_conf.rx_burst] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *rx_mbufs[burst_conf.rx_burst];
 	struct thread_conf *conf;
 	int conf_idx = 0;
 
diff --git a/examples/qos_sched/main.h b/examples/qos_sched/main.h
index bc647ec..04e77a4 100644
--- a/examples/qos_sched/main.h
+++ b/examples/qos_sched/main.h
@@ -63,7 +63,7 @@ struct thread_stat
 };
 
 
-struct thread_conf
+struct __rte_cache_aligned thread_conf
 {
 	uint16_t rx_port;
 	uint16_t tx_port;
@@ -76,7 +76,7 @@ struct thread_conf
 #if APP_COLLECT_STAT
 	struct thread_stat stat;
 #endif
-} __rte_cache_aligned;
+};
 
 
 struct flow_conf
diff --git a/examples/server_node_efd/shared/common.h b/examples/server_node_efd/shared/common.h
index 130fd4f..e1ab7e6 100644
--- a/examples/server_node_efd/shared/common.h
+++ b/examples/server_node_efd/shared/common.h
@@ -20,19 +20,19 @@
  * themselves are written by the nodes, so we have a distinct set, on different
  * cache lines for each node to use.
  */
-struct rx_stats {
+struct __rte_cache_aligned rx_stats {
 	uint64_t rx[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 
-struct tx_stats {
+struct __rte_cache_aligned tx_stats {
 	uint64_t tx[RTE_MAX_ETHPORTS];
 	uint64_t tx_drop[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 
-struct filter_stats {
+struct __rte_cache_aligned filter_stats {
 	uint64_t drop;
 	uint64_t passed;
-} __rte_cache_aligned;
+};
 
 struct shared_info {
 	uint8_t num_nodes;
diff --git a/examples/vhost/main.h b/examples/vhost/main.h
index 2fcb837..c1c9a42 100644
--- a/examples/vhost/main.h
+++ b/examples/vhost/main.h
@@ -32,7 +32,7 @@ struct vhost_queue {
 	uint16_t		last_used_idx;
 };
 
-struct vhost_dev {
+struct __rte_cache_aligned vhost_dev {
 	/**< Number of memory regions for gpa to hpa translation. */
 	uint32_t nregions_hpa;
 	/**< Device MAC address (Obtained on first TX packet). */
@@ -59,7 +59,7 @@ struct vhost_dev {
 
 #define MAX_QUEUE_PAIRS	4
 	struct vhost_queue queues[MAX_QUEUE_PAIRS * 2];
-} __rte_cache_aligned;
+};
 
 typedef uint16_t (*vhost_enqueue_burst_t)(struct vhost_dev *dev,
 			uint16_t queue_id, struct rte_mbuf **pkts,
diff --git a/examples/vhost_blk/vhost_blk.h b/examples/vhost_blk/vhost_blk.h
index 975f0b4..649a52b 100644
--- a/examples/vhost_blk/vhost_blk.h
+++ b/examples/vhost_blk/vhost_blk.h
@@ -66,7 +66,7 @@ struct vhost_block_dev {
 	uint8_t *data;
 };
 
-struct vhost_blk_ctrlr {
+struct __rte_cache_aligned vhost_blk_ctrlr {
 	uint8_t started;
 	/** ID for vhost library. */
 	int vid;
@@ -76,7 +76,7 @@ struct vhost_blk_ctrlr {
 	struct vhost_block_dev *bdev;
 	/** VM memory region */
 	struct rte_vhost_memory *mem;
-} __rte_cache_aligned;
+};
 
 #define VHOST_BLK_MAX_IOVS 128
 
diff --git a/examples/vhost_crypto/main.c b/examples/vhost_crypto/main.c
index 02987eb..558c09a 100644
--- a/examples/vhost_crypto/main.c
+++ b/examples/vhost_crypto/main.c
@@ -42,7 +42,7 @@ struct lcore_option {
 	uint16_t qid;
 };
 
-struct vhost_crypto_info {
+struct __rte_cache_aligned vhost_crypto_info {
 	int vids[MAX_NB_SOCKETS];
 	uint32_t nb_vids;
 	struct rte_mempool *sess_pool;
@@ -51,7 +51,7 @@ struct vhost_crypto_info {
 	uint32_t qid;
 	uint32_t nb_inflight_ops;
 	volatile uint32_t initialized[MAX_NB_SOCKETS];
-} __rte_cache_aligned;
+};
 
 struct vhost_crypto_options {
 	struct lcore_option los[MAX_NB_WORKER_CORES];
diff --git a/examples/vm_power_manager/power_manager.c b/examples/vm_power_manager/power_manager.c
index 739372d..0355a7f 100644
--- a/examples/vm_power_manager/power_manager.c
+++ b/examples/vm_power_manager/power_manager.c
@@ -32,11 +32,11 @@
 	rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl); \
 } while (0)
 
-struct freq_info {
+struct __rte_cache_aligned freq_info {
 	rte_spinlock_t power_sl;
 	uint32_t freqs[RTE_MAX_LCORE_FREQS];
 	unsigned num_freqs;
-} __rte_cache_aligned;
+};
 
 static struct freq_info global_core_freq_info[RTE_MAX_LCORE];
 
-- 
1.8.3.1

[PATCH 02/83] net/ark: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/ark/ark_ethdev_rx.c | 6 +++---
 drivers/net/ark/ark_ethdev_tx.c | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/ark/ark_ethdev_rx.c b/drivers/net/ark/ark_ethdev_rx.c
index 24f1c65..80e431f 100644
--- a/drivers/net/ark/ark_ethdev_rx.c
+++ b/drivers/net/ark/ark_ethdev_rx.c
@@ -28,7 +28,7 @@ static uint32_t eth_ark_rx_jumbo(struct ark_rx_queue *queue,
 static inline int eth_ark_rx_seed_mbufs(struct ark_rx_queue *queue);
 
 /* ************************************************************************* */
-struct ark_rx_queue {
+struct __rte_cache_aligned ark_rx_queue {
 	/* array of mbufs to populate */
 	struct rte_mbuf **reserve_q;
 	/* array of physical addresses of the mbuf data pointer */
@@ -60,10 +60,10 @@ struct ark_rx_queue {
 	uint32_t unused;
 
 	/* next cache line - fields written by device */
-	RTE_MARKER cacheline1 __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) RTE_MARKER cacheline1;
 
 	volatile uint32_t prod_index;	/* step 2 filled by FPGA */
-} __rte_cache_aligned;
+};
 
 /* ************************************************************************* */
 static int
diff --git a/drivers/net/ark/ark_ethdev_tx.c b/drivers/net/ark/ark_ethdev_tx.c
index 4792754..9c89c85 100644
--- a/drivers/net/ark/ark_ethdev_tx.c
+++ b/drivers/net/ark/ark_ethdev_tx.c
@@ -21,7 +21,7 @@
 #endif
 
 /* ************************************************************************* */
-struct ark_tx_queue {
+struct __rte_cache_aligned ark_tx_queue {
 	union ark_tx_meta *meta_q;
 	struct rte_mbuf **bufs;
 
@@ -48,9 +48,9 @@ struct ark_tx_queue {
 	uint16_t queue_index;
 
 	/* next cache line - fields written by device */
-	RTE_MARKER cacheline1 __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) RTE_MARKER cacheline1;
 	volatile int32_t cons_index;		/* hw is done, can be freed */
-} __rte_cache_aligned;
+};
 
 /* Forward declarations */
 static int eth_ark_tx_jumbo(struct ark_tx_queue *queue,
-- 
1.8.3.1

[PATCH 03/83] net/avp: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/avp/avp_ethdev.c     | 8 ++++----
 drivers/net/avp/rte_avp_common.h | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/avp/avp_ethdev.c b/drivers/net/avp/avp_ethdev.c
index 53d9e38..6733462 100644
--- a/drivers/net/avp/avp_ethdev.c
+++ b/drivers/net/avp/avp_ethdev.c
@@ -154,7 +154,7 @@ static int avp_dev_stats_get(struct rte_eth_dev *dev,
  * Defines the AVP device attributes which are attached to an RTE ethernet
  * device
  */
-struct avp_dev {
+struct __rte_cache_aligned avp_dev {
 	uint32_t magic; /**< Memory validation marker */
 	uint64_t device_id; /**< Unique system identifier */
 	struct rte_ether_addr ethaddr; /**< Host specified MAC address */
@@ -190,12 +190,12 @@ struct avp_dev {
 	void *sync_addr; /**< Req/Resp Mem address */
 	void *host_mbuf_addr; /**< (host) MBUF pool start address */
 	void *mbuf_addr; /**< MBUF pool start address */
-} __rte_cache_aligned;
+};
 
 /* RTE ethernet private data */
-struct avp_adapter {
+struct __rte_cache_aligned avp_adapter {
 	struct avp_dev avp;
-} __rte_cache_aligned;
+};
 
 
 /* 32-bit MMIO register write */
diff --git a/drivers/net/avp/rte_avp_common.h b/drivers/net/avp/rte_avp_common.h
index 908b31b..5ad71ac 100644
--- a/drivers/net/avp/rte_avp_common.h
+++ b/drivers/net/avp/rte_avp_common.h
@@ -100,7 +100,7 @@ struct rte_avp_fifo {
 /*
  * AVP packet buffer header used to define the exchange of packet data.
  */
-struct rte_avp_desc {
+struct __rte_cache_aligned rte_avp_desc {
 	uint64_t pad0;
 	void *pkt_mbuf; /**< Reference to packet mbuf */
 	uint8_t pad1[14];
@@ -114,7 +114,7 @@ struct rte_avp_desc {
 	uint32_t pad3;
 	uint16_t vlan_tci; /**< VLAN Tag Control Identifier (CPU order). */
 	uint32_t pad4;
-} __rte_packed __rte_cache_aligned;
+} __rte_packed;
 
 
 /**{ AVP device features */
-- 
1.8.3.1

[PATCH 04/83] net/axgbe: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/axgbe/axgbe_rxtx.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_rxtx.h b/drivers/net/axgbe/axgbe_rxtx.h
index a218bf0..a326ba9 100644
--- a/drivers/net/axgbe/axgbe_rxtx.h
+++ b/drivers/net/axgbe/axgbe_rxtx.h
@@ -56,7 +56,7 @@
 	} write;
 };
 
-struct axgbe_rx_queue {
+struct __rte_cache_aligned axgbe_rx_queue {
 	/* membuf pool for rx buffers */
 	struct rte_mempool *mb_pool;
 	/* H/w Rx buffer size configured in DMA */
@@ -101,7 +101,7 @@ struct axgbe_rx_queue {
 	/* Number of mbufs allocated from pool*/
 	uint64_t mbuf_alloc;
 	uint64_t offloads; /**< Rx offloads with RTE_ETH_RX_OFFLOAD_**/
-} __rte_cache_aligned;
+};
 
 /*Tx descriptor format */
 struct axgbe_tx_desc {
@@ -110,7 +110,7 @@ struct axgbe_tx_desc {
 	uint32_t desc3;
 };
 
-struct axgbe_tx_queue {
+struct __rte_cache_aligned axgbe_tx_queue {
 	/* Port private data reference */
 	struct axgbe_port *pdata;
 	/* Number of Tx descriptors in queue*/
@@ -150,7 +150,7 @@ struct axgbe_tx_queue {
 	uint64_t bytes;
 	uint64_t errors;
 	uint64_t offloads; /**< Tx offload flags of RTE_ETH_TX_OFFLOAD_* */
-} __rte_cache_aligned;
+};
 
 /*Queue related APIs */
 
-- 
1.8.3.1

[PATCH 05/83] net/bnxt: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/bnxt/bnxt_rxr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/bnxt/bnxt_rxr.c b/drivers/net/bnxt/bnxt_rxr.c
index 3542975..957b7d6 100644
--- a/drivers/net/bnxt/bnxt_rxr.c
+++ b/drivers/net/bnxt/bnxt_rxr.c
@@ -473,7 +473,7 @@ static inline struct rte_mbuf *bnxt_tpa_end(
 	return mbuf;
 }
 
-uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM] __rte_cache_aligned;
+alignas(RTE_CACHE_LINE_SIZE) uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM];
 
 static void __rte_cold
 bnxt_init_ptype_table(void)
-- 
1.8.3.1

[PATCH 06/83] net/bonding: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/bonding/rte_eth_bond_8023ad.h | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/net/bonding/rte_eth_bond_8023ad.h b/drivers/net/bonding/rte_eth_bond_8023ad.h
index 4c280c7..b2deb26 100644
--- a/drivers/net/bonding/rte_eth_bond_8023ad.h
+++ b/drivers/net/bonding/rte_eth_bond_8023ad.h
@@ -57,12 +57,12 @@ struct slow_protocol {
 } __rte_packed;
 
 /** Generic slow protocol frame type structure */
-struct slow_protocol_frame {
+struct __rte_aligned(2) slow_protocol_frame {
 	struct rte_ether_hdr eth_hdr;
 	struct slow_protocol slow_protocol;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct port_params {
+struct __rte_aligned(2) port_params {
 	uint16_t system_priority;
 	/**< System priority (unused in current implementation) */
 	struct rte_ether_addr system;
@@ -73,18 +73,18 @@ struct port_params {
 	/**< Priority of this (unused in current implementation) */
 	uint16_t port_number;
 	/**< Port number. It corresponds to member port id. */
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct lacpdu_actor_partner_params {
+struct __rte_aligned(2) lacpdu_actor_partner_params {
 	uint8_t tlv_type_info;
 	uint8_t info_length;
 	struct port_params port_params;
 	uint8_t state;
 	uint8_t reserved_3[3];
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /** LACPDU structure (5.4.2 in 802.1AX documentation). */
-struct lacpdu {
+struct __rte_aligned(2) lacpdu {
 	uint8_t subtype;
 	uint8_t version_number;
 
@@ -99,15 +99,15 @@ struct lacpdu {
 	uint8_t tlv_type_terminator;
 	uint8_t terminator_length;
 	uint8_t reserved_50[50];
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /** LACPDU frame: Contains ethernet header and LACPDU. */
-struct lacpdu_header {
+struct __rte_aligned(2) lacpdu_header {
 	struct rte_ether_hdr eth_hdr;
 	struct lacpdu lacpdu;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct marker {
+struct __rte_aligned(2) marker {
 	uint8_t subtype;
 	uint8_t version_number;
 
@@ -121,12 +121,12 @@ struct marker {
 	uint8_t tlv_type_terminator;
 	uint8_t terminator_length;
 	uint8_t reserved_90[90];
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct marker_header {
+struct __rte_aligned(2) marker_header {
 	struct rte_ether_hdr eth_hdr;
 	struct marker marker;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 struct rte_eth_bond_8023ad_conf {
 	uint32_t fast_periodic_ms;
-- 
1.8.3.1

[PATCH 07/83] net/cxgbe: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/cxgbe/base/adapter.h | 14 +++++++-------
 drivers/net/cxgbe/cxgbe_ofld.h   |  2 +-
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/cxgbe/base/adapter.h b/drivers/net/cxgbe/base/adapter.h
index 7bee5cf..d490c6f 100644
--- a/drivers/net/cxgbe/base/adapter.h
+++ b/drivers/net/cxgbe/base/adapter.h
@@ -155,12 +155,12 @@ struct sge_eth_rx_stats {	/* Ethernet rx queue statistics */
 	u64 rx_drops;		/* # of packets dropped due to no mem */
 };
 
-struct sge_eth_rxq {                /* a SW Ethernet Rx queue */
+struct __rte_cache_aligned sge_eth_rxq {                /* a SW Ethernet Rx queue */
 	unsigned int flags;         /* flags for state of the queue */
 	struct sge_rspq rspq;
 	struct sge_fl fl;
 	struct sge_eth_rx_stats stats;
-} __rte_cache_aligned;
+};
 
 /*
  * Currently there are two types of coalesce WR. Type 0 needs 48 bytes per
@@ -252,7 +252,7 @@ struct sge_eth_tx_stats {	/* Ethernet tx queue statistics */
 	u64 coal_pkts;          /* # of coalesced packets */
 };
 
-struct sge_eth_txq {                   /* state for an SGE Ethernet Tx queue */
+struct __rte_cache_aligned sge_eth_txq {                   /* state for an SGE Ethernet Tx queue */
 	struct sge_txq q;
 	struct rte_eth_dev *eth_dev;   /* port that this queue belongs to */
 	struct rte_eth_dev_data *data;
@@ -260,21 +260,21 @@ struct sge_eth_txq {                   /* state for an SGE Ethernet Tx queue */
 	rte_spinlock_t txq_lock;
 
 	unsigned int flags;            /* flags for state of the queue */
-} __rte_cache_aligned;
+};
 
-struct sge_ctrl_txq {                /* State for an SGE control Tx queue */
+struct __rte_cache_aligned sge_ctrl_txq {                /* State for an SGE control Tx queue */
 	struct sge_txq q;            /* txq */
 	struct adapter *adapter;     /* adapter associated with this queue */
 	rte_spinlock_t ctrlq_lock;   /* control queue lock */
 	u8 full;                     /* the Tx ring is full */
 	u64 txp;                     /* number of transmits */
 	struct rte_mempool *mb_pool; /* mempool to generate ctrl pkts */
-} __rte_cache_aligned;
+};
 
 struct sge {
 	struct sge_eth_txq *ethtxq;
 	struct sge_eth_rxq *ethrxq;
-	struct sge_rspq fw_evtq __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct sge_rspq fw_evtq;
 	struct sge_ctrl_txq ctrlq[MAX_CTRL_QUEUES];
 
 	u16 max_ethqsets;           /* # of available Ethernet queue sets */
diff --git a/drivers/net/cxgbe/cxgbe_ofld.h b/drivers/net/cxgbe/cxgbe_ofld.h
index 33697c7..7a4e30d 100644
--- a/drivers/net/cxgbe/cxgbe_ofld.h
+++ b/drivers/net/cxgbe/cxgbe_ofld.h
@@ -65,7 +65,7 @@ struct tid_info {
 	u32 hash_tids_in_use;
 	u32 conns_in_use;
 
-	rte_spinlock_t atid_lock __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) rte_spinlock_t atid_lock;
 	rte_spinlock_t ftid_lock;
 };
 
-- 
1.8.3.1

[PATCH 08/83] net/e1000: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/e1000/igb_rxtx.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c
index 5cafd6f..d61eaad 100644
--- a/drivers/net/e1000/igb_rxtx.c
+++ b/drivers/net/e1000/igb_rxtx.c
@@ -705,8 +705,8 @@ struct igb_tx_queue {
 static inline uint32_t
 igb_rxd_pkt_info_to_pkt_type(uint16_t pkt_info)
 {
-	static const uint32_t
-		ptype_table[IGB_PACKET_TYPE_MAX] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+		ptype_table[IGB_PACKET_TYPE_MAX] = {
 		[IGB_PACKET_TYPE_IPV4] = RTE_PTYPE_L2_ETHER |
 			RTE_PTYPE_L3_IPV4,
 		[IGB_PACKET_TYPE_IPV4_EXT] = RTE_PTYPE_L2_ETHER |
-- 
1.8.3.1

[PATCH 09/83] net/ena: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/ena/ena_ethdev.h | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ena/ena_ethdev.h b/drivers/net/ena/ena_ethdev.h
index 7513a3f..7d82d22 100644
--- a/drivers/net/ena/ena_ethdev.h
+++ b/drivers/net/ena/ena_ethdev.h
@@ -142,7 +142,7 @@ struct ena_stats_rx {
 	u64 bad_req_id;
 };
 
-struct ena_ring {
+struct __rte_cache_aligned ena_ring {
 	u16 next_to_use;
 	u16 next_to_clean;
 	uint64_t last_cleanup_ticks;
@@ -175,8 +175,7 @@ struct ena_ring {
 		uint16_t rx_free_thresh;
 	};
 
-	struct ena_com_rx_buf_info ena_bufs[ENA_PKT_MAX_BUFS]
-						__rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct ena_com_rx_buf_info ena_bufs[ENA_PKT_MAX_BUFS];
 
 	struct rte_mempool *mb_pool;
 	unsigned int port_id;
@@ -201,7 +200,7 @@ struct ena_ring {
 	unsigned int numa_socket_id;
 
 	uint32_t missing_tx_completion_threshold;
-} __rte_cache_aligned;
+};
 
 enum ena_adapter_state {
 	ENA_ADAPTER_STATE_FREE    = 0,
@@ -288,15 +287,15 @@ struct ena_adapter {
 	/* OS defined structs */
 	struct rte_eth_dev_data *edev_data;
 
-	struct ena_com_dev ena_dev __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct ena_com_dev ena_dev;
 
 	/* TX */
-	struct ena_ring tx_ring[ENA_MAX_NUM_QUEUES] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct ena_ring tx_ring[ENA_MAX_NUM_QUEUES];
 	u32 max_tx_ring_size;
 	u16 max_tx_sgl_size;
 
 	/* RX */
-	struct ena_ring rx_ring[ENA_MAX_NUM_QUEUES] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct ena_ring rx_ring[ENA_MAX_NUM_QUEUES];
 	u32 max_rx_ring_size;
 	u16 max_rx_sgl_size;
 
@@ -357,9 +356,9 @@ struct ena_adapter {
 	 * Helper variables for holding the information about the supported
 	 * metrics.
 	 */
-	uint64_t metrics_stats[ENA_MAX_CUSTOMER_METRICS] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t metrics_stats[ENA_MAX_CUSTOMER_METRICS];
 	uint16_t metrics_num;
-	struct ena_stats_srd srd_stats __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct ena_stats_srd srd_stats;
 };
 
 int ena_mp_indirect_table_set(struct ena_adapter *adapter);
-- 
1.8.3.1

[PATCH 10/83] net/enic: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/enic/enic_rxtx_common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/enic/enic_rxtx_common.h b/drivers/net/enic/enic_rxtx_common.h
index 9d6d347..c55eea4 100644
--- a/drivers/net/enic/enic_rxtx_common.h
+++ b/drivers/net/enic/enic_rxtx_common.h
@@ -114,7 +114,7 @@
 	 * Also, as there is no tunnel type info (VXLAN, NVGRE, or GENEVE), set
 	 * RTE_PTYPE_TUNNEL_GRENAT..
 	 */
-	static const uint32_t cq_type_table[128] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t cq_type_table[128] = {
 		[0x00] = RTE_PTYPE_UNKNOWN,
 		[0x01] = RTE_PTYPE_UNKNOWN |
 			 RTE_PTYPE_TUNNEL_GRENAT |
-- 
1.8.3.1

[PATCH 11/83] net/fm10k: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/fm10k/fm10k_rxtx.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/net/fm10k/fm10k_rxtx.c b/drivers/net/fm10k/fm10k_rxtx.c
index c0841ab..690142b 100644
--- a/drivers/net/fm10k/fm10k_rxtx.c
+++ b/drivers/net/fm10k/fm10k_rxtx.c
@@ -53,9 +53,8 @@ static inline void dump_rxd(union fm10k_rx_desc *rxd)
 static inline void
 rx_desc_to_ol_flags(struct rte_mbuf *m, const union fm10k_rx_desc *d)
 {
-	static const uint32_t
-		ptype_table[FM10K_RXD_PKTTYPE_MASK >> FM10K_RXD_PKTTYPE_SHIFT]
-			__rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+		ptype_table[FM10K_RXD_PKTTYPE_MASK >> FM10K_RXD_PKTTYPE_SHIFT] = {
 		[FM10K_PKTTYPE_OTHER] = RTE_PTYPE_L2_ETHER,
 		[FM10K_PKTTYPE_IPV4] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4,
 		[FM10K_PKTTYPE_IPV4_EX] = RTE_PTYPE_L2_ETHER |
-- 
1.8.3.1

[PATCH 12/83] net/hinic: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/hinic/hinic_pmd_rx.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/hinic/hinic_pmd_rx.h b/drivers/net/hinic/hinic_pmd_rx.h
index 5c30339..2dde3ec 100644
--- a/drivers/net/hinic/hinic_pmd_rx.h
+++ b/drivers/net/hinic/hinic_pmd_rx.h
@@ -28,18 +28,18 @@ struct hinic_rq_ctrl {
 	u32	ctrl_fmt;
 };
 
+#if defined(RTE_ARCH_ARM64)
+struct __rte_cache_aligned hinic_rq_cqe {
+#else
 struct hinic_rq_cqe {
+#endif
 	u32 status;
 	u32 vlan_len;
 	u32 offload_type;
 	u32 rss_hash;
 
 	u32 rsvd[4];
-#if defined(RTE_ARCH_ARM64)
-} __rte_cache_aligned;
-#else
 };
-#endif
 
 struct hinic_rq_cqe_sect {
 	struct hinic_sge	sge;
-- 
1.8.3.1

[PATCH 13/83] net/hns3: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/hns3/hns3_ethdev.h | 4 ++--
 drivers/net/hns3/hns3_fdir.c   | 4 ++--
 drivers/net/hns3/hns3_rxtx.h   | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index e70c5ff..a4bc62a 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -767,7 +767,7 @@ struct hns3_ptype_table {
 	 * descriptor, it functions only when firmware report the capability of
 	 * HNS3_CAPS_RXD_ADV_LAYOUT_B and driver enabled it.
 	 */
-	uint32_t ptype[HNS3_PTYPE_NUM] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t ptype[HNS3_PTYPE_NUM];
 };
 
 #define HNS3_FIXED_MAX_TQP_NUM_MODE		0
@@ -872,7 +872,7 @@ struct hns3_adapter {
 	uint64_t dev_caps_mask;
 	uint16_t mbx_time_limit_ms; /* wait time for mbx message */
 
-	struct hns3_ptype_table ptype_tbl __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct hns3_ptype_table ptype_tbl;
 };
 
 enum hns3_dev_cap {
diff --git a/drivers/net/hns3/hns3_fdir.c b/drivers/net/hns3/hns3_fdir.c
index d100e58..4843066 100644
--- a/drivers/net/hns3/hns3_fdir.c
+++ b/drivers/net/hns3/hns3_fdir.c
@@ -724,8 +724,8 @@ static int hns3_config_key(struct hns3_adapter *hns,
 	struct hns3_fd_key_cfg *key_cfg;
 	uint8_t *cur_key_x;
 	uint8_t *cur_key_y;
-	uint8_t key_x[MAX_KEY_BYTES] __rte_aligned(4);
-	uint8_t key_y[MAX_KEY_BYTES] __rte_aligned(4);
+	alignas(4) uint8_t key_x[MAX_KEY_BYTES];
+	alignas(4) uint8_t key_y[MAX_KEY_BYTES];
 	uint8_t vf_id = rule->vf_id;
 	uint8_t meta_data_region;
 	uint8_t tuple_size;
diff --git a/drivers/net/hns3/hns3_rxtx.h b/drivers/net/hns3/hns3_rxtx.h
index e2ad42b..e975cd1 100644
--- a/drivers/net/hns3/hns3_rxtx.h
+++ b/drivers/net/hns3/hns3_rxtx.h
@@ -366,7 +366,7 @@ struct hns3_rx_queue {
 	 * The following fields are not accessed in the I/O path, so they are
 	 * placed at the end.
 	 */
-	void *io_base __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *io_base;
 	struct hns3_adapter *hns;
 	uint64_t rx_ring_phys_addr; /* RX ring DMA address */
 	const struct rte_memzone *mz;
@@ -540,7 +540,7 @@ struct hns3_tx_queue {
 	 * The following fields are not accessed in the I/O path, so they are
 	 * placed at the end.
 	 */
-	void *io_base __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *io_base;
 	struct hns3_adapter *hns;
 	uint64_t tx_ring_phys_addr; /* TX ring DMA address */
 	const struct rte_memzone *mz;
-- 
1.8.3.1

[PATCH 14/83] net/i40e: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/i40e/i40e_ethdev.h | 4 ++--
 drivers/net/i40e/i40e_rxtx.h   | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index b9628ca..31fc926 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -1261,9 +1261,9 @@ struct i40e_adapter {
 	struct rte_timecounter tx_tstamp_tc;
 
 	/* ptype mapping table */
-	uint32_t ptype_tbl[I40E_MAX_PKT_TYPE] __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) uint32_t ptype_tbl[I40E_MAX_PKT_TYPE];
 	/* flow type to pctype mapping table */
-	uint64_t pctypes_tbl[I40E_FLOW_TYPE_MAX] __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) uint64_t pctypes_tbl[I40E_FLOW_TYPE_MAX];
 	uint64_t flow_types_mask;
 	uint64_t pctypes_mask;
 
diff --git a/drivers/net/i40e/i40e_rxtx.h b/drivers/net/i40e/i40e_rxtx.h
index 70320cf..2f2f890 100644
--- a/drivers/net/i40e/i40e_rxtx.h
+++ b/drivers/net/i40e/i40e_rxtx.h
@@ -279,7 +279,7 @@ uint16_t i40e_xmit_pkts_vec_avx512(void *tx_queue,
 static inline uint32_t
 i40e_get_default_pkt_type(uint8_t ptype)
 {
-	static const uint32_t type_table[UINT8_MAX + 1] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t type_table[UINT8_MAX + 1] = {
 		/* L2 types */
 		/* [0] reserved */
 		[1] = RTE_PTYPE_L2_ETHER,
-- 
1.8.3.1

[PATCH 15/83] net/iavf: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/iavf/iavf.h      | 2 +-
 drivers/net/iavf/iavf_rxtx.c | 3 +--
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/net/iavf/iavf.h b/drivers/net/iavf/iavf.h
index 824ae4a..7ab41c9 100644
--- a/drivers/net/iavf/iavf.h
+++ b/drivers/net/iavf/iavf.h
@@ -375,7 +375,7 @@ struct iavf_adapter {
 	/* For vector PMD */
 	bool rx_vec_allowed;
 	bool tx_vec_allowed;
-	uint32_t ptype_tbl[IAVF_MAX_PKT_TYPE] __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) uint32_t ptype_tbl[IAVF_MAX_PKT_TYPE];
 	bool stopped;
 	bool closed;
 	bool no_poll;
diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
index 0a5246d..59a0b9e 100644
--- a/drivers/net/iavf/iavf_rxtx.c
+++ b/drivers/net/iavf/iavf_rxtx.c
@@ -4449,8 +4449,7 @@ struct iavf_tx_context_desc_qws {
 static inline uint32_t
 iavf_get_default_ptype(uint16_t ptype)
 {
-	static const uint32_t ptype_tbl[IAVF_MAX_PKT_TYPE]
-		__rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t ptype_tbl[IAVF_MAX_PKT_TYPE] = {
 		/* L2 types */
 		/* [0] reserved */
 		[1] = RTE_PTYPE_L2_ETHER,
-- 
1.8.3.1

[PATCH 16/83] net/ice: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/ice/ice_ethdev.h | 2 +-
 drivers/net/ice/ice_rxtx.c   | 3 +--
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h
index 1a848b3..984479a 100644
--- a/drivers/net/ice/ice_ethdev.h
+++ b/drivers/net/ice/ice_ethdev.h
@@ -605,7 +605,7 @@ struct ice_adapter {
 	bool tx_vec_allowed;
 	bool tx_simple_allowed;
 	/* ptype mapping table */
-	uint32_t ptype_tbl[ICE_MAX_PKT_TYPE] __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) uint32_t ptype_tbl[ICE_MAX_PKT_TYPE];
 	bool is_safe_mode;
 	struct ice_devargs devargs;
 	enum ice_pkg_type active_pkg_type; /* loaded ddp package type */
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index 13aabe9..95a2db3 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -4013,8 +4013,7 @@
 static inline uint32_t
 ice_get_default_pkt_type(uint16_t ptype)
 {
-	static const uint32_t type_table[ICE_MAX_PKT_TYPE]
-		__rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t type_table[ICE_MAX_PKT_TYPE] = {
 		/* L2 types */
 		/* [0] reserved */
 		[1] = RTE_PTYPE_L2_ETHER,
-- 
1.8.3.1

[PATCH 17/83] net/igc: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/igc/igc_txrx.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/igc/igc_txrx.c b/drivers/net/igc/igc_txrx.c
index 5c60e3e..d0cee1b 100644
--- a/drivers/net/igc/igc_txrx.c
+++ b/drivers/net/igc/igc_txrx.c
@@ -148,8 +148,8 @@
 static inline uint32_t
 rx_desc_pkt_info_to_pkt_type(uint32_t pkt_info)
 {
-	static const uint32_t
-		ptype_table[IGC_PACKET_TYPE_MAX] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+		ptype_table[IGC_PACKET_TYPE_MAX] = {
 		[IGC_PACKET_TYPE_IPV4] = RTE_PTYPE_L2_ETHER |
 			RTE_PTYPE_L3_IPV4,
 		[IGC_PACKET_TYPE_IPV4_EXT] = RTE_PTYPE_L2_ETHER |
-- 
1.8.3.1

[PATCH 18/83] net/ionic: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/ionic/ionic_lif.h  | 2 +-
 drivers/net/ionic/ionic_rxtx.c | 6 ++----
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h
index 591cf1a..f4a1b99 100644
--- a/drivers/net/ionic/ionic_lif.h
+++ b/drivers/net/ionic/ionic_lif.h
@@ -98,7 +98,7 @@ struct ionic_rx_qcq {
 	struct ionic_rx_stats stats;
 
 	/* cacheline4+ */
-	struct rte_mbuf *mbs[IONIC_MBUF_BULK_ALLOC] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *mbs[IONIC_MBUF_BULK_ALLOC];
 
 	struct ionic_admin_ctx admin_ctx;
 };
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index f0bd3ff..923f517 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -607,8 +607,7 @@
 }
 
 #define IONIC_CSUM_FLAG_MASK (IONIC_RXQ_COMP_CSUM_F_VLAN - 1)
-const uint64_t ionic_csum_flags[IONIC_CSUM_FLAG_MASK]
-		__rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) uint64_t ionic_csum_flags[IONIC_CSUM_FLAG_MASK] = {
 	/* IP_BAD set */
 	[IONIC_RXQ_COMP_CSUM_F_IP_BAD] = RTE_MBUF_F_RX_IP_CKSUM_BAD,
 	[IONIC_RXQ_COMP_CSUM_F_IP_BAD | IONIC_RXQ_COMP_CSUM_F_TCP_OK] =
@@ -637,8 +636,7 @@
 };
 
 /* RTE_PTYPE_UNKNOWN is 0x0 */
-const uint32_t ionic_ptype_table[IONIC_RXQ_COMP_PKT_TYPE_MASK]
-		__rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) uint32_t ionic_ptype_table[IONIC_RXQ_COMP_PKT_TYPE_MASK] = {
 	[IONIC_PKT_TYPE_NON_IP]   = RTE_PTYPE_UNKNOWN,
 	[IONIC_PKT_TYPE_IPV4]     = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4,
 	[IONIC_PKT_TYPE_IPV4_TCP] =
-- 
1.8.3.1

[PATCH 19/83] net/ixgbe: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/ixgbe/ixgbe_ipsec.h |  4 ++--
 drivers/net/ixgbe/ixgbe_rxtx.c  | 10 +++++-----
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_ipsec.h b/drivers/net/ixgbe/ixgbe_ipsec.h
index e218c0a..be39199 100644
--- a/drivers/net/ixgbe/ixgbe_ipsec.h
+++ b/drivers/net/ixgbe/ixgbe_ipsec.h
@@ -60,7 +60,7 @@ struct ipaddr {
 };
 
 /** inline crypto crypto private session structure */
-struct ixgbe_crypto_session {
+struct __rte_cache_aligned ixgbe_crypto_session {
 	enum ixgbe_operation op;
 	const uint8_t *key;
 	uint32_t key_len;
@@ -70,7 +70,7 @@ struct ixgbe_crypto_session {
 	struct ipaddr src_ip;
 	struct ipaddr dst_ip;
 	struct rte_eth_dev *dev;
-} __rte_cache_aligned;
+};
 
 struct ixgbe_crypto_rx_ip_table {
 	struct ipaddr ip;
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index f6c17d4..3d39eaa 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -1101,8 +1101,8 @@
  * Use 2 different table for normal packet and tunnel packet
  * to save the space.
  */
-const uint32_t
-	ptype_table[IXGBE_PACKET_TYPE_MAX] __rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+	ptype_table[IXGBE_PACKET_TYPE_MAX] = {
 	[IXGBE_PACKET_TYPE_ETHER] = RTE_PTYPE_L2_ETHER,
 	[IXGBE_PACKET_TYPE_IPV4] = RTE_PTYPE_L2_ETHER |
 		RTE_PTYPE_L3_IPV4,
@@ -1187,8 +1187,8 @@
 		RTE_PTYPE_INNER_L3_IPV6_EXT | RTE_PTYPE_INNER_L4_SCTP,
 };
 
-const uint32_t
-	ptype_table_tn[IXGBE_PACKET_TYPE_TN_MAX] __rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+	ptype_table_tn[IXGBE_PACKET_TYPE_TN_MAX] = {
 	[IXGBE_PACKET_TYPE_NVGRE] = RTE_PTYPE_L2_ETHER |
 		RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_TUNNEL_GRE |
 		RTE_PTYPE_INNER_L2_ETHER,
@@ -1429,7 +1429,7 @@
 static inline uint64_t
 ixgbe_rxd_pkt_info_to_pkt_flags(uint16_t pkt_info)
 {
-	static uint64_t ip_rss_types_map[16] __rte_cache_aligned = {
+	static alignas(RTE_CACHE_LINE_SIZE) uint64_t ip_rss_types_map[16] = {
 		0, RTE_MBUF_F_RX_RSS_HASH, RTE_MBUF_F_RX_RSS_HASH, RTE_MBUF_F_RX_RSS_HASH,
 		0, RTE_MBUF_F_RX_RSS_HASH, 0, RTE_MBUF_F_RX_RSS_HASH,
 		RTE_MBUF_F_RX_RSS_HASH, 0, 0, 0,
-- 
1.8.3.1

[PATCH 20/83] net/memif: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/memif/memif.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/memif/memif.h b/drivers/net/memif/memif.h
index cb72c69..f5a4693 100644
--- a/drivers/net/memif/memif.h
+++ b/drivers/net/memif/memif.h
@@ -162,7 +162,7 @@ typedef struct __rte_packed __rte_aligned(128)
 } memif_desc_t;
 
 #define MEMIF_CACHELINE_ALIGN_MARK(mark) \
-	RTE_MARKER mark __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) RTE_MARKER mark;
 
 typedef struct {
 	MEMIF_CACHELINE_ALIGN_MARK(cacheline0);
-- 
1.8.3.1

[PATCH 21/83] net/mlx5: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/mlx5/hws/mlx5dr_send.h |  4 ++--
 drivers/net/mlx5/mlx5.h            |  6 +++---
 drivers/net/mlx5/mlx5_flow.h       |  4 ++--
 drivers/net/mlx5/mlx5_hws_cnt.h    | 14 +++++++-------
 drivers/net/mlx5/mlx5_rx.h         |  4 ++--
 drivers/net/mlx5/mlx5_rxtx.c       |  6 +++---
 drivers/net/mlx5/mlx5_tx.h         | 10 +++++-----
 drivers/net/mlx5/mlx5_utils.h      |  2 +-
 8 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_send.h b/drivers/net/mlx5/hws/mlx5dr_send.h
index c4eaea5..0c67a9e 100644
--- a/drivers/net/mlx5/hws/mlx5dr_send.h
+++ b/drivers/net/mlx5/hws/mlx5dr_send.h
@@ -144,7 +144,7 @@ struct mlx5dr_completed_poll {
 	uint16_t mask;
 };
 
-struct mlx5dr_send_engine {
+struct __rte_cache_aligned mlx5dr_send_engine {
 	struct mlx5dr_send_ring send_ring[MLX5DR_NUM_SEND_RINGS]; /* For now 1:1 mapping */
 	struct mlx5dv_devx_uar *uar; /* Uar is shared between rings of a queue */
 	struct mlx5dr_completed_poll completed;
@@ -153,7 +153,7 @@ struct mlx5dr_send_engine {
 	uint16_t rings;
 	uint16_t num_entries;
 	bool err;
-} __rte_cache_aligned;
+};
 
 struct mlx5dr_send_engine_post_ctrl {
 	struct mlx5dr_send_engine *queue;
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 0091a24..3646d20 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -415,7 +415,7 @@ struct mlx5_hw_q_job {
 };
 
 /* HW steering job descriptor LIFO pool. */
-struct mlx5_hw_q {
+struct __rte_cache_aligned mlx5_hw_q {
 	uint32_t job_idx; /* Free job index. */
 	uint32_t size; /* Job LIFO queue size. */
 	uint32_t ongoing_flow_ops; /* Number of ongoing flow operations. */
@@ -424,7 +424,7 @@ struct mlx5_hw_q {
 	struct rte_ring *indir_iq; /* Indirect action SW in progress queue. */
 	struct rte_ring *flow_transfer_pending;
 	struct rte_ring *flow_transfer_completed;
-} __rte_cache_aligned;
+};
 
 
 #define MLX5_COUNTER_POOLS_MAX_NUM (1 << 15)
@@ -1405,7 +1405,7 @@ struct mlx5_hws_cnt_svc_mng {
 	uint32_t query_interval;
 	rte_thread_t service_thread;
 	uint8_t svc_running;
-	struct mlx5_hws_aso_mng aso_mng __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct mlx5_hws_aso_mng aso_mng;
 };
 
 #define MLX5_FLOW_HW_TAGS_MAX 12
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 34b5e0f..4b4b6f2 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1654,9 +1654,9 @@ struct mlx5_matcher_info {
 	RTE_ATOMIC(uint32_t) refcnt;
 };
 
-struct mlx5_dr_rule_action_container {
+struct __rte_cache_aligned mlx5_dr_rule_action_container {
 	struct mlx5dr_rule_action acts[MLX5_HW_MAX_ACTS];
-} __rte_cache_aligned;
+};
 
 struct rte_flow_template_table {
 	LIST_ENTRY(rte_flow_template_table) next;
diff --git a/drivers/net/mlx5/mlx5_hws_cnt.h b/drivers/net/mlx5/mlx5_hws_cnt.h
index e005960..1cb0564 100644
--- a/drivers/net/mlx5/mlx5_hws_cnt.h
+++ b/drivers/net/mlx5/mlx5_hws_cnt.h
@@ -97,11 +97,11 @@ struct mlx5_hws_cnt_pool_caches {
 	struct rte_ring *qcache[];
 };
 
-struct mlx5_hws_cnt_pool {
+struct __rte_cache_aligned mlx5_hws_cnt_pool {
 	LIST_ENTRY(mlx5_hws_cnt_pool) next;
-	struct mlx5_hws_cnt_pool_cfg cfg __rte_cache_aligned;
-	struct mlx5_hws_cnt_dcs_mng dcs_mng __rte_cache_aligned;
-	uint32_t query_gen __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct mlx5_hws_cnt_pool_cfg cfg;
+	alignas(RTE_CACHE_LINE_SIZE) struct mlx5_hws_cnt_dcs_mng dcs_mng;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t query_gen;
 	struct mlx5_hws_cnt *pool;
 	struct mlx5_hws_cnt_raw_data_mng *raw_mng;
 	struct rte_ring *reuse_list;
@@ -110,7 +110,7 @@ struct mlx5_hws_cnt_pool {
 	struct mlx5_hws_cnt_pool_caches *cache;
 	uint64_t time_of_last_age_check;
 	struct mlx5_priv *priv;
-} __rte_cache_aligned;
+};
 
 /* HWS AGE status. */
 enum {
@@ -133,7 +133,7 @@ enum {
 };
 
 /* HWS counter age parameter. */
-struct mlx5_hws_age_param {
+struct __rte_cache_aligned mlx5_hws_age_param {
 	uint32_t timeout; /* Aging timeout in seconds (atomically accessed). */
 	uint32_t sec_since_last_hit;
 	/* Time in seconds since last hit (atomically accessed). */
@@ -149,7 +149,7 @@ struct mlx5_hws_age_param {
 	cnt_id_t own_cnt_index;
 	/* Counter action created specifically for this AGE action. */
 	void *context; /* Flow AGE context. */
-} __rte_packed __rte_cache_aligned;
+} __rte_packed;
 
 
 /**
diff --git a/drivers/net/mlx5/mlx5_rx.h b/drivers/net/mlx5/mlx5_rx.h
index 2fce908..fb4d8e6 100644
--- a/drivers/net/mlx5/mlx5_rx.h
+++ b/drivers/net/mlx5/mlx5_rx.h
@@ -79,7 +79,7 @@ struct mlx5_eth_rxseg {
 };
 
 /* RX queue descriptor. */
-struct mlx5_rxq_data {
+struct __rte_cache_aligned mlx5_rxq_data {
 	unsigned int csum:1; /* Enable checksum offloading. */
 	unsigned int hw_timestamp:1; /* Enable HW timestamp. */
 	unsigned int rt_timestamp:1; /* Realtime timestamp format. */
@@ -146,7 +146,7 @@ struct mlx5_rxq_data {
 	uint32_t rxseg_n; /* Number of split segment descriptions. */
 	struct mlx5_eth_rxseg rxseg[MLX5_MAX_RXQ_NSEG];
 	/* Buffer split segment descriptions - sizes, offsets, pools. */
-} __rte_cache_aligned;
+};
 
 /* RX queue control descriptor. */
 struct mlx5_rxq_ctrl {
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 54d410b..d3d4470 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -77,12 +77,12 @@
 static_assert(MLX5_WQE_SIZE == 4 * MLX5_WSEG_SIZE,
 		"invalid WQE size");
 
-uint32_t mlx5_ptype_table[] __rte_cache_aligned = {
+alignas(RTE_CACHE_LINE_SIZE) uint32_t mlx5_ptype_table[] = {
 	[0xff] = RTE_PTYPE_ALL_MASK, /* Last entry for errored packet. */
 };
 
-uint8_t mlx5_cksum_table[1 << 10] __rte_cache_aligned;
-uint8_t mlx5_swp_types_table[1 << 10] __rte_cache_aligned;
+alignas(RTE_CACHE_LINE_SIZE) uint8_t mlx5_cksum_table[1 << 10];
+alignas(RTE_CACHE_LINE_SIZE) uint8_t mlx5_swp_types_table[1 << 10];
 
 uint64_t rte_net_mlx5_dynf_inline_mask;
 
diff --git a/drivers/net/mlx5/mlx5_tx.h b/drivers/net/mlx5/mlx5_tx.h
index b1e8ea1..107d7ab 100644
--- a/drivers/net/mlx5/mlx5_tx.h
+++ b/drivers/net/mlx5/mlx5_tx.h
@@ -83,9 +83,9 @@ enum mlx5_txcmp_code {
 extern uint64_t rte_net_mlx5_dynf_inline_mask;
 #define RTE_MBUF_F_TX_DYNF_NOINLINE rte_net_mlx5_dynf_inline_mask
 
-extern uint32_t mlx5_ptype_table[] __rte_cache_aligned;
-extern uint8_t mlx5_cksum_table[1 << 10] __rte_cache_aligned;
-extern uint8_t mlx5_swp_types_table[1 << 10] __rte_cache_aligned;
+extern alignas(RTE_CACHE_LINE_SIZE) uint32_t mlx5_ptype_table[];
+extern alignas(RTE_CACHE_LINE_SIZE) uint8_t mlx5_cksum_table[1 << 10];
+extern alignas(RTE_CACHE_LINE_SIZE) uint8_t mlx5_swp_types_table[1 << 10];
 
 struct mlx5_txq_stats {
 #ifdef MLX5_PMD_SOFT_COUNTERS
@@ -112,7 +112,7 @@ struct mlx5_txq_local {
 
 /* TX queue descriptor. */
 __extension__
-struct mlx5_txq_data {
+struct __rte_cache_aligned mlx5_txq_data {
 	uint16_t elts_head; /* Current counter in (*elts)[]. */
 	uint16_t elts_tail; /* Counter of first element awaiting completion. */
 	uint16_t elts_comp; /* elts index since last completion request. */
@@ -173,7 +173,7 @@ struct mlx5_txq_data {
 	struct mlx5_uar_data uar_data;
 	struct rte_mbuf *elts[];
 	/* Storage for queued packets, must be the last field. */
-} __rte_cache_aligned;
+};
 
 /* TX queue control descriptor. */
 __extension__
diff --git a/drivers/net/mlx5/mlx5_utils.h b/drivers/net/mlx5/mlx5_utils.h
index f3c0d76..b51d977 100644
--- a/drivers/net/mlx5/mlx5_utils.h
+++ b/drivers/net/mlx5/mlx5_utils.h
@@ -235,7 +235,7 @@ struct mlx5_indexed_trunk {
 	uint32_t next; /* Next free trunk in free list. */
 	uint32_t free; /* Free entries available */
 	struct rte_bitmap *bmp;
-	uint8_t data[] __rte_cache_aligned; /* Entry data start. */
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t data[]; /* Entry data start. */
 };
 
 struct mlx5_indexed_cache {
-- 
1.8.3.1

[PATCH 22/83] net/mlx4: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/mlx4/mlx4_rxtx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/mlx4/mlx4_rxtx.c b/drivers/net/mlx4/mlx4_rxtx.c
index 059e432..947cae4 100644
--- a/drivers/net/mlx4/mlx4_rxtx.c
+++ b/drivers/net/mlx4/mlx4_rxtx.c
@@ -62,7 +62,7 @@ struct tso_info {
 };
 
 /** A table to translate Rx completion flags to packet type. */
-uint32_t mlx4_ptype_table[0x100] __rte_cache_aligned = {
+alignas(RTE_CACHE_LINE_SIZE) uint32_t mlx4_ptype_table[0x100] = {
 	/*
 	 * The index to the array should have:
 	 *  bit[7] - MLX4_CQE_L2_TUNNEL
-- 
1.8.3.1

[PATCH 23/83] net/mvpp2: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/mvpp2/mrvl_ethdev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h
index 3b69a6e..178b510 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.h
+++ b/drivers/net/mvpp2/mrvl_ethdev.h
@@ -147,10 +147,10 @@ struct mrvl_priv {
 	uint16_t bpool_init_size; /**< Configured BPool size  */
 
 	/** Mapping for DPDK rx queue->(TC, MRVL relative inq) */
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint8_t tc;  /**< Traffic Class */
 		uint8_t inq; /**< Relative in-queue number */
-	} rxq_map[MRVL_PP2_RXQ_MAX] __rte_cache_aligned;
+	} rxq_map[MRVL_PP2_RXQ_MAX];
 
 	/* Configuration data, used sporadically. */
 	uint8_t pp_id;
-- 
1.8.3.1

[PATCH 24/83] net/netvsc: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/netvsc/hn_var.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/netvsc/hn_var.h b/drivers/net/netvsc/hn_var.h
index ba86129..0f638bc 100644
--- a/drivers/net/netvsc/hn_var.h
+++ b/drivers/net/netvsc/hn_var.h
@@ -94,12 +94,12 @@ struct hn_rx_queue {
 
 
 /* multi-packet data from host */
-struct hn_rx_bufinfo {
+struct __rte_cache_aligned hn_rx_bufinfo {
 	struct vmbus_channel *chan;
 	struct hn_rx_queue *rxq;
 	uint64_t	xactid;
 	struct rte_mbuf_ext_shared_info shinfo;
-} __rte_cache_aligned;
+};
 
 #define HN_INVALID_PORT	UINT16_MAX
 
-- 
1.8.3.1

[PATCH 25/83] net/nfp: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/nfp/flower/nfp_flower_flow.c | 4 ++--
 drivers/net/nfp/nfp_ipsec.h              | 4 ++--
 drivers/net/nfp/nfp_rxtx.h               | 8 ++++----
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/nfp/flower/nfp_flower_flow.c b/drivers/net/nfp/flower/nfp_flower_flow.c
index 086cc80..26ee920 100644
--- a/drivers/net/nfp/flower/nfp_flower_flow.c
+++ b/drivers/net/nfp/flower/nfp_flower_flow.c
@@ -141,11 +141,11 @@ struct nfp_mask_id_entry {
 	uint8_t mask_id;
 };
 
-struct nfp_pre_tun_entry {
+struct __rte_aligned(32) nfp_pre_tun_entry {
 	uint16_t mac_index;
 	uint16_t ref_cnt;
 	struct rte_ether_addr mac_addr;
-} __rte_aligned(32);
+};
 
 static inline struct nfp_flow_priv *
 nfp_flow_dev_to_priv(struct rte_eth_dev *dev)
diff --git a/drivers/net/nfp/nfp_ipsec.h b/drivers/net/nfp/nfp_ipsec.h
index 8fdb7fd..29ca27d 100644
--- a/drivers/net/nfp/nfp_ipsec.h
+++ b/drivers/net/nfp/nfp_ipsec.h
@@ -142,7 +142,7 @@ struct nfp_ipsec_msg {
 	};
 };
 
-struct nfp_ipsec_session {
+struct __rte_cache_aligned nfp_ipsec_session {
 	/** Opaque user defined data */
 	void *user_data;
 	/** NFP sa_entries database parameter index */
@@ -155,7 +155,7 @@ struct nfp_ipsec_session {
 	struct rte_security_ipsec_xform ipsec;
 	/** Security session action type */
 	enum rte_security_session_action_type action;
-} __rte_cache_aligned;
+};
 
 struct nfp_net_ipsec_data {
 	int pkt_dynfield_offset;
diff --git a/drivers/net/nfp/nfp_rxtx.h b/drivers/net/nfp/nfp_rxtx.h
index 6ecabc2..344005e 100644
--- a/drivers/net/nfp/nfp_rxtx.h
+++ b/drivers/net/nfp/nfp_rxtx.h
@@ -27,7 +27,7 @@ struct nfp_tx_ipsec_desc_msg {
 	} esn;                  /**< Extended Sequence Number */
 };
 
-struct nfp_net_txq {
+struct __rte_aligned(64) nfp_net_txq {
 	/** Backpointer to nfp_net structure */
 	struct nfp_net_hw *hw;
 
@@ -77,7 +77,7 @@ struct nfp_net_txq {
 	 * in a cache line.
 	 */
 	uint64_t dma;
-} __rte_aligned(64);
+};
 
 /* RX and freelist descriptor format */
 #define PCIE_DESC_RX_DD                 (1 << 7)
@@ -129,7 +129,7 @@ struct nfp_net_rx_desc {
 	};
 };
 
-struct nfp_net_rxq {
+struct __rte_aligned(64) nfp_net_rxq {
 	/** Backpointer to nfp_net structure */
 	struct nfp_net_hw *hw;
 
@@ -197,7 +197,7 @@ struct nfp_net_rxq {
 
 	/** DMA address of the queue */
 	uint64_t dma;
-} __rte_aligned(64);
+};
 
 static inline void
 nfp_net_mbuf_alloc_failed(struct nfp_net_rxq *rxq)
-- 
1.8.3.1

[PATCH 26/83] net/ngbe: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/ngbe/ngbe_ptypes.c | 2 +-
 drivers/net/ngbe/ngbe_rxtx.c   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ngbe/ngbe_ptypes.c b/drivers/net/ngbe/ngbe_ptypes.c
index d823982..d633dbc 100644
--- a/drivers/net/ngbe/ngbe_ptypes.c
+++ b/drivers/net/ngbe/ngbe_ptypes.c
@@ -36,7 +36,7 @@
 #define RTE_PTYPE_INNER_L3_NONE         0
 #define RTE_PTYPE_INNER_L4_NONE         0
 
-static u32 ngbe_ptype_lookup[NGBE_PTID_MAX] __rte_cache_aligned = {
+static alignas(RTE_CACHE_LINE_SIZE) u32 ngbe_ptype_lookup[NGBE_PTID_MAX] = {
 	/* L2:0-3 L3:4-7 L4:8-11 TUN:12-15 EL2:16-19 EL3:20-23 EL2:24-27 */
 	/* L2: ETH */
 	TPTE(0x10, ETHER,          NONE, NONE, NONE, NONE, NONE, NONE),
diff --git a/drivers/net/ngbe/ngbe_rxtx.c b/drivers/net/ngbe/ngbe_rxtx.c
index 8a873b8..4aea70b 100644
--- a/drivers/net/ngbe/ngbe_rxtx.c
+++ b/drivers/net/ngbe/ngbe_rxtx.c
@@ -872,7 +872,7 @@
 static inline uint64_t
 ngbe_rxd_pkt_info_to_pkt_flags(uint32_t pkt_info)
 {
-	static uint64_t ip_rss_types_map[16] __rte_cache_aligned = {
+	static alignas(RTE_CACHE_LINE_SIZE) uint64_t ip_rss_types_map[16] = {
 		0, RTE_MBUF_F_RX_RSS_HASH, RTE_MBUF_F_RX_RSS_HASH, RTE_MBUF_F_RX_RSS_HASH,
 		0, RTE_MBUF_F_RX_RSS_HASH, 0, RTE_MBUF_F_RX_RSS_HASH,
 		RTE_MBUF_F_RX_RSS_HASH, 0, 0, 0,
-- 
1.8.3.1

[PATCH 27/83] net/octeontx: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/octeontx/octeontx_ethdev.c |  4 ++--
 drivers/net/octeontx/octeontx_ethdev.h | 12 ++++++------
 drivers/net/octeontx/octeontx_rxtx.h   |  2 +-
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/net/octeontx/octeontx_ethdev.c b/drivers/net/octeontx/octeontx_ethdev.c
index bec54fd..e397136 100644
--- a/drivers/net/octeontx/octeontx_ethdev.c
+++ b/drivers/net/octeontx/octeontx_ethdev.c
@@ -36,9 +36,9 @@
 #define OCTEONTX_QLM_MODE_SGMII  7
 #define OCTEONTX_QLM_MODE_XFI   12
 
-struct evdev_priv_data {
+struct __rte_cache_aligned evdev_priv_data {
 	OFFLOAD_FLAGS; /*Sequence should not be changed */
-} __rte_cache_aligned;
+};
 
 struct octeontx_vdev_init_params {
 	uint8_t	nr_port;
diff --git a/drivers/net/octeontx/octeontx_ethdev.h b/drivers/net/octeontx/octeontx_ethdev.h
index 7e04fad..efd6cf5 100644
--- a/drivers/net/octeontx/octeontx_ethdev.h
+++ b/drivers/net/octeontx/octeontx_ethdev.h
@@ -105,7 +105,7 @@ struct octeontx_fc_info {
 };
 
 /* Octeontx ethdev nic */
-struct octeontx_nic {
+struct __rte_cache_aligned octeontx_nic {
 	struct rte_eth_dev *dev;
 	int node;
 	int port_id;
@@ -145,15 +145,15 @@ struct octeontx_nic {
 	int print_flag;
 	struct octeontx_fc_info fc;
 	bool reconfigure;
-} __rte_cache_aligned;
+};
 
-struct octeontx_txq {
+struct __rte_cache_aligned octeontx_txq {
 	uint16_t queue_id;
 	octeontx_dq_t dq;
 	struct rte_eth_dev *eth_dev;
-} __rte_cache_aligned;
+};
 
-struct octeontx_rxq {
+struct __rte_cache_aligned octeontx_rxq {
 	uint16_t queue_id;
 	uint16_t port_id;
 	uint8_t evdev;
@@ -161,7 +161,7 @@ struct octeontx_rxq {
 	uint16_t ev_queues;
 	uint16_t ev_ports;
 	struct rte_mempool *pool;
-} __rte_cache_aligned;
+};
 
 void
 octeontx_set_tx_function(struct rte_eth_dev *dev);
diff --git a/drivers/net/octeontx/octeontx_rxtx.h b/drivers/net/octeontx/octeontx_rxtx.h
index b6e3515..cd581f5 100644
--- a/drivers/net/octeontx/octeontx_rxtx.h
+++ b/drivers/net/octeontx/octeontx_rxtx.h
@@ -71,7 +71,7 @@ struct octeontx_send_hdr_s {
 	union octeontx_send_hdr_w1_u w1;
 };
 
-static const uint32_t __rte_cache_aligned
+static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
 ptype_table[PTYPE_SIZE][PTYPE_SIZE][PTYPE_SIZE] = {
 	[LC_NONE][LE_NONE][LF_NONE] = RTE_PTYPE_UNKNOWN,
 	[LC_NONE][LE_NONE][LF_IPSEC_ESP] = RTE_PTYPE_UNKNOWN,
-- 
1.8.3.1

[PATCH 28/83] net/pfe: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/pfe/base/pfe.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/pfe/base/pfe.h b/drivers/net/pfe/base/pfe.h
index b9cf682..a97c47f 100644
--- a/drivers/net/pfe/base/pfe.h
+++ b/drivers/net/pfe/base/pfe.h
@@ -209,7 +209,7 @@ enum {
 #define UTIL_MASK	BIT(UTIL_ID)
 #endif
 
-struct pe_status {
+struct __rte_aligned(16) pe_status {
 	u32	cpu_state;
 	u32	activity_counter;
 	u32	rx;
@@ -222,7 +222,7 @@ struct pe_status {
 	u32	debug_indicator;
 	u32	debug[16];
 #endif
-} __rte_aligned(16);
+};
 
 struct pe_sync_mailbox {
 	u32 stop;
-- 
1.8.3.1

[PATCH 29/83] net/qede: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/qede/qede_rxtx.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index c35585f..ede5fc8 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ b/drivers/net/qede/qede_rxtx.c
@@ -38,7 +38,7 @@ static inline int qede_alloc_rx_buffer(struct qede_rx_queue *rxq)
 
 static inline int qede_alloc_rx_bulk_mbufs(struct qede_rx_queue *rxq, int count)
 {
-	void *obj_p[QEDE_MAX_BULK_ALLOC_COUNT] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *obj_p[QEDE_MAX_BULK_ALLOC_COUNT];
 	struct rte_mbuf *mbuf = NULL;
 	struct eth_rx_bd *rx_bd;
 	dma_addr_t mapping;
@@ -1124,8 +1124,8 @@ static inline uint32_t qede_rx_cqe_to_pkt_type_inner(uint16_t flags)
 	uint16_t val;
 
 	/* Lookup table */
-	static const uint32_t
-	ptype_lkup_tbl[QEDE_PKT_TYPE_MAX] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+	ptype_lkup_tbl[QEDE_PKT_TYPE_MAX] = {
 		[QEDE_PKT_TYPE_IPV4] = RTE_PTYPE_INNER_L3_IPV4		|
 				       RTE_PTYPE_INNER_L2_ETHER,
 		[QEDE_PKT_TYPE_IPV6] = RTE_PTYPE_INNER_L3_IPV6		|
@@ -1197,8 +1197,8 @@ static inline uint32_t qede_rx_cqe_to_pkt_type(uint16_t flags)
 	uint16_t val;
 
 	/* Lookup table */
-	static const uint32_t
-	ptype_lkup_tbl[QEDE_PKT_TYPE_MAX] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+	ptype_lkup_tbl[QEDE_PKT_TYPE_MAX] = {
 		[QEDE_PKT_TYPE_IPV4] = RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L2_ETHER,
 		[QEDE_PKT_TYPE_IPV6] = RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L2_ETHER,
 		[QEDE_PKT_TYPE_IPV4_TCP] = RTE_PTYPE_L3_IPV4	|
@@ -1398,8 +1398,8 @@ static inline uint32_t qede_rx_cqe_to_tunn_pkt_type(uint16_t flags)
 	uint32_t val;
 
 	/* Lookup table */
-	static const uint32_t
-	ptype_tunn_lkup_tbl[QEDE_PKT_TYPE_TUNN_MAX_TYPE] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+	ptype_tunn_lkup_tbl[QEDE_PKT_TYPE_TUNN_MAX_TYPE] = {
 		[QEDE_PKT_TYPE_UNKNOWN] = RTE_PTYPE_UNKNOWN,
 		[QEDE_PKT_TYPE_TUNN_GENEVE] = RTE_PTYPE_TUNNEL_GENEVE,
 		[QEDE_PKT_TYPE_TUNN_GRE] = RTE_PTYPE_TUNNEL_GRE,
-- 
1.8.3.1

[PATCH 30/83] net/softnic: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/softnic/rte_eth_softnic_internals.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/softnic/rte_eth_softnic_internals.h b/drivers/net/softnic/rte_eth_softnic_internals.h
index a1c2309..d3975da 100644
--- a/drivers/net/softnic/rte_eth_softnic_internals.h
+++ b/drivers/net/softnic/rte_eth_softnic_internals.h
@@ -123,7 +123,7 @@ struct softnic_thread {
 /**
  * Data plane threads: context
  */
-struct softnic_thread_data {
+struct __rte_cache_aligned softnic_thread_data {
 	struct rte_swx_pipeline *p[THREAD_PIPELINES_MAX];
 	uint32_t n_pipelines;
 
@@ -132,7 +132,7 @@ struct softnic_thread_data {
 	uint64_t timer_period; /* Measured in CPU cycles. */
 	uint64_t time_next;
 	uint64_t iter;
-} __rte_cache_aligned;
+};
 
 /**
  * PMD Internals
-- 
1.8.3.1

[PATCH 31/83] net/tap: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/tap/tap_bpf.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/tap/tap_bpf.h b/drivers/net/tap/tap_bpf.h
index 0d38bc1..d843792 100644
--- a/drivers/net/tap/tap_bpf.h
+++ b/drivers/net/tap/tap_bpf.h
@@ -50,7 +50,7 @@ enum bpf_map_type {
 };
 
 /* union of anonymous structs used with TAP BPF commands */
-union bpf_attr {
+union __rte_aligned(8) bpf_attr {
 	/* BPF_MAP_CREATE command */
 	struct {
 		__u32	map_type;
@@ -84,7 +84,7 @@ enum bpf_map_type {
 		__u32		kern_version;
 		__u32		prog_flags;
 	};
-} __rte_aligned(8);
+};
 
 #ifndef __NR_bpf
 # if defined(__i386__)
-- 
1.8.3.1

[PATCH 32/83] net/thunderx: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/thunderx/nicvf_rxtx.c   |  8 ++++----
 drivers/net/thunderx/nicvf_struct.h | 16 ++++++++--------
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/net/thunderx/nicvf_rxtx.c b/drivers/net/thunderx/nicvf_rxtx.c
index defa551..74f43b9 100644
--- a/drivers/net/thunderx/nicvf_rxtx.c
+++ b/drivers/net/thunderx/nicvf_rxtx.c
@@ -76,7 +76,7 @@
 	uint32_t curr_head;
 	uint32_t head = sq->head;
 	struct rte_mbuf **txbuffs = sq->txbuffs;
-	void *obj_p[NICVF_MAX_TX_FREE_THRESH] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *obj_p[NICVF_MAX_TX_FREE_THRESH];
 
 	curr_head = nicvf_addr_read(sq->sq_head) >> 4;
 	while (head != curr_head) {
@@ -239,7 +239,7 @@
 	return i;
 }
 
-static const uint32_t ptype_table[16][16] __rte_cache_aligned = {
+static const alignas(RTE_CACHE_LINE_SIZE) uint32_t ptype_table[16][16] = {
 	[L3_NONE][L4_NONE] = RTE_PTYPE_UNKNOWN,
 	[L3_NONE][L4_IPSEC_ESP] = RTE_PTYPE_UNKNOWN,
 	[L3_NONE][L4_IPFRAG] = RTE_PTYPE_L4_FRAG,
@@ -342,7 +342,7 @@
 static inline uint64_t __rte_hot
 nicvf_set_olflags(const cqe_rx_word0_t cqe_rx_w0)
 {
-	static const uint64_t flag_table[3] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint64_t flag_table[3] = {
 		RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD,
 		RTE_MBUF_F_RX_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN,
 		RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_BAD,
@@ -363,7 +363,7 @@
 	struct rbdr_entry_t *desc = rbdr->desc;
 	uint32_t qlen_mask = rbdr->qlen_mask;
 	uintptr_t door = rbdr->rbdr_door;
-	void *obj_p[NICVF_MAX_RX_FREE_THRESH] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *obj_p[NICVF_MAX_RX_FREE_THRESH];
 
 	if (unlikely(rte_mempool_get_bulk(rxq->pool, obj_p, to_fill) < 0)) {
 		rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed +=
diff --git a/drivers/net/thunderx/nicvf_struct.h b/drivers/net/thunderx/nicvf_struct.h
index 13cf8fe..cfcd942 100644
--- a/drivers/net/thunderx/nicvf_struct.h
+++ b/drivers/net/thunderx/nicvf_struct.h
@@ -14,7 +14,7 @@
 #include <ethdev_driver.h>
 #include <rte_memory.h>
 
-struct nicvf_rbdr {
+struct __rte_cache_aligned nicvf_rbdr {
 	uintptr_t rbdr_status;
 	uintptr_t rbdr_door;
 	struct rbdr_entry_t *desc;
@@ -24,9 +24,9 @@ struct nicvf_rbdr {
 	uint32_t next_tail;
 	uint32_t head;
 	uint32_t qlen_mask;
-} __rte_cache_aligned;
+};
 
-struct nicvf_txq {
+struct __rte_cache_aligned nicvf_txq {
 	union sq_entry_t *desc;
 	nicvf_iova_addr_t phys;
 	struct rte_mbuf **txbuffs;
@@ -42,7 +42,7 @@ struct nicvf_txq {
 	uint64_t offloads;
 	uint16_t queue_id;
 	uint16_t tx_free_thresh;
-} __rte_cache_aligned;
+};
 
 union mbuf_initializer {
 	struct {
@@ -54,7 +54,7 @@ struct nicvf_txq {
 	uint64_t value;
 };
 
-struct nicvf_rxq {
+struct __rte_cache_aligned nicvf_rxq {
 	RTE_MARKER rxq_fastpath_data_start;
 	uint8_t  rbptr_offset;
 	uint16_t rx_free_thresh;
@@ -76,9 +76,9 @@ struct nicvf_rxq {
 	uint16_t queue_id;
 	struct nicvf *nic;
 	nicvf_iova_addr_t phys;
-} __rte_cache_aligned;
+};
 
-struct nicvf {
+struct __rte_cache_aligned nicvf {
 	uint8_t vf_id;
 	uint8_t node;
 	uintptr_t reg_base;
@@ -111,7 +111,7 @@ struct nicvf {
 	uint8_t sqs_count;
 #define MAX_SQS_PER_VF 11
 	struct nicvf *snicvf[MAX_SQS_PER_VF];
-} __rte_cache_aligned;
+};
 
 struct change_link_mode {
 	bool	   enable;
-- 
1.8.3.1

[PATCH 33/83] net/txgbe: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/txgbe/txgbe_ipsec.h  |  4 ++--
 drivers/net/txgbe/txgbe_ptypes.c | 10 +++++-----
 drivers/net/txgbe/txgbe_rxtx.c   |  2 +-
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/txgbe/txgbe_ipsec.h b/drivers/net/txgbe/txgbe_ipsec.h
index 995e29e..e93f9a3 100644
--- a/drivers/net/txgbe/txgbe_ipsec.h
+++ b/drivers/net/txgbe/txgbe_ipsec.h
@@ -44,7 +44,7 @@ struct ipaddr {
 };
 
 /** inline crypto private session structure */
-struct txgbe_crypto_session {
+struct __rte_cache_aligned txgbe_crypto_session {
 	enum txgbe_operation op;
 	const uint8_t *key;
 	uint32_t key_len;
@@ -54,7 +54,7 @@ struct txgbe_crypto_session {
 	struct ipaddr src_ip;
 	struct ipaddr dst_ip;
 	struct rte_eth_dev *dev;
-} __rte_cache_aligned;
+};
 
 struct txgbe_crypto_rx_ip_table {
 	struct ipaddr ip;
diff --git a/drivers/net/txgbe/txgbe_ptypes.c b/drivers/net/txgbe/txgbe_ptypes.c
index c07977b..a8e7271 100644
--- a/drivers/net/txgbe/txgbe_ptypes.c
+++ b/drivers/net/txgbe/txgbe_ptypes.c
@@ -47,7 +47,7 @@
 #define RTE_PTYPE_INNER_L3_NONE         0
 #define RTE_PTYPE_INNER_L4_NONE         0
 
-static u32 txgbe_ptype_lookup[TXGBE_PTID_MAX] __rte_cache_aligned = {
+static alignas(RTE_CACHE_LINE_SIZE) u32 txgbe_ptype_lookup[TXGBE_PTID_MAX] = {
 	/* L2:0-3 L3:4-7 L4:8-11 TUN:12-15 EL2:16-19 EL3:20-23 EL2:24-27 */
 	/* L2: ETH */
 	TPTE(0x10, ETHER,          NONE, NONE, NONE, NONE, NONE, NONE),
@@ -393,8 +393,8 @@ u8 txgbe_encode_ptype(u32 ptype)
  * Use 2 different table for normal packet and tunnel packet
  * to save the space.
  */
-const u32
-txgbe_ptype_table[TXGBE_PTID_MAX] __rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) u32
+txgbe_ptype_table[TXGBE_PTID_MAX] = {
 	[TXGBE_PT_ETHER] = RTE_PTYPE_L2_ETHER,
 	[TXGBE_PT_IPV4] = RTE_PTYPE_L2_ETHER |
 		RTE_PTYPE_L3_IPV4,
@@ -478,8 +478,8 @@ u8 txgbe_encode_ptype(u32 ptype)
 		RTE_PTYPE_INNER_L3_IPV6_EXT | RTE_PTYPE_INNER_L4_SCTP,
 };
 
-const u32
-txgbe_ptype_table_tn[TXGBE_PTID_MAX] __rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) u32
+txgbe_ptype_table_tn[TXGBE_PTID_MAX] = {
 	[TXGBE_PT_NVGRE] = RTE_PTYPE_L2_ETHER |
 		RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_TUNNEL_GRE |
 		RTE_PTYPE_INNER_L2_ETHER,
diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 1cd4b25..2568bf0 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -1107,7 +1107,7 @@
 static inline uint64_t
 txgbe_rxd_pkt_info_to_pkt_flags(uint32_t pkt_info)
 {
-	static uint64_t ip_rss_types_map[16] __rte_cache_aligned = {
+	static alignas(RTE_CACHE_LINE_SIZE) uint64_t ip_rss_types_map[16] = {
 		0, RTE_MBUF_F_RX_RSS_HASH, RTE_MBUF_F_RX_RSS_HASH, RTE_MBUF_F_RX_RSS_HASH,
 		0, RTE_MBUF_F_RX_RSS_HASH, 0, RTE_MBUF_F_RX_RSS_HASH,
 		RTE_MBUF_F_RX_RSS_HASH, 0, 0, 0,
-- 
1.8.3.1

[PATCH 34/83] net/virtio: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/net/virtio/virtqueue.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/virtio/virtqueue.h b/drivers/net/virtio/virtqueue.h
index 5d0c039..75d70f1 100644
--- a/drivers/net/virtio/virtqueue.h
+++ b/drivers/net/virtio/virtqueue.h
@@ -261,11 +261,11 @@ struct virtio_net_hdr_mrg_rxbuf {
 #define VIRTIO_MAX_TX_INDIRECT 8
 struct virtio_tx_region {
 	struct virtio_net_hdr_mrg_rxbuf tx_hdr;
-	union {
+	union __rte_aligned(16) {
 		struct vring_desc tx_indir[VIRTIO_MAX_TX_INDIRECT];
 		struct vring_packed_desc
 			tx_packed_indir[VIRTIO_MAX_TX_INDIRECT];
-	} __rte_aligned(16);
+	};
 };
 
 static inline int
-- 
1.8.3.1

[PATCH 35/83] vdpa/mlx5: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/vdpa/mlx5/mlx5_vdpa.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/vdpa/mlx5/mlx5_vdpa.h b/drivers/vdpa/mlx5/mlx5_vdpa.h
index 7b37c98..4ce6977 100644
--- a/drivers/vdpa/mlx5/mlx5_vdpa.h
+++ b/drivers/vdpa/mlx5/mlx5_vdpa.h
@@ -90,13 +90,13 @@ enum mlx5_vdpa_task_type {
 };
 
 /* Generic task information and size must be multiple of 4B. */
-struct mlx5_vdpa_task {
+struct __rte_aligned(4) mlx5_vdpa_task {
 	struct mlx5_vdpa_priv *priv;
 	enum mlx5_vdpa_task_type type;
 	uint32_t *remaining_cnt;
 	uint32_t *err_cnt;
 	uint32_t idx;
-} __rte_packed __rte_aligned(4);
+} __rte_packed;
 
 /* Generic mlx5_vdpa_c_thread information. */
 struct mlx5_vdpa_c_thread {
-- 
1.8.3.1

[PATCH 36/83] regex/cn9k: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/regex/cn9k/cn9k_regexdev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/regex/cn9k/cn9k_regexdev.h b/drivers/regex/cn9k/cn9k_regexdev.h
index c715502..e24a800 100644
--- a/drivers/regex/cn9k/cn9k_regexdev.h
+++ b/drivers/regex/cn9k/cn9k_regexdev.h
@@ -21,7 +21,7 @@
 /**
  * Device private data
  */
-struct cn9k_ree_data {
+struct __rte_cache_aligned cn9k_ree_data {
 	uint32_t regexdev_capa;
 	uint64_t rule_flags;
 	/**< Feature flags exposes HW/SW features for the given device */
@@ -39,6 +39,6 @@ struct cn9k_ree_data {
 	/**< rules to be compiled */
 	uint16_t nb_rules;
 	/**< number of rules */
-} __rte_cache_aligned;
+};
 
 #endif /* _CN9K_REGEXDEV_H_ */
-- 
1.8.3.1

[PATCH 37/83] raw/ntb: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/raw/ntb/ntb.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/raw/ntb/ntb.h b/drivers/raw/ntb/ntb.h
index a30a6b6..563cedd 100644
--- a/drivers/raw/ntb/ntb.h
+++ b/drivers/raw/ntb/ntb.h
@@ -186,9 +186,9 @@ struct ntb_tx_queue {
 };
 
 struct ntb_header {
-	uint16_t avail_cnt __rte_cache_aligned;
-	uint16_t used_cnt __rte_cache_aligned;
-	struct ntb_desc desc_ring[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t avail_cnt;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t used_cnt;
+	alignas(RTE_CACHE_LINE_SIZE) struct ntb_desc desc_ring[];
 };
 
 /* ntb private data. */
-- 
1.8.3.1

[PATCH 38/83] ml/cnxk: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/ml/cnxk/cnxk_ml_ops.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/ml/cnxk/cnxk_ml_ops.h b/drivers/ml/cnxk/cnxk_ml_ops.h
index 7b49793..e348cc4 100644
--- a/drivers/ml/cnxk/cnxk_ml_ops.h
+++ b/drivers/ml/cnxk/cnxk_ml_ops.h
@@ -19,7 +19,7 @@
 #endif
 
 /* Request structure */
-struct cnxk_ml_req {
+struct __rte_aligned(ROC_ALIGN) cnxk_ml_req {
 	/* Device specific request */
 	union {
 		/* CN10K */
@@ -39,7 +39,7 @@ struct cnxk_ml_req {
 
 	/* Op */
 	struct rte_ml_op *op;
-} __rte_aligned(ROC_ALIGN);
+};
 
 /* Request queue */
 struct cnxk_ml_queue {
-- 
1.8.3.1

[PATCH 39/83] mempool/cnxk: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/mempool/cnxk/cn10k_mempool_ops.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mempool/cnxk/cn10k_mempool_ops.c b/drivers/mempool/cnxk/cn10k_mempool_ops.c
index 2a5aad0..a5be0cc 100644
--- a/drivers/mempool/cnxk/cn10k_mempool_ops.c
+++ b/drivers/mempool/cnxk/cn10k_mempool_ops.c
@@ -21,13 +21,13 @@ enum batch_op_status {
 struct batch_op_mem {
 	unsigned int sz;
 	enum batch_op_status status;
-	uint64_t objs[BATCH_ALLOC_SZ] __rte_aligned(ROC_ALIGN);
+	alignas(ROC_ALIGN) uint64_t objs[BATCH_ALLOC_SZ];
 };
 
 struct batch_op_data {
 	uint64_t lmt_addr;
 	uint32_t max_async_batch;
-	struct batch_op_mem mem[RTE_MAX_LCORE] __rte_aligned(ROC_ALIGN);
+	alignas(ROC_ALIGN) struct batch_op_mem mem[RTE_MAX_LCORE];
 };
 
 static struct batch_op_data **batch_op_data_tbl;
-- 
1.8.3.1

[PATCH 40/83] event/sw: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/event/sw/event_ring.h |  2 +-
 drivers/event/sw/iq_chunk.h   |  4 ++--
 drivers/event/sw/sw_evdev.h   | 18 +++++++++---------
 3 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/event/sw/event_ring.h b/drivers/event/sw/event_ring.h
index 2b86ca9..29db267 100644
--- a/drivers/event/sw/event_ring.h
+++ b/drivers/event/sw/event_ring.h
@@ -27,7 +27,7 @@ struct rob_ring {
 	uint32_t size;
 	uint32_t write_idx;
 	uint32_t read_idx;
-	void *ring[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *ring[0];
 };
 
 static inline struct rob_ring *
diff --git a/drivers/event/sw/iq_chunk.h b/drivers/event/sw/iq_chunk.h
index 31d013e..7a7a878 100644
--- a/drivers/event/sw/iq_chunk.h
+++ b/drivers/event/sw/iq_chunk.h
@@ -11,10 +11,10 @@
 
 #define IQ_ROB_NAMESIZE 12
 
-struct sw_queue_chunk {
+struct __rte_cache_aligned sw_queue_chunk {
 	struct rte_event events[SW_EVS_PER_Q_CHUNK];
 	struct sw_queue_chunk *next;
-} __rte_cache_aligned;
+};
 
 static __rte_always_inline bool
 iq_empty(struct sw_iq *iq)
diff --git a/drivers/event/sw/sw_evdev.h b/drivers/event/sw/sw_evdev.h
index c7b943a..c6e649c 100644
--- a/drivers/event/sw/sw_evdev.h
+++ b/drivers/event/sw/sw_evdev.h
@@ -170,14 +170,14 @@ struct sw_port {
 	int16_t num_ordered_qids;
 
 	/** Ring and buffer for pulling events from workers for scheduling */
-	struct rte_event_ring *rx_worker_ring __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event_ring *rx_worker_ring;
 	/** Ring and buffer for pushing packets to workers after scheduling */
 	struct rte_event_ring *cq_worker_ring;
 
 	/* hole */
 
 	/* num releases yet to be completed on this port */
-	uint16_t outstanding_releases __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t outstanding_releases;
 	uint16_t inflight_max; /* app requested max inflights for this port */
 	uint16_t inflight_credits; /* num credits this port has right now */
 	uint8_t implicit_release; /* release events before dequeuing */
@@ -191,7 +191,7 @@ struct sw_port {
 		/* bucket values in 4s for shorter reporting */
 
 	/* History list structs, containing info on pkts egressed to worker */
-	uint16_t hist_head __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t hist_head;
 	uint16_t hist_tail;
 	uint16_t inflights;
 	struct sw_hist_list_entry hist_list[SW_PORT_HIST_LIST];
@@ -221,7 +221,7 @@ struct sw_evdev {
 	uint32_t xstats_count_mode_queue;
 
 	/* Minimum burst size*/
-	uint32_t sched_min_burst_size __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t sched_min_burst_size;
 	/* Port dequeue burst size*/
 	uint32_t sched_deq_burst_size;
 	/* Refill pp buffers only once per scheduler call*/
@@ -231,9 +231,9 @@ struct sw_evdev {
 	uint32_t sched_min_burst;
 
 	/* Contains all ports - load balanced and directed */
-	struct sw_port ports[SW_PORTS_MAX] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct sw_port ports[SW_PORTS_MAX];
 
-	rte_atomic32_t inflights __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) rte_atomic32_t inflights;
 
 	/*
 	 * max events in this instance. Cached here for performance.
@@ -242,18 +242,18 @@ struct sw_evdev {
 	uint32_t nb_events_limit;
 
 	/* Internal queues - one per logical queue */
-	struct sw_qid qids[RTE_EVENT_MAX_QUEUES_PER_DEV] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct sw_qid qids[RTE_EVENT_MAX_QUEUES_PER_DEV];
 	struct sw_queue_chunk *chunk_list_head;
 	struct sw_queue_chunk *chunks;
 
 	/* Cache how many packets are in each cq */
-	uint16_t cq_ring_space[SW_PORTS_MAX] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t cq_ring_space[SW_PORTS_MAX];
 
 	/* Array of pointers to load-balanced QIDs sorted by priority level */
 	struct sw_qid *qids_prioritized[RTE_EVENT_MAX_QUEUES_PER_DEV];
 
 	/* Stats */
-	struct sw_point_stats stats __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct sw_point_stats stats;
 	uint64_t sched_called;
 	int32_t sched_quanta;
 	uint64_t sched_no_iq_enqueues;
-- 
1.8.3.1

[PATCH 41/83] event/skeleton: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/event/skeleton/skeleton_eventdev.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/event/skeleton/skeleton_eventdev.h b/drivers/event/skeleton/skeleton_eventdev.h
index 9c1ed4e..283342a 100644
--- a/drivers/event/skeleton/skeleton_eventdev.h
+++ b/drivers/event/skeleton/skeleton_eventdev.h
@@ -24,17 +24,17 @@
 	rte_log(RTE_LOG_ERR, skeleton_eventdev_logtype, \
 		"%s(): " fmt "\n", __func__, ## args)
 
-struct skeleton_eventdev {
+struct __rte_cache_aligned skeleton_eventdev {
 	uintptr_t reg_base;
 	uint16_t device_id;
 	uint16_t vendor_id;
 	uint16_t subsystem_device_id;
 	uint16_t subsystem_vendor_id;
-} __rte_cache_aligned;
+};
 
-struct skeleton_port {
+struct __rte_cache_aligned skeleton_port {
 	uint8_t port_id;
-} __rte_cache_aligned;
+};
 
 static inline struct skeleton_eventdev *
 skeleton_pmd_priv(const struct rte_eventdev *eventdev)
-- 
1.8.3.1

[PATCH 42/83] event/opdl: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/event/opdl/opdl_evdev.h |  6 +++---
 drivers/event/opdl/opdl_ring.c  | 19 +++++++++----------
 2 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/drivers/event/opdl/opdl_evdev.h b/drivers/event/opdl/opdl_evdev.h
index 1ca166b..176990e 100644
--- a/drivers/event/opdl/opdl_evdev.h
+++ b/drivers/event/opdl/opdl_evdev.h
@@ -234,15 +234,15 @@ struct opdl_evdev {
 	uint32_t nb_q_md;
 
 	/* Internal queues - one per logical queue */
-	struct opdl_queue
-		queue[RTE_EVENT_MAX_QUEUES_PER_DEV] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct opdl_queue
+		queue[RTE_EVENT_MAX_QUEUES_PER_DEV];
 
 	uint32_t nb_queues;
 
 	struct opdl_stage_meta_data s_md[OPDL_PORTS_MAX];
 
 	/* Contains all ports - load balanced and directed */
-	struct opdl_port ports[OPDL_PORTS_MAX] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct opdl_port ports[OPDL_PORTS_MAX];
 	uint32_t nb_ports;
 
 	uint8_t q_map_ex_to_in[OPDL_INVALID_QID];
diff --git a/drivers/event/opdl/opdl_ring.c b/drivers/event/opdl/opdl_ring.c
index da5ea02..e87ffd5 100644
--- a/drivers/event/opdl/opdl_ring.c
+++ b/drivers/event/opdl/opdl_ring.c
@@ -43,7 +43,7 @@ enum dep_type {
  * Care is needed when accessing and the layout is important, especially to
  * limit the adjacent cache-line HW prefetcher from impacting performance.
  */
-struct shared_state {
+struct __rte_cache_aligned shared_state {
 	/* Last known minimum sequence number of dependencies, used for multi
 	 * thread operation
 	 */
@@ -54,7 +54,7 @@ struct shared_state {
 	struct opdl_stage *stage;  /* back pointer */
 	uint32_t tail;  /* Tail sequence number */
 	char _pad3[RTE_CACHE_LINE_SIZE * 2];
-} __rte_cache_aligned;
+};
 
 /* A structure to keep track of "unfinished" claims. This is only used for
  * stages that are threadsafe. Each lcore accesses its own instance of this
@@ -63,7 +63,7 @@ struct shared_state {
  * forward the shared tail when the shared tail matches the tail value recorded
  * here.
  */
-struct claim_manager {
+struct __rte_cache_aligned claim_manager {
 	uint32_t num_to_disclaim;
 	uint32_t num_claimed;
 	uint32_t mgr_head;
@@ -72,13 +72,13 @@ struct claim_manager {
 		uint32_t head;
 		uint32_t tail;
 	} claims[OPDL_DISCLAIMS_PER_LCORE];
-} __rte_cache_aligned;
+};
 
 /* Context for each stage of opdl_ring.
  * Calculations on sequence numbers need to be done with other uint32_t values
  * so that results are modulus 2^32, and not undefined.
  */
-struct opdl_stage {
+struct __rte_cache_aligned opdl_stage {
 	struct opdl_ring *t;  /* back pointer, set at init */
 	uint32_t num_slots;  /* Number of slots for entries, set at init */
 	uint32_t index;  /* ID for this stage, set at init */
@@ -99,14 +99,13 @@ struct opdl_stage {
 	/* Direct dependencies of this stage */
 	struct shared_state **deps;
 	/* Other stages read this! */
-	struct shared_state shared __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct shared_state shared;
 	/* For managing disclaims in multi-threaded processing stages */
-	struct claim_manager pending_disclaims[RTE_MAX_LCORE]
-					       __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct claim_manager pending_disclaims[RTE_MAX_LCORE];
 	uint32_t shadow_head;  /* Shadow head for single-thread operation */
 	uint32_t queue_id;     /* ID of Queue which is assigned to this stage */
 	uint32_t pos;		/* Atomic scan position */
-} __rte_cache_aligned;
+};
 
 /* Context for opdl_ring */
 struct opdl_ring {
@@ -120,7 +119,7 @@ struct opdl_ring {
 	/* Stages indexed by ID */
 	struct opdl_stage *stages;
 	/* Memory for storing slot data */
-	uint8_t slots[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t slots[0];
 };
 
 
-- 
1.8.3.1

[PATCH 43/83] event/octeontx: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/event/octeontx/ssovf_evdev.h  | 8 ++++----
 drivers/event/octeontx/timvf_evdev.h  | 8 ++++----
 drivers/event/octeontx/timvf_worker.c | 2 +-
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 8a4cb20..293eb85 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -134,7 +134,7 @@ enum ssovf_type {
 	OCTEONTX_SSO_HWS,  /* SSO hardware workslot vf */
 };
 
-struct ssovf_evdev {
+struct __rte_cache_aligned ssovf_evdev {
 	OFFLOAD_FLAGS; /*Sequence should not be changed */
 	uint8_t max_event_queues;
 	uint8_t max_event_ports;
@@ -150,10 +150,10 @@ struct ssovf_evdev {
 	uint8_t *rxq_pool_rcnt;
 	uint16_t tim_ring_cnt;
 	uint16_t *tim_ring_ids;
-} __rte_cache_aligned;
+};
 
 /* Event port aka HWS */
-struct ssows {
+struct __rte_cache_aligned ssows {
 	uint8_t cur_tt;
 	uint8_t cur_grp;
 	uint8_t swtag_req;
@@ -162,7 +162,7 @@ struct ssows {
 	uint8_t *grps[SSO_MAX_VHGRP];
 	uint8_t port;
 	void *lookup_mem;
-} __rte_cache_aligned;
+};
 
 static inline struct ssovf_evdev *
 ssovf_pmd_priv(const struct rte_eventdev *eventdev)
diff --git a/drivers/event/octeontx/timvf_evdev.h b/drivers/event/octeontx/timvf_evdev.h
index cef02cd..e7a63e4 100644
--- a/drivers/event/octeontx/timvf_evdev.h
+++ b/drivers/event/octeontx/timvf_evdev.h
@@ -123,7 +123,7 @@ enum timvf_clk_src {
 };
 
 /* TIM_MEM_BUCKET */
-struct tim_mem_bucket {
+struct __rte_aligned(8) tim_mem_bucket {
 	uint64_t first_chunk;
 	union {
 		uint64_t w1;
@@ -139,7 +139,7 @@ struct tim_mem_bucket {
 	};
 	uint64_t current_chunk;
 	uint64_t pad;
-} __rte_packed __rte_aligned(8);
+} __rte_packed;
 
 struct tim_mem_entry {
 	uint64_t w0;
@@ -160,7 +160,7 @@ struct timvf_ctrl_reg {
 		struct tim_mem_bucket * const bkt,
 		struct timvf_ring * const timr);
 
-struct timvf_ring {
+struct __rte_cache_aligned timvf_ring {
 	bkt_id get_target_bkt;
 	refill_chunk refill_chunk;
 	struct rte_reciprocal_u64 fast_div;
@@ -178,7 +178,7 @@ struct timvf_ring {
 	uint64_t nb_timers;
 	enum timvf_clk_src clk_src;
 	uint16_t tim_ring_id;
-} __rte_cache_aligned;
+};
 
 static __rte_always_inline uint32_t
 bkt_mod(const uint32_t rel_bkt, const uint32_t nb_bkts)
diff --git a/drivers/event/octeontx/timvf_worker.c b/drivers/event/octeontx/timvf_worker.c
index 50790e1..feb7c4d 100644
--- a/drivers/event/octeontx/timvf_worker.c
+++ b/drivers/event/octeontx/timvf_worker.c
@@ -146,7 +146,7 @@
 	uint16_t idx;
 	uint16_t arr_idx = 0;
 	struct timvf_ring *timr = adptr->data->adapter_priv;
-	struct tim_mem_entry entry[TIMVF_MAX_BURST] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct tim_mem_entry entry[TIMVF_MAX_BURST];
 
 	if (unlikely(!timeout_tick || timeout_tick >= timr->nb_bkts)) {
 		const enum rte_event_timer_state state = timeout_tick ?
-- 
1.8.3.1

[PATCH 44/83] event/dsw: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/event/dsw/dsw_evdev.h | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/event/dsw/dsw_evdev.h b/drivers/event/dsw/dsw_evdev.h
index d745c89..3a5989f 100644
--- a/drivers/event/dsw/dsw_evdev.h
+++ b/drivers/event/dsw/dsw_evdev.h
@@ -131,7 +131,7 @@ enum dsw_migration_state {
 	DSW_MIGRATION_STATE_UNPAUSING
 };
 
-struct dsw_port {
+struct __rte_cache_aligned dsw_port {
 	uint16_t id;
 
 	/* Keeping a pointer here to avoid container_of() calls, which
@@ -222,22 +222,22 @@ struct dsw_port {
 	 */
 	struct rte_event in_buffer[DSW_MAX_EVENTS];
 
-	struct rte_event_ring *in_ring __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event_ring *in_ring;
 
-	struct rte_ring *ctl_in_ring __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_ring *ctl_in_ring;
 
 	/* Estimate of current port load. */
-	int16_t load __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int16_t load;
 	/* Estimate of flows currently migrating to this port. */
-	int32_t immigration_load __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int32_t immigration_load;
+};
 
 struct dsw_queue {
 	uint8_t schedule_type;
 	uint64_t serving_ports;
 	uint16_t num_serving_ports;
 
-	uint8_t flow_to_port_map[DSW_MAX_FLOWS] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t flow_to_port_map[DSW_MAX_FLOWS];
 };
 
 /* Limited by the size of the 'serving_ports' bitmask */
@@ -252,19 +252,19 @@ struct dsw_evdev {
 	uint8_t num_queues;
 	int32_t max_inflight;
 
-	int32_t credits_on_loan __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int32_t credits_on_loan;
 };
 
 #define DSW_CTL_PAUS_REQ (0)
 #define DSW_CTL_UNPAUS_REQ (1)
 #define DSW_CTL_CFM (2)
 
-struct dsw_ctl_msg {
+struct __rte_aligned(4) dsw_ctl_msg {
 	uint8_t type;
 	uint8_t originating_port_id;
 	uint8_t qfs_len;
 	struct dsw_queue_flow qfs[DSW_MAX_FLOWS_PER_MIGRATION];
-} __rte_aligned(4);
+};
 
 uint16_t dsw_event_enqueue(void *port, const struct rte_event *event);
 uint16_t dsw_event_enqueue_burst(void *port,
-- 
1.8.3.1

[PATCH 45/83] event/dlb2: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/event/dlb2/dlb2_priv.h | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h
index 31a3bee..49f1c66 100644
--- a/drivers/event/dlb2/dlb2_priv.h
+++ b/drivers/event/dlb2/dlb2_priv.h
@@ -429,13 +429,13 @@ enum dlb2_cos {
 	DLB2_COS_NUM_VALS
 };
 
-struct dlb2_hw_dev {
+struct __rte_cache_aligned dlb2_hw_dev {
 	struct dlb2_config cfg;
 	struct dlb2_hw_resource_info info;
 	void *pf_dev; /* opaque pointer to PF PMD dev (struct dlb2_dev) */
 	uint32_t domain_id;
 	rte_spinlock_t resource_lock; /* for MP support */
-} __rte_cache_aligned;
+};
 
 /* End HW related defines and structs */
 
@@ -516,13 +516,13 @@ struct dlb2_port_stats {
 	struct dlb2_queue_stats queue[DLB2_MAX_NUM_QUEUES_ALL];
 };
 
-struct dlb2_eventdev_port {
+struct __rte_cache_aligned dlb2_eventdev_port {
 	struct dlb2_port qm_port; /* hw specific data structure */
 	struct rte_event_port_conf conf; /* user-supplied configuration */
 	uint16_t inflight_credits; /* num credits this port has right now */
 	uint16_t credit_update_quanta;
 	struct dlb2_eventdev *dlb2; /* backlink optimization */
-	struct dlb2_port_stats stats __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct dlb2_port_stats stats;
 	struct dlb2_event_queue_link link[DLB2_MAX_NUM_QIDS_PER_LDB_CQ];
 	int num_links;
 	uint32_t id; /* port id */
@@ -539,7 +539,7 @@ struct dlb2_eventdev_port {
 	uint8_t implicit_release; /* release events before dequeuing */
 	uint32_t cq_weight; /* DLB2.5 and above ldb ports only */
 	int cos_id; /*ldb port class of service */
-}  __rte_cache_aligned;
+};
 
 struct dlb2_queue {
 	uint32_t num_qid_inflights; /* User config */
@@ -624,14 +624,14 @@ struct dlb2_eventdev {
 			uint16_t max_ldb_credits;
 			uint16_t max_dir_credits;
 			/* use __atomic builtins */ /* shared hw cred */
-			uint32_t ldb_credit_pool __rte_cache_aligned;
+			alignas(RTE_CACHE_LINE_SIZE) uint32_t ldb_credit_pool;
 			/* use __atomic builtins */ /* shared hw cred */
-			uint32_t dir_credit_pool __rte_cache_aligned;
+			alignas(RTE_CACHE_LINE_SIZE) uint32_t dir_credit_pool;
 		};
 		struct {
 			uint16_t max_credits;
 			/* use __atomic builtins */ /* shared hw cred */
-			uint32_t credit_pool __rte_cache_aligned;
+			alignas(RTE_CACHE_LINE_SIZE) uint32_t credit_pool;
 		};
 	};
 	uint32_t cos_ports[DLB2_COS_NUM_VALS]; /* total ldb ports in each class */
-- 
1.8.3.1

[PATCH 46/83] event/cnxk: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/event/cnxk/cn10k_eventdev.h  |  8 ++++----
 drivers/event/cnxk/cnxk_eventdev.h   | 24 ++++++++++++------------
 drivers/event/cnxk/cnxk_tim_evdev.h  |  4 ++--
 drivers/event/cnxk/cnxk_tim_worker.c |  2 +-
 4 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/event/cnxk/cn10k_eventdev.h b/drivers/event/cnxk/cn10k_eventdev.h
index e79b68e..3721214 100644
--- a/drivers/event/cnxk/cn10k_eventdev.h
+++ b/drivers/event/cnxk/cn10k_eventdev.h
@@ -8,7 +8,7 @@
 #define CN10K_SSO_DEFAULT_STASH_OFFSET -1
 #define CN10K_SSO_DEFAULT_STASH_LENGTH 2
 
-struct cn10k_sso_hws {
+struct __rte_cache_aligned cn10k_sso_hws {
 	uint64_t base;
 	uint32_t gw_wdata;
 	void *lookup_mem;
@@ -19,15 +19,15 @@ struct cn10k_sso_hws {
 	struct cnxk_timesync_info **tstamp;
 	uint64_t meta_aura;
 	/* Add Work Fastpath data */
-	int64_t *fc_mem __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int64_t *fc_mem;
 	int64_t *fc_cache_space;
 	uintptr_t aw_lmt;
 	uintptr_t grp_base;
 	int32_t xaq_lmt;
 	/* Tx Fastpath data */
-	uintptr_t lmt_base __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uintptr_t lmt_base;
 	uint64_t lso_tun_fmt;
 	uint8_t tx_adptr_data[];
-} __rte_cache_aligned;
+};
 
 #endif /* __CN10K_EVENTDEV_H__ */
diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h
index fa99ded..ece4939 100644
--- a/drivers/event/cnxk/cnxk_eventdev.h
+++ b/drivers/event/cnxk/cnxk_eventdev.h
@@ -80,7 +80,7 @@ struct cnxk_sso_stash {
 	uint16_t stash_length;
 };
 
-struct cnxk_sso_evdev {
+struct __rte_cache_aligned cnxk_sso_evdev {
 	struct roc_sso sso;
 	uint8_t max_event_queues;
 	uint8_t max_event_ports;
@@ -124,10 +124,10 @@ struct cnxk_sso_evdev {
 	uint32_t gw_mode;
 	uint16_t stash_cnt;
 	struct cnxk_sso_stash *stash_parse_data;
-} __rte_cache_aligned;
+};
 
 /* Event port a.k.a GWS */
-struct cn9k_sso_hws {
+struct __rte_cache_aligned cn9k_sso_hws {
 	uint64_t base;
 	uint64_t gw_wdata;
 	void *lookup_mem;
@@ -136,15 +136,15 @@ struct cn9k_sso_hws {
 	/* PTP timestamp */
 	struct cnxk_timesync_info **tstamp;
 	/* Add Work Fastpath data */
-	uint64_t xaq_lmt __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t xaq_lmt;
 	uint64_t *fc_mem;
 	uintptr_t grp_base;
 	/* Tx Fastpath data */
-	uint64_t lso_tun_fmt __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t lso_tun_fmt;
 	uint8_t tx_adptr_data[];
-} __rte_cache_aligned;
+};
 
-struct cn9k_sso_hws_dual {
+struct __rte_cache_aligned cn9k_sso_hws_dual {
 	uint64_t base[2]; /* Ping and Pong */
 	uint64_t gw_wdata;
 	void *lookup_mem;
@@ -154,18 +154,18 @@ struct cn9k_sso_hws_dual {
 	/* PTP timestamp */
 	struct cnxk_timesync_info **tstamp;
 	/* Add Work Fastpath data */
-	uint64_t xaq_lmt __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t xaq_lmt;
 	uint64_t *fc_mem;
 	uintptr_t grp_base;
 	/* Tx Fastpath data */
-	uint64_t lso_tun_fmt __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t lso_tun_fmt;
 	uint8_t tx_adptr_data[];
-} __rte_cache_aligned;
+};
 
-struct cnxk_sso_hws_cookie {
+struct __rte_cache_aligned cnxk_sso_hws_cookie {
 	const struct rte_eventdev *event_dev;
 	bool configured;
-} __rte_cache_aligned;
+};
 
 static inline int
 parse_kvargs_flag(const char *key, const char *value, void *opaque)
diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h
index b91fcb3..6cf10db 100644
--- a/drivers/event/cnxk/cnxk_tim_evdev.h
+++ b/drivers/event/cnxk/cnxk_tim_evdev.h
@@ -123,7 +123,7 @@ struct cnxk_tim_bkt {
 	uint64_t pad;
 };
 
-struct cnxk_tim_ring {
+struct __rte_cache_aligned cnxk_tim_ring {
 	uint16_t nb_chunk_slots;
 	uint32_t nb_bkts;
 	uintptr_t tbase;
@@ -149,7 +149,7 @@ struct cnxk_tim_ring {
 	uint64_t nb_chunks;
 	uint64_t chunk_sz;
 	enum roc_tim_clk_src clk_src;
-} __rte_cache_aligned;
+};
 
 struct cnxk_tim_ent {
 	uint64_t w0;
diff --git a/drivers/event/cnxk/cnxk_tim_worker.c b/drivers/event/cnxk/cnxk_tim_worker.c
index 944490d..1f2f2fe 100644
--- a/drivers/event/cnxk/cnxk_tim_worker.c
+++ b/drivers/event/cnxk/cnxk_tim_worker.c
@@ -92,7 +92,7 @@
 			    const uint64_t timeout_tick,
 			    const uint16_t nb_timers, const uint8_t flags)
 {
-	struct cnxk_tim_ent entry[CNXK_TIM_MAX_BURST] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct cnxk_tim_ent entry[CNXK_TIM_MAX_BURST];
 	struct cnxk_tim_ring *tim_ring = adptr->data->adapter_priv;
 	uint16_t set_timers = 0;
 	uint16_t arr_idx = 0;
-- 
1.8.3.1

[PATCH 47/83] dma/skeleton: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/dma/skeleton/skeleton_dmadev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/skeleton/skeleton_dmadev.h b/drivers/dma/skeleton/skeleton_dmadev.h
index c9bf315..cfd37d1 100644
--- a/drivers/dma/skeleton/skeleton_dmadev.h
+++ b/drivers/dma/skeleton/skeleton_dmadev.h
@@ -73,13 +73,13 @@ struct skeldma_hw {
 	struct rte_ring *desc_completed;
 
 	/* Cache delimiter for dataplane API's operation data */
-	char cache1 __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char cache1;
 	uint16_t ridx;  /* ring idx */
 	uint16_t last_ridx;
 	uint64_t submitted_count;
 
 	/* Cache delimiter for cpuwork thread's operation data */
-	char cache2 __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char cache2;
 	volatile uint32_t zero_req_count;
 	uint64_t completed_count;
 };
-- 
1.8.3.1

[PATCH 48/83] dma/ioat: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/dma/ioat/ioat_internal.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/ioat/ioat_internal.h b/drivers/dma/ioat/ioat_internal.h
index 4fa19eb..f4285c5 100644
--- a/drivers/dma/ioat/ioat_internal.h
+++ b/drivers/dma/ioat/ioat_internal.h
@@ -12,7 +12,7 @@ struct ioat_dmadev {
 	struct rte_dma_vchan_conf qcfg;
 	struct rte_dma_stats stats;
 
-	volatile uint16_t *doorbell __rte_cache_aligned;
+	volatile alignas(RTE_CACHE_LINE_SIZE) uint16_t *doorbell;
 	phys_addr_t status_addr;
 	phys_addr_t ring_addr;
 
@@ -25,7 +25,7 @@ struct ioat_dmadev {
 	unsigned int failure; /* Used to store chanerr for error handling. */
 
 	/* To report completions, the device will write status back here. */
-	volatile uint64_t status __rte_cache_aligned;
+	volatile alignas(RTE_CACHE_LINE_SIZE) uint64_t status;
 
 	/* Pointer to the register bar. */
 	volatile struct ioat_registers *regs;
-- 
1.8.3.1

[PATCH 49/83] dma/idxd: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/dma/idxd/idxd_hw_defs.h | 38 +++++++++++++++++++-------------------
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/dma/idxd/idxd_hw_defs.h b/drivers/dma/idxd/idxd_hw_defs.h
index 7113d22..435c1cd 100644
--- a/drivers/dma/idxd/idxd_hw_defs.h
+++ b/drivers/dma/idxd/idxd_hw_defs.h
@@ -26,7 +26,7 @@ enum rte_idxd_ops {
  * Hardware descriptor used by DSA hardware, for both bursts and
  * for individual operations.
  */
-struct idxd_hw_desc {
+struct __rte_aligned(64) idxd_hw_desc {
 	uint32_t pasid;
 	uint32_t op_flags;
 	rte_iova_t completion;
@@ -43,7 +43,7 @@ struct idxd_hw_desc {
 
 	/* remaining 26 bytes are reserved */
 	uint16_t reserved[13];
-} __rte_aligned(64);
+};
 
 #define IDXD_COMP_STATUS_INCOMPLETE        0
 #define IDXD_COMP_STATUS_SUCCESS           1
@@ -55,7 +55,7 @@ struct idxd_hw_desc {
 /**
  * Completion record structure written back by DSA
  */
-struct idxd_completion {
+struct __rte_aligned(32) idxd_completion {
 	uint8_t status;
 	uint8_t result;
 	/* 16-bits pad here */
@@ -63,7 +63,7 @@ struct idxd_completion {
 
 	rte_iova_t fault_address;
 	uint32_t invalid_flags;
-} __rte_aligned(32);
+};
 
 /*** Definitions for Intel(R) Data Streaming Accelerator  ***/
 
@@ -83,20 +83,20 @@ enum rte_idxd_cmds {
 
 /* General bar0 registers */
 struct rte_idxd_bar0 {
-	uint32_t __rte_cache_aligned version;    /* offset 0x00 */
-	uint64_t __rte_aligned(0x10) gencap;     /* offset 0x10 */
-	uint64_t __rte_aligned(0x10) wqcap;      /* offset 0x20 */
-	uint64_t __rte_aligned(0x10) grpcap;     /* offset 0x30 */
-	uint64_t __rte_aligned(0x08) engcap;     /* offset 0x38 */
-	uint64_t __rte_aligned(0x10) opcap;      /* offset 0x40 */
-	uint64_t __rte_aligned(0x20) offsets[2]; /* offset 0x60 */
-	uint32_t __rte_aligned(0x20) gencfg;     /* offset 0x80 */
-	uint32_t __rte_aligned(0x08) genctrl;    /* offset 0x88 */
-	uint32_t __rte_aligned(0x10) gensts;     /* offset 0x90 */
-	uint32_t __rte_aligned(0x08) intcause;   /* offset 0x98 */
-	uint32_t __rte_aligned(0x10) cmd;        /* offset 0xA0 */
-	uint32_t __rte_aligned(0x08) cmdstatus;  /* offset 0xA8 */
-	uint64_t __rte_aligned(0x20) swerror[4]; /* offset 0xC0 */
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t version;    /* offset 0x00 */
+	alignas(0x10) uint64_t gencap;     /* offset 0x10 */
+	alignas(0x10) uint64_t wqcap;      /* offset 0x20 */
+	alignas(0x10) uint64_t grpcap;     /* offset 0x30 */
+	alignas(0x08) uint64_t engcap;     /* offset 0x38 */
+	alignas(0x10) uint64_t opcap;      /* offset 0x40 */
+	alignas(0x20) uint64_t offsets[2]; /* offset 0x60 */
+	alignas(0x20) uint32_t gencfg;     /* offset 0x80 */
+	alignas(0x08) uint32_t genctrl;    /* offset 0x88 */
+	alignas(0x10) uint32_t gensts;     /* offset 0x90 */
+	alignas(0x08) uint32_t intcause;   /* offset 0x98 */
+	alignas(0x10) uint32_t cmd;        /* offset 0xA0 */
+	alignas(0x08) uint32_t cmdstatus;  /* offset 0xA8 */
+	alignas(0x20) uint64_t swerror[4]; /* offset 0xC0 */
 };
 
 /* workqueue config is provided by array of uint32_t. */
@@ -118,7 +118,7 @@ enum rte_idxd_wqcfg {
 #define WQ_STATE_MASK 0x3
 
 struct rte_idxd_grpcfg {
-	uint64_t grpwqcfg[4]  __rte_cache_aligned; /* 64-byte register set */
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t grpwqcfg[4]; /* 64-byte register set */
 	uint64_t grpengcfg;  /* offset 32 */
 	uint32_t grpflags;   /* offset 40 */
 };
-- 
1.8.3.1

[PATCH 50/83] crypto/uadk: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/uadk/uadk_crypto_pmd_private.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/crypto/uadk/uadk_crypto_pmd_private.h b/drivers/crypto/uadk/uadk_crypto_pmd_private.h
index 5a7dbff..7a35c94 100644
--- a/drivers/crypto/uadk/uadk_crypto_pmd_private.h
+++ b/drivers/crypto/uadk/uadk_crypto_pmd_private.h
@@ -9,7 +9,7 @@
 /* Maximum length for digest (SHA-512 needs 64 bytes) */
 #define DIGEST_LENGTH_MAX 64
 
-struct uadk_qp {
+struct __rte_cache_aligned uadk_qp {
 	/* Ring for placing process packets */
 	struct rte_ring *processed_pkts;
 	/* Queue pair statistics */
@@ -23,7 +23,7 @@ struct uadk_qp {
 	 * by the user (using authentication verify operation)
 	 */
 	uint8_t temp_digest[DIGEST_LENGTH_MAX];
-} __rte_cache_aligned;
+};
 
 enum uadk_chain_order {
 	UADK_CHAIN_ONLY_CIPHER,
@@ -33,7 +33,7 @@ enum uadk_chain_order {
 	UADK_CHAIN_NOT_SUPPORTED
 };
 
-struct uadk_crypto_session {
+struct __rte_cache_aligned uadk_crypto_session {
 	handle_t handle_cipher;
 	handle_t handle_digest;
 	enum uadk_chain_order chain_order;
@@ -56,19 +56,19 @@ struct uadk_crypto_session {
 		enum rte_crypto_auth_operation operation;
 		uint16_t digest_length;
 	} auth;
-} __rte_cache_aligned;
+};
 
 enum uadk_crypto_version {
 	UADK_CRYPTO_V2,
 	UADK_CRYPTO_V3,
 };
 
-struct uadk_crypto_priv {
+struct __rte_cache_aligned uadk_crypto_priv {
 	bool env_cipher_init;
 	bool env_auth_init;
 	enum uadk_crypto_version version;
 	unsigned int max_nb_qpairs;
-} __rte_cache_aligned;
+};
 
 extern int uadk_crypto_logtype;
 
-- 
1.8.3.1

[PATCH 51/83] crypto/scheduler: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/scheduler/scheduler_pkt_size_distr.c | 4 ++--
 drivers/crypto/scheduler/scheduler_pmd_private.h    | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/crypto/scheduler/scheduler_pkt_size_distr.c b/drivers/crypto/scheduler/scheduler_pkt_size_distr.c
index 30bb5ce..1334a79 100644
--- a/drivers/crypto/scheduler/scheduler_pkt_size_distr.c
+++ b/drivers/crypto/scheduler/scheduler_pkt_size_distr.c
@@ -20,12 +20,12 @@ struct psd_scheduler_ctx {
 };
 
 /** pkt size based scheduler queue pair context */
-struct psd_scheduler_qp_ctx {
+struct __rte_cache_aligned psd_scheduler_qp_ctx {
 	struct scheduler_worker primary_worker;
 	struct scheduler_worker secondary_worker;
 	uint32_t threshold;
 	uint8_t deq_idx;
-} __rte_cache_aligned;
+};
 
 /** scheduling operation variables' wrapping */
 struct psd_schedule_op {
diff --git a/drivers/crypto/scheduler/scheduler_pmd_private.h b/drivers/crypto/scheduler/scheduler_pmd_private.h
index 2611027..0f0a6b4 100644
--- a/drivers/crypto/scheduler/scheduler_pmd_private.h
+++ b/drivers/crypto/scheduler/scheduler_pmd_private.h
@@ -27,7 +27,7 @@ struct scheduler_worker {
 	uint8_t driver_id;
 };
 
-struct scheduler_ctx {
+struct __rte_cache_aligned scheduler_ctx {
 	void *private_ctx;
 	/**< private scheduler context pointer */
 
@@ -55,15 +55,15 @@ struct scheduler_ctx {
 
 	char *init_worker_names[RTE_CRYPTODEV_SCHEDULER_MAX_NB_WORKERS];
 	int nb_init_workers;
-} __rte_cache_aligned;
+};
 
-struct scheduler_qp_ctx {
+struct __rte_cache_aligned scheduler_qp_ctx {
 	void *private_qp_ctx;
 
 	uint32_t max_nb_objs;
 
 	struct rte_ring *order_ring;
-} __rte_cache_aligned;
+};
 
 struct scheduler_session_ctx {
 	uint32_t ref_cnt;
-- 
1.8.3.1

[PATCH 52/83] crypto/qat: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/qat/qat_asym.h        | 15 +++++++--------
 drivers/crypto/qat/qat_sym.h         |  8 ++++----
 drivers/crypto/qat/qat_sym_session.h | 10 +++++-----
 3 files changed, 16 insertions(+), 17 deletions(-)

diff --git a/drivers/crypto/qat/qat_asym.h b/drivers/crypto/qat/qat_asym.h
index 6628656..00275fa 100644
--- a/drivers/crypto/qat/qat_asym.h
+++ b/drivers/crypto/qat/qat_asym.h
@@ -18,7 +18,6 @@
 typedef uint64_t large_int_ptr;
 #define MAX_PKE_PARAMS	8
 #define QAT_PKE_MAX_LN_SIZE 512
-#define _PKE_ALIGN_ __rte_aligned(8)
 
 #define QAT_ASYM_MAX_PARAMS			8
 #define QAT_ASYM_MODINV_NUM_IN_PARAMS		2
@@ -57,20 +56,20 @@
 		}							\
 	}
 
-struct qat_asym_op_cookie {
+struct __rte_aligned(8) qat_asym_op_cookie {
 	uint64_t error;
 	uint32_t alg_bytesize; /*< Bytesize of algorithm */
 	uint32_t qat_func_alignsize; /*< Aligned bytesize of qat function */
 	rte_iova_t input_addr;
 	rte_iova_t output_addr;
-	large_int_ptr input_params_ptrs[MAX_PKE_PARAMS] _PKE_ALIGN_;
-	large_int_ptr output_params_ptrs[MAX_PKE_PARAMS] _PKE_ALIGN_;
-	union {
+	alignas(8) large_int_ptr input_params_ptrs[MAX_PKE_PARAMS];
+	alignas(8) large_int_ptr output_params_ptrs[MAX_PKE_PARAMS];
+	union __rte_aligned(8) {
 		uint8_t input_array[MAX_PKE_PARAMS][QAT_PKE_MAX_LN_SIZE];
 		uint8_t input_buffer[MAX_PKE_PARAMS * QAT_PKE_MAX_LN_SIZE];
-	} _PKE_ALIGN_;
-	uint8_t output_array[MAX_PKE_PARAMS][QAT_PKE_MAX_LN_SIZE] _PKE_ALIGN_;
-} _PKE_ALIGN_;
+	};
+	alignas(8) uint8_t output_array[MAX_PKE_PARAMS][QAT_PKE_MAX_LN_SIZE];
+};
 
 struct qat_asym_session {
 	struct icp_qat_fw_pke_request req_tmpl;
diff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h
index 6616064..eedf5de 100644
--- a/drivers/crypto/qat/qat_sym.h
+++ b/drivers/crypto/qat/qat_sym.h
@@ -103,10 +103,10 @@
 
 struct qat_sym_session;
 
-struct qat_sym_sgl {
+struct __rte_cache_aligned qat_sym_sgl {
 	qat_sgl_hdr;
 	struct qat_flat_buf buffers[QAT_SYM_SGL_MAX_NUMBER];
-} __rte_packed __rte_cache_aligned;
+} __rte_packed;
 
 struct qat_sym_op_cookie {
 	struct qat_sym_sgl qat_sgl_src;
@@ -116,8 +116,8 @@ struct qat_sym_op_cookie {
 	union {
 		/* Used for Single-Pass AES-GMAC only */
 		struct {
-			struct icp_qat_hw_cipher_algo_blk cd_cipher
-					__rte_packed __rte_cache_aligned;
+			alignas(RTE_CACHE_LINE_SIZE) struct icp_qat_hw_cipher_algo_blk cd_cipher
+					__rte_packed;
 			phys_addr_t cd_phys_addr;
 		} spc_gmac;
 	} opt;
diff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_sym_session.h
index c41f8cc..f263477 100644
--- a/drivers/crypto/qat/qat_sym_session.h
+++ b/drivers/crypto/qat/qat_sym_session.h
@@ -92,7 +92,7 @@ typedef int (*qat_sym_build_request_t)(void *in_op, struct qat_sym_session *ctx,
 		uint8_t *out_msg, void *op_cookie);
 
 /* Common content descriptor */
-struct qat_sym_cd {
+struct __rte_cache_aligned qat_sym_cd {
 	struct icp_qat_hw_cipher_algo_blk cipher;
 	union {
 		struct icp_qat_hw_auth_algo_blk hash;
@@ -100,7 +100,7 @@ struct qat_sym_cd {
 		struct icp_qat_hw_gen3_crc_cd crc_gen3;
 		struct icp_qat_hw_gen4_crc_cd crc_gen4;
 	};
-} __rte_packed __rte_cache_aligned;
+} __rte_packed;
 
 struct qat_sym_session {
 	enum icp_qat_fw_la_cmd_id qat_cmd;
@@ -115,7 +115,7 @@ struct qat_sym_session {
 		struct qat_sym_cd cd;
 		uint8_t key_array[32];
 	};
-	uint8_t prefix_state[QAT_PREFIX_TBL_SIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t prefix_state[QAT_PREFIX_TBL_SIZE];
 	uint8_t *cd_cur_ptr;
 	union {
 		phys_addr_t cd_paddr;
@@ -153,8 +153,8 @@ struct qat_sym_session {
 	qat_sym_build_request_t build_request[2];
 #ifndef RTE_QAT_OPENSSL
 	IMB_MGR *mb_mgr;
-	uint64_t expkey[4*15] __rte_aligned(16);
-	uint32_t dust[4*15] __rte_aligned(16);
+	alignas(16) uint64_t expkey[4 * 15];
+	alignas(16) uint32_t dust[4 * 15];
 	uint8_t docsis_key_len;
 #endif
 };
-- 
1.8.3.1

[PATCH 53/83] crypto/openssl: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/openssl/openssl_pmd_private.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/crypto/openssl/openssl_pmd_private.h b/drivers/crypto/openssl/openssl_pmd_private.h
index 334912d..0f038b2 100644
--- a/drivers/crypto/openssl/openssl_pmd_private.h
+++ b/drivers/crypto/openssl/openssl_pmd_private.h
@@ -62,7 +62,7 @@ struct openssl_private {
 };
 
 /** OPENSSL crypto queue pair */
-struct openssl_qp {
+struct __rte_cache_aligned openssl_qp {
 	uint16_t id;
 	/**< Queue Pair Identifier */
 	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
@@ -78,10 +78,10 @@ struct openssl_qp {
 	 * by the driver when verifying a digest provided
 	 * by the user (using authentication verify operation)
 	 */
-} __rte_cache_aligned;
+};
 
 /** OPENSSL crypto private session structure */
-struct openssl_session {
+struct __rte_cache_aligned openssl_session {
 	enum openssl_chain_order chain_order;
 	/**< chain order mode */
 
@@ -166,10 +166,10 @@ struct openssl_session {
 		/**< digest length */
 	} auth;
 
-} __rte_cache_aligned;
+};
 
 /** OPENSSL crypto private asymmetric session structure */
-struct openssl_asym_session {
+struct __rte_cache_aligned openssl_asym_session {
 	enum rte_crypto_asym_xform_type xfrm_type;
 	union {
 		struct rsa {
@@ -213,7 +213,7 @@ struct openssl_asym_session {
 #endif
 		} sm2;
 	} u;
-} __rte_cache_aligned;
+};
 /** Set and validate OPENSSL crypto session parameters */
 extern int
 openssl_set_session_parameters(struct openssl_session *sess,
-- 
1.8.3.1

[PATCH 54/83] crypto/octeontx: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/octeontx/otx_cryptodev_hw_access.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
index 4647d56..6e2afde 100644
--- a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
+++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
@@ -77,7 +77,7 @@ struct command_queue {
 /**
  * CPT VF device structure
  */
-struct cpt_vf {
+struct __rte_cache_aligned cpt_vf {
 	/** CPT instance */
 	struct cpt_instance instance;
 	/** Register start address */
@@ -111,7 +111,7 @@ struct cpt_vf {
 
 	/** Device name */
 	char dev_name[32];
-} __rte_cache_aligned;
+};
 
 /*
  * CPT Registers map for 81xx
-- 
1.8.3.1

[PATCH 55/83] crypto/null: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/null/null_crypto_pmd_private.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/null/null_crypto_pmd_private.h b/drivers/crypto/null/null_crypto_pmd_private.h
index ae34ce6..645a68d 100644
--- a/drivers/crypto/null/null_crypto_pmd_private.h
+++ b/drivers/crypto/null/null_crypto_pmd_private.h
@@ -22,7 +22,7 @@ struct null_crypto_private {
 };
 
 /** NULL crypto queue pair */
-struct null_crypto_qp {
+struct __rte_cache_aligned null_crypto_qp {
 	uint16_t id;
 	/**< Queue Pair Identifier */
 	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
@@ -33,13 +33,13 @@ struct null_crypto_qp {
 	/**< Session Mempool */
 	struct rte_cryptodev_stats qp_stats;
 	/**< Queue pair statistics */
-} __rte_cache_aligned;
+};
 
 
 /** NULL crypto private session structure */
-struct null_crypto_session {
+struct __rte_cache_aligned null_crypto_session {
 	uint32_t reserved;
-} __rte_cache_aligned;
+};
 
 /** Set and validate NULL crypto session parameters */
 extern int
-- 
1.8.3.1

[PATCH 56/83] crypto/mvsam: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/mvsam/mrvl_pmd_private.h | 12 ++++++------
 drivers/crypto/mvsam/rte_mrvl_pmd.c     | 12 +++++-------
 2 files changed, 11 insertions(+), 13 deletions(-)

diff --git a/drivers/crypto/mvsam/mrvl_pmd_private.h b/drivers/crypto/mvsam/mrvl_pmd_private.h
index 719d73d..80ff229 100644
--- a/drivers/crypto/mvsam/mrvl_pmd_private.h
+++ b/drivers/crypto/mvsam/mrvl_pmd_private.h
@@ -44,7 +44,7 @@ struct mrvl_crypto_private {
 };
 
 /** MRVL crypto queue pair structure. */
-struct mrvl_crypto_qp {
+struct __rte_cache_aligned mrvl_crypto_qp {
 	/** SAM CIO (MUSDK Queue Pair equivalent).*/
 	struct sam_cio *cio;
 
@@ -59,10 +59,10 @@ struct mrvl_crypto_qp {
 
 	/** CIO initialization parameters.*/
 	struct sam_cio_params cio_params;
-} __rte_cache_aligned;
+};
 
 /** MRVL crypto private session structure. */
-struct mrvl_crypto_session {
+struct __rte_cache_aligned mrvl_crypto_session {
 	/** Crypto operations chain order. */
 	enum mrvl_crypto_chain_order chain_order;
 
@@ -74,12 +74,12 @@ struct mrvl_crypto_session {
 
 	/** Cipher IV offset. */
 	uint16_t cipher_iv_offset;
-} __rte_cache_aligned;
+};
 
-struct mrvl_crypto_src_table {
+struct __rte_cache_aligned mrvl_crypto_src_table {
 	uint16_t iter_ops;
 	struct sam_buf_info src_bd[MRVL_MAX_SEGMENTS];
-} __rte_cache_aligned;
+};
 
 /** Set and validate MRVL crypto session parameters */
 int
diff --git a/drivers/crypto/mvsam/rte_mrvl_pmd.c b/drivers/crypto/mvsam/rte_mrvl_pmd.c
index 1641da9..193b7fb 100644
--- a/drivers/crypto/mvsam/rte_mrvl_pmd.c
+++ b/drivers/crypto/mvsam/rte_mrvl_pmd.c
@@ -47,22 +47,20 @@ enum algo_supported {
 };
 
 /** Map elements for cipher mapping.*/
-struct cipher_params_mapping {
+/* We want to squeeze in multiple maps into the cache line. */
+struct __rte_aligned(32) cipher_params_mapping {
 	enum algo_supported  supported;   /**< On/Off switch */
 	enum sam_cipher_alg  cipher_alg;  /**< Cipher algorithm */
 	enum sam_cipher_mode cipher_mode; /**< Cipher mode */
 	unsigned int max_key_len;         /**< Maximum key length (in bytes)*/
-}
-/* We want to squeeze in multiple maps into the cache line. */
-__rte_aligned(32);
+};
 
 /** Map elements for auth mapping.*/
-struct auth_params_mapping {
+/* We want to squeeze in multiple maps into the cache line. */
+struct __rte_aligned(32) auth_params_mapping {
 	enum algo_supported supported;  /**< On/off switch */
 	enum sam_auth_alg   auth_alg;   /**< Auth algorithm */
 }
-/* We want to squeeze in multiple maps into the cache line. */
-__rte_aligned(32);
 
 /**
  * Map of supported cipher algorithms.
-- 
1.8.3.1

[PATCH 57/83] crypto/mlx5: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/mlx5/mlx5_crypto.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/mlx5/mlx5_crypto.h b/drivers/crypto/mlx5/mlx5_crypto.h
index 36dacdc..5432484 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.h
+++ b/drivers/crypto/mlx5/mlx5_crypto.h
@@ -80,12 +80,12 @@ struct mlx5_crypto_qp {
 	uint16_t cpy_tag_op;
 };
 
-struct mlx5_crypto_dek {
+struct __rte_cache_aligned mlx5_crypto_dek {
 	struct mlx5_list_entry entry; /* Pointer to DEK hash list entry. */
 	struct mlx5_devx_obj *obj; /* Pointer to DEK DevX object. */
 	uint8_t data[MLX5_CRYPTO_KEY_LENGTH]; /* DEK key data. */
 	uint32_t size; /* key+keytag size. */
-} __rte_cache_aligned;
+};
 
 struct mlx5_crypto_devarg_params {
 	bool login_devarg;
-- 
1.8.3.1

[PATCH 58/83] crypto/ipsec_mb: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/ipsec_mb/pmd_aesni_mb.c         |  4 ++--
 drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h    | 24 ++++++++++++------------
 drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h |  4 ++--
 drivers/crypto/ipsec_mb/pmd_kasumi_priv.h      |  4 ++--
 drivers/crypto/ipsec_mb/pmd_snow3g_priv.h      |  4 ++--
 drivers/crypto/ipsec_mb/pmd_zuc_priv.h         |  4 ++--
 6 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
index 4de4866..69a5466 100644
--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
@@ -32,8 +32,8 @@ struct aesni_mb_op_buf_data {
 {
 	uint32_t i, length;
 
-	uint8_t ipad_buf[blocksize] __rte_aligned(16);
-	uint8_t opad_buf[blocksize] __rte_aligned(16);
+	alignas(16) uint8_t ipad_buf[blocksize];
+	alignas(16) uint8_t opad_buf[blocksize];
 
 	/* Setup inner and outer pads */
 	memset(ipad_buf, HMAC_IPAD_VALUE, blocksize);
diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
index 85994fe..eec8931 100644
--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
@@ -848,7 +848,7 @@ struct aesni_mb_qp_data {
 }
 
 /** AES-NI multi-buffer private session structure */
-struct aesni_mb_session {
+struct __rte_cache_aligned aesni_mb_session {
 	IMB_JOB template_job;
 	/*< Template job structure */
 	uint32_t session_id;
@@ -869,9 +869,9 @@ struct aesni_mb_session {
 	struct {
 		union {
 			struct {
-				uint32_t encode[60] __rte_aligned(16);
+				alignas(16) uint32_t encode[60];
 				/* *< encode key */
-				uint32_t decode[60] __rte_aligned(16);
+				alignas(16) uint32_t decode[60];
 				/* *< decode key */
 			} expanded_aes_keys;
 			/* *< Expanded AES keys - Allocating space to
@@ -903,9 +903,9 @@ struct aesni_mb_session {
 		/* *< auth operation generate or verify */
 		union {
 			struct {
-				uint8_t inner[128] __rte_aligned(16);
+				alignas(16) uint8_t inner[128];
 				/* *< inner pad */
-				uint8_t outer[128] __rte_aligned(16);
+				alignas(16) uint8_t outer[128];
 				/* *< outer pad */
 			} pads;
 			/* *< HMAC Authentication pads -
@@ -915,20 +915,20 @@ struct aesni_mb_session {
 			 */
 
 			struct {
-				uint32_t k1_expanded[44] __rte_aligned(16);
+				alignas(16) uint32_t k1_expanded[44];
 				/* *< k1 (expanded key). */
-				uint8_t k2[16] __rte_aligned(16);
+				alignas(16) uint8_t k2[16];
 				/* *< k2. */
-				uint8_t k3[16] __rte_aligned(16);
+				alignas(16) uint8_t k3[16];
 				/* *< k3. */
 			} xcbc;
 
 			struct {
-				uint32_t expkey[60] __rte_aligned(16);
+				alignas(16) uint32_t expkey[60];
 				/* *< k1 (expanded key). */
-				uint32_t skey1[4] __rte_aligned(16);
+				alignas(16) uint32_t skey1[4];
 				/* *< k2. */
-				uint32_t skey2[4] __rte_aligned(16);
+				alignas(16) uint32_t skey2[4];
 				/* *< k3. */
 			} cmac;
 			/* *< Expanded XCBC authentication keys */
@@ -943,7 +943,7 @@ struct aesni_mb_session {
 		uint16_t req_digest_len;
 
 	} auth;
-} __rte_cache_aligned;
+};
 
 typedef void (*hash_one_block_t)(const void *data, void *digest);
 typedef void (*aes_keyexp_t)(const void *key, void *enc_exp_keys,
diff --git a/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h b/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h
index 842f62f..0eca63c 100644
--- a/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h
@@ -46,7 +46,7 @@ struct rte_cryptodev_capabilities chacha20_poly1305_capabilities[] = {
 uint8_t pmd_driver_id_chacha20_poly1305;
 
 /** CHACHA20 POLY1305 private session structure */
-struct chacha20_poly1305_session {
+struct __rte_cache_aligned chacha20_poly1305_session {
 	struct {
 		uint16_t length;
 		uint16_t offset;
@@ -60,7 +60,7 @@ struct chacha20_poly1305_session {
 	/**< Generated digest length */
 	uint8_t key[CHACHA20_POLY1305_KEY_SIZE];
 	enum ipsec_mb_operation op;
-} __rte_cache_aligned;
+};
 
 struct chacha20_poly1305_qp_data {
 	struct chacha20_poly1305_context_data chacha20_poly1305_ctx_data;
diff --git a/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h b/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h
index 8db1d1c..c2e28ea 100644
--- a/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h
@@ -61,14 +61,14 @@
 };
 
 /** KASUMI private session structure */
-struct kasumi_session {
+struct __rte_cache_aligned kasumi_session {
 	/* Keys have to be 16-byte aligned */
 	kasumi_key_sched_t pKeySched_cipher;
 	kasumi_key_sched_t pKeySched_hash;
 	enum ipsec_mb_operation op;
 	enum rte_crypto_auth_operation auth_op;
 	uint16_t cipher_iv_offset;
-} __rte_cache_aligned;
+};
 
 struct kasumi_qp_data {
 	uint8_t temp_digest[KASUMI_DIGEST_LENGTH];
diff --git a/drivers/crypto/ipsec_mb/pmd_snow3g_priv.h b/drivers/crypto/ipsec_mb/pmd_snow3g_priv.h
index ca1ce7f..9492a0b 100644
--- a/drivers/crypto/ipsec_mb/pmd_snow3g_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_snow3g_priv.h
@@ -65,14 +65,14 @@
 };
 
 /** SNOW 3G private session structure */
-struct snow3g_session {
+struct __rte_cache_aligned snow3g_session {
 	enum ipsec_mb_operation op;
 	enum rte_crypto_auth_operation auth_op;
 	snow3g_key_schedule_t pKeySched_cipher;
 	snow3g_key_schedule_t pKeySched_hash;
 	uint16_t cipher_iv_offset;
 	uint16_t auth_iv_offset;
-} __rte_cache_aligned;
+};
 
 struct snow3g_qp_data {
 	uint8_t temp_digest[SNOW3G_DIGEST_LENGTH];
diff --git a/drivers/crypto/ipsec_mb/pmd_zuc_priv.h b/drivers/crypto/ipsec_mb/pmd_zuc_priv.h
index 76fd675..a17a65a 100644
--- a/drivers/crypto/ipsec_mb/pmd_zuc_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_zuc_priv.h
@@ -64,14 +64,14 @@
 };
 
 /** ZUC private session structure */
-struct zuc_session {
+struct __rte_cache_aligned zuc_session {
 	enum ipsec_mb_operation op;
 	enum rte_crypto_auth_operation auth_op;
 	uint8_t pKey_cipher[ZUC_IV_KEY_LENGTH];
 	uint8_t pKey_hash[ZUC_IV_KEY_LENGTH];
 	uint16_t cipher_iv_offset;
 	uint16_t auth_iv_offset;
-} __rte_cache_aligned;
+};
 
 struct zuc_qp_data {
 
-- 
1.8.3.1

[PATCH 59/83] crypto/cnxk: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/cnxk/cn10k_cryptodev_sec.h | 4 ++--
 drivers/crypto/cnxk/cn10k_ipsec.h         | 4 ++--
 drivers/crypto/cnxk/cn10k_tls.h           | 4 ++--
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  | 2 +-
 drivers/crypto/cnxk/cn9k_ipsec.h          | 8 ++++----
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h  | 4 ++--
 drivers/crypto/cnxk/cnxk_se.h             | 4 ++--
 7 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_sec.h b/drivers/crypto/cnxk/cn10k_cryptodev_sec.h
index 878cf78..77faaa0 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_sec.h
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_sec.h
@@ -25,7 +25,7 @@ struct cn10k_tls_opt {
 	uint16_t mac_len : 7;
 };
 
-struct cn10k_sec_session {
+struct __rte_aligned(ROC_ALIGN) cn10k_sec_session {
 	uint8_t rte_sess[SEC_SESS_SIZE];
 
 	/** PMD private space */
@@ -57,7 +57,7 @@ struct cn10k_sec_session {
 		struct cn10k_ipsec_sa sa;
 		struct cn10k_tls_record tls_rec;
 	};
-} __rte_aligned(ROC_ALIGN);
+};
 
 static inline uint64_t
 cpt_inst_w7_get(struct roc_cpt *roc_cpt, void *cptr)
diff --git a/drivers/crypto/cnxk/cn10k_ipsec.h b/drivers/crypto/cnxk/cn10k_ipsec.h
index 0d1e14a..4e4e68f 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.h
+++ b/drivers/crypto/cnxk/cn10k_ipsec.h
@@ -18,14 +18,14 @@
 /* Forward declaration */
 struct cn10k_sec_session;
 
-struct cn10k_ipsec_sa {
+struct __rte_aligned(ROC_ALIGN) cn10k_ipsec_sa {
 	union {
 		/** Inbound SA */
 		struct roc_ot_ipsec_inb_sa in_sa;
 		/** Outbound SA */
 		struct roc_ot_ipsec_outb_sa out_sa;
 	};
-} __rte_aligned(ROC_ALIGN);
+};
 
 int cn10k_ipsec_session_create(struct cnxk_cpt_vf *vf, struct cnxk_cpt_qp *qp,
 			       struct rte_security_ipsec_xform *ipsec_xfrm,
diff --git a/drivers/crypto/cnxk/cn10k_tls.h b/drivers/crypto/cnxk/cn10k_tls.h
index 9635bdd..c6bd16d 100644
--- a/drivers/crypto/cnxk/cn10k_tls.h
+++ b/drivers/crypto/cnxk/cn10k_tls.h
@@ -16,14 +16,14 @@
 /* Forward declaration */
 struct cn10k_sec_session;
 
-struct cn10k_tls_record {
+struct __rte_aligned(ROC_ALIGN) cn10k_tls_record {
 	union {
 		/** Read SA */
 		struct roc_ie_ot_tls_read_sa read_sa;
 		/** Write SA */
 		struct roc_ie_ot_tls_write_sa write_sa;
 	};
-} __rte_aligned(ROC_ALIGN);
+};
 
 int cn10k_tls_record_session_update(struct cnxk_cpt_vf *vf, struct cnxk_cpt_qp *qp,
 				    struct cn10k_sec_session *sess,
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
index 125a464..96a75a7 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
@@ -126,7 +126,7 @@
 cn9k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 {
 	struct cpt_inflight_req *infl_req_1, *infl_req_2;
-	struct cpt_inst_s inst[2] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct cpt_inst_s inst[2];
 	struct rte_crypto_op *op_1, *op_2;
 	uint16_t nb_allowed, count = 0;
 	struct cnxk_cpt_qp *qp = qptr;
diff --git a/drivers/crypto/cnxk/cn9k_ipsec.h b/drivers/crypto/cnxk/cn9k_ipsec.h
index d28642e..4e8d815 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.h
+++ b/drivers/crypto/cnxk/cn9k_ipsec.h
@@ -11,18 +11,18 @@
 #include "cnxk_security.h"
 #include "cnxk_security_ar.h"
 
-struct cn9k_ipsec_sa {
+struct __rte_aligned(8) cn9k_ipsec_sa {
 	union {
 		/** Inbound SA */
 		struct roc_ie_on_inb_sa in_sa;
 		/** Outbound SA */
 		struct roc_ie_on_outb_sa out_sa;
 	};
-} __rte_aligned(8);
+};
 
 #define SEC_SESS_SIZE sizeof(struct rte_security_session)
 
-struct cn9k_sec_session {
+struct __rte_cache_aligned cn9k_sec_session {
 	uint8_t rte_sess[SEC_SESS_SIZE];
 
 	/** PMD private space */
@@ -57,7 +57,7 @@ struct cn9k_sec_session {
 	struct cnxk_cpt_qp *qp;
 
 	struct cn9k_ipsec_sa sa;
-} __rte_cache_aligned;
+};
 
 void cn9k_sec_ops_override(void);
 
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
index e7bba25..46efc4a 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
@@ -42,7 +42,7 @@ struct cpt_qp_meta_info {
 #define CPT_OP_FLAGS_IPSEC_DIR_INBOUND (1 << 2)
 #define CPT_OP_FLAGS_IPSEC_INB_REPLAY  (1 << 3)
 
-struct cpt_inflight_req {
+struct __rte_aligned(ROC_ALIGN) cpt_inflight_req {
 	union cpt_res_s res;
 	union {
 		void *opaque;
@@ -59,7 +59,7 @@ struct cpt_inflight_req {
 	uint8_t *rptr;
 #endif
 	void *qp;
-} __rte_aligned(ROC_ALIGN);
+};
 
 PLT_STATIC_ASSERT(sizeof(struct cpt_inflight_req) == ROC_CACHE_LINE_SZ);
 
diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h
index c211884..6374718 100644
--- a/drivers/crypto/cnxk/cnxk_se.h
+++ b/drivers/crypto/cnxk/cnxk_se.h
@@ -31,7 +31,7 @@ enum cpt_dp_thread_type {
 
 #define SYM_SESS_SIZE sizeof(struct rte_cryptodev_sym_session)
 
-struct cnxk_se_sess {
+struct __rte_aligned(ROC_ALIGN) cnxk_se_sess {
 	uint8_t rte_sess[SYM_SESS_SIZE];
 
 	uint8_t aes_gcm : 1;
@@ -67,7 +67,7 @@ struct cnxk_se_sess {
 	struct cnxk_cpt_qp *qp;
 	struct roc_se_ctx roc_se_ctx;
 	struct roc_cpt_lf *lf;
-} __rte_aligned(ROC_ALIGN);
+};
 
 struct cnxk_sym_dp_ctx {
 	struct cnxk_se_sess *sess;
-- 
1.8.3.1

[PATCH 60/83] crypto/ccp: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/ccp/ccp_crypto.h      | 4 ++--
 drivers/crypto/ccp/ccp_dev.h         | 8 ++++----
 drivers/crypto/ccp/ccp_pmd_private.h | 8 ++++----
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/crypto/ccp/ccp_crypto.h b/drivers/crypto/ccp/ccp_crypto.h
index d307f73..d0b417c 100644
--- a/drivers/crypto/ccp/ccp_crypto.h
+++ b/drivers/crypto/ccp/ccp_crypto.h
@@ -246,7 +246,7 @@ enum ccp_hash_op {
 };
 
 /* CCP crypto private session structure */
-struct ccp_session {
+struct __rte_cache_aligned ccp_session {
 	bool auth_opt;
 	enum ccp_cmd_order cmd_id;
 	/**< chain order mode */
@@ -314,7 +314,7 @@ struct ccp_session {
 	/**< AEAD Algorithm */
 
 	uint32_t reserved;
-} __rte_cache_aligned;
+};
 
 extern uint8_t ccp_cryptodev_driver_id;
 
diff --git a/drivers/crypto/ccp/ccp_dev.h b/drivers/crypto/ccp/ccp_dev.h
index e3ec481..cd63830 100644
--- a/drivers/crypto/ccp/ccp_dev.h
+++ b/drivers/crypto/ccp/ccp_dev.h
@@ -178,7 +178,7 @@ static inline uint32_t ccp_pci_reg_read(void *base, int offset)
 /**
  * A structure describing a CCP command queue.
  */
-struct ccp_queue {
+struct __rte_cache_aligned ccp_queue {
 	struct ccp_device *dev;
 	char memz_name[RTE_MEMZONE_NAMESIZE];
 
@@ -214,12 +214,12 @@ struct ccp_queue {
 	/**< lsb assigned for sha ctx */
 	uint32_t sb_hmac;
 	/**< lsb assigned for hmac ctx */
-} __rte_cache_aligned;
+};
 
 /**
  * A structure describing a CCP device.
  */
-struct ccp_device {
+struct __rte_cache_aligned ccp_device {
 	TAILQ_ENTRY(ccp_device) next;
 	int id;
 	/**< ccp dev id on platform */
@@ -237,7 +237,7 @@ struct ccp_device {
 	/**< current queue index */
 	int hwrng_retries;
 	/**< retry counter for CCP TRNG */
-} __rte_cache_aligned;
+};
 
 /**< CCP H/W engine related */
 /**
diff --git a/drivers/crypto/ccp/ccp_pmd_private.h b/drivers/crypto/ccp/ccp_pmd_private.h
index 6704e39..390442f 100644
--- a/drivers/crypto/ccp/ccp_pmd_private.h
+++ b/drivers/crypto/ccp/ccp_pmd_private.h
@@ -46,7 +46,7 @@ struct ccp_private {
 };
 
 /* CCP batch info */
-struct ccp_batch_info {
+struct __rte_cache_aligned ccp_batch_info {
 	struct rte_crypto_op *op[CCP_MAX_BURST];
 	/**< optable populated at enque time from app*/
 	int op_idx;
@@ -66,10 +66,10 @@ struct ccp_batch_info {
 	int lsb_buf_idx;
 	uint16_t auth_ctr;
 	/**< auth only ops batch for CPU based auth */
-} __rte_cache_aligned;
+};
 
 /**< CCP crypto queue pair */
-struct ccp_qp {
+struct __rte_cache_aligned ccp_qp {
 	uint16_t id;
 	/**< Queue Pair Identifier */
 	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
@@ -91,7 +91,7 @@ struct ccp_qp {
 	 * by the driver when verifying a digest provided
 	 * by the user (using authentication verify operation)
 	 */
-} __rte_cache_aligned;
+};
 
 
 /**< device specific operations function pointer structure */
-- 
1.8.3.1

[PATCH 61/83] crypto/caam_jr: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/caam_jr/caam_jr_desc.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/caam_jr/caam_jr_desc.h b/drivers/crypto/caam_jr/caam_jr_desc.h
index 6fe6184..c85278b 100644
--- a/drivers/crypto/caam_jr/caam_jr_desc.h
+++ b/drivers/crypto/caam_jr/caam_jr_desc.h
@@ -261,15 +261,15 @@ struct load_command_s {
  * will be type-casted to this one
  * this one.
  */
-struct sec_sd_t {
+struct __rte_aligned(64) sec_sd_t {
 	uint32_t rsvd[MAX_DESC_SIZE_WORDS];
-} __rte_packed __rte_aligned(64);
+} __rte_packed;
 
 /* Structure encompassing a job descriptor which processes
  * a single packet from a context. The job descriptor references
  * a shared descriptor from a SEC context.
  */
-struct sec_job_descriptor_t {
+struct __rte_aligned(64) sec_job_descriptor_t {
 	struct descriptor_header_s deschdr;
 	dma_addr_t sd_ptr;
 	struct seq_out_command_s seq_out;
@@ -280,6 +280,6 @@ struct sec_job_descriptor_t {
 	uint32_t in_ext_length;
 	struct load_command_s load_dpovrd;
 	uint32_t dpovrd;
-} __rte_packed __rte_aligned(64);
+} __rte_packed;
 
 #endif
-- 
1.8.3.1

[PATCH 62/83] crypto/bcmfs: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/bcmfs/bcmfs_qp.h          | 4 ++--
 drivers/crypto/bcmfs/bcmfs_sym_session.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/bcmfs/bcmfs_qp.h b/drivers/crypto/bcmfs/bcmfs_qp.h
index 57fe0a9..42adff9 100644
--- a/drivers/crypto/bcmfs/bcmfs_qp.h
+++ b/drivers/crypto/bcmfs/bcmfs_qp.h
@@ -76,7 +76,7 @@ struct bcmfs_queue {
 	char memz_name[RTE_MEMZONE_NAMESIZE];
 };
 
-struct bcmfs_qp {
+struct __rte_cache_aligned bcmfs_qp {
 	/* Queue-pair ID */
 	uint16_t qpair_id;
 	/* Mapped IO address */
@@ -104,7 +104,7 @@ struct bcmfs_qp {
 	/* a temporary buffer to keep message pointers */
 	struct bcmfs_qp_message *infl_msgs[BCMFS_MAX_REQS_BUFF];
 
-} __rte_cache_aligned;
+};
 
 /* Structure defining h/w queue pair operations */
 struct bcmfs_hw_queue_pair_ops {
diff --git a/drivers/crypto/bcmfs/bcmfs_sym_session.h b/drivers/crypto/bcmfs/bcmfs_sym_session.h
index 4a0a012..12e95f6 100644
--- a/drivers/crypto/bcmfs/bcmfs_sym_session.h
+++ b/drivers/crypto/bcmfs/bcmfs_sym_session.h
@@ -24,7 +24,7 @@ enum bcmfs_sym_chain_order {
 };
 
 /* BCMFS_SYM crypto private session structure */
-struct bcmfs_sym_session {
+struct __rte_cache_aligned bcmfs_sym_session {
 	enum bcmfs_sym_chain_order chain_order;
 
 	/* Cipher Parameters */
@@ -83,7 +83,7 @@ struct bcmfs_sym_session {
 	} aead;
 
 	bool cipher_first;
-} __rte_cache_aligned;
+};
 
 int
 bcmfs_process_crypto_op(struct rte_crypto_op *op,
-- 
1.8.3.1

[PATCH 63/83] crypto/armv8: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/crypto/armv8/armv8_pmd_private.h | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/crypto/armv8/armv8_pmd_private.h b/drivers/crypto/armv8/armv8_pmd_private.h
index 41292d8..c9bbcc2 100644
--- a/drivers/crypto/armv8/armv8_pmd_private.h
+++ b/drivers/crypto/armv8/armv8_pmd_private.h
@@ -99,7 +99,7 @@ struct armv8_crypto_private {
 };
 
 /** ARMv8 crypto queue pair */
-struct armv8_crypto_qp {
+struct __rte_cache_aligned armv8_crypto_qp {
 	uint16_t id;
 	/**< Queue Pair Identifier */
 	struct rte_ring *processed_ops;
@@ -115,10 +115,10 @@ struct armv8_crypto_qp {
 	 * by the driver when verifying a digest provided
 	 * by the user (using authentication verify operation)
 	 */
-} __rte_cache_aligned;
+};
 
 /** ARMv8 crypto private session structure */
-struct armv8_crypto_session {
+struct __rte_cache_aligned armv8_crypto_session {
 	enum armv8_crypto_chain_order chain_order;
 	/**< chain order mode */
 	crypto_func_t crypto_func;
@@ -160,11 +160,9 @@ struct armv8_crypto_session {
 			} auth;
 
 			struct {
-				uint8_t i_key_pad[SHA_BLOCK_MAX]
-							__rte_cache_aligned;
+				alignas(RTE_CACHE_LINE_SIZE) uint8_t i_key_pad[SHA_BLOCK_MAX];
 				/**< inner pad (max supported block length) */
-				uint8_t o_key_pad[SHA_BLOCK_MAX]
-							__rte_cache_aligned;
+				alignas(RTE_CACHE_LINE_SIZE) uint8_t o_key_pad[SHA_BLOCK_MAX];
 				/**< outer pad (max supported block length) */
 				uint8_t key[SHA_BLOCK_MAX];
 				/**< HMAC key (max supported block length)*/
@@ -174,7 +172,7 @@ struct armv8_crypto_session {
 		/* Digest length */
 	} auth;
 
-} __rte_cache_aligned;
+};
 
 /** Set and validate ARMv8 crypto session parameters */
 extern int armv8_crypto_set_session_parameters(
-- 
1.8.3.1

[PATCH 64/83] compress/zlib: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/compress/zlib/zlib_pmd_private.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/compress/zlib/zlib_pmd_private.h b/drivers/compress/zlib/zlib_pmd_private.h
index e36c5dc..46a33d4 100644
--- a/drivers/compress/zlib/zlib_pmd_private.h
+++ b/drivers/compress/zlib/zlib_pmd_private.h
@@ -30,7 +30,7 @@ struct zlib_private {
 	struct rte_mempool *mp;
 };
 
-struct zlib_qp {
+struct __rte_cache_aligned zlib_qp {
 	struct rte_ring *processed_pkts;
 	/**< Ring for placing process packets */
 	struct rte_compressdev_stats qp_stats;
@@ -39,7 +39,7 @@ struct zlib_qp {
 	/**< Queue Pair Identifier */
 	char name[RTE_COMPRESSDEV_NAME_MAX_LEN];
 	/**< Unique Queue Pair Name */
-} __rte_cache_aligned;
+};
 
 /* Algorithm handler function prototype */
 typedef void (*comp_func_t)(struct rte_comp_op *op, z_stream *strm);
@@ -47,19 +47,19 @@ struct zlib_qp {
 typedef int (*comp_free_t)(z_stream *strm);
 
 /** ZLIB Stream structure */
-struct zlib_stream {
+struct __rte_cache_aligned zlib_stream {
 	z_stream strm;
 	/**< zlib stream structure */
 	comp_func_t comp;
 	/**< Operation (compression/decompression) */
 	comp_free_t free;
 	/**< Free Operation (compression/decompression) */
-} __rte_cache_aligned;
+};
 
 /** ZLIB private xform structure */
-struct zlib_priv_xform {
+struct __rte_cache_aligned zlib_priv_xform {
 	struct zlib_stream stream;
-} __rte_cache_aligned;
+};
 
 int
 zlib_set_stream_parameters(const struct rte_comp_xform *xform,
-- 
1.8.3.1

[PATCH 65/83] compress/qat: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/compress/qat/qat_comp.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/compress/qat/qat_comp.h b/drivers/compress/qat/qat_comp.h
index dc220cd..1da4770 100644
--- a/drivers/compress/qat/qat_comp.h
+++ b/drivers/compress/qat/qat_comp.h
@@ -50,10 +50,10 @@ struct array_of_ptrs {
 	phys_addr_t pointer[0];
 };
 
-struct qat_inter_sgl {
+struct __rte_cache_aligned qat_inter_sgl {
 	qat_sgl_hdr;
 	struct qat_flat_buf buffers[QAT_NUM_BUFS_IN_IM_SGL];
-} __rte_packed __rte_cache_aligned;
+} __rte_packed;
 
 
 struct qat_comp_op_cookie {
-- 
1.8.3.1

[PATCH 66/83] compress/octeontx: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/compress/octeontx/otx_zip.h | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/compress/octeontx/otx_zip.h b/drivers/compress/octeontx/otx_zip.h
index 7391360..bb19854 100644
--- a/drivers/compress/octeontx/otx_zip.h
+++ b/drivers/compress/octeontx/otx_zip.h
@@ -106,21 +106,21 @@ typedef int (*comp_func_t)(struct rte_comp_op *op, struct zipvf_qp *qp,
 			   struct zip_stream *zstrm, int num);
 
 /* Scatter gather list */
-struct zipvf_sginfo {
+struct __rte_aligned(16) zipvf_sginfo {
 	union zip_zptr_addr_s  sg_addr;
 	union zip_zptr_ctl_s   sg_ctl;
-} __rte_aligned(16);
+};
 
 /**
  * ZIP private stream structure
  */
-struct zip_stream {
+struct __rte_cache_aligned zip_stream {
 	union zip_inst_s *inst[ZIP_BURST_SIZE];
 	/* zip instruction pointer */
 	comp_func_t func;
 	/* function to process comp operation */
 	void *bufs[MAX_BUFS_PER_STREAM * ZIP_BURST_SIZE];
-} __rte_cache_aligned;
+};
 
 
 /**
@@ -140,7 +140,7 @@ struct zipvf_cmdq {
 /**
  * ZIP device queue structure
  */
-struct zipvf_qp {
+struct __rte_cache_aligned zipvf_qp {
 	struct zipvf_cmdq cmdq;
 	/* Hardware instruction queue structure */
 	struct rte_ring *processed_pkts;
@@ -158,12 +158,12 @@ struct zipvf_qp {
 	/* SGL pointers */
 	uint64_t num_sgbuf;
 	uint64_t enqed;
-} __rte_cache_aligned;
+};
 
 /**
  * ZIP VF device structure.
  */
-struct zip_vf {
+struct __rte_cache_aligned zip_vf {
 	int vfid;
 	/* vf index */
 	struct rte_pci_device *pdev;
@@ -177,7 +177,7 @@ struct zip_vf {
 	struct rte_mempool *zip_mp;
 	struct rte_mempool *sg_mp;
 	/* pointer to pools */
-} __rte_cache_aligned;
+};
 
 
 static inline int
-- 
1.8.3.1

[PATCH 67/83] compress/nitrox: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/compress/nitrox/nitrox_comp_reqmgr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/compress/nitrox/nitrox_comp_reqmgr.c b/drivers/compress/nitrox/nitrox_comp_reqmgr.c
index ca45c3e..89af855 100644
--- a/drivers/compress/nitrox/nitrox_comp_reqmgr.c
+++ b/drivers/compress/nitrox/nitrox_comp_reqmgr.c
@@ -304,7 +304,7 @@ struct nitrox_sgtable {
 
 struct nitrox_softreq {
 	struct nitrox_zip_instr instr;
-	struct nitrox_zip_result zip_res __rte_aligned(8);
+	alignas(8) struct nitrox_zip_result zip_res;
 	uint8_t decomp_threshold[NITROX_ZIP_MAX_ONFSIZE];
 	struct rte_comp_op *op;
 	struct nitrox_sgtable src;
-- 
1.8.3.1

[PATCH 68/83] compress/isal: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/compress/isal/isal_compress_pmd_private.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/compress/isal/isal_compress_pmd_private.h b/drivers/compress/isal/isal_compress_pmd_private.h
index 46e9fcf..c713a5b 100644
--- a/drivers/compress/isal/isal_compress_pmd_private.h
+++ b/drivers/compress/isal/isal_compress_pmd_private.h
@@ -19,7 +19,7 @@ struct isal_comp_private {
 };
 
 /** ISA-L queue pair */
-struct isal_comp_qp {
+struct __rte_cache_aligned isal_comp_qp {
 	/* Queue Pair Identifier */
 	uint16_t id;
 	/* Unique Queue Pair Name */
@@ -34,17 +34,17 @@ struct isal_comp_qp {
 	struct inflate_state *state;
 	/* Number of free elements on ring */
 	uint16_t num_free_elements;
-} __rte_cache_aligned;
+};
 
 /** ISA-L private xform structure */
-struct isal_priv_xform {
+struct __rte_cache_aligned isal_priv_xform {
 	enum rte_comp_xform_type type;
 	union {
 		struct rte_comp_compress_xform compress;
 		struct rte_comp_decompress_xform decompress;
 	};
 	uint32_t level_buffer_size;
-} __rte_cache_aligned;
+};
 
 /** Set and validate NULL comp private xform parameters */
 extern int
-- 
1.8.3.1

[PATCH 69/83] common/qat: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/common/qat/qat_adf/icp_qat_hw.h | 8 ++++----
 drivers/common/qat/qat_common.h         | 4 ++--
 drivers/common/qat/qat_qp.h             | 6 +++---
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/common/qat/qat_adf/icp_qat_hw.h b/drivers/common/qat/qat_adf/icp_qat_hw.h
index 21ee3cf..1d61a0b 100644
--- a/drivers/common/qat/qat_adf/icp_qat_hw.h
+++ b/drivers/common/qat/qat_adf/icp_qat_hw.h
@@ -391,10 +391,10 @@ enum icp_qat_hw_cipher_convert {
 #define ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE 4
 #define ICP_QAT_HW_CCM_NONCE_OFFSET 1
 
-struct icp_qat_hw_cipher_algo_blk {
+struct __rte_cache_aligned icp_qat_hw_cipher_algo_blk {
 	struct icp_qat_hw_cipher_config cipher_config;
 	uint8_t key[ICP_QAT_HW_CIPHER_MAX_KEY_SZ];
-} __rte_cache_aligned;
+};
 
 struct icp_qat_hw_gen2_crc_cd {
 	uint32_t flags;
@@ -423,10 +423,10 @@ struct icp_qat_hw_ucs_cipher_config {
 	uint32_t reserved[3];
 };
 
-struct icp_qat_hw_cipher_algo_blk20 {
+struct __rte_cache_aligned icp_qat_hw_cipher_algo_blk20 {
 	struct icp_qat_hw_ucs_cipher_config cipher_config;
 	uint8_t key[ICP_QAT_HW_CIPHER_MAX_KEY_SZ];
-} __rte_cache_aligned;
+};
 
 enum icp_qat_hw_ucs_cipher_reflect_out {
 	ICP_QAT_HW_CIPHER_UCS_REFLECT_OUT_DISABLED = 0,
diff --git a/drivers/common/qat/qat_common.h b/drivers/common/qat/qat_common.h
index 6d0f4ae..70d78ee 100644
--- a/drivers/common/qat/qat_common.h
+++ b/drivers/common/qat/qat_common.h
@@ -61,11 +61,11 @@ struct qat_flat_buf {
 }
 
 __extension__
-struct qat_sgl {
+struct __rte_cache_aligned qat_sgl {
 	qat_sgl_hdr;
 	/* flexible array of flat buffers*/
 	struct qat_flat_buf buffers[0];
-} __rte_packed __rte_cache_aligned;
+} __rte_packed;
 
 /** Common, i.e. not service-specific, statistics */
 struct qat_common_stats {
diff --git a/drivers/common/qat/qat_qp.h b/drivers/common/qat/qat_qp.h
index ae18fb9..94590d3 100644
--- a/drivers/common/qat/qat_qp.h
+++ b/drivers/common/qat/qat_qp.h
@@ -81,7 +81,7 @@ typedef int (*qat_op_dequeue_t)(void **op, uint8_t *resp, void *op_cookie,
 
 #define QAT_BUILD_REQUEST_MAX_OPAQUE_SIZE	2
 
-struct qat_qp {
+struct __rte_cache_aligned qat_qp {
 	void			*mmap_bar_addr;
 	struct qat_queue	tx_q;
 	struct qat_queue	rx_q;
@@ -95,10 +95,10 @@ struct qat_qp {
 	struct qat_pci_device *qat_dev;
 	/**< qat device this qp is on */
 	uint32_t enqueued;
-	uint32_t dequeued __rte_aligned(4);
+	alignas(sizeof(uint32_t)) uint32_t dequeued;
 	uint16_t max_inflights;
 	uint16_t min_enq_burst_threshold;
-} __rte_cache_aligned;
+};
 
 /**
  * Structure with data needed for creation of queue pair.
-- 
1.8.3.1

[PATCH 70/83] common/mlx5: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/common/mlx5/linux/mlx5_glue.c   |  2 +-
 drivers/common/mlx5/linux/mlx5_nl.c     |  2 +-
 drivers/common/mlx5/mlx5_common_mr.h    |  4 ++--
 drivers/common/mlx5/mlx5_common_utils.h | 12 ++++++------
 drivers/common/mlx5/mlx5_prm.h          |  4 ++--
 5 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/common/mlx5/linux/mlx5_glue.c b/drivers/common/mlx5/linux/mlx5_glue.c
index 6f858db..99761ea 100644
--- a/drivers/common/mlx5/linux/mlx5_glue.c
+++ b/drivers/common/mlx5/linux/mlx5_glue.c
@@ -1578,7 +1578,7 @@
 #endif
 }
 
-__rte_cache_aligned
+alignas(RTE_CACHE_LINE_SIZE)
 const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue) {
 	.version = MLX5_GLUE_VERSION,
 	.fork_init = mlx5_glue_fork_init,
diff --git a/drivers/common/mlx5/linux/mlx5_nl.c b/drivers/common/mlx5/linux/mlx5_nl.c
index 28a1f56..61192eb 100644
--- a/drivers/common/mlx5/linux/mlx5_nl.c
+++ b/drivers/common/mlx5/linux/mlx5_nl.c
@@ -1507,7 +1507,7 @@ struct mlx5_nl_port_info {
 	struct ifinfomsg *ifm;
 	char name[sizeof(MLX5_VMWA_VLAN_DEVICE_PFX) + 32];
 
-	__rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE)
 	uint8_t buf[NLMSG_ALIGN(sizeof(struct nlmsghdr)) +
 		    NLMSG_ALIGN(sizeof(struct ifinfomsg)) +
 		    NLMSG_ALIGN(sizeof(struct nlattr)) * 8 +
diff --git a/drivers/common/mlx5/mlx5_common_mr.h b/drivers/common/mlx5/mlx5_common_mr.h
index 8789d40..aa10b68 100644
--- a/drivers/common/mlx5/mlx5_common_mr.h
+++ b/drivers/common/mlx5/mlx5_common_mr.h
@@ -91,7 +91,7 @@ struct mlx5_mr_share_cache {
 } __rte_packed;
 
 /* Multi-Packet RQ buffer header. */
-struct mlx5_mprq_buf {
+struct __rte_cache_aligned mlx5_mprq_buf {
 	struct rte_mempool *mp;
 	uint16_t refcnt; /* Atomically accessed refcnt. */
 	struct rte_mbuf_ext_shared_info shinfos[];
@@ -100,7 +100,7 @@ struct mlx5_mprq_buf {
 	 * More memory will be allocated for the first stride head-room and for
 	 * the strides data.
 	 */
-} __rte_cache_aligned;
+};
 
 __rte_internal
 void mlx5_mprq_buf_free_cb(void *addr, void *opaque);
diff --git a/drivers/common/mlx5/mlx5_common_utils.h b/drivers/common/mlx5/mlx5_common_utils.h
index ae15119..44eba50 100644
--- a/drivers/common/mlx5/mlx5_common_utils.h
+++ b/drivers/common/mlx5/mlx5_common_utils.h
@@ -29,7 +29,7 @@
  */
 struct mlx5_list_entry {
 	LIST_ENTRY(mlx5_list_entry) next; /* Entry pointers in the list. */
-	uint32_t ref_cnt __rte_aligned(8); /* 0 means, entry is invalid. */
+	alignas(8) uint32_t ref_cnt; /* 0 means, entry is invalid. */
 	uint32_t lcore_idx;
 	union {
 		struct mlx5_list_entry *gentry;
@@ -37,10 +37,10 @@ struct mlx5_list_entry {
 	};
 } __rte_packed;
 
-struct mlx5_list_cache {
+struct __rte_cache_aligned mlx5_list_cache {
 	LIST_HEAD(mlx5_list_head, mlx5_list_entry) h;
 	uint32_t inv_cnt; /* Invalid entries counter. */
-} __rte_cache_aligned;
+};
 
 /**
  * Type of callback function for entry removal.
@@ -243,9 +243,9 @@ int mlx5_list_unregister(struct mlx5_list *list,
 /********************* Hash List **********************/
 
 /* Hash list bucket. */
-struct mlx5_hlist_bucket {
+struct __rte_cache_aligned mlx5_hlist_bucket {
 	struct mlx5_list_inconst l;
-} __rte_cache_aligned;
+};
 
 /**
  * Hash list table structure
@@ -257,7 +257,7 @@ struct mlx5_hlist {
 	uint8_t flags;
 	bool direct_key; /* Whether to use the key directly as hash index. */
 	struct mlx5_list_const l_const; /* List constant data. */
-	struct mlx5_hlist_bucket buckets[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct mlx5_hlist_bucket buckets[];
 };
 
 /**
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index c671c75..2bbbc44 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -319,12 +319,12 @@ enum mlx5_mpw_mode {
 };
 
 /* WQE Control segment. */
-struct mlx5_wqe_cseg {
+struct __rte_aligned(MLX5_WSEG_SIZE) mlx5_wqe_cseg {
 	uint32_t opcode;
 	uint32_t sq_ds;
 	uint32_t flags;
 	uint32_t misc;
-} __rte_packed __rte_aligned(MLX5_WSEG_SIZE);
+} __rte_packed;
 
 /*
  * WQE CSEG opcode field size is 32 bits, divided:
-- 
1.8.3.1

[PATCH 71/83] common/idpf: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/common/idpf/idpf_common_device.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/common/idpf/idpf_common_device.h b/drivers/common/idpf/idpf_common_device.h
index 2b94f03..3834c1f 100644
--- a/drivers/common/idpf/idpf_common_device.h
+++ b/drivers/common/idpf/idpf_common_device.h
@@ -52,7 +52,7 @@ struct idpf_adapter {
 	uint32_t cmd_retval; /* return value of the cmd response from cp */
 	uint8_t *mbx_resp; /* buffer to store the mailbox response from cp */
 
-	uint32_t ptype_tbl[IDPF_MAX_PKT_TYPE] __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) uint32_t ptype_tbl[IDPF_MAX_PKT_TYPE];
 
 	bool is_tx_singleq; /* true - single queue model, false - split queue model */
 	bool is_rx_singleq; /* true - single queue model, false - split queue model */
-- 
1.8.3.1

[PATCH 72/83] common/cpt: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/common/cpt/cpt_common.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/common/cpt/cpt_common.h b/drivers/common/cpt/cpt_common.h
index d70668a..6596cc0 100644
--- a/drivers/common/cpt/cpt_common.h
+++ b/drivers/common/cpt/cpt_common.h
@@ -41,7 +41,7 @@ struct pending_queue {
 	unsigned int head;
 };
 
-struct cpt_request_info {
+struct __rte_aligned(8) cpt_request_info {
 	/** Data path fields */
 	uint64_t comp_baddr;
 	volatile uint64_t *completion_addr;
@@ -58,7 +58,7 @@ struct cpt_request_info {
 	/** Control path fields */
 	uint64_t time_out;
 	uint8_t extra_time;
-} __rte_aligned(8);
+};
 
 static __rte_always_inline void
 pending_queue_push(struct pending_queue *q, void *rid, unsigned int off,
-- 
1.8.3.1

[PATCH 73/83] bus/fslmc: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index bd949ad..169c791 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -151,7 +151,7 @@ typedef void (dpaa2_queue_cb_dqrr_t)(struct qbman_swp *swp,
 typedef void (dpaa2_queue_cb_eqresp_free_t)(uint16_t eqresp_ci,
 					struct dpaa2_queue *dpaa2_q);
 
-struct dpaa2_queue {
+struct __rte_cache_aligned dpaa2_queue {
 	struct rte_mempool *mb_pool; /**< mbuf pool to populate RX ring. */
 	union {
 		struct rte_eth_dev_data *eth_data;
@@ -179,7 +179,7 @@ struct dpaa2_queue {
 	uint16_t resv;
 	uint64_t offloads;
 	uint64_t lpbk_cntx;
-} __rte_cache_aligned;
+};
 
 struct swp_active_dqs {
 	struct qbman_result *global_active_dqs;
-- 
1.8.3.1

[PATCH 74/83] baseband/turbo_sw: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/baseband/turbo_sw/bbdev_turbo_software.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/baseband/turbo_sw/bbdev_turbo_software.c b/drivers/baseband/turbo_sw/bbdev_turbo_software.c
index 8ddc7ff..574743a 100644
--- a/drivers/baseband/turbo_sw/bbdev_turbo_software.c
+++ b/drivers/baseband/turbo_sw/bbdev_turbo_software.c
@@ -72,7 +72,7 @@ struct turbo_sw_params {
 };
 
 /* queue */
-struct turbo_sw_queue {
+struct __rte_cache_aligned turbo_sw_queue {
 	/* Ring for processed (encoded/decoded) operations which are ready to
 	 * be dequeued.
 	 */
@@ -95,7 +95,7 @@ struct turbo_sw_queue {
 	uint8_t *adapter_output;
 	/* Operation type of this queue */
 	enum rte_bbdev_op_type type;
-} __rte_cache_aligned;
+};
 
 
 #ifdef RTE_BBDEV_SDK_AVX2
-- 
1.8.3.1

[PATCH 75/83] baseband/null: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/baseband/null/bbdev_null.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/baseband/null/bbdev_null.c b/drivers/baseband/null/bbdev_null.c
index 662663c..75f7899 100644
--- a/drivers/baseband/null/bbdev_null.c
+++ b/drivers/baseband/null/bbdev_null.c
@@ -47,9 +47,9 @@ struct bbdev_private {
 };
 
 /* queue */
-struct bbdev_queue {
+struct __rte_cache_aligned bbdev_queue {
 	struct rte_ring *processed_pkts;  /* Ring for processed packets */
-} __rte_cache_aligned;
+};
 
 /* Get device info */
 static void
-- 
1.8.3.1

[PATCH 76/83] app/test: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 app/test/test_cryptodev_aead_test_vectors.h            |  6 +++---
 app/test/test_cryptodev_blockcipher.h                  |  2 +-
 app/test/test_cryptodev_kasumi_test_vectors.h          |  2 +-
 app/test/test_cryptodev_mixed_test_vectors.h           |  2 +-
 app/test/test_cryptodev_security_docsis_test_vectors.h |  2 +-
 app/test/test_cryptodev_snow3g_test_vectors.h          |  2 +-
 app/test/test_cryptodev_zuc_test_vectors.h             |  2 +-
 app/test/test_distributor.c                            | 12 ++++++------
 app/test/test_distributor_perf.c                       |  6 +++---
 app/test/test_mempool_perf.c                           |  6 +++---
 app/test/test_pmd_perf.c                               |  4 ++--
 app/test/test_ring_stress_impl.h                       | 10 +++++-----
 app/test/test_rwlock.c                                 |  8 ++++----
 app/test/test_seqlock.c                                |  8 ++++----
 app/test/test_ticketlock.c                             |  4 ++--
 app/test/test_trace_perf.c                             |  8 ++++----
 16 files changed, 42 insertions(+), 42 deletions(-)

diff --git a/app/test/test_cryptodev_aead_test_vectors.h b/app/test/test_cryptodev_aead_test_vectors.h
index 35ae64c..e9b0590 100644
--- a/app/test/test_cryptodev_aead_test_vectors.h
+++ b/app/test/test_cryptodev_aead_test_vectors.h
@@ -47,7 +47,7 @@ struct aead_test_data {
 	} key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned len;
 	} iv;
 
@@ -79,7 +79,7 @@ struct gmac_test_data {
 	} key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned len;
 	} iv;
 
@@ -2025,7 +2025,7 @@ struct cryptodev_perf_test_data {
 	} key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned len;
 	} iv;
 
diff --git a/app/test/test_cryptodev_blockcipher.h b/app/test/test_cryptodev_blockcipher.h
index e6f6c18..a73bee0 100644
--- a/app/test/test_cryptodev_blockcipher.h
+++ b/app/test/test_cryptodev_blockcipher.h
@@ -72,7 +72,7 @@ struct blockcipher_test_data {
 	} cipher_key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned int len;
 	} iv;
 
diff --git a/app/test/test_cryptodev_kasumi_test_vectors.h b/app/test/test_cryptodev_kasumi_test_vectors.h
index f0a6d55..3b51704 100644
--- a/app/test/test_cryptodev_kasumi_test_vectors.h
+++ b/app/test/test_cryptodev_kasumi_test_vectors.h
@@ -12,7 +12,7 @@ struct kasumi_test_data {
 	} key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned int len;
 	} cipher_iv;
 
diff --git a/app/test/test_cryptodev_mixed_test_vectors.h b/app/test/test_cryptodev_mixed_test_vectors.h
index 9c43131..25c4a48 100644
--- a/app/test/test_cryptodev_mixed_test_vectors.h
+++ b/app/test/test_cryptodev_mixed_test_vectors.h
@@ -32,7 +32,7 @@ struct mixed_cipher_auth_test_data {
 	} cipher_key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned int len; /* length must be in Bytes */
 	} cipher_iv;
 
diff --git a/app/test/test_cryptodev_security_docsis_test_vectors.h b/app/test/test_cryptodev_security_docsis_test_vectors.h
index aa7f56a..7e9909b 100644
--- a/app/test/test_cryptodev_security_docsis_test_vectors.h
+++ b/app/test/test_cryptodev_security_docsis_test_vectors.h
@@ -21,7 +21,7 @@ struct docsis_test_data {
 	} key;
 
 	struct {
-		uint8_t data[16] __rte_aligned(16);
+		alignas(16) uint8_t data[16];
 		unsigned int len;
 	} iv;
 
diff --git a/app/test/test_cryptodev_snow3g_test_vectors.h b/app/test/test_cryptodev_snow3g_test_vectors.h
index 3b7e442..10db4f6 100644
--- a/app/test/test_cryptodev_snow3g_test_vectors.h
+++ b/app/test/test_cryptodev_snow3g_test_vectors.h
@@ -12,7 +12,7 @@ struct snow3g_test_data {
 	} key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned len;
 	} cipher_iv;
 
diff --git a/app/test/test_cryptodev_zuc_test_vectors.h b/app/test/test_cryptodev_zuc_test_vectors.h
index cb1b51e..714d681 100644
--- a/app/test/test_cryptodev_zuc_test_vectors.h
+++ b/app/test/test_cryptodev_zuc_test_vectors.h
@@ -12,7 +12,7 @@ struct wireless_test_data {
 	} key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned len;
 	} cipher_iv;
 
diff --git a/app/test/test_distributor.c b/app/test/test_distributor.c
index d2037b7..13357b9 100644
--- a/app/test/test_distributor.c
+++ b/app/test/test_distributor.c
@@ -53,9 +53,9 @@ struct worker_params {
 static volatile unsigned worker_idx;
 static volatile unsigned zero_idx;
 
-struct worker_stats {
+struct __rte_cache_aligned worker_stats {
 	volatile unsigned handled_packets;
-} __rte_cache_aligned;
+};
 struct worker_stats worker_stats[RTE_MAX_LCORE];
 
 /* returns the total count of the number of packets handled by the worker
@@ -87,7 +87,7 @@ struct worker_stats {
 static int
 handle_work(void *arg)
 {
-	struct rte_mbuf *buf[8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *buf[8];
 	struct worker_params *wp = arg;
 	struct rte_distributor *db = wp->dist;
 	unsigned int num;
@@ -306,7 +306,7 @@ struct worker_stats {
 static int
 handle_work_with_free_mbufs(void *arg)
 {
-	struct rte_mbuf *buf[8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *buf[8];
 	struct worker_params *wp = arg;
 	struct rte_distributor *d = wp->dist;
 	unsigned int i;
@@ -375,7 +375,7 @@ struct worker_stats {
 static int
 handle_work_for_shutdown_test(void *arg)
 {
-	struct rte_mbuf *buf[8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *buf[8];
 	struct worker_params *wp = arg;
 	struct rte_distributor *d = wp->dist;
 	unsigned int num;
@@ -592,7 +592,7 @@ struct worker_stats {
 static int
 handle_and_mark_work(void *arg)
 {
-	struct rte_mbuf *buf[8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *buf[8];
 	struct worker_params *wp = arg;
 	struct rte_distributor *db = wp->dist;
 	unsigned int num, i;
diff --git a/app/test/test_distributor_perf.c b/app/test/test_distributor_perf.c
index ca86845..c0ad39d 100644
--- a/app/test/test_distributor_perf.c
+++ b/app/test/test_distributor_perf.c
@@ -33,9 +33,9 @@
 static volatile int quit;
 static volatile unsigned worker_idx;
 
-struct worker_stats {
+struct __rte_cache_aligned worker_stats {
 	volatile unsigned handled_packets;
-} __rte_cache_aligned;
+};
 static struct worker_stats worker_stats[RTE_MAX_LCORE];
 
 /*
@@ -122,7 +122,7 @@ struct worker_stats {
 	unsigned int num = 0;
 	int i;
 	unsigned int id = __atomic_fetch_add(&worker_idx, 1, __ATOMIC_RELAXED);
-	struct rte_mbuf *buf[8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *buf[8];
 
 	for (i = 0; i < 8; i++)
 		buf[i] = NULL;
diff --git a/app/test/test_mempool_perf.c b/app/test/test_mempool_perf.c
index 96de347..a42a772 100644
--- a/app/test/test_mempool_perf.c
+++ b/app/test/test_mempool_perf.c
@@ -101,9 +101,9 @@
 static int use_constant_values;
 
 /* number of enqueues / dequeues */
-struct mempool_test_stats {
+struct __rte_cache_aligned mempool_test_stats {
 	uint64_t enq_count;
-} __rte_cache_aligned;
+};
 
 static struct mempool_test_stats stats[RTE_MAX_LCORE];
 
@@ -124,7 +124,7 @@ struct mempool_test_stats {
 test_loop(struct rte_mempool *mp, struct rte_mempool_cache *cache,
 	  unsigned int x_keep, unsigned int x_get_bulk, unsigned int x_put_bulk)
 {
-	void *obj_table[MAX_KEEP] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *obj_table[MAX_KEEP];
 	unsigned int idx;
 	unsigned int i;
 	int ret;
diff --git a/app/test/test_pmd_perf.c b/app/test/test_pmd_perf.c
index f6d97f2..35fa068 100644
--- a/app/test/test_pmd_perf.c
+++ b/app/test/test_pmd_perf.c
@@ -94,12 +94,12 @@ enum {
 	LCORE_USED,
 };
 
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint8_t status;
 	uint8_t socketid;
 	uint16_t nb_ports;
 	uint16_t portlist[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 
 struct lcore_conf lcore_conf[RTE_MAX_LCORE];
 
diff --git a/app/test/test_ring_stress_impl.h b/app/test/test_ring_stress_impl.h
index 2dec897..202d47d 100644
--- a/app/test/test_ring_stress_impl.h
+++ b/app/test/test_ring_stress_impl.h
@@ -24,7 +24,7 @@ enum {
 	WRK_CMD_RUN,
 };
 
-static uint32_t wrk_cmd __rte_cache_aligned = WRK_CMD_STOP;
+static alignas(RTE_CACHE_LINE_SIZE) uint32_t wrk_cmd = WRK_CMD_STOP;
 
 /* test run-time in seconds */
 static const uint32_t run_time = 60;
@@ -41,14 +41,14 @@ struct lcore_stat {
 	} op;
 };
 
-struct lcore_arg {
+struct __rte_cache_aligned lcore_arg {
 	struct rte_ring *rng;
 	struct lcore_stat stats;
-} __rte_cache_aligned;
+};
 
-struct ring_elem {
+struct __rte_cache_aligned ring_elem {
 	uint32_t cnt[RTE_CACHE_LINE_SIZE / sizeof(uint32_t)];
-} __rte_cache_aligned;
+};
 
 /*
  * redefinable functions
diff --git a/app/test/test_rwlock.c b/app/test/test_rwlock.c
index 5079895..e8767da 100644
--- a/app/test/test_rwlock.c
+++ b/app/test/test_rwlock.c
@@ -42,7 +42,7 @@ enum {
 	LC_TYPE_WRLOCK,
 };
 
-static struct {
+static alignas(RTE_CACHE_LINE_SIZE) struct {
 	rte_rwlock_t lock;
 	uint64_t tick;
 
@@ -50,9 +50,9 @@ enum {
 		uint8_t u8[RTE_CACHE_LINE_SIZE];
 		uint64_t u64[RTE_CACHE_LINE_SIZE / sizeof(uint64_t)];
 	} data;
-} __rte_cache_aligned try_rwlock_data;
+} try_rwlock_data;
 
-struct try_rwlock_lcore {
+struct __rte_cache_aligned try_rwlock_lcore {
 	int32_t rc;
 	int32_t type;
 	struct {
@@ -60,7 +60,7 @@ struct try_rwlock_lcore {
 		uint64_t fail;
 		uint64_t success;
 	} stat;
-} __rte_cache_aligned;
+};
 
 static struct try_rwlock_lcore try_lcore_data[RTE_MAX_LCORE];
 
diff --git a/app/test/test_seqlock.c b/app/test/test_seqlock.c
index 873bd60..bab8b0f 100644
--- a/app/test/test_seqlock.c
+++ b/app/test/test_seqlock.c
@@ -12,13 +12,13 @@
 
 #include "test.h"
 
-struct data {
+struct __rte_cache_aligned data {
 	rte_seqlock_t lock;
 
 	uint64_t a;
-	uint64_t b __rte_cache_aligned;
-	uint64_t c __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t b;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t c;
+};
 
 struct reader {
 	struct data *data;
diff --git a/app/test/test_ticketlock.c b/app/test/test_ticketlock.c
index 1fbbedb..7a6cb4c 100644
--- a/app/test/test_ticketlock.c
+++ b/app/test/test_ticketlock.c
@@ -95,8 +95,8 @@
 }
 
 static rte_ticketlock_t lk = RTE_TICKETLOCK_INITIALIZER;
-static uint64_t lcount __rte_cache_aligned;
-static uint64_t lcore_count[RTE_MAX_LCORE] __rte_cache_aligned;
+static alignas(RTE_CACHE_LINE_SIZE) uint64_t lcount;
+static alignas(RTE_CACHE_LINE_SIZE) uint64_t lcore_count[RTE_MAX_LCORE];
 static uint64_t time_cost[RTE_MAX_LCORE];
 
 #define MAX_LOOP 10000
diff --git a/app/test/test_trace_perf.c b/app/test/test_trace_perf.c
index a6dd075..8257cc0 100644
--- a/app/test/test_trace_perf.c
+++ b/app/test/test_trace_perf.c
@@ -14,17 +14,17 @@
 
 struct test_data;
 
-struct lcore_data {
+struct __rte_cache_aligned lcore_data {
 	volatile bool done;
 	volatile bool started;
 	uint64_t total_cycles;
 	uint64_t total_calls;
-} __rte_cache_aligned;
+};
 
-struct test_data {
+struct __rte_cache_aligned test_data {
 	unsigned int nb_workers;
 	struct lcore_data ldata[];
-} __rte_cache_aligned;
+};
 
 #define STEP 100
 #define CENT_OPS(OP) do {     \
-- 
1.8.3.1

[PATCH 77/83] app/test-pipeline: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 app/test-pipeline/main.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/app/test-pipeline/main.h b/app/test-pipeline/main.h
index 9df157d..ee9c58a 100644
--- a/app/test-pipeline/main.h
+++ b/app/test-pipeline/main.h
@@ -18,7 +18,7 @@ struct app_mbuf_array {
 #define APP_MAX_PORTS 4
 #endif
 
-struct app_params {
+struct __rte_cache_aligned app_params {
 	/* CPU cores */
 	uint32_t core_rx;
 	uint32_t core_worker;
@@ -56,7 +56,7 @@ struct app_params {
 
 	/* App behavior */
 	uint32_t pipeline_type;
-} __rte_cache_aligned;
+};
 
 extern struct app_params app;
 
-- 
1.8.3.1

[PATCH 78/83] app/test-mldev: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 app/test-mldev/test_device_ops.h       | 4 ++--
 app/test-mldev/test_inference_common.h | 4 ++--
 app/test-mldev/test_model_ops.h        | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/app/test-mldev/test_device_ops.h b/app/test-mldev/test_device_ops.h
index be78b17..2e0173e 100644
--- a/app/test-mldev/test_device_ops.h
+++ b/app/test-mldev/test_device_ops.h
@@ -9,9 +9,9 @@
 
 #include "test_common.h"
 
-struct test_device {
+struct __rte_cache_aligned test_device {
 	/* common data */
 	struct test_common cmn;
-} __rte_cache_aligned;
+};
 
 #endif /* TEST_DEVICE_OPS_H */
diff --git a/app/test-mldev/test_inference_common.h b/app/test-mldev/test_inference_common.h
index 3f4ba32..1c9ad90 100644
--- a/app/test-mldev/test_inference_common.h
+++ b/app/test-mldev/test_inference_common.h
@@ -37,7 +37,7 @@ struct ml_core_args {
 	uint64_t end_cycles;
 };
 
-struct test_inference {
+struct __rte_cache_aligned test_inference {
 	/* common data */
 	struct test_common cmn;
 
@@ -59,7 +59,7 @@ struct test_inference {
 	struct rte_ml_dev_xstats_map *xstats_map;
 	uint64_t *xstats_values;
 	int xstats_size;
-} __rte_cache_aligned;
+};
 
 bool test_inference_cap_check(struct ml_options *opt);
 int test_inference_opt_check(struct ml_options *opt);
diff --git a/app/test-mldev/test_model_ops.h b/app/test-mldev/test_model_ops.h
index 19645a1..83bfd76 100644
--- a/app/test-mldev/test_model_ops.h
+++ b/app/test-mldev/test_model_ops.h
@@ -9,12 +9,12 @@
 
 #include "test_model_common.h"
 
-struct test_model_ops {
+struct __rte_cache_aligned test_model_ops {
 	/* common data */
 	struct test_common cmn;
 
 	/* test specific data */
 	struct ml_model model[ML_TEST_MAX_MODELS];
-} __rte_cache_aligned;
+};
 
 #endif /* TEST_MODEL_OPS_H */
-- 
1.8.3.1

[PATCH 79/83] app/test-flow-perf: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 app/test-flow-perf/actions_gen.c | 51 ++++++++++++++++++++++------------------
 app/test-flow-perf/items_gen.c   | 22 +++++++++--------
 app/test-flow-perf/main.c        |  8 +++----
 3 files changed, 44 insertions(+), 37 deletions(-)

diff --git a/app/test-flow-perf/actions_gen.c b/app/test-flow-perf/actions_gen.c
index f1d5931..b5336e8 100644
--- a/app/test-flow-perf/actions_gen.c
+++ b/app/test-flow-perf/actions_gen.c
@@ -62,7 +62,8 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_mark mark_actions[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct rte_flow_action_mark mark_actions[RTE_MAX_LCORE];
 	uint32_t counter = para.counter;
 
 	do {
@@ -79,7 +80,8 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_queue queue_actions[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct rte_flow_action_queue queue_actions[RTE_MAX_LCORE];
 
 	do {
 		queue_actions[para.core_idx].index = para.queue;
@@ -109,7 +111,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct action_rss_data *rss_data[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct action_rss_data *rss_data[RTE_MAX_LCORE];
 
 	uint16_t queue;
 
@@ -208,7 +210,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_mac set_macs[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_mac set_macs[RTE_MAX_LCORE];
 	uint32_t mac = para.counter;
 	uint16_t i;
 
@@ -231,7 +233,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_mac set_macs[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_mac set_macs[RTE_MAX_LCORE];
 	uint32_t mac = para.counter;
 	uint16_t i;
 
@@ -254,7 +256,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_ipv4 set_ipv4[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_ipv4 set_ipv4[RTE_MAX_LCORE];
 	uint32_t ip = para.counter;
 
 	/* Fixed value */
@@ -273,7 +275,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_ipv4 set_ipv4[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_ipv4 set_ipv4[RTE_MAX_LCORE];
 	uint32_t ip = para.counter;
 
 	/* Fixed value */
@@ -292,7 +294,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_ipv6 set_ipv6[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_ipv6 set_ipv6[RTE_MAX_LCORE];
 	uint32_t ipv6 = para.counter;
 	uint8_t i;
 
@@ -315,7 +317,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_ipv6 set_ipv6[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_ipv6 set_ipv6[RTE_MAX_LCORE];
 	uint32_t ipv6 = para.counter;
 	uint8_t i;
 
@@ -338,7 +340,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_tp set_tp[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_tp set_tp[RTE_MAX_LCORE];
 	uint32_t tp = para.counter;
 
 	/* Fixed value */
@@ -359,7 +361,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_tp set_tp[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_tp set_tp[RTE_MAX_LCORE];
 	uint32_t tp = para.counter;
 
 	/* Fixed value */
@@ -381,7 +383,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static rte_be32_t value[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) rte_be32_t value[RTE_MAX_LCORE];
 	uint32_t ack_value = para.counter;
 
 	/* Fixed value */
@@ -399,7 +401,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static rte_be32_t value[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) rte_be32_t value[RTE_MAX_LCORE];
 	uint32_t ack_value = para.counter;
 
 	/* Fixed value */
@@ -417,7 +419,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static rte_be32_t value[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) rte_be32_t value[RTE_MAX_LCORE];
 	uint32_t seq_value = para.counter;
 
 	/* Fixed value */
@@ -435,7 +437,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static rte_be32_t value[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) rte_be32_t value[RTE_MAX_LCORE];
 	uint32_t seq_value = para.counter;
 
 	/* Fixed value */
@@ -453,7 +455,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_ttl set_ttl[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_ttl set_ttl[RTE_MAX_LCORE];
 	uint32_t ttl_value = para.counter;
 
 	/* Fixed value */
@@ -482,7 +484,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_dscp set_dscp[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_dscp set_dscp[RTE_MAX_LCORE];
 	uint32_t dscp_value = para.counter;
 
 	/* Fixed value */
@@ -503,7 +505,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_dscp set_dscp[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_dscp set_dscp[RTE_MAX_LCORE];
 	uint32_t dscp_value = para.counter;
 
 	/* Fixed value */
@@ -770,7 +772,8 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct action_raw_encap_data *action_encap_data[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct action_raw_encap_data *action_encap_data[RTE_MAX_LCORE];
 	uint64_t encap_data = para.encap_data;
 	uint8_t *header;
 	uint8_t i;
@@ -807,7 +810,8 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct action_raw_decap_data *action_decap_data[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct action_raw_decap_data *action_decap_data[RTE_MAX_LCORE];
 	uint64_t decap_data = para.decap_data;
 	uint8_t *header;
 	uint8_t i;
@@ -844,7 +848,8 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	__rte_unused struct additional_para para)
 {
-	static struct rte_flow_action_vxlan_encap vxlan_encap[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct rte_flow_action_vxlan_encap vxlan_encap[RTE_MAX_LCORE];
 	static struct rte_flow_item items[5];
 	static struct rte_flow_item_eth item_eth;
 	static struct rte_flow_item_ipv4 item_ipv4;
@@ -900,8 +905,8 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	__rte_unused struct additional_para para)
 {
-	static struct rte_flow_action_meter
-		meters[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_meter
+		meters[RTE_MAX_LCORE];
 
 	meters[para.core_idx].mtr_id = para.counter;
 	actions[actions_counter].type = RTE_FLOW_ACTION_TYPE_METER;
diff --git a/app/test-flow-perf/items_gen.c b/app/test-flow-perf/items_gen.c
index 8592834..4ae7250 100644
--- a/app/test-flow-perf/items_gen.c
+++ b/app/test-flow-perf/items_gen.c
@@ -52,8 +52,8 @@ struct additional_para {
 add_ipv4(struct rte_flow_item *items,
 	uint8_t items_counter, struct additional_para para)
 {
-	static struct rte_flow_item_ipv4 ipv4_specs[RTE_MAX_LCORE] __rte_cache_aligned;
-	static struct rte_flow_item_ipv4 ipv4_masks[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_ipv4 ipv4_specs[RTE_MAX_LCORE];
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_ipv4 ipv4_masks[RTE_MAX_LCORE];
 	uint8_t ti = para.core_idx;
 
 	ipv4_specs[ti].hdr.src_addr = RTE_BE32(para.src_ip);
@@ -69,8 +69,8 @@ struct additional_para {
 add_ipv6(struct rte_flow_item *items,
 	uint8_t items_counter, struct additional_para para)
 {
-	static struct rte_flow_item_ipv6 ipv6_specs[RTE_MAX_LCORE] __rte_cache_aligned;
-	static struct rte_flow_item_ipv6 ipv6_masks[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_ipv6 ipv6_specs[RTE_MAX_LCORE];
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_ipv6 ipv6_masks[RTE_MAX_LCORE];
 	uint8_t ti = para.core_idx;
 	uint8_t i;
 
@@ -118,8 +118,8 @@ struct additional_para {
 	uint8_t items_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_item_vxlan vxlan_specs[RTE_MAX_LCORE] __rte_cache_aligned;
-	static struct rte_flow_item_vxlan vxlan_masks[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_vxlan vxlan_specs[RTE_MAX_LCORE];
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_vxlan vxlan_masks[RTE_MAX_LCORE];
 	uint8_t ti = para.core_idx;
 	uint32_t vni_value;
 	uint8_t i;
@@ -145,8 +145,10 @@ struct additional_para {
 	uint8_t items_counter,
 	__rte_unused struct additional_para para)
 {
-	static struct rte_flow_item_vxlan_gpe vxlan_gpe_specs[RTE_MAX_LCORE] __rte_cache_aligned;
-	static struct rte_flow_item_vxlan_gpe vxlan_gpe_masks[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct rte_flow_item_vxlan_gpe vxlan_gpe_specs[RTE_MAX_LCORE];
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct rte_flow_item_vxlan_gpe vxlan_gpe_masks[RTE_MAX_LCORE];
 	uint8_t ti = para.core_idx;
 	uint32_t vni_value;
 	uint8_t i;
@@ -189,8 +191,8 @@ struct additional_para {
 	uint8_t items_counter,
 	__rte_unused struct additional_para para)
 {
-	static struct rte_flow_item_geneve geneve_specs[RTE_MAX_LCORE] __rte_cache_aligned;
-	static struct rte_flow_item_geneve geneve_masks[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_geneve geneve_specs[RTE_MAX_LCORE];
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_geneve geneve_masks[RTE_MAX_LCORE];
 	uint8_t ti = para.core_idx;
 	uint32_t vni_value;
 	uint8_t i;
diff --git a/app/test-flow-perf/main.c b/app/test-flow-perf/main.c
index e224ef6..07ddfe0 100644
--- a/app/test-flow-perf/main.c
+++ b/app/test-flow-perf/main.c
@@ -113,7 +113,7 @@ struct stream {
 	int rx_queue;
 };
 
-struct lcore_info {
+struct __rte_cache_aligned lcore_info {
 	int mode;
 	int streams_nb;
 	struct stream streams[MAX_STREAMS];
@@ -122,7 +122,7 @@ struct lcore_info {
 	uint64_t tx_drops;
 	uint64_t rx_pkts;
 	struct rte_mbuf *pkts[MAX_PKT_BURST];
-} __rte_cache_aligned;
+};
 
 static struct lcore_info lcore_infos[RTE_MAX_LCORE];
 
@@ -131,14 +131,14 @@ struct used_cpu_time {
 	double deletion[MAX_PORTS][RTE_MAX_LCORE];
 };
 
-struct multi_cores_pool {
+struct __rte_cache_aligned multi_cores_pool {
 	uint32_t cores_count;
 	uint32_t rules_count;
 	struct used_cpu_time meters_record;
 	struct used_cpu_time flows_record;
 	int64_t last_alloc[RTE_MAX_LCORE];
 	int64_t current_alloc[RTE_MAX_LCORE];
-} __rte_cache_aligned;
+};
 
 static struct multi_cores_pool mc_pool = {
 	.cores_count = 1,
-- 
1.8.3.1

[PATCH 80/83] app/test-eventdev: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 app/test-eventdev/test_order_common.h    |  4 ++--
 app/test-eventdev/test_perf_common.h     | 24 ++++++++++++------------
 app/test-eventdev/test_pipeline_common.h | 18 +++++++++---------
 3 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/app/test-eventdev/test_order_common.h b/app/test-eventdev/test_order_common.h
index 1507265..d4cbc5c 100644
--- a/app/test-eventdev/test_order_common.h
+++ b/app/test-eventdev/test_order_common.h
@@ -39,7 +39,7 @@ struct prod_data {
 	struct test_order *t;
 };
 
-struct test_order {
+struct __rte_cache_aligned test_order {
 	/* Don't change the offset of "err". Signal handler use this memory
 	 * to terminate all lcores work.
 	 */
@@ -60,7 +60,7 @@ struct test_order {
 	uint32_t *producer_flow_seq;
 	uint32_t *expected_flow_seq;
 	struct evt_options *opt;
-} __rte_cache_aligned;
+};
 
 static inline void
 order_flow_id_copy_from_mbuf(struct test_order *t, struct rte_event *event)
diff --git a/app/test-eventdev/test_perf_common.h b/app/test-eventdev/test_perf_common.h
index 2b4f572..bc627de 100644
--- a/app/test-eventdev/test_perf_common.h
+++ b/app/test-eventdev/test_perf_common.h
@@ -31,13 +31,13 @@
 
 struct test_perf;
 
-struct worker_data {
+struct __rte_cache_aligned worker_data {
 	uint64_t processed_pkts;
 	uint64_t latency;
 	uint8_t dev_id;
 	uint8_t port_id;
 	struct test_perf *t;
-} __rte_cache_aligned;
+};
 
 struct crypto_adptr_data {
 	uint8_t cdev_id;
@@ -51,16 +51,16 @@ struct dma_adptr_data {
 	void **dma_op;
 };
 
-struct prod_data {
+struct __rte_cache_aligned prod_data {
 	uint8_t dev_id;
 	uint8_t port_id;
 	uint8_t queue_id;
 	struct crypto_adptr_data ca;
 	struct dma_adptr_data da;
 	struct test_perf *t;
-} __rte_cache_aligned;
+};
 
-struct test_perf {
+struct __rte_cache_aligned test_perf {
 	/* Don't change the offset of "done". Signal handler use this memory
 	 * to terminate all lcores work.
 	 */
@@ -74,17 +74,17 @@ struct test_perf {
 	struct prod_data prod[EVT_MAX_PORTS];
 	struct worker_data worker[EVT_MAX_PORTS];
 	struct evt_options *opt;
-	uint8_t sched_type_list[EVT_MAX_STAGES] __rte_cache_aligned;
-	struct rte_event_timer_adapter *timer_adptr[
-		RTE_EVENT_TIMER_ADAPTER_NUM_MAX] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t sched_type_list[EVT_MAX_STAGES];
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event_timer_adapter *timer_adptr[
+		RTE_EVENT_TIMER_ADAPTER_NUM_MAX];
 	struct rte_mempool *ca_op_pool;
 	struct rte_mempool *ca_sess_pool;
 	struct rte_mempool *ca_asym_sess_pool;
 	struct rte_mempool *ca_vector_pool;
 	struct rte_mempool *da_op_pool;
-} __rte_cache_aligned;
+};
 
-struct perf_elt {
+struct __rte_cache_aligned perf_elt {
 	union {
 		struct rte_event_timer tim;
 		struct {
@@ -92,7 +92,7 @@ struct perf_elt {
 			uint64_t timestamp;
 		};
 	};
-} __rte_cache_aligned;
+};
 
 #define BURST_SIZE 16
 #define MAX_PROD_ENQ_BURST_SIZE 128
@@ -111,7 +111,7 @@ struct perf_elt {
 	const uint8_t nb_stages = t->opt->nb_stages;\
 	const uint8_t laststage = nb_stages - 1;\
 	uint8_t cnt = 0;\
-	void *bufs[16] __rte_cache_aligned;\
+	alignas(RTE_CACHE_LINE_SIZE) void *bufs[16];\
 	int const sz = RTE_DIM(bufs);\
 	uint8_t stage;\
 	struct perf_elt *pe = NULL;\
diff --git a/app/test-eventdev/test_pipeline_common.h b/app/test-eventdev/test_pipeline_common.h
index 2b7f3e7..cb6375f 100644
--- a/app/test-eventdev/test_pipeline_common.h
+++ b/app/test-eventdev/test_pipeline_common.h
@@ -31,14 +31,14 @@
 
 struct test_pipeline;
 
-struct worker_data {
+struct __rte_cache_aligned worker_data {
 	uint64_t processed_pkts;
 	uint8_t dev_id;
 	uint8_t port_id;
 	struct test_pipeline *t;
-} __rte_cache_aligned;
+};
 
-struct test_pipeline {
+struct __rte_cache_aligned test_pipeline {
 	/* Don't change the offset of "done". Signal handler use this memory
 	 * to terminate all lcores work.
 	 */
@@ -52,8 +52,8 @@ struct test_pipeline {
 	struct rte_mempool *pool[RTE_MAX_ETHPORTS];
 	struct worker_data worker[EVT_MAX_PORTS];
 	struct evt_options *opt;
-	uint8_t sched_type_list[EVT_MAX_STAGES] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t sched_type_list[EVT_MAX_STAGES];
+};
 
 #define BURST_SIZE 16
 
@@ -62,7 +62,7 @@ struct test_pipeline {
 	struct test_pipeline *t = w->t;   \
 	const uint8_t dev = w->dev_id;    \
 	const uint8_t port = w->port_id;  \
-	struct rte_event ev __rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event ev
 
 #define PIPELINE_WORKER_SINGLE_STAGE_BURST_INIT \
 	int i;                                  \
@@ -70,7 +70,7 @@ struct test_pipeline {
 	struct test_pipeline *t = w->t;         \
 	const uint8_t dev = w->dev_id;          \
 	const uint8_t port = w->port_id;        \
-	struct rte_event ev[BURST_SIZE + 1] __rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event ev[BURST_SIZE + 1]
 
 #define PIPELINE_WORKER_MULTI_STAGE_INIT                         \
 	struct worker_data *w  = arg;                            \
@@ -81,7 +81,7 @@ struct test_pipeline {
 	const uint8_t last_queue = t->opt->nb_stages - 1;        \
 	uint8_t *const sched_type_list = &t->sched_type_list[0]; \
 	const uint8_t nb_stages = t->opt->nb_stages + 1;	 \
-	struct rte_event ev __rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event ev
 
 #define PIPELINE_WORKER_MULTI_STAGE_BURST_INIT                   \
 	int i;                                                   \
@@ -93,7 +93,7 @@ struct test_pipeline {
 	const uint8_t last_queue = t->opt->nb_stages - 1;        \
 	uint8_t *const sched_type_list = &t->sched_type_list[0]; \
 	const uint8_t nb_stages = t->opt->nb_stages + 1;	 \
-	struct rte_event ev[BURST_SIZE + 1] __rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event ev[BURST_SIZE + 1]
 
 static __rte_always_inline void
 pipeline_fwd_event(struct rte_event *ev, uint8_t sched)
-- 
1.8.3.1

[PATCH 81/83] app/pdump: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 app/pdump/main.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/app/pdump/main.c b/app/pdump/main.c
index a9205e1..3bdbb8d 100644
--- a/app/pdump/main.c
+++ b/app/pdump/main.c
@@ -106,7 +106,7 @@ struct pdump_stats {
 	uint64_t freed_pkts;
 };
 
-struct pdump_tuples {
+struct __rte_cache_aligned pdump_tuples {
 	/* cli params */
 	uint16_t port;
 	char *device_id;
@@ -133,7 +133,7 @@ struct pdump_tuples {
 
 	/* stats */
 	struct pdump_stats stats;
-} __rte_cache_aligned;
+};
 static struct pdump_tuples pdump_t[APP_ARG_TCPDUMP_MAX_TUPLES];
 
 struct parse_val {
-- 
1.8.3.1

[PATCH 82/83] app/graph: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 app/graph/ethdev_rx.h      | 4 ++--
 app/graph/ethdev_rx_priv.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/app/graph/ethdev_rx.h b/app/graph/ethdev_rx.h
index ec3c972..f8c8f1f 100644
--- a/app/graph/ethdev_rx.h
+++ b/app/graph/ethdev_rx.h
@@ -17,13 +17,13 @@ struct lcore_rx_queue {
 	char node_name[RTE_NODE_NAMESIZE];
 };
 
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint16_t n_rx_queue;
 	struct lcore_rx_queue rx_queue_list[ETHDEV_RX_QUEUE_PER_LCORE_MAX];
 	struct rte_graph *graph;
 	char name[RTE_GRAPH_NAMESIZE];
 	rte_graph_t graph_id;
-} __rte_cache_aligned;
+};
 
 uint8_t ethdev_rx_num_rx_queues_get(uint16_t port);
 
diff --git a/app/graph/ethdev_rx_priv.h b/app/graph/ethdev_rx_priv.h
index d714f83..a76ebac 100644
--- a/app/graph/ethdev_rx_priv.h
+++ b/app/graph/ethdev_rx_priv.h
@@ -14,10 +14,10 @@
 #define MAX_JUMBO_PKT_LEN  9600
 #define NB_SOCKETS 8
 
-struct lcore_params {
+struct __rte_cache_aligned lcore_params {
 	uint16_t port_id;
 	uint8_t queue_id;
 	uint8_t lcore_id;
-} __rte_cache_aligned;
+};
 
 #endif
-- 
1.8.3.1

[PATCH 83/83] bus/dpaa: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
---
 drivers/bus/dpaa/base/qbman/qman.c  |  3 +--
 drivers/bus/dpaa/include/fsl_bman.h |  4 ++--
 drivers/bus/dpaa/include/fsl_qman.h | 20 ++++++++++----------
 3 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/bus/dpaa/base/qbman/qman.c b/drivers/bus/dpaa/base/qbman/qman.c
index 83db0a5..6d2fbdc 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -95,8 +95,7 @@ struct qman_portal {
 	 * to 2 ** 10 to ensure DQRR index calculations based shadow copy
 	 * address (6 bits for address shift + 4 bits for the DQRR size).
 	 */
-	struct qm_dqrr_entry shadow_dqrr[QM_DQRR_SIZE]
-		    __rte_aligned(1024);
+	alignas(1024) struct qm_dqrr_entry shadow_dqrr[QM_DQRR_SIZE];
 #endif
 };
 
diff --git a/drivers/bus/dpaa/include/fsl_bman.h b/drivers/bus/dpaa/include/fsl_bman.h
index 6719a4e..34d7eb3 100644
--- a/drivers/bus/dpaa/include/fsl_bman.h
+++ b/drivers/bus/dpaa/include/fsl_bman.h
@@ -41,7 +41,7 @@ static inline void bman_depletion_fill(struct bman_depletion *c)
  * pool id specific to this buffer is needed (BM_RCR_VERB_CMD_BPID_MULTI,
  * BM_MCC_VERB_ACQUIRE), the 'bpid' field is used.
  */
-struct bm_buffer {
+struct __rte_aligned(8) bm_buffer {
 	union {
 		struct {
 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
@@ -67,7 +67,7 @@ struct bm_buffer {
 		};
 		u64 opaque;
 	};
-} __rte_aligned(8);
+};
 static inline u64 bm_buffer_get64(const struct bm_buffer *buf)
 {
 	return buf->addr;
diff --git a/drivers/bus/dpaa/include/fsl_qman.h b/drivers/bus/dpaa/include/fsl_qman.h
index 5953309..acdfb45 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -124,7 +124,7 @@ enum qm_fd_format {
 #define QM_FD_COMPOUND	QM_FD_FORMAT_COMPOUND
 
 /* "Frame Descriptor (FD)" */
-struct qm_fd {
+struct __rte_aligned(8) qm_fd {
 	union {
 		struct {
 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
@@ -200,7 +200,7 @@ struct qm_fd {
 		u32 cmd;
 		u32 status;
 	};
-} __rte_aligned(8);
+};
 #define QM_FD_DD_NULL		0x00
 #define QM_FD_PID_MASK		0x3f
 static inline u64 qm_fd_addr_get64(const struct qm_fd *fd)
@@ -330,9 +330,9 @@ struct __rte_aligned(8) qm_dqrr_entry {
 
 /* "ERN Message Response" */
 /* "FQ State Change Notification" */
-struct qm_mr_entry {
+struct __rte_aligned(8) qm_mr_entry {
 	union {
-		struct {
+		alignas(8) struct {
 			u8 verb;
 			u8 dca;
 			u16 seqnum;
@@ -341,8 +341,8 @@ struct qm_mr_entry {
 			u32 fqid;	/* 24-bit */
 			u32 tag;
 			struct qm_fd fd; /* this has alignment 8 */
-		} __packed __rte_aligned(8) ern;
-		struct {
+		} __packed ern;
+		alignas(8) struct {
 			u8 verb;
 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
 			u8 colour:2;	/* See QM_MR_DCERN_COLOUR_* */
@@ -359,18 +359,18 @@ struct qm_mr_entry {
 			u32 fqid;	/* 24-bit */
 			u32 tag;
 			struct qm_fd fd; /* this has alignment 8 */
-		} __packed __rte_aligned(8) dcern;
-		struct {
+		} __packed dcern;
+		alignas(8) struct {
 			u8 verb;
 			u8 fqs;		/* Frame Queue Status */
 			u8 __reserved1[6];
 			u32 fqid;	/* 24-bit */
 			u32 contextB;
 			u8 __reserved2[16];
-		} __packed __rte_aligned(8) fq;	/* FQRN/FQRNI/FQRL/FQPN */
+		} __packed fq;	/* FQRN/FQRNI/FQRL/FQPN */
 	};
 	u8 __reserved2[32];
-} __packed __rte_aligned(8);
+} __packed;
 #define QM_MR_VERB_VBIT			0x80
 /*
  * ERNs originating from direct-connect portals ("dcern") use 0x20 as a verb
-- 
1.8.3.1

Re: [PATCH 00/83] move alignment attribute on types

[Bruce Richardson]

On Wed, Mar 20, 2024 at 08:36:53AM -0700, Tyler Retzlaff wrote:
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
> 
> After having established this as the conventional standard for lib/*
> this series is intended to convert the remainder of the source tree to
> use the same location for __rte_aligned(a) and alignas(a) for
> consistency.
> 
No objection to this change. Is there a checkpatch rule available to
enforce this going forward or how can we avoid future introduction of
macros in the wrong place?

Series-Acked-by: Bruce Richardson <bruce.richardson@intel.com>

Re: [PATCH 00/83] move alignment attribute on types

[David Marchand]

On Wed, Mar 20, 2024 at 4:56 PM Bruce Richardson
<bruce.richardson@intel.com> wrote:
>
> On Wed, Mar 20, 2024 at 08:36:53AM -0700, Tyler Retzlaff wrote:
> > The current location used for __rte_aligned(a) for alignment of types
> > and variables is not compatible with MSVC. There is only a single
> > location accepted by both toolchains.
> >
> > After having established this as the conventional standard for lib/*
> > this series is intended to convert the remainder of the source tree to
> > use the same location for __rte_aligned(a) and alignas(a) for
> > consistency.
> >
> No objection to this change. Is there a checkpatch rule available to
> enforce this going forward or how can we avoid future introduction of
> macros in the wrong place?

We added one in v24.03, it is not perfect, but it should help catch most.
https://git.dpdk.org/dpdk/commit/devtools?id=c6552d9a8deffa448de2d5e2e726f50508c1efd2


-- 
David Marchand

RE: [PATCH 00/83] move alignment attribute on types

[Morten Brørup]

> From: Bruce Richardson [mailto:bruce.richardson@intel.com]
> Sent: Wednesday, 20 March 2024 16.51
> 
> On Wed, Mar 20, 2024 at 08:36:53AM -0700, Tyler Retzlaff wrote:
> > The current location used for __rte_aligned(a) for alignment of types
> > and variables is not compatible with MSVC. There is only a single
> > location accepted by both toolchains.
> >
> > After having established this as the conventional standard for lib/*
> > this series is intended to convert the remainder of the source tree to
> > use the same location for __rte_aligned(a) and alignas(a) for
> > consistency.
> >
> No objection to this change. Is there a checkpatch rule available to
> enforce this going forward or how can we avoid future introduction of
> macros in the wrong place?
> 
> Series-Acked-by: Bruce Richardson <bruce.richardson@intel.com>

Series-Acked-by: Morten Brørup <mb@smartsharesystems.com>

Re: [PATCH 00/83] move alignment attribute on types

[David Marchand]

Hello Tyler,

On Wed, Mar 20, 2024 at 4:38 PM Tyler Retzlaff
<roretzla@linux.microsoft.com> wrote:
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> After having established this as the conventional standard for lib/*
> this series is intended to convert the remainder of the source tree to
> use the same location for __rte_aligned(a) and alignas(a) for
> consistency.

The series looks good to me.

We may have some misses because of drivers wrapping in their own
stuff, but I am not sure those are fixable (this touches some base
drivers..)
drivers/common/cnxk/roc_platform.h:#define __plt_aligned        __rte_aligned
drivers/common/dpaax/compat.h:#define ____cacheline_aligned
__rte_aligned(L1_CACHE_BYTES)
drivers/common/cnxk/roc_platform.h:#define __plt_cache_aligned
__rte_cache_aligned
drivers/net/ena/base/ena_plat_dpdk.h:#define ____cacheline_aligned
__rte_cache_aligned
drivers/net/gve/base/gve_osdep.h:#define ____cacheline_aligned
__rte_cache_aligned

I also noticed memif:
drivers/net/memif/memif.h:typedef struct __rte_packed __rte_aligned(128)


-- 
David Marchand

Re: [PATCH 00/83] move alignment attribute on types

[Tyler Retzlaff]

On Wed, Mar 20, 2024 at 06:41:30PM +0100, David Marchand wrote:
> Hello Tyler,
> 
> On Wed, Mar 20, 2024 at 4:38 PM Tyler Retzlaff
> <roretzla@linux.microsoft.com> wrote:
> >
> > The current location used for __rte_aligned(a) for alignment of types
> > and variables is not compatible with MSVC. There is only a single
> > location accepted by both toolchains.
> >
> > After having established this as the conventional standard for lib/*
> > this series is intended to convert the remainder of the source tree to
> > use the same location for __rte_aligned(a) and alignas(a) for
> > consistency.
> 
> The series looks good to me.
> 
> We may have some misses because of drivers wrapping in their own
> stuff, but I am not sure those are fixable (this touches some base
> drivers..)
> drivers/common/cnxk/roc_platform.h:#define __plt_aligned        __rte_aligned
> drivers/common/dpaax/compat.h:#define ____cacheline_aligned
> __rte_aligned(L1_CACHE_BYTES)
> drivers/common/cnxk/roc_platform.h:#define __plt_cache_aligned
> __rte_cache_aligned
> drivers/net/ena/base/ena_plat_dpdk.h:#define ____cacheline_aligned
> __rte_cache_aligned
> drivers/net/gve/base/gve_osdep.h:#define ____cacheline_aligned
> __rte_cache_aligned

Yes, I know about these and I made the call to leave them untouched for
now. The cnxk drivers aren't built on windows and i didn't want to
interfere with some out of tree abstraction they may be using for
testing.

> 
> I also noticed memif:
> drivers/net/memif/memif.h:typedef struct __rte_packed __rte_aligned(128)

This should be okay, I also have to address __rte_packed (series coming
soon).

So long as there are no objections I would propose this series merged as
soon as possible (after release) assuming CI doesn't identify anything
of concern. if there is follow up to do with cnxk/dpaax i'm happy to do
it as a separate series.

ty

Re: [PATCH 00/83] move alignment attribute on types

[Tyler Retzlaff]

ping, call for reviewers.

it's relatively straight forward since it follows the same series that
was applied in lib but still more eyes are appreciated.

thanks!

On Wed, Mar 20, 2024 at 08:36:53AM -0700, Tyler Retzlaff wrote:
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
> 
> After having established this as the conventional standard for lib/*
> this series is intended to convert the remainder of the source tree to
> use the same location for __rte_aligned(a) and alignas(a) for
> consistency.
> 
> Tyler Retzlaff (83):
>   examples: move alignment attribute on types
>   net/ark: move alignment attribute on types
>   net/avp: move alignment attribute on types
>   net/axgbe: move alignment attribute on types
>   net/bnxt: move alignment attribute on types
>   net/bonding: move alignment attribute on types
>   net/cxgbe: move alignment attribute on types
>   net/e1000: move alignment attribute on types
>   net/ena: move alignment attribute on types
>   net/enic: move alignment attribute on types
>   net/fm10k: move alignment attribute on types
>   net/hinic: move alignment attribute on types
>   net/hns3: move alignment attribute on types
>   net/i40e: move alignment attribute on types
>   net/iavf: move alignment attribute on types
>   net/ice: move alignment attribute on types
>   net/igc: move alignment attribute on types
>   net/ionic: move alignment attribute on types
>   net/ixgbe: move alignment attribute on types
>   net/memif: move alignment attribute on types
>   net/mlx5: move alignment attribute on types
>   net/mlx4: move alignment attribute on types
>   net/mvpp2: move alignment attribute on types
>   net/netvsc: move alignment attribute on types
>   net/nfp: move alignment attribute on types
>   net/ngbe: move alignment attribute on types
>   net/octeontx: move alignment attribute on types
>   net/pfe: move alignment attribute on types
>   net/qede: move alignment attribute on types
>   net/softnic: move alignment attribute on types
>   net/tap: move alignment attribute on types
>   net/thunderx: move alignment attribute on types
>   net/txgbe: move alignment attribute on types
>   net/virtio: move alignment attribute on types
>   vdpa/mlx5: move alignment attribute on types
>   regex/cn9k: move alignment attribute on types
>   raw/ntb: move alignment attribute on types
>   ml/cnxk: move alignment attribute on types
>   mempool/cnxk: move alignment attribute on types
>   event/sw: move alignment attribute on types
>   event/skeleton: move alignment attribute on types
>   event/opdl: move alignment attribute on types
>   event/octeontx: move alignment attribute on types
>   event/dsw: move alignment attribute on types
>   event/dlb2: move alignment attribute on types
>   event/cnxk: move alignment attribute on types
>   dma/skeleton: move alignment attribute on types
>   dma/ioat: move alignment attribute on types
>   dma/idxd: move alignment attribute on types
>   crypto/uadk: move alignment attribute on types
>   crypto/scheduler: move alignment attribute on types
>   crypto/qat: move alignment attribute on types
>   crypto/openssl: move alignment attribute on types
>   crypto/octeontx: move alignment attribute on types
>   crypto/null: move alignment attribute on types
>   crypto/mvsam: move alignment attribute on types
>   crypto/mlx5: move alignment attribute on types
>   crypto/ipsec_mb: move alignment attribute on types
>   crypto/cnxk: move alignment attribute on types
>   crypto/ccp: move alignment attribute on types
>   crypto/caam_jr: move alignment attribute on types
>   crypto/bcmfs: move alignment attribute on types
>   crypto/armv8: move alignment attribute on types
>   compress/zlib: move alignment attribute on types
>   compress/qat: move alignment attribute on types
>   compress/octeontx: move alignment attribute on types
>   compress/nitrox: move alignment attribute on types
>   compress/isal: move alignment attribute on types
>   common/qat: move alignment attribute on types
>   common/mlx5: move alignment attribute on types
>   common/idpf: move alignment attribute on types
>   common/cpt: move alignment attribute on types
>   bus/fslmc: move alignment attribute on types
>   baseband/turbo_sw: move alignment attribute on types
>   baseband/null: move alignment attribute on types
>   app/test: move alignment attribute on types
>   app/test-pipeline: move alignment attribute on types
>   app/test-mldev: move alignment attribute on types
>   app/test-flow-perf: move alignment attribute on types
>   app/test-eventdev: move alignment attribute on types
>   app/pdump: move alignment attribute on types
>   app/graph: move alignment attribute on types
>   bus/dpaa: move alignment attribute on types
> 
>  app/graph/ethdev_rx.h                              |  4 +-
>  app/graph/ethdev_rx_priv.h                         |  4 +-
>  app/pdump/main.c                                   |  4 +-
>  app/test-eventdev/test_order_common.h              |  4 +-
>  app/test-eventdev/test_perf_common.h               | 24 +++++-----
>  app/test-eventdev/test_pipeline_common.h           | 18 ++++----
>  app/test-flow-perf/actions_gen.c                   | 51 ++++++++++++----------
>  app/test-flow-perf/items_gen.c                     | 22 +++++-----
>  app/test-flow-perf/main.c                          |  8 ++--
>  app/test-mldev/test_device_ops.h                   |  4 +-
>  app/test-mldev/test_inference_common.h             |  4 +-
>  app/test-mldev/test_model_ops.h                    |  4 +-
>  app/test-pipeline/main.h                           |  4 +-
>  app/test/test_cryptodev_aead_test_vectors.h        |  6 +--
>  app/test/test_cryptodev_blockcipher.h              |  2 +-
>  app/test/test_cryptodev_kasumi_test_vectors.h      |  2 +-
>  app/test/test_cryptodev_mixed_test_vectors.h       |  2 +-
>  .../test_cryptodev_security_docsis_test_vectors.h  |  2 +-
>  app/test/test_cryptodev_snow3g_test_vectors.h      |  2 +-
>  app/test/test_cryptodev_zuc_test_vectors.h         |  2 +-
>  app/test/test_distributor.c                        | 12 ++---
>  app/test/test_distributor_perf.c                   |  6 +--
>  app/test/test_mempool_perf.c                       |  6 +--
>  app/test/test_pmd_perf.c                           |  4 +-
>  app/test/test_ring_stress_impl.h                   | 10 ++---
>  app/test/test_rwlock.c                             |  8 ++--
>  app/test/test_seqlock.c                            |  8 ++--
>  app/test/test_ticketlock.c                         |  4 +-
>  app/test/test_trace_perf.c                         |  8 ++--
>  drivers/baseband/null/bbdev_null.c                 |  4 +-
>  drivers/baseband/turbo_sw/bbdev_turbo_software.c   |  4 +-
>  drivers/bus/dpaa/base/qbman/qman.c                 |  3 +-
>  drivers/bus/dpaa/include/fsl_bman.h                |  4 +-
>  drivers/bus/dpaa/include/fsl_qman.h                | 20 ++++-----
>  drivers/bus/fslmc/portal/dpaa2_hw_pvt.h            |  4 +-
>  drivers/common/cpt/cpt_common.h                    |  4 +-
>  drivers/common/idpf/idpf_common_device.h           |  2 +-
>  drivers/common/mlx5/linux/mlx5_glue.c              |  2 +-
>  drivers/common/mlx5/linux/mlx5_nl.c                |  2 +-
>  drivers/common/mlx5/mlx5_common_mr.h               |  4 +-
>  drivers/common/mlx5/mlx5_common_utils.h            | 12 ++---
>  drivers/common/mlx5/mlx5_prm.h                     |  4 +-
>  drivers/common/qat/qat_adf/icp_qat_hw.h            |  8 ++--
>  drivers/common/qat/qat_common.h                    |  4 +-
>  drivers/common/qat/qat_qp.h                        |  6 +--
>  drivers/compress/isal/isal_compress_pmd_private.h  |  8 ++--
>  drivers/compress/nitrox/nitrox_comp_reqmgr.c       |  2 +-
>  drivers/compress/octeontx/otx_zip.h                | 16 +++----
>  drivers/compress/qat/qat_comp.h                    |  4 +-
>  drivers/compress/zlib/zlib_pmd_private.h           | 12 ++---
>  drivers/crypto/armv8/armv8_pmd_private.h           | 14 +++---
>  drivers/crypto/bcmfs/bcmfs_qp.h                    |  4 +-
>  drivers/crypto/bcmfs/bcmfs_sym_session.h           |  4 +-
>  drivers/crypto/caam_jr/caam_jr_desc.h              |  8 ++--
>  drivers/crypto/ccp/ccp_crypto.h                    |  4 +-
>  drivers/crypto/ccp/ccp_dev.h                       |  8 ++--
>  drivers/crypto/ccp/ccp_pmd_private.h               |  8 ++--
>  drivers/crypto/cnxk/cn10k_cryptodev_sec.h          |  4 +-
>  drivers/crypto/cnxk/cn10k_ipsec.h                  |  4 +-
>  drivers/crypto/cnxk/cn10k_tls.h                    |  4 +-
>  drivers/crypto/cnxk/cn9k_cryptodev_ops.c           |  2 +-
>  drivers/crypto/cnxk/cn9k_ipsec.h                   |  8 ++--
>  drivers/crypto/cnxk/cnxk_cryptodev_ops.h           |  4 +-
>  drivers/crypto/cnxk/cnxk_se.h                      |  4 +-
>  drivers/crypto/ipsec_mb/pmd_aesni_mb.c             |  4 +-
>  drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h        | 24 +++++-----
>  drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h     |  4 +-
>  drivers/crypto/ipsec_mb/pmd_kasumi_priv.h          |  4 +-
>  drivers/crypto/ipsec_mb/pmd_snow3g_priv.h          |  4 +-
>  drivers/crypto/ipsec_mb/pmd_zuc_priv.h             |  4 +-
>  drivers/crypto/mlx5/mlx5_crypto.h                  |  4 +-
>  drivers/crypto/mvsam/mrvl_pmd_private.h            | 12 ++---
>  drivers/crypto/mvsam/rte_mrvl_pmd.c                | 12 +++--
>  drivers/crypto/null/null_crypto_pmd_private.h      |  8 ++--
>  drivers/crypto/octeontx/otx_cryptodev_hw_access.h  |  4 +-
>  drivers/crypto/openssl/openssl_pmd_private.h       | 12 ++---
>  drivers/crypto/qat/qat_asym.h                      | 15 +++----
>  drivers/crypto/qat/qat_sym.h                       |  8 ++--
>  drivers/crypto/qat/qat_sym_session.h               | 10 ++---
>  .../crypto/scheduler/scheduler_pkt_size_distr.c    |  4 +-
>  drivers/crypto/scheduler/scheduler_pmd_private.h   |  8 ++--
>  drivers/crypto/uadk/uadk_crypto_pmd_private.h      | 12 ++---
>  drivers/dma/idxd/idxd_hw_defs.h                    | 38 ++++++++--------
>  drivers/dma/ioat/ioat_internal.h                   |  4 +-
>  drivers/dma/skeleton/skeleton_dmadev.h             |  4 +-
>  drivers/event/cnxk/cn10k_eventdev.h                |  8 ++--
>  drivers/event/cnxk/cnxk_eventdev.h                 | 24 +++++-----
>  drivers/event/cnxk/cnxk_tim_evdev.h                |  4 +-
>  drivers/event/cnxk/cnxk_tim_worker.c               |  2 +-
>  drivers/event/dlb2/dlb2_priv.h                     | 16 +++----
>  drivers/event/dsw/dsw_evdev.h                      | 20 ++++-----
>  drivers/event/octeontx/ssovf_evdev.h               |  8 ++--
>  drivers/event/octeontx/timvf_evdev.h               |  8 ++--
>  drivers/event/octeontx/timvf_worker.c              |  2 +-
>  drivers/event/opdl/opdl_evdev.h                    |  6 +--
>  drivers/event/opdl/opdl_ring.c                     | 19 ++++----
>  drivers/event/skeleton/skeleton_eventdev.h         |  8 ++--
>  drivers/event/sw/event_ring.h                      |  2 +-
>  drivers/event/sw/iq_chunk.h                        |  4 +-
>  drivers/event/sw/sw_evdev.h                        | 18 ++++----
>  drivers/mempool/cnxk/cn10k_mempool_ops.c           |  4 +-
>  drivers/ml/cnxk/cnxk_ml_ops.h                      |  4 +-
>  drivers/net/ark/ark_ethdev_rx.c                    |  6 +--
>  drivers/net/ark/ark_ethdev_tx.c                    |  6 +--
>  drivers/net/avp/avp_ethdev.c                       |  8 ++--
>  drivers/net/avp/rte_avp_common.h                   |  4 +-
>  drivers/net/axgbe/axgbe_rxtx.h                     |  8 ++--
>  drivers/net/bnxt/bnxt_rxr.c                        |  2 +-
>  drivers/net/bonding/rte_eth_bond_8023ad.h          | 28 ++++++------
>  drivers/net/cxgbe/base/adapter.h                   | 14 +++---
>  drivers/net/cxgbe/cxgbe_ofld.h                     |  2 +-
>  drivers/net/e1000/igb_rxtx.c                       |  4 +-
>  drivers/net/ena/ena_ethdev.h                       | 17 ++++----
>  drivers/net/enic/enic_rxtx_common.h                |  2 +-
>  drivers/net/fm10k/fm10k_rxtx.c                     |  5 +--
>  drivers/net/hinic/hinic_pmd_rx.h                   |  8 ++--
>  drivers/net/hns3/hns3_ethdev.h                     |  4 +-
>  drivers/net/hns3/hns3_fdir.c                       |  4 +-
>  drivers/net/hns3/hns3_rxtx.h                       |  4 +-
>  drivers/net/i40e/i40e_ethdev.h                     |  4 +-
>  drivers/net/i40e/i40e_rxtx.h                       |  2 +-
>  drivers/net/iavf/iavf.h                            |  2 +-
>  drivers/net/iavf/iavf_rxtx.c                       |  3 +-
>  drivers/net/ice/ice_ethdev.h                       |  2 +-
>  drivers/net/ice/ice_rxtx.c                         |  3 +-
>  drivers/net/igc/igc_txrx.c                         |  4 +-
>  drivers/net/ionic/ionic_lif.h                      |  2 +-
>  drivers/net/ionic/ionic_rxtx.c                     |  6 +--
>  drivers/net/ixgbe/ixgbe_ipsec.h                    |  4 +-
>  drivers/net/ixgbe/ixgbe_rxtx.c                     | 10 ++---
>  drivers/net/memif/memif.h                          |  2 +-
>  drivers/net/mlx4/mlx4_rxtx.c                       |  2 +-
>  drivers/net/mlx5/hws/mlx5dr_send.h                 |  4 +-
>  drivers/net/mlx5/mlx5.h                            |  6 +--
>  drivers/net/mlx5/mlx5_flow.h                       |  4 +-
>  drivers/net/mlx5/mlx5_hws_cnt.h                    | 14 +++---
>  drivers/net/mlx5/mlx5_rx.h                         |  4 +-
>  drivers/net/mlx5/mlx5_rxtx.c                       |  6 +--
>  drivers/net/mlx5/mlx5_tx.h                         | 10 ++---
>  drivers/net/mlx5/mlx5_utils.h                      |  2 +-
>  drivers/net/mvpp2/mrvl_ethdev.h                    |  4 +-
>  drivers/net/netvsc/hn_var.h                        |  4 +-
>  drivers/net/nfp/flower/nfp_flower_flow.c           |  4 +-
>  drivers/net/nfp/nfp_ipsec.h                        |  4 +-
>  drivers/net/nfp/nfp_rxtx.h                         |  8 ++--
>  drivers/net/ngbe/ngbe_ptypes.c                     |  2 +-
>  drivers/net/ngbe/ngbe_rxtx.c                       |  2 +-
>  drivers/net/octeontx/octeontx_ethdev.c             |  4 +-
>  drivers/net/octeontx/octeontx_ethdev.h             | 12 ++---
>  drivers/net/octeontx/octeontx_rxtx.h               |  2 +-
>  drivers/net/pfe/base/pfe.h                         |  4 +-
>  drivers/net/qede/qede_rxtx.c                       | 14 +++---
>  drivers/net/softnic/rte_eth_softnic_internals.h    |  4 +-
>  drivers/net/tap/tap_bpf.h                          |  4 +-
>  drivers/net/thunderx/nicvf_rxtx.c                  |  8 ++--
>  drivers/net/thunderx/nicvf_struct.h                | 16 +++----
>  drivers/net/txgbe/txgbe_ipsec.h                    |  4 +-
>  drivers/net/txgbe/txgbe_ptypes.c                   | 10 ++---
>  drivers/net/txgbe/txgbe_rxtx.c                     |  2 +-
>  drivers/net/virtio/virtqueue.h                     |  4 +-
>  drivers/raw/ntb/ntb.h                              |  6 +--
>  drivers/regex/cn9k/cn9k_regexdev.h                 |  4 +-
>  drivers/vdpa/mlx5/mlx5_vdpa.h                      |  4 +-
>  examples/bbdev_app/main.c                          |  8 ++--
>  examples/bond/main.c                               |  2 +-
>  examples/distributor/main.c                        | 32 +++++++-------
>  examples/eventdev_pipeline/pipeline_common.h       |  8 ++--
>  examples/ip_fragmentation/main.c                   |  4 +-
>  examples/ip_pipeline/thread.c                      |  4 +-
>  examples/ip_reassembly/main.c                      |  4 +-
>  examples/ipsec-secgw/ipsec-secgw.c                 |  4 +-
>  examples/ipsec-secgw/ipsec-secgw.h                 |  8 ++--
>  examples/ipsec-secgw/ipsec.h                       | 22 +++++-----
>  examples/ipsec-secgw/ipsec_worker.h                |  4 +-
>  examples/ipv4_multicast/main.c                     |  4 +-
>  examples/l2fwd-crypto/main.c                       | 12 ++---
>  examples/l2fwd-event/l2fwd_common.h                |  8 ++--
>  examples/l2fwd-event/l2fwd_poll.h                  |  4 +-
>  examples/l2fwd-jobstats/main.c                     |  8 ++--
>  examples/l2fwd-keepalive/main.c                    |  8 ++--
>  examples/l2fwd-macsec/main.c                       | 12 ++---
>  examples/l2fwd/main.c                              | 12 ++---
>  examples/l3fwd-graph/main.c                        |  8 ++--
>  examples/l3fwd-power/main.c                        | 24 +++++-----
>  examples/l3fwd-power/main.h                        |  4 +-
>  examples/l3fwd-power/perf_core.c                   |  4 +-
>  examples/l3fwd/l3fwd.h                             |  8 ++--
>  examples/l3fwd/l3fwd_em.c                          |  4 +-
>  examples/l3fwd/main.c                              |  4 +-
>  examples/link_status_interrupt/main.c              |  8 ++--
>  .../multi_process/client_server_mp/shared/common.h |  8 ++--
>  examples/multi_process/symmetric_mp/main.c         |  4 +-
>  examples/ntb/ntb_fwd.c                             |  4 +-
>  examples/packet_ordering/main.c                    | 16 +++----
>  examples/pipeline/thread.c                         |  4 +-
>  examples/qos_sched/app_thread.c                    |  2 +-
>  examples/qos_sched/main.h                          |  4 +-
>  examples/server_node_efd/shared/common.h           | 12 ++---
>  examples/vhost/main.h                              |  4 +-
>  examples/vhost_blk/vhost_blk.h                     |  4 +-
>  examples/vhost_crypto/main.c                       |  4 +-
>  examples/vm_power_manager/power_manager.c          |  4 +-
>  202 files changed, 726 insertions(+), 732 deletions(-)
> 
> -- 
> 1.8.3.1

RE: [PATCH 01/83] examples: move alignment attribute on types

[Morten Brørup]

+To: David Hunt, Distributor maintainer
+To: Radu Nicolau and Akhil Goyal, IPsec security gateway example maintainers

> From: Tyler Retzlaff [mailto:roretzla@linux.microsoft.com]
> Sent: Wednesday, 20 March 2024 16.37
> 
> Move location of __rte_aligned(a) to new conventional location. The new
> placement between {struct,union} and the tag allows the desired
> alignment to be imparted on the type regardless of the toolchain being
> used for both C and C++. Additionally, it avoids confusion by Doxygen
> when generating documentation.
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> ---

Reviewed-by: Morten Brørup <mb@smartsharesystems.com>

A few comments for the above mentioned maintainers inline below.

> diff --git a/examples/distributor/main.c b/examples/distributor/main.c
> index 542f76c..ddbc387 100644
> --- a/examples/distributor/main.c
> +++ b/examples/distributor/main.c
> @@ -44,39 +44,39 @@
>  unsigned int num_workers;
> 
>  static volatile struct app_stats {
> -	struct {
> +	alignas(RTE_CACHE_LINE_SIZE) struct {
>  		uint64_t rx_pkts;
>  		uint64_t returned_pkts;
>  		uint64_t enqueued_pkts;
>  		uint64_t enqdrop_pkts;
> -	} rx __rte_cache_aligned;
> -	int pad1 __rte_cache_aligned;
> +	} rx;
> +	alignas(RTE_CACHE_LINE_SIZE) int pad1;

pad1/2/3/4/5 should be replaced by RTE_CACHE_GUARD, if that is their purpose.

@David: You might want to change this in a future patch.

> 
> -	struct {
> +	alignas(RTE_CACHE_LINE_SIZE) struct {
>  		uint64_t in_pkts;
>  		uint64_t ret_pkts;
>  		uint64_t sent_pkts;
>  		uint64_t enqdrop_pkts;
> -	} dist __rte_cache_aligned;
> -	int pad2 __rte_cache_aligned;
> +	} dist;
> +	alignas(RTE_CACHE_LINE_SIZE) int pad2;
> 
> -	struct {
> +	alignas(RTE_CACHE_LINE_SIZE) struct {
>  		uint64_t dequeue_pkts;
>  		uint64_t tx_pkts;
>  		uint64_t enqdrop_pkts;
> -	} tx __rte_cache_aligned;
> -	int pad3 __rte_cache_aligned;
> +	} tx;
> +	alignas(RTE_CACHE_LINE_SIZE) int pad3;
> 
> -	uint64_t worker_pkts[64] __rte_cache_aligned;
> +	alignas(RTE_CACHE_LINE_SIZE) uint64_t worker_pkts[64];
> 
> -	int pad4 __rte_cache_aligned;
> +	alignas(RTE_CACHE_LINE_SIZE) int pad4;
> 
> -	uint64_t worker_bursts[64][8] __rte_cache_aligned;
> +	alignas(RTE_CACHE_LINE_SIZE) uint64_t worker_bursts[64][8];
> 
> -	int pad5 __rte_cache_aligned;
> +	alignas(RTE_CACHE_LINE_SIZE) int pad5;
> 
> -	uint64_t port_rx_pkts[64] __rte_cache_aligned;
> -	uint64_t port_tx_pkts[64] __rte_cache_aligned;
> +	alignas(RTE_CACHE_LINE_SIZE) uint64_t port_rx_pkts[64];
> +	alignas(RTE_CACHE_LINE_SIZE) uint64_t port_tx_pkts[64];
>  } app_stats;
> 
>  struct app_stats prev_app_stats;

[...]

> diff --git a/examples/ipsec-secgw/ipsec.h b/examples/ipsec-secgw/ipsec.h
> index bdcada1..4cf4c9d 100644
> --- a/examples/ipsec-secgw/ipsec.h
> +++ b/examples/ipsec-secgw/ipsec.h
> @@ -112,7 +112,7 @@ enum {
>  	return (struct ipsec_sa *)i;
>  }
> 
> -struct ipsec_sa {
> +struct __rte_cache_aligned ipsec_sa {
>  	struct rte_ipsec_session sessions[IPSEC_SESSION_MAX];
>  	uint32_t spi;
>  	struct cdev_qp *cqp[RTE_MAX_LCORE];
> @@ -170,7 +170,7 @@ struct ipsec_sa {
>  	struct rte_flow_item_esp esp_spec;
>  	struct rte_flow *flow;
>  	struct rte_security_session_conf sess_conf;
> -} __rte_cache_aligned;
> +};
> 
>  struct ipsec_xf {
>  	struct rte_crypto_sym_xform a;
> @@ -190,12 +190,12 @@ struct sa_ctx {
>  	struct ipsec_sa sa[];
>  };
> 
> -struct ipsec_mbuf_metadata {
> +struct __rte_cache_aligned ipsec_mbuf_metadata {
>  	struct ipsec_sa *sa;
>  	struct rte_crypto_op cop;
>  	struct rte_crypto_sym_op sym_cop;
>  	uint8_t buf[32];
> -} __rte_cache_aligned;
> +};
> 
>  #define IS_TRANSPORT(flags) ((flags) & TRANSPORT)
> 
> @@ -224,7 +224,7 @@ struct cdev_qp {
>  	uint16_t qp;
>  	uint16_t in_flight;
>  	uint16_t len;
> -	struct rte_crypto_op *buf[MAX_PKT_BURST] __rte_aligned(sizeof(void
> *));
> +	alignas(sizeof(void *)) struct rte_crypto_op *buf[MAX_PKT_BURST];

Aligning a pointer to the size of a pointer is superfluous, unless the structure is packed.

@Radu, @Akhil: You might want to remove these in a future patch.

>  };
> 
>  struct ipsec_ctx {
> @@ -235,7 +235,7 @@ struct ipsec_ctx {
>  	uint16_t nb_qps;
>  	uint16_t last_qp;
>  	struct cdev_qp tbl[MAX_QP_PER_LCORE];
> -	struct rte_mbuf *ol_pkts[MAX_PKT_BURST] __rte_aligned(sizeof(void
> *));
> +	alignas(sizeof(void *)) struct rte_mbuf *ol_pkts[MAX_PKT_BURST];
>  	uint16_t ol_pkts_cnt;
>  	uint64_t ipv4_offloads;
>  	uint64_t ipv6_offloads;
> @@ -283,18 +283,18 @@ struct cnt_blk {
>  	uint32_t cnt;
>  } __rte_packed;
> 
> -struct lcore_rx_queue {
> +struct __rte_cache_aligned lcore_rx_queue {
>  	uint16_t port_id;
>  	uint8_t queue_id;
>  	void *sec_ctx;
> -} __rte_cache_aligned;
> +};
> 
>  struct buffer {
>  	uint16_t len;
> -	struct rte_mbuf *m_table[MAX_PKT_BURST] __rte_aligned(sizeof(void
> *));
> +	alignas(sizeof(void *)) struct rte_mbuf *m_table[MAX_PKT_BURST];
>  };
> 
> -struct lcore_conf {
> +struct __rte_cache_aligned lcore_conf {
>  	uint16_t nb_rx_queue;
>  	struct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
>  	uint16_t tx_queue_id[RTE_MAX_ETHPORTS];

Re: [PATCH 01/83] examples: move alignment attribute on types

[Tyler Retzlaff]

On Sat, Apr 06, 2024 at 04:55:06PM +0200, Morten Brørup wrote:
> +To: David Hunt, Distributor maintainer
> +To: Radu Nicolau and Akhil Goyal, IPsec security gateway example maintainers

thanks morten. if the maintainers reply to acknowledge i will update the
series with your recommended feedback.

i noticed a couple of these as well when making the conversion but
resist the urge to change them to avoid confusion/review overhead.

> 
> > From: Tyler Retzlaff [mailto:roretzla@linux.microsoft.com]
> > Sent: Wednesday, 20 March 2024 16.37
> > 
> > Move location of __rte_aligned(a) to new conventional location. The new
> > placement between {struct,union} and the tag allows the desired
> > alignment to be imparted on the type regardless of the toolchain being
> > used for both C and C++. Additionally, it avoids confusion by Doxygen
> > when generating documentation.
> > 
> > Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> > ---
> 
> Reviewed-by: Morten Brørup <mb@smartsharesystems.com>
> 
> A few comments for the above mentioned maintainers inline below.
> 
> > diff --git a/examples/distributor/main.c b/examples/distributor/main.c
> > index 542f76c..ddbc387 100644
> > --- a/examples/distributor/main.c
> > +++ b/examples/distributor/main.c
> > @@ -44,39 +44,39 @@
> >  unsigned int num_workers;
> > 
> >  static volatile struct app_stats {
> > -	struct {
> > +	alignas(RTE_CACHE_LINE_SIZE) struct {
> >  		uint64_t rx_pkts;
> >  		uint64_t returned_pkts;
> >  		uint64_t enqueued_pkts;
> >  		uint64_t enqdrop_pkts;
> > -	} rx __rte_cache_aligned;
> > -	int pad1 __rte_cache_aligned;
> > +	} rx;
> > +	alignas(RTE_CACHE_LINE_SIZE) int pad1;
> 
> pad1/2/3/4/5 should be replaced by RTE_CACHE_GUARD, if that is their purpose.
> 
> @David: You might want to change this in a future patch.
> 
> > 
> > -	struct {
> > +	alignas(RTE_CACHE_LINE_SIZE) struct {
> >  		uint64_t in_pkts;
> >  		uint64_t ret_pkts;
> >  		uint64_t sent_pkts;
> >  		uint64_t enqdrop_pkts;
> > -	} dist __rte_cache_aligned;
> > -	int pad2 __rte_cache_aligned;
> > +	} dist;
> > +	alignas(RTE_CACHE_LINE_SIZE) int pad2;
> > 
> > -	struct {
> > +	alignas(RTE_CACHE_LINE_SIZE) struct {
> >  		uint64_t dequeue_pkts;
> >  		uint64_t tx_pkts;
> >  		uint64_t enqdrop_pkts;
> > -	} tx __rte_cache_aligned;
> > -	int pad3 __rte_cache_aligned;
> > +	} tx;
> > +	alignas(RTE_CACHE_LINE_SIZE) int pad3;
> > 
> > -	uint64_t worker_pkts[64] __rte_cache_aligned;
> > +	alignas(RTE_CACHE_LINE_SIZE) uint64_t worker_pkts[64];
> > 
> > -	int pad4 __rte_cache_aligned;
> > +	alignas(RTE_CACHE_LINE_SIZE) int pad4;
> > 
> > -	uint64_t worker_bursts[64][8] __rte_cache_aligned;
> > +	alignas(RTE_CACHE_LINE_SIZE) uint64_t worker_bursts[64][8];
> > 
> > -	int pad5 __rte_cache_aligned;
> > +	alignas(RTE_CACHE_LINE_SIZE) int pad5;
> > 
> > -	uint64_t port_rx_pkts[64] __rte_cache_aligned;
> > -	uint64_t port_tx_pkts[64] __rte_cache_aligned;
> > +	alignas(RTE_CACHE_LINE_SIZE) uint64_t port_rx_pkts[64];
> > +	alignas(RTE_CACHE_LINE_SIZE) uint64_t port_tx_pkts[64];
> >  } app_stats;
> > 
> >  struct app_stats prev_app_stats;
> 
> [...]
> 
> > diff --git a/examples/ipsec-secgw/ipsec.h b/examples/ipsec-secgw/ipsec.h
> > index bdcada1..4cf4c9d 100644
> > --- a/examples/ipsec-secgw/ipsec.h
> > +++ b/examples/ipsec-secgw/ipsec.h
> > @@ -112,7 +112,7 @@ enum {
> >  	return (struct ipsec_sa *)i;
> >  }
> > 
> > -struct ipsec_sa {
> > +struct __rte_cache_aligned ipsec_sa {
> >  	struct rte_ipsec_session sessions[IPSEC_SESSION_MAX];
> >  	uint32_t spi;
> >  	struct cdev_qp *cqp[RTE_MAX_LCORE];
> > @@ -170,7 +170,7 @@ struct ipsec_sa {
> >  	struct rte_flow_item_esp esp_spec;
> >  	struct rte_flow *flow;
> >  	struct rte_security_session_conf sess_conf;
> > -} __rte_cache_aligned;
> > +};
> > 
> >  struct ipsec_xf {
> >  	struct rte_crypto_sym_xform a;
> > @@ -190,12 +190,12 @@ struct sa_ctx {
> >  	struct ipsec_sa sa[];
> >  };
> > 
> > -struct ipsec_mbuf_metadata {
> > +struct __rte_cache_aligned ipsec_mbuf_metadata {
> >  	struct ipsec_sa *sa;
> >  	struct rte_crypto_op cop;
> >  	struct rte_crypto_sym_op sym_cop;
> >  	uint8_t buf[32];
> > -} __rte_cache_aligned;
> > +};
> > 
> >  #define IS_TRANSPORT(flags) ((flags) & TRANSPORT)
> > 
> > @@ -224,7 +224,7 @@ struct cdev_qp {
> >  	uint16_t qp;
> >  	uint16_t in_flight;
> >  	uint16_t len;
> > -	struct rte_crypto_op *buf[MAX_PKT_BURST] __rte_aligned(sizeof(void
> > *));
> > +	alignas(sizeof(void *)) struct rte_crypto_op *buf[MAX_PKT_BURST];
> 
> Aligning a pointer to the size of a pointer is superfluous, unless the structure is packed.
> 
> @Radu, @Akhil: You might want to remove these in a future patch.
> 
> >  };
> > 
> >  struct ipsec_ctx {
> > @@ -235,7 +235,7 @@ struct ipsec_ctx {
> >  	uint16_t nb_qps;
> >  	uint16_t last_qp;
> >  	struct cdev_qp tbl[MAX_QP_PER_LCORE];
> > -	struct rte_mbuf *ol_pkts[MAX_PKT_BURST] __rte_aligned(sizeof(void
> > *));
> > +	alignas(sizeof(void *)) struct rte_mbuf *ol_pkts[MAX_PKT_BURST];
> >  	uint16_t ol_pkts_cnt;
> >  	uint64_t ipv4_offloads;
> >  	uint64_t ipv6_offloads;
> > @@ -283,18 +283,18 @@ struct cnt_blk {
> >  	uint32_t cnt;
> >  } __rte_packed;
> > 
> > -struct lcore_rx_queue {
> > +struct __rte_cache_aligned lcore_rx_queue {
> >  	uint16_t port_id;
> >  	uint8_t queue_id;
> >  	void *sec_ctx;
> > -} __rte_cache_aligned;
> > +};
> > 
> >  struct buffer {
> >  	uint16_t len;
> > -	struct rte_mbuf *m_table[MAX_PKT_BURST] __rte_aligned(sizeof(void
> > *));
> > +	alignas(sizeof(void *)) struct rte_mbuf *m_table[MAX_PKT_BURST];
> >  };
> > 
> > -struct lcore_conf {
> > +struct __rte_cache_aligned lcore_conf {
> >  	uint16_t nb_rx_queue;
> >  	struct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
> >  	uint16_t tx_queue_id[RTE_MAX_ETHPORTS];

RE: [PATCH 01/83] examples: move alignment attribute on types

[Akhil Goyal]

> +To: David Hunt, Distributor maintainer
> +To: Radu Nicolau and Akhil Goyal, IPsec security gateway example maintainers
> 
> > From: Tyler Retzlaff [mailto:roretzla@linux.microsoft.com]
> > Sent: Wednesday, 20 March 2024 16.37
> >
> > Move location of __rte_aligned(a) to new conventional location. The new
> > placement between {struct,union} and the tag allows the desired
> > alignment to be imparted on the type regardless of the toolchain being
> > used for both C and C++. Additionally, it avoids confusion by Doxygen
> > when generating documentation.
> >
> > Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> > ---
> 
> Reviewed-by: Morten Brørup <mb@smartsharesystems.com>
> 
> A few comments for the above mentioned maintainers inline below.
> 
> > diff --git a/examples/ipsec-secgw/ipsec.h b/examples/ipsec-secgw/ipsec.h
> > index bdcada1..4cf4c9d 100644
> > --- a/examples/ipsec-secgw/ipsec.h
> > +++ b/examples/ipsec-secgw/ipsec.h
> > @@ -112,7 +112,7 @@ enum {
> >  	return (struct ipsec_sa *)i;
> >  }
> >
> > -struct ipsec_sa {
> > +struct __rte_cache_aligned ipsec_sa {
> >  	struct rte_ipsec_session sessions[IPSEC_SESSION_MAX];
> >  	uint32_t spi;
> >  	struct cdev_qp *cqp[RTE_MAX_LCORE];
> > @@ -170,7 +170,7 @@ struct ipsec_sa {
> >  	struct rte_flow_item_esp esp_spec;
> >  	struct rte_flow *flow;
> >  	struct rte_security_session_conf sess_conf;
> > -} __rte_cache_aligned;
> > +};
> >
> >  struct ipsec_xf {
> >  	struct rte_crypto_sym_xform a;
> > @@ -190,12 +190,12 @@ struct sa_ctx {
> >  	struct ipsec_sa sa[];
> >  };
> >
> > -struct ipsec_mbuf_metadata {
> > +struct __rte_cache_aligned ipsec_mbuf_metadata {
> >  	struct ipsec_sa *sa;
> >  	struct rte_crypto_op cop;
> >  	struct rte_crypto_sym_op sym_cop;
> >  	uint8_t buf[32];
> > -} __rte_cache_aligned;
> > +};
> >
> >  #define IS_TRANSPORT(flags) ((flags) & TRANSPORT)
> >
> > @@ -224,7 +224,7 @@ struct cdev_qp {
> >  	uint16_t qp;
> >  	uint16_t in_flight;
> >  	uint16_t len;
> > -	struct rte_crypto_op *buf[MAX_PKT_BURST] __rte_aligned(sizeof(void
> > *));
> > +	alignas(sizeof(void *)) struct rte_crypto_op *buf[MAX_PKT_BURST];
> 
> Aligning a pointer to the size of a pointer is superfluous, unless the structure is
> packed.
> 
> @Radu, @Akhil: You might want to remove these in a future patch.

Agreed, these can be removed.

> 
> >  };
> >
> >  struct ipsec_ctx {
> > @@ -235,7 +235,7 @@ struct ipsec_ctx {
> >  	uint16_t nb_qps;
> >  	uint16_t last_qp;
> >  	struct cdev_qp tbl[MAX_QP_PER_LCORE];
> > -	struct rte_mbuf *ol_pkts[MAX_PKT_BURST] __rte_aligned(sizeof(void
> > *));
> > +	alignas(sizeof(void *)) struct rte_mbuf *ol_pkts[MAX_PKT_BURST];
> >  	uint16_t ol_pkts_cnt;
> >  	uint64_t ipv4_offloads;
> >  	uint64_t ipv6_offloads;
> > @@ -283,18 +283,18 @@ struct cnt_blk {
> >  	uint32_t cnt;
> >  } __rte_packed;
> >
> > -struct lcore_rx_queue {
> > +struct __rte_cache_aligned lcore_rx_queue {
> >  	uint16_t port_id;
> >  	uint8_t queue_id;
> >  	void *sec_ctx;
> > -} __rte_cache_aligned;
> > +};
> >
> >  struct buffer {
> >  	uint16_t len;
> > -	struct rte_mbuf *m_table[MAX_PKT_BURST] __rte_aligned(sizeof(void
> > *));
> > +	alignas(sizeof(void *)) struct rte_mbuf *m_table[MAX_PKT_BURST];
> >  };
> >
> > -struct lcore_conf {
> > +struct __rte_cache_aligned lcore_conf {
> >  	uint16_t nb_rx_queue;
> >  	struct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
> >  	uint16_t tx_queue_id[RTE_MAX_ETHPORTS];

[PATCH v2 00/83] move alignment attribute on types

[Tyler Retzlaff]

The current location used for __rte_aligned(a) for alignment of types
and variables is not compatible with MSVC. There is only a single
location accepted by both toolchains.

After having established this as the conventional standard for lib/*
this series is intended to convert the remainder of the source tree to
use the same location for __rte_aligned(a) and alignas(a) for
consistency.

v2:
  * examples/ipsec remove alignment of pointers to size of a pointer
    explicit alignment is unnecessary.

Tyler Retzlaff (83):
  examples: move alignment attribute on types
  net/ark: move alignment attribute on types
  net/avp: move alignment attribute on types
  net/axgbe: move alignment attribute on types
  net/bnxt: move alignment attribute on types
  net/bonding: move alignment attribute on types
  net/cxgbe: move alignment attribute on types
  net/e1000: move alignment attribute on types
  net/ena: move alignment attribute on types
  net/enic: move alignment attribute on types
  net/fm10k: move alignment attribute on types
  net/hinic: move alignment attribute on types
  net/hns3: move alignment attribute on types
  net/i40e: move alignment attribute on types
  net/iavf: move alignment attribute on types
  net/ice: move alignment attribute on types
  net/igc: move alignment attribute on types
  net/ionic: move alignment attribute on types
  net/ixgbe: move alignment attribute on types
  net/memif: move alignment attribute on types
  net/mlx5: move alignment attribute on types
  net/mlx4: move alignment attribute on types
  net/mvpp2: move alignment attribute on types
  net/netvsc: move alignment attribute on types
  net/nfp: move alignment attribute on types
  net/ngbe: move alignment attribute on types
  net/octeontx: move alignment attribute on types
  net/pfe: move alignment attribute on types
  net/qede: move alignment attribute on types
  net/softnic: move alignment attribute on types
  net/tap: move alignment attribute on types
  net/thunderx: move alignment attribute on types
  net/txgbe: move alignment attribute on types
  net/virtio: move alignment attribute on types
  vdpa/mlx5: move alignment attribute on types
  regex/cn9k: move alignment attribute on types
  raw/ntb: move alignment attribute on types
  ml/cnxk: move alignment attribute on types
  mempool/cnxk: move alignment attribute on types
  event/sw: move alignment attribute on types
  event/skeleton: move alignment attribute on types
  event/opdl: move alignment attribute on types
  event/octeontx: move alignment attribute on types
  event/dsw: move alignment attribute on types
  event/dlb2: move alignment attribute on types
  event/cnxk: move alignment attribute on types
  dma/skeleton: move alignment attribute on types
  dma/ioat: move alignment attribute on types
  dma/idxd: move alignment attribute on types
  crypto/uadk: move alignment attribute on types
  crypto/scheduler: move alignment attribute on types
  crypto/qat: move alignment attribute on types
  crypto/openssl: move alignment attribute on types
  crypto/octeontx: move alignment attribute on types
  crypto/null: move alignment attribute on types
  crypto/mvsam: move alignment attribute on types
  crypto/mlx5: move alignment attribute on types
  crypto/ipsec_mb: move alignment attribute on types
  crypto/cnxk: move alignment attribute on types
  crypto/ccp: move alignment attribute on types
  crypto/caam_jr: move alignment attribute on types
  crypto/bcmfs: move alignment attribute on types
  crypto/armv8: move alignment attribute on types
  compress/zlib: move alignment attribute on types
  compress/qat: move alignment attribute on types
  compress/octeontx: move alignment attribute on types
  compress/nitrox: move alignment attribute on types
  compress/isal: move alignment attribute on types
  common/qat: move alignment attribute on types
  common/mlx5: move alignment attribute on types
  common/idpf: move alignment attribute on types
  common/cpt: move alignment attribute on types
  bus/fslmc: move alignment attribute on types
  baseband/turbo_sw: move alignment attribute on types
  baseband/null: move alignment attribute on types
  app/test: move alignment attribute on types
  app/test-pipeline: move alignment attribute on types
  app/test-mldev: move alignment attribute on types
  app/test-flow-perf: move alignment attribute on types
  app/test-eventdev: move alignment attribute on types
  app/pdump: move alignment attribute on types
  app/graph: move alignment attribute on types
  bus/dpaa: move alignment attribute on types

 app/graph/ethdev_rx.h                              |  4 +-
 app/graph/ethdev_rx_priv.h                         |  4 +-
 app/pdump/main.c                                   |  4 +-
 app/test-eventdev/test_order_common.h              |  4 +-
 app/test-eventdev/test_perf_common.h               | 24 +++++-----
 app/test-eventdev/test_pipeline_common.h           | 18 ++++----
 app/test-flow-perf/actions_gen.c                   | 51 ++++++++++++----------
 app/test-flow-perf/items_gen.c                     | 22 +++++-----
 app/test-flow-perf/main.c                          |  8 ++--
 app/test-mldev/test_device_ops.h                   |  4 +-
 app/test-mldev/test_inference_common.h             |  4 +-
 app/test-mldev/test_model_ops.h                    |  4 +-
 app/test-pipeline/main.h                           |  4 +-
 app/test/test_cryptodev_aead_test_vectors.h        |  6 +--
 app/test/test_cryptodev_blockcipher.h              |  2 +-
 app/test/test_cryptodev_kasumi_test_vectors.h      |  2 +-
 app/test/test_cryptodev_mixed_test_vectors.h       |  2 +-
 .../test_cryptodev_security_docsis_test_vectors.h  |  2 +-
 app/test/test_cryptodev_snow3g_test_vectors.h      |  2 +-
 app/test/test_cryptodev_zuc_test_vectors.h         |  2 +-
 app/test/test_distributor.c                        | 12 ++---
 app/test/test_distributor_perf.c                   |  6 +--
 app/test/test_mempool_perf.c                       |  6 +--
 app/test/test_pmd_perf.c                           |  4 +-
 app/test/test_ring_stress_impl.h                   | 10 ++---
 app/test/test_rwlock.c                             |  8 ++--
 app/test/test_seqlock.c                            |  8 ++--
 app/test/test_ticketlock.c                         |  4 +-
 app/test/test_trace_perf.c                         |  8 ++--
 drivers/baseband/null/bbdev_null.c                 |  4 +-
 drivers/baseband/turbo_sw/bbdev_turbo_software.c   |  4 +-
 drivers/bus/dpaa/base/qbman/qman.c                 |  3 +-
 drivers/bus/dpaa/include/fsl_bman.h                |  4 +-
 drivers/bus/dpaa/include/fsl_qman.h                | 20 ++++-----
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h            |  4 +-
 drivers/common/cpt/cpt_common.h                    |  4 +-
 drivers/common/idpf/idpf_common_device.h           |  2 +-
 drivers/common/mlx5/linux/mlx5_glue.c              |  2 +-
 drivers/common/mlx5/linux/mlx5_nl.c                |  2 +-
 drivers/common/mlx5/mlx5_common_mr.h               |  4 +-
 drivers/common/mlx5/mlx5_common_utils.h            | 12 ++---
 drivers/common/mlx5/mlx5_prm.h                     |  4 +-
 drivers/common/qat/qat_adf/icp_qat_hw.h            |  8 ++--
 drivers/common/qat/qat_common.h                    |  4 +-
 drivers/common/qat/qat_qp.h                        |  6 +--
 drivers/compress/isal/isal_compress_pmd_private.h  |  8 ++--
 drivers/compress/nitrox/nitrox_comp_reqmgr.c       |  2 +-
 drivers/compress/octeontx/otx_zip.h                | 16 +++----
 drivers/compress/qat/qat_comp.h                    |  4 +-
 drivers/compress/zlib/zlib_pmd_private.h           | 12 ++---
 drivers/crypto/armv8/armv8_pmd_private.h           | 14 +++---
 drivers/crypto/bcmfs/bcmfs_qp.h                    |  4 +-
 drivers/crypto/bcmfs/bcmfs_sym_session.h           |  4 +-
 drivers/crypto/caam_jr/caam_jr_desc.h              |  8 ++--
 drivers/crypto/ccp/ccp_crypto.h                    |  4 +-
 drivers/crypto/ccp/ccp_dev.h                       |  8 ++--
 drivers/crypto/ccp/ccp_pmd_private.h               |  8 ++--
 drivers/crypto/cnxk/cn10k_cryptodev_sec.h          |  4 +-
 drivers/crypto/cnxk/cn10k_ipsec.h                  |  4 +-
 drivers/crypto/cnxk/cn10k_tls.h                    |  4 +-
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c           |  2 +-
 drivers/crypto/cnxk/cn9k_ipsec.h                   |  8 ++--
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h           |  4 +-
 drivers/crypto/cnxk/cnxk_se.h                      |  4 +-
 drivers/crypto/ipsec_mb/pmd_aesni_mb.c             |  4 +-
 drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h        | 24 +++++-----
 drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h     |  4 +-
 drivers/crypto/ipsec_mb/pmd_kasumi_priv.h          |  4 +-
 drivers/crypto/ipsec_mb/pmd_snow3g_priv.h          |  4 +-
 drivers/crypto/ipsec_mb/pmd_zuc_priv.h             |  4 +-
 drivers/crypto/mlx5/mlx5_crypto.h                  |  4 +-
 drivers/crypto/mvsam/mrvl_pmd_private.h            | 12 ++---
 drivers/crypto/mvsam/rte_mrvl_pmd.c                | 12 +++--
 drivers/crypto/null/null_crypto_pmd_private.h      |  8 ++--
 drivers/crypto/octeontx/otx_cryptodev_hw_access.h  |  4 +-
 drivers/crypto/openssl/openssl_pmd_private.h       | 12 ++---
 drivers/crypto/qat/qat_asym.h                      | 15 +++----
 drivers/crypto/qat/qat_sym.h                       |  8 ++--
 drivers/crypto/qat/qat_sym_session.h               | 10 ++---
 .../crypto/scheduler/scheduler_pkt_size_distr.c    |  4 +-
 drivers/crypto/scheduler/scheduler_pmd_private.h   |  8 ++--
 drivers/crypto/uadk/uadk_crypto_pmd_private.h      | 12 ++---
 drivers/dma/idxd/idxd_hw_defs.h                    | 38 ++++++++--------
 drivers/dma/ioat/ioat_internal.h                   |  4 +-
 drivers/dma/skeleton/skeleton_dmadev.h             |  4 +-
 drivers/event/cnxk/cn10k_eventdev.h                |  8 ++--
 drivers/event/cnxk/cnxk_eventdev.h                 | 24 +++++-----
 drivers/event/cnxk/cnxk_tim_evdev.h                |  4 +-
 drivers/event/cnxk/cnxk_tim_worker.c               |  2 +-
 drivers/event/dlb2/dlb2_priv.h                     | 16 +++----
 drivers/event/dsw/dsw_evdev.h                      | 20 ++++-----
 drivers/event/octeontx/ssovf_evdev.h               |  8 ++--
 drivers/event/octeontx/timvf_evdev.h               |  8 ++--
 drivers/event/octeontx/timvf_worker.c              |  2 +-
 drivers/event/opdl/opdl_evdev.h                    |  6 +--
 drivers/event/opdl/opdl_ring.c                     | 19 ++++----
 drivers/event/skeleton/skeleton_eventdev.h         |  8 ++--
 drivers/event/sw/event_ring.h                      |  2 +-
 drivers/event/sw/iq_chunk.h                        |  4 +-
 drivers/event/sw/sw_evdev.h                        | 18 ++++----
 drivers/mempool/cnxk/cn10k_mempool_ops.c           |  4 +-
 drivers/ml/cnxk/cnxk_ml_ops.h                      |  4 +-
 drivers/net/ark/ark_ethdev_rx.c                    |  6 +--
 drivers/net/ark/ark_ethdev_tx.c                    |  6 +--
 drivers/net/avp/avp_ethdev.c                       |  8 ++--
 drivers/net/avp/rte_avp_common.h                   |  4 +-
 drivers/net/axgbe/axgbe_rxtx.h                     |  8 ++--
 drivers/net/bnxt/bnxt_rxr.c                        |  2 +-
 drivers/net/bonding/rte_eth_bond_8023ad.h          | 28 ++++++------
 drivers/net/cxgbe/base/adapter.h                   | 14 +++---
 drivers/net/cxgbe/cxgbe_ofld.h                     |  2 +-
 drivers/net/e1000/igb_rxtx.c                       |  4 +-
 drivers/net/ena/ena_ethdev.h                       | 17 ++++----
 drivers/net/enic/enic_rxtx_common.h                |  2 +-
 drivers/net/fm10k/fm10k_rxtx.c                     |  5 +--
 drivers/net/hinic/hinic_pmd_rx.h                   |  8 ++--
 drivers/net/hns3/hns3_ethdev.h                     |  4 +-
 drivers/net/hns3/hns3_fdir.c                       |  4 +-
 drivers/net/hns3/hns3_rxtx.h                       |  4 +-
 drivers/net/i40e/i40e_ethdev.h                     |  4 +-
 drivers/net/i40e/i40e_rxtx.h                       |  2 +-
 drivers/net/iavf/iavf.h                            |  2 +-
 drivers/net/iavf/iavf_rxtx.c                       |  3 +-
 drivers/net/ice/ice_ethdev.h                       |  2 +-
 drivers/net/ice/ice_rxtx.c                         |  3 +-
 drivers/net/igc/igc_txrx.c                         |  4 +-
 drivers/net/ionic/ionic_lif.h                      |  2 +-
 drivers/net/ionic/ionic_rxtx.c                     |  6 +--
 drivers/net/ixgbe/ixgbe_ipsec.h                    |  4 +-
 drivers/net/ixgbe/ixgbe_rxtx.c                     | 10 ++---
 drivers/net/memif/memif.h                          |  2 +-
 drivers/net/mlx4/mlx4_rxtx.c                       |  2 +-
 drivers/net/mlx5/hws/mlx5dr_send.h                 |  4 +-
 drivers/net/mlx5/mlx5.h                            |  6 +--
 drivers/net/mlx5/mlx5_flow.h                       |  4 +-
 drivers/net/mlx5/mlx5_hws_cnt.h                    | 14 +++---
 drivers/net/mlx5/mlx5_rx.h                         |  4 +-
 drivers/net/mlx5/mlx5_rxtx.c                       |  6 +--
 drivers/net/mlx5/mlx5_tx.h                         | 10 ++---
 drivers/net/mlx5/mlx5_utils.h                      |  2 +-
 drivers/net/mvpp2/mrvl_ethdev.h                    |  4 +-
 drivers/net/netvsc/hn_var.h                        |  4 +-
 drivers/net/nfp/flower/nfp_flower_flow.c           |  4 +-
 drivers/net/nfp/nfp_ipsec.h                        |  4 +-
 drivers/net/nfp/nfp_rxtx.h                         |  8 ++--
 drivers/net/ngbe/ngbe_ptypes.c                     |  2 +-
 drivers/net/ngbe/ngbe_rxtx.c                       |  2 +-
 drivers/net/octeontx/octeontx_ethdev.c             |  4 +-
 drivers/net/octeontx/octeontx_ethdev.h             | 12 ++---
 drivers/net/octeontx/octeontx_rxtx.h               |  2 +-
 drivers/net/pfe/base/pfe.h                         |  4 +-
 drivers/net/qede/qede_rxtx.c                       | 14 +++---
 drivers/net/softnic/rte_eth_softnic_internals.h    |  4 +-
 drivers/net/tap/tap_bpf.h                          |  4 +-
 drivers/net/thunderx/nicvf_rxtx.c                  |  8 ++--
 drivers/net/thunderx/nicvf_struct.h                | 16 +++----
 drivers/net/txgbe/txgbe_ipsec.h                    |  4 +-
 drivers/net/txgbe/txgbe_ptypes.c                   | 10 ++---
 drivers/net/txgbe/txgbe_rxtx.c                     |  2 +-
 drivers/net/virtio/virtqueue.h                     |  4 +-
 drivers/raw/ntb/ntb.h                              |  6 +--
 drivers/regex/cn9k/cn9k_regexdev.h                 |  4 +-
 drivers/vdpa/mlx5/mlx5_vdpa.h                      |  4 +-
 examples/bbdev_app/main.c                          |  8 ++--
 examples/bond/main.c                               |  2 +-
 examples/distributor/main.c                        | 32 +++++++-------
 examples/eventdev_pipeline/pipeline_common.h       |  8 ++--
 examples/ip_fragmentation/main.c                   |  4 +-
 examples/ip_pipeline/thread.c                      |  4 +-
 examples/ip_reassembly/main.c                      |  4 +-
 examples/ipsec-secgw/ipsec-secgw.c                 |  4 +-
 examples/ipsec-secgw/ipsec-secgw.h                 |  8 ++--
 examples/ipsec-secgw/ipsec.h                       | 22 +++++-----
 examples/ipsec-secgw/ipsec_worker.h                |  4 +-
 examples/ipv4_multicast/main.c                     |  4 +-
 examples/l2fwd-crypto/main.c                       | 12 ++---
 examples/l2fwd-event/l2fwd_common.h                |  8 ++--
 examples/l2fwd-event/l2fwd_poll.h                  |  4 +-
 examples/l2fwd-jobstats/main.c                     |  8 ++--
 examples/l2fwd-keepalive/main.c                    |  8 ++--
 examples/l2fwd-macsec/main.c                       | 12 ++---
 examples/l2fwd/main.c                              | 12 ++---
 examples/l3fwd-graph/main.c                        |  8 ++--
 examples/l3fwd-power/main.c                        | 24 +++++-----
 examples/l3fwd-power/main.h                        |  4 +-
 examples/l3fwd-power/perf_core.c                   |  4 +-
 examples/l3fwd/l3fwd.h                             |  8 ++--
 examples/l3fwd/l3fwd_em.c                          |  4 +-
 examples/l3fwd/main.c                              |  4 +-
 examples/link_status_interrupt/main.c              |  8 ++--
 .../multi_process/client_server_mp/shared/common.h |  8 ++--
 examples/multi_process/symmetric_mp/main.c         |  4 +-
 examples/ntb/ntb_fwd.c                             |  4 +-
 examples/packet_ordering/main.c                    | 16 +++----
 examples/pipeline/thread.c                         |  4 +-
 examples/qos_sched/app_thread.c                    |  2 +-
 examples/qos_sched/main.h                          |  4 +-
 examples/server_node_efd/shared/common.h           | 12 ++---
 examples/vhost/main.h                              |  4 +-
 examples/vhost_blk/vhost_blk.h                     |  4 +-
 examples/vhost_crypto/main.c                       |  4 +-
 examples/vm_power_manager/power_manager.c          |  4 +-
 202 files changed, 726 insertions(+), 732 deletions(-)

-- 
1.8.3.1

[PATCH v2 01/83] examples: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Reviewed-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 examples/bbdev_app/main.c                          |  8 +++---
 examples/bond/main.c                               |  2 +-
 examples/distributor/main.c                        | 32 +++++++++++-----------
 examples/eventdev_pipeline/pipeline_common.h       |  8 +++---
 examples/ip_fragmentation/main.c                   |  4 +--
 examples/ip_pipeline/thread.c                      |  4 +--
 examples/ip_reassembly/main.c                      |  4 +--
 examples/ipsec-secgw/ipsec-secgw.c                 |  4 +--
 examples/ipsec-secgw/ipsec-secgw.h                 |  8 +++---
 examples/ipsec-secgw/ipsec.h                       | 22 +++++++--------
 examples/ipsec-secgw/ipsec_worker.h                |  4 +--
 examples/ipv4_multicast/main.c                     |  4 +--
 examples/l2fwd-crypto/main.c                       | 12 ++++----
 examples/l2fwd-event/l2fwd_common.h                |  8 +++---
 examples/l2fwd-event/l2fwd_poll.h                  |  4 +--
 examples/l2fwd-jobstats/main.c                     |  8 +++---
 examples/l2fwd-keepalive/main.c                    |  8 +++---
 examples/l2fwd-macsec/main.c                       | 12 ++++----
 examples/l2fwd/main.c                              | 12 ++++----
 examples/l3fwd-graph/main.c                        |  8 +++---
 examples/l3fwd-power/main.c                        | 24 ++++++++--------
 examples/l3fwd-power/main.h                        |  4 +--
 examples/l3fwd-power/perf_core.c                   |  4 +--
 examples/l3fwd/l3fwd.h                             |  8 +++---
 examples/l3fwd/l3fwd_em.c                          |  4 +--
 examples/l3fwd/main.c                              |  4 +--
 examples/link_status_interrupt/main.c              |  8 +++---
 .../multi_process/client_server_mp/shared/common.h |  8 +++---
 examples/multi_process/symmetric_mp/main.c         |  4 +--
 examples/ntb/ntb_fwd.c                             |  4 +--
 examples/packet_ordering/main.c                    | 16 +++++------
 examples/pipeline/thread.c                         |  4 +--
 examples/qos_sched/app_thread.c                    |  2 +-
 examples/qos_sched/main.h                          |  4 +--
 examples/server_node_efd/shared/common.h           | 12 ++++----
 examples/vhost/main.h                              |  4 +--
 examples/vhost_blk/vhost_blk.h                     |  4 +--
 examples/vhost_crypto/main.c                       |  4 +--
 examples/vm_power_manager/power_manager.c          |  4 +--
 39 files changed, 151 insertions(+), 151 deletions(-)

diff --git a/examples/bbdev_app/main.c b/examples/bbdev_app/main.c
index 16599ae..d4c686c 100644
--- a/examples/bbdev_app/main.c
+++ b/examples/bbdev_app/main.c
@@ -120,16 +120,16 @@ struct app_config_params {
 	uint16_t num_dec_cores;
 };
 
-struct lcore_statistics {
+struct __rte_cache_aligned lcore_statistics {
 	unsigned int enqueued;
 	unsigned int dequeued;
 	unsigned int rx_lost_packets;
 	unsigned int enc_to_dec_lost_packets;
 	unsigned int tx_lost_packets;
-} __rte_cache_aligned;
+};
 
 /** each lcore configuration */
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint64_t core_type;
 
 	unsigned int port_id;
@@ -148,7 +148,7 @@ struct lcore_conf {
 	struct rte_ring *enc_to_dec_ring;
 
 	struct lcore_statistics *lcore_stats;
-} __rte_cache_aligned;
+};
 
 struct stats_lcore_params {
 	struct lcore_conf *lconf;
diff --git a/examples/bond/main.c b/examples/bond/main.c
index 8528abf..9f38b63 100644
--- a/examples/bond/main.c
+++ b/examples/bond/main.c
@@ -346,7 +346,7 @@ struct global_flag_stru_t {
  */
 static int lcore_main(__rte_unused void *arg1)
 {
-	struct rte_mbuf *pkts[MAX_PKT_BURST] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *pkts[MAX_PKT_BURST];
 	struct rte_ether_addr dst_addr;
 
 	struct rte_ether_addr bond_mac_addr;
diff --git a/examples/distributor/main.c b/examples/distributor/main.c
index 542f76c..ddbc387 100644
--- a/examples/distributor/main.c
+++ b/examples/distributor/main.c
@@ -44,39 +44,39 @@
 unsigned int num_workers;
 
 static volatile struct app_stats {
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint64_t rx_pkts;
 		uint64_t returned_pkts;
 		uint64_t enqueued_pkts;
 		uint64_t enqdrop_pkts;
-	} rx __rte_cache_aligned;
-	int pad1 __rte_cache_aligned;
+	} rx;
+	alignas(RTE_CACHE_LINE_SIZE) int pad1;
 
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint64_t in_pkts;
 		uint64_t ret_pkts;
 		uint64_t sent_pkts;
 		uint64_t enqdrop_pkts;
-	} dist __rte_cache_aligned;
-	int pad2 __rte_cache_aligned;
+	} dist;
+	alignas(RTE_CACHE_LINE_SIZE) int pad2;
 
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint64_t dequeue_pkts;
 		uint64_t tx_pkts;
 		uint64_t enqdrop_pkts;
-	} tx __rte_cache_aligned;
-	int pad3 __rte_cache_aligned;
+	} tx;
+	alignas(RTE_CACHE_LINE_SIZE) int pad3;
 
-	uint64_t worker_pkts[64] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t worker_pkts[64];
 
-	int pad4 __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int pad4;
 
-	uint64_t worker_bursts[64][8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t worker_bursts[64][8];
 
-	int pad5 __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int pad5;
 
-	uint64_t port_rx_pkts[64] __rte_cache_aligned;
-	uint64_t port_tx_pkts[64] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t port_rx_pkts[64];
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t port_tx_pkts[64];
 } app_stats;
 
 struct app_stats prev_app_stats;
@@ -642,7 +642,7 @@ struct lcore_params {
 	 * port, otherwise we send traffic from 0 to 1, 2 to 3, and vice versa
 	 */
 	const unsigned xor_val = (rte_eth_dev_count_avail() > 1);
-	struct rte_mbuf *buf[8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *buf[8];
 
 	for (i = 0; i < 8; i++)
 		buf[i] = NULL;
diff --git a/examples/eventdev_pipeline/pipeline_common.h b/examples/eventdev_pipeline/pipeline_common.h
index 28b6ab8..21b4c7e 100644
--- a/examples/eventdev_pipeline/pipeline_common.h
+++ b/examples/eventdev_pipeline/pipeline_common.h
@@ -24,10 +24,10 @@
 #define BATCH_SIZE 16
 #define MAX_NUM_CORE 64
 
-struct worker_data {
+struct __rte_cache_aligned worker_data {
 	uint8_t dev_id;
 	uint8_t port_id;
-} __rte_cache_aligned;
+};
 
 typedef int (*worker_loop)(void *);
 typedef void (*schedule_loop)(unsigned int);
@@ -43,7 +43,7 @@ struct setup_data {
 	opt_check check_opt;
 };
 
-struct fastpath_data {
+struct __rte_cache_aligned fastpath_data {
 	volatile int done;
 	uint32_t evdev_service_id;
 	uint32_t rxadptr_service_id;
@@ -56,7 +56,7 @@ struct fastpath_data {
 	uint64_t sched_core[MAX_NUM_CORE];
 	uint64_t worker_core[MAX_NUM_CORE];
 	struct setup_data cap;
-} __rte_cache_aligned;
+};
 
 struct config_data {
 	unsigned int active_cores;
diff --git a/examples/ip_fragmentation/main.c b/examples/ip_fragmentation/main.c
index 744a1aa..736eae6 100644
--- a/examples/ip_fragmentation/main.c
+++ b/examples/ip_fragmentation/main.c
@@ -135,12 +135,12 @@ struct rx_queue {
 
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	uint16_t n_rx_queue;
 	uint16_t tx_queue_id[RTE_MAX_ETHPORTS];
 	struct rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 	struct mbuf_table tx_mbufs[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 
 static struct rte_eth_conf port_conf = {
diff --git a/examples/ip_pipeline/thread.c b/examples/ip_pipeline/thread.c
index b46f64b..8a912dc 100644
--- a/examples/ip_pipeline/thread.c
+++ b/examples/ip_pipeline/thread.c
@@ -63,7 +63,7 @@ struct pipeline_data {
 	uint8_t buffer[TABLE_RULE_ACTION_SIZE_MAX];
 };
 
-struct thread_data {
+struct __rte_cache_aligned thread_data {
 	struct rte_pipeline *p[THREAD_PIPELINES_MAX];
 	uint32_t n_pipelines;
 
@@ -73,7 +73,7 @@ struct thread_data {
 	uint64_t timer_period; /* Measured in CPU cycles. */
 	uint64_t time_next;
 	uint64_t time_next_min;
-} __rte_cache_aligned;
+};
 
 static struct thread_data thread_data[RTE_MAX_LCORE];
 
diff --git a/examples/ip_reassembly/main.c b/examples/ip_reassembly/main.c
index bd0b1d3..c701907 100644
--- a/examples/ip_reassembly/main.c
+++ b/examples/ip_reassembly/main.c
@@ -148,14 +148,14 @@ struct tx_lcore_stat {
 #define MAX_TX_QUEUE_PER_PORT 16
 #define MAX_RX_QUEUE_PER_PORT 128
 
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	uint16_t n_rx_queue;
 	struct rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 	uint16_t tx_queue_id[RTE_MAX_ETHPORTS];
 	struct rte_ip_frag_death_row death_row;
 	struct mbuf_table *tx_mbufs[RTE_MAX_ETHPORTS];
 	struct tx_lcore_stat tx_stat;
-} __rte_cache_aligned;
+};
 static struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 
 static struct rte_eth_conf port_conf = {
diff --git a/examples/ipsec-secgw/ipsec-secgw.c b/examples/ipsec-secgw/ipsec-secgw.c
index 45a3038..d7c18be 100644
--- a/examples/ipsec-secgw/ipsec-secgw.c
+++ b/examples/ipsec-secgw/ipsec-secgw.c
@@ -218,11 +218,11 @@ struct app_sa_prm app_sa_prm = {
 		};
 static const char *cfgfile;
 
-struct lcore_params {
+struct __rte_cache_aligned lcore_params {
 	uint16_t port_id;
 	uint8_t queue_id;
 	uint8_t lcore_id;
-} __rte_cache_aligned;
+};
 
 static struct lcore_params lcore_params_array[MAX_LCORE_PARAMS];
 
diff --git a/examples/ipsec-secgw/ipsec-secgw.h b/examples/ipsec-secgw/ipsec-secgw.h
index ec33a98..b4ef4b6 100644
--- a/examples/ipsec-secgw/ipsec-secgw.h
+++ b/examples/ipsec-secgw/ipsec-secgw.h
@@ -54,13 +54,13 @@
 #define IPSEC_NAT_T_PORT 4500
 #define MBUF_PTYPE_TUNNEL_ESP_IN_UDP (RTE_PTYPE_TUNNEL_ESP | RTE_PTYPE_L4_UDP)
 
-struct traffic_type {
+struct __rte_cache_aligned traffic_type {
 	uint32_t num;
 	struct rte_mbuf *pkts[MAX_PKTS];
 	const uint8_t *data[MAX_PKTS];
 	void *saptr[MAX_PKTS];
 	uint32_t res[MAX_PKTS];
-} __rte_cache_aligned;
+};
 
 struct ipsec_traffic {
 	struct traffic_type ipsec;
@@ -98,7 +98,7 @@ struct ipsec_sa_stats {
 	uint64_t miss;
 };
 
-struct ipsec_core_statistics {
+struct __rte_cache_aligned ipsec_core_statistics {
 	uint64_t tx;
 	uint64_t rx;
 	uint64_t rx_call;
@@ -126,7 +126,7 @@ struct ipsec_core_statistics {
 	struct {
 		uint64_t miss;
 	} lpm6;
-} __rte_cache_aligned;
+};
 
 extern struct ipsec_core_statistics core_statistics[RTE_MAX_LCORE];
 
diff --git a/examples/ipsec-secgw/ipsec.h b/examples/ipsec-secgw/ipsec.h
index bdcada1..36b6164 100644
--- a/examples/ipsec-secgw/ipsec.h
+++ b/examples/ipsec-secgw/ipsec.h
@@ -112,7 +112,7 @@ enum {
 	return (struct ipsec_sa *)i;
 }
 
-struct ipsec_sa {
+struct __rte_cache_aligned ipsec_sa {
 	struct rte_ipsec_session sessions[IPSEC_SESSION_MAX];
 	uint32_t spi;
 	struct cdev_qp *cqp[RTE_MAX_LCORE];
@@ -170,7 +170,7 @@ struct ipsec_sa {
 	struct rte_flow_item_esp esp_spec;
 	struct rte_flow *flow;
 	struct rte_security_session_conf sess_conf;
-} __rte_cache_aligned;
+};
 
 struct ipsec_xf {
 	struct rte_crypto_sym_xform a;
@@ -190,12 +190,12 @@ struct sa_ctx {
 	struct ipsec_sa sa[];
 };
 
-struct ipsec_mbuf_metadata {
+struct __rte_cache_aligned ipsec_mbuf_metadata {
 	struct ipsec_sa *sa;
 	struct rte_crypto_op cop;
 	struct rte_crypto_sym_op sym_cop;
 	uint8_t buf[32];
-} __rte_cache_aligned;
+};
 
 #define IS_TRANSPORT(flags) ((flags) & TRANSPORT)
 
@@ -224,7 +224,7 @@ struct cdev_qp {
 	uint16_t qp;
 	uint16_t in_flight;
 	uint16_t len;
-	struct rte_crypto_op *buf[MAX_PKT_BURST] __rte_aligned(sizeof(void *));
+	struct rte_crypto_op *buf[MAX_PKT_BURST];
 };
 
 struct ipsec_ctx {
@@ -235,7 +235,7 @@ struct ipsec_ctx {
 	uint16_t nb_qps;
 	uint16_t last_qp;
 	struct cdev_qp tbl[MAX_QP_PER_LCORE];
-	struct rte_mbuf *ol_pkts[MAX_PKT_BURST] __rte_aligned(sizeof(void *));
+	struct rte_mbuf *ol_pkts[MAX_PKT_BURST];
 	uint16_t ol_pkts_cnt;
 	uint64_t ipv4_offloads;
 	uint64_t ipv6_offloads;
@@ -283,18 +283,18 @@ struct cnt_blk {
 	uint32_t cnt;
 } __rte_packed;
 
-struct lcore_rx_queue {
+struct __rte_cache_aligned lcore_rx_queue {
 	uint16_t port_id;
 	uint8_t queue_id;
 	void *sec_ctx;
-} __rte_cache_aligned;
+};
 
 struct buffer {
 	uint16_t len;
-	struct rte_mbuf *m_table[MAX_PKT_BURST] __rte_aligned(sizeof(void *));
+	struct rte_mbuf *m_table[MAX_PKT_BURST];
 };
 
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint16_t nb_rx_queue;
 	struct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 	uint16_t tx_queue_id[RTE_MAX_ETHPORTS];
@@ -308,7 +308,7 @@ struct lcore_conf {
 		struct rte_mempool *pool_indir;
 		struct rte_ip_frag_death_row dr;
 	} frag;
-} __rte_cache_aligned;
+};
 
 extern struct lcore_conf lcore_conf[RTE_MAX_LCORE];
 
diff --git a/examples/ipsec-secgw/ipsec_worker.h b/examples/ipsec-secgw/ipsec_worker.h
index 8e937fd..8f6a1c0 100644
--- a/examples/ipsec-secgw/ipsec_worker.h
+++ b/examples/ipsec-secgw/ipsec_worker.h
@@ -37,11 +37,11 @@ struct route_table {
 /*
  * Conf required by event mode worker with tx internal port
  */
-struct lcore_conf_ev_tx_int_port_wrkr {
+struct __rte_cache_aligned lcore_conf_ev_tx_int_port_wrkr {
 	struct ipsec_ctx inbound;
 	struct ipsec_ctx outbound;
 	struct route_table rt;
-} __rte_cache_aligned;
+};
 
 void ipsec_poll_mode_worker(void);
 void ipsec_poll_mode_wrkr_inl_pr(void);
diff --git a/examples/ipv4_multicast/main.c b/examples/ipv4_multicast/main.c
index 6d0a850..1eed645 100644
--- a/examples/ipv4_multicast/main.c
+++ b/examples/ipv4_multicast/main.c
@@ -98,13 +98,13 @@ struct mbuf_table {
 
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	uint64_t tx_tsc;
 	uint16_t n_rx_queue;
 	uint8_t rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 	uint16_t tx_queue_id[MAX_PORTS];
 	struct mbuf_table tx_mbufs[MAX_PORTS];
-} __rte_cache_aligned;
+};
 static struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 
 static struct rte_eth_conf port_conf = {
diff --git a/examples/l2fwd-crypto/main.c b/examples/l2fwd-crypto/main.c
index 19db0a2..a441312 100644
--- a/examples/l2fwd-crypto/main.c
+++ b/examples/l2fwd-crypto/main.c
@@ -201,7 +201,7 @@ struct l2fwd_crypto_params {
 };
 
 /** lcore configuration */
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	unsigned nb_rx_ports;
 	uint16_t rx_port_list[MAX_RX_QUEUE_PER_LCORE];
 
@@ -210,7 +210,7 @@ struct lcore_queue_conf {
 
 	struct op_buffer op_buf[RTE_CRYPTO_MAX_DEVS];
 	struct pkt_buffer pkt_buf[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 
@@ -230,7 +230,7 @@ struct lcore_queue_conf {
 } session_pool_socket[RTE_MAX_NUMA_NODES];
 
 /* Per-port statistics struct */
-struct l2fwd_port_statistics {
+struct __rte_cache_aligned l2fwd_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
 
@@ -238,14 +238,14 @@ struct l2fwd_port_statistics {
 	uint64_t crypto_dequeued;
 
 	uint64_t dropped;
-} __rte_cache_aligned;
+};
 
-struct l2fwd_crypto_statistics {
+struct __rte_cache_aligned l2fwd_crypto_statistics {
 	uint64_t enqueued;
 	uint64_t dequeued;
 
 	uint64_t errors;
-} __rte_cache_aligned;
+};
 
 struct l2fwd_port_statistics port_statistics[RTE_MAX_ETHPORTS];
 struct l2fwd_crypto_statistics crypto_statistics[RTE_CRYPTO_MAX_DEVS];
diff --git a/examples/l2fwd-event/l2fwd_common.h b/examples/l2fwd-event/l2fwd_common.h
index 07f84cb..c56b3e7 100644
--- a/examples/l2fwd-event/l2fwd_common.h
+++ b/examples/l2fwd-event/l2fwd_common.h
@@ -59,11 +59,11 @@
 #define VECTOR_TMO_NS_DEFAULT 1E6 /* 1ms */
 
 /* Per-port statistics struct */
-struct l2fwd_port_statistics {
+struct __rte_cache_aligned l2fwd_port_statistics {
 	uint64_t dropped;
 	uint64_t tx;
 	uint64_t rx;
-} __rte_cache_aligned;
+};
 
 /* Event vector attributes */
 struct l2fwd_event_vector_params {
@@ -72,7 +72,7 @@ struct l2fwd_event_vector_params {
 	uint64_t timeout_ns;
 };
 
-struct l2fwd_resources {
+struct __rte_cache_aligned l2fwd_resources {
 	volatile uint8_t force_quit;
 	uint8_t event_mode;
 	uint8_t sched_type;
@@ -91,7 +91,7 @@ struct l2fwd_resources {
 	struct l2fwd_event_vector_params evt_vec;
 	void *evt_rsrc;
 	void *poll_rsrc;
-} __rte_cache_aligned;
+};
 
 static __rte_always_inline void
 l2fwd_mac_updating(struct rte_mbuf *m, uint32_t dest_port_id,
diff --git a/examples/l2fwd-event/l2fwd_poll.h b/examples/l2fwd-event/l2fwd_poll.h
index d59b0c8..9d72008 100644
--- a/examples/l2fwd-event/l2fwd_poll.h
+++ b/examples/l2fwd-event/l2fwd_poll.h
@@ -9,10 +9,10 @@
 
 typedef void (*poll_main_loop_cb)(struct l2fwd_resources *rsrc);
 
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	uint32_t rx_port_list[MAX_RX_QUEUE_PER_LCORE];
 	uint32_t n_rx_port;
-} __rte_cache_aligned;
+};
 
 struct l2fwd_poll_resources {
 	poll_main_loop_cb poll_main_loop;
diff --git a/examples/l2fwd-jobstats/main.c b/examples/l2fwd-jobstats/main.c
index 2653db4..cb7582a 100644
--- a/examples/l2fwd-jobstats/main.c
+++ b/examples/l2fwd-jobstats/main.c
@@ -67,7 +67,7 @@
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
 /* List of queues to be polled for given lcore. 8< */
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	unsigned n_rx_port;
 	unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE];
 	uint64_t next_flush_time[RTE_MAX_ETHPORTS];
@@ -82,7 +82,7 @@ struct lcore_queue_conf {
 
 	uint16_t stats_read_pending;
 	rte_spinlock_t lock;
-} __rte_cache_aligned;
+};
 /* >8 End of list of queues to be polled for given lcore. */
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 
@@ -97,11 +97,11 @@ struct lcore_queue_conf {
 struct rte_mempool *l2fwd_pktmbuf_pool = NULL;
 
 /* Per-port statistics struct */
-struct l2fwd_port_statistics {
+struct __rte_cache_aligned l2fwd_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
 	uint64_t dropped;
-} __rte_cache_aligned;
+};
 struct l2fwd_port_statistics port_statistics[RTE_MAX_ETHPORTS];
 
 /* 1 day max */
diff --git a/examples/l2fwd-keepalive/main.c b/examples/l2fwd-keepalive/main.c
index 1463cef..c3ead9e 100644
--- a/examples/l2fwd-keepalive/main.c
+++ b/examples/l2fwd-keepalive/main.c
@@ -69,10 +69,10 @@
 
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	unsigned n_rx_port;
 	unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE];
-} __rte_cache_aligned;
+};
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 
 struct rte_eth_dev_tx_buffer *tx_buffer[RTE_MAX_ETHPORTS];
@@ -86,11 +86,11 @@ struct lcore_queue_conf {
 struct rte_mempool *l2fwd_pktmbuf_pool = NULL;
 
 /* Per-port statistics struct */
-struct l2fwd_port_statistics {
+struct __rte_cache_aligned l2fwd_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
 	uint64_t dropped;
-} __rte_cache_aligned;
+};
 struct l2fwd_port_statistics port_statistics[RTE_MAX_ETHPORTS];
 
 /* A tsc-based timer responsible for triggering statistics printout */
diff --git a/examples/l2fwd-macsec/main.c b/examples/l2fwd-macsec/main.c
index a5d7a84..294ee11 100644
--- a/examples/l2fwd-macsec/main.c
+++ b/examples/l2fwd-macsec/main.c
@@ -72,10 +72,10 @@
 /* list of enabled ports */
 static uint32_t l2fwd_dst_ports[RTE_MAX_ETHPORTS];
 
-struct port_pair_params {
+struct __rte_cache_aligned port_pair_params {
 #define NUM_PORTS	2
 	uint16_t port[NUM_PORTS];
-} __rte_cache_aligned;
+};
 
 static struct port_pair_params port_pair_params_array[RTE_MAX_ETHPORTS / 2];
 static struct port_pair_params *port_pair_params;
@@ -86,10 +86,10 @@ struct port_pair_params {
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
 /* List of queues to be polled for a given lcore. 8< */
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	unsigned int n_rx_port;
 	unsigned int rx_port_list[MAX_RX_QUEUE_PER_LCORE];
-} __rte_cache_aligned;
+};
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 /* >8 End of list of queues to be polled for a given lcore. */
 
@@ -105,11 +105,11 @@ struct lcore_queue_conf {
 struct rte_mempool *l2fwd_pktmbuf_pool;
 
 /* Per-port statistics struct */
-struct l2fwd_port_statistics {
+struct __rte_cache_aligned l2fwd_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
 	uint64_t dropped;
-} __rte_cache_aligned;
+};
 struct l2fwd_port_statistics port_statistics[RTE_MAX_ETHPORTS];
 
 #define MAX_TIMER_PERIOD 86400 /* 1 day max */
diff --git a/examples/l2fwd/main.c b/examples/l2fwd/main.c
index 96fb331..c6fafdd 100644
--- a/examples/l2fwd/main.c
+++ b/examples/l2fwd/main.c
@@ -69,10 +69,10 @@
 /* list of enabled ports */
 static uint32_t l2fwd_dst_ports[RTE_MAX_ETHPORTS];
 
-struct port_pair_params {
+struct __rte_cache_aligned port_pair_params {
 #define NUM_PORTS	2
 	uint16_t port[NUM_PORTS];
-} __rte_cache_aligned;
+};
 
 static struct port_pair_params port_pair_params_array[RTE_MAX_ETHPORTS / 2];
 static struct port_pair_params *port_pair_params;
@@ -83,10 +83,10 @@ struct port_pair_params {
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
 /* List of queues to be polled for a given lcore. 8< */
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	unsigned n_rx_port;
 	unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE];
-} __rte_cache_aligned;
+};
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 /* >8 End of list of queues to be polled for a given lcore. */
 
@@ -101,11 +101,11 @@ struct lcore_queue_conf {
 struct rte_mempool * l2fwd_pktmbuf_pool = NULL;
 
 /* Per-port statistics struct */
-struct l2fwd_port_statistics {
+struct __rte_cache_aligned l2fwd_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
 	uint64_t dropped;
-} __rte_cache_aligned;
+};
 struct l2fwd_port_statistics port_statistics[RTE_MAX_ETHPORTS];
 
 #define MAX_TIMER_PERIOD 86400 /* 1 day max */
diff --git a/examples/l3fwd-graph/main.c b/examples/l3fwd-graph/main.c
index 96cb1c8..ec4d8c9 100644
--- a/examples/l3fwd-graph/main.c
+++ b/examples/l3fwd-graph/main.c
@@ -97,22 +97,22 @@ struct lcore_rx_queue {
 static uint8_t model_conf = RTE_GRAPH_MODEL_DEFAULT;
 
 /* Lcore conf */
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint16_t n_rx_queue;
 	struct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 
 	struct rte_graph *graph;
 	char name[RTE_GRAPH_NAMESIZE];
 	rte_graph_t graph_id;
-} __rte_cache_aligned;
+};
 
 static struct lcore_conf lcore_conf[RTE_MAX_LCORE];
 
-struct lcore_params {
+struct __rte_cache_aligned lcore_params {
 	uint16_t port_id;
 	uint8_t queue_id;
 	uint8_t lcore_id;
-} __rte_cache_aligned;
+};
 
 static struct lcore_params lcore_params_array[MAX_LCORE_PARAMS];
 static struct lcore_params lcore_params_array_default[] = {
diff --git a/examples/l3fwd-power/main.c b/examples/l3fwd-power/main.c
index f4adcf4..fba11da 100644
--- a/examples/l3fwd-power/main.c
+++ b/examples/l3fwd-power/main.c
@@ -212,13 +212,13 @@ enum freq_scale_hint_t
 	FREQ_HIGHEST  =       2
 };
 
-struct lcore_rx_queue {
+struct __rte_cache_aligned lcore_rx_queue {
 	uint16_t port_id;
 	uint8_t queue_id;
 	enum freq_scale_hint_t freq_up_hint;
 	uint32_t zero_rx_packet_count;
 	uint32_t idle_hint;
-} __rte_cache_aligned;
+};
 
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT RTE_MAX_ETHPORTS
@@ -329,8 +329,8 @@ struct ipv6_l3fwd_route {
 
 #define L3FWD_HASH_ENTRIES	1024
 
-static uint16_t ipv4_l3fwd_out_if[L3FWD_HASH_ENTRIES] __rte_cache_aligned;
-static uint16_t ipv6_l3fwd_out_if[L3FWD_HASH_ENTRIES] __rte_cache_aligned;
+static alignas(RTE_CACHE_LINE_SIZE) uint16_t ipv4_l3fwd_out_if[L3FWD_HASH_ENTRIES];
+static alignas(RTE_CACHE_LINE_SIZE) uint16_t ipv6_l3fwd_out_if[L3FWD_HASH_ENTRIES];
 #endif
 
 #if (APP_LOOKUP_METHOD == APP_LOOKUP_LPM)
@@ -357,7 +357,7 @@ struct ipv4_l3fwd_route {
 static lookup_struct_t *ipv4_l3fwd_lookup_struct[NB_SOCKETS];
 #endif
 
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint16_t n_rx_queue;
 	struct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 	uint16_t n_tx_port;
@@ -366,9 +366,9 @@ struct lcore_conf {
 	struct rte_eth_dev_tx_buffer *tx_buffer[RTE_MAX_ETHPORTS];
 	lookup_struct_t * ipv4_lookup_struct;
 	lookup_struct_t * ipv6_lookup_struct;
-} __rte_cache_aligned;
+};
 
-struct lcore_stats {
+struct __rte_cache_aligned lcore_stats {
 	/* total sleep time in ms since last frequency scaling down */
 	uint32_t sleep_time;
 	/* number of long sleep recently */
@@ -399,10 +399,10 @@ struct lcore_stats {
 	uint64_t fp_nfp[2];
 	enum busy_rate br;
 	rte_spinlock_t telemetry_lock;
-} __rte_cache_aligned;
+};
 
-static struct lcore_conf lcore_conf[RTE_MAX_LCORE] __rte_cache_aligned;
-static struct lcore_stats stats[RTE_MAX_LCORE] __rte_cache_aligned;
+static alignas(RTE_CACHE_LINE_SIZE) struct lcore_conf lcore_conf[RTE_MAX_LCORE];
+static alignas(RTE_CACHE_LINE_SIZE) struct lcore_stats stats[RTE_MAX_LCORE];
 static struct rte_timer power_timers[RTE_MAX_LCORE];
 
 static inline uint32_t power_idle_heuristic(uint32_t zero_rx_packet_count);
@@ -832,9 +832,9 @@ static int is_done(void)
 	 * back to sleep again without log spamming. Avoid cache line sharing
 	 * to prevent threads stepping on each others' toes.
 	 */
-	static struct {
+	static alignas(RTE_CACHE_LINE_SIZE) struct {
 		bool wakeup;
-	} __rte_cache_aligned status[RTE_MAX_LCORE];
+	} status[RTE_MAX_LCORE];
 	struct rte_epoll_event event[num];
 	int n, i;
 	uint16_t port_id;
diff --git a/examples/l3fwd-power/main.h b/examples/l3fwd-power/main.h
index 258de98..e85e14b 100644
--- a/examples/l3fwd-power/main.h
+++ b/examples/l3fwd-power/main.h
@@ -7,11 +7,11 @@
 
 
 #define MAX_LCORE_PARAMS 1024
-struct lcore_params {
+struct __rte_cache_aligned lcore_params {
 	uint16_t port_id;
 	uint8_t queue_id;
 	uint8_t lcore_id;
-} __rte_cache_aligned;
+};
 
 extern struct lcore_params *lcore_params;
 extern uint16_t nb_lcore_params;
diff --git a/examples/l3fwd-power/perf_core.c b/examples/l3fwd-power/perf_core.c
index 41ef6d0..c8fc69e 100644
--- a/examples/l3fwd-power/perf_core.c
+++ b/examples/l3fwd-power/perf_core.c
@@ -20,12 +20,12 @@
 static uint16_t hp_lcores[RTE_MAX_LCORE];
 static uint16_t nb_hp_lcores;
 
-struct perf_lcore_params {
+struct __rte_cache_aligned perf_lcore_params {
 	uint16_t port_id;
 	uint8_t queue_id;
 	uint8_t high_perf;
 	uint8_t lcore_idx;
-} __rte_cache_aligned;
+};
 
 static struct perf_lcore_params prf_lc_prms[MAX_LCORE_PARAMS];
 static uint16_t nb_prf_lc_prms;
diff --git a/examples/l3fwd/l3fwd.h b/examples/l3fwd/l3fwd.h
index e7ae0e5..f51da43 100644
--- a/examples/l3fwd/l3fwd.h
+++ b/examples/l3fwd/l3fwd.h
@@ -72,12 +72,12 @@ struct mbuf_table {
 	struct rte_mbuf *m_table[MAX_PKT_BURST];
 };
 
-struct lcore_rx_queue {
+struct __rte_cache_aligned lcore_rx_queue {
 	uint16_t port_id;
 	uint8_t queue_id;
-} __rte_cache_aligned;
+};
 
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint16_t n_rx_queue;
 	struct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
 	uint16_t n_tx_port;
@@ -86,7 +86,7 @@ struct lcore_conf {
 	struct mbuf_table tx_mbufs[RTE_MAX_ETHPORTS];
 	void *ipv4_lookup_struct;
 	void *ipv6_lookup_struct;
-} __rte_cache_aligned;
+};
 
 extern volatile bool force_quit;
 
diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
index 40e102b..d98e66e 100644
--- a/examples/l3fwd/l3fwd_em.c
+++ b/examples/l3fwd/l3fwd_em.c
@@ -208,8 +208,8 @@
 	return init_val;
 }
 
-static uint8_t ipv4_l3fwd_out_if[L3FWD_HASH_ENTRIES] __rte_cache_aligned;
-static uint8_t ipv6_l3fwd_out_if[L3FWD_HASH_ENTRIES] __rte_cache_aligned;
+static alignas(RTE_CACHE_LINE_SIZE) uint8_t ipv4_l3fwd_out_if[L3FWD_HASH_ENTRIES];
+static alignas(RTE_CACHE_LINE_SIZE) uint8_t ipv6_l3fwd_out_if[L3FWD_HASH_ENTRIES];
 
 static rte_xmm_t mask0;
 static rte_xmm_t mask1;
diff --git a/examples/l3fwd/main.c b/examples/l3fwd/main.c
index 8d32ae1..ad28ba9 100644
--- a/examples/l3fwd/main.c
+++ b/examples/l3fwd/main.c
@@ -96,11 +96,11 @@ enum L3FWD_LOOKUP_MODE {
 
 struct parm_cfg parm_config;
 
-struct lcore_params {
+struct __rte_cache_aligned lcore_params {
 	uint16_t port_id;
 	uint8_t queue_id;
 	uint8_t lcore_id;
-} __rte_cache_aligned;
+};
 
 static struct lcore_params lcore_params_array[MAX_LCORE_PARAMS];
 static struct lcore_params lcore_params_array_default[] = {
diff --git a/examples/link_status_interrupt/main.c b/examples/link_status_interrupt/main.c
index a8423d5..ac9c7f6 100644
--- a/examples/link_status_interrupt/main.c
+++ b/examples/link_status_interrupt/main.c
@@ -66,11 +66,11 @@
 #define MAX_RX_QUEUE_PER_LCORE 16
 #define MAX_TX_QUEUE_PER_PORT 16
 /* List of queues must be polled for a give lcore. 8< */
-struct lcore_queue_conf {
+struct __rte_cache_aligned lcore_queue_conf {
 	unsigned n_rx_port;
 	unsigned rx_port_list[MAX_RX_QUEUE_PER_LCORE];
 	unsigned tx_queue_id;
-} __rte_cache_aligned;
+};
 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
 /* >8 End of list of queues to be polled. */
 
@@ -90,11 +90,11 @@ struct lcore_queue_conf {
 struct rte_mempool * lsi_pktmbuf_pool = NULL;
 
 /* Per-port statistics struct */
-struct lsi_port_statistics {
+struct __rte_cache_aligned lsi_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
 	uint64_t dropped;
-} __rte_cache_aligned;
+};
 struct lsi_port_statistics port_statistics[RTE_MAX_ETHPORTS];
 
 /* A tsc-based timer responsible for triggering statistics printout */
diff --git a/examples/multi_process/client_server_mp/shared/common.h b/examples/multi_process/client_server_mp/shared/common.h
index 76beca0..b3f3a41 100644
--- a/examples/multi_process/client_server_mp/shared/common.h
+++ b/examples/multi_process/client_server_mp/shared/common.h
@@ -18,14 +18,14 @@
  * themselves are written by the clients, so we have a distinct set, on different
  * cache lines for each client to use.
  */
-struct rx_stats{
+struct __rte_cache_aligned rx_stats {
 	uint64_t rx[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 
-struct tx_stats{
+struct __rte_cache_aligned tx_stats {
 	uint64_t tx[RTE_MAX_ETHPORTS];
 	uint64_t tx_drop[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 
 struct port_info {
 	uint16_t num_ports;
diff --git a/examples/multi_process/symmetric_mp/main.c b/examples/multi_process/symmetric_mp/main.c
index 1ff8587..f7d8439 100644
--- a/examples/multi_process/symmetric_mp/main.c
+++ b/examples/multi_process/symmetric_mp/main.c
@@ -61,11 +61,11 @@ struct lcore_ports{
 
 /* structure to record the rx and tx packets. Put two per cache line as ports
  * used in pairs */
-struct port_stats{
+struct __rte_aligned(RTE_CACHE_LINE_SIZE / 2) port_stats{
 	unsigned rx;
 	unsigned tx;
 	unsigned drop;
-} __rte_aligned(RTE_CACHE_LINE_SIZE / 2);
+};
 
 static int proc_id = -1;
 static unsigned num_procs = 0;
diff --git a/examples/ntb/ntb_fwd.c b/examples/ntb/ntb_fwd.c
index 95a6148..56c7672 100644
--- a/examples/ntb/ntb_fwd.c
+++ b/examples/ntb/ntb_fwd.c
@@ -24,10 +24,10 @@
 #include "commands.h"
 
 /* Per-port statistics struct */
-struct ntb_port_statistics {
+struct __rte_cache_aligned ntb_port_statistics {
 	uint64_t tx;
 	uint64_t rx;
-} __rte_cache_aligned;
+};
 /* Port 0: NTB dev, Port 1: ethdev when iofwd. */
 struct ntb_port_statistics ntb_port_stats[2];
 
diff --git a/examples/packet_ordering/main.c b/examples/packet_ordering/main.c
index f839db9..5ffdf72 100644
--- a/examples/packet_ordering/main.c
+++ b/examples/packet_ordering/main.c
@@ -58,19 +58,19 @@ struct send_thread_args {
 };
 
 volatile struct app_stats {
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint64_t rx_pkts;
 		uint64_t enqueue_pkts;
 		uint64_t enqueue_failed_pkts;
-	} rx __rte_cache_aligned;
+	} rx;
 
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint64_t dequeue_pkts;
 		uint64_t enqueue_pkts;
 		uint64_t enqueue_failed_pkts;
-	} wkr __rte_cache_aligned;
+	} wkr;
 
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint64_t dequeue_pkts;
 		/* Too early pkts transmitted directly w/o reordering */
 		uint64_t early_pkts_txtd_woro;
@@ -78,15 +78,15 @@ struct send_thread_args {
 		uint64_t early_pkts_tx_failed_woro;
 		uint64_t ro_tx_pkts;
 		uint64_t ro_tx_failed_pkts;
-	} tx __rte_cache_aligned;
+	} tx;
 } app_stats;
 
 /* per worker lcore stats */
-struct wkr_stats_per {
+struct __rte_cache_aligned wkr_stats_per {
 		uint64_t deq_pkts;
 		uint64_t enq_pkts;
 		uint64_t enq_failed_pkts;
-} __rte_cache_aligned;
+};
 
 static struct wkr_stats_per wkr_stats[RTE_MAX_LCORE] = { {0} };
 /**
diff --git a/examples/pipeline/thread.c b/examples/pipeline/thread.c
index dc3ea73..cf2af55 100644
--- a/examples/pipeline/thread.c
+++ b/examples/pipeline/thread.c
@@ -47,13 +47,13 @@ struct block {
 	void *block;
 };
 
-struct thread {
+struct __rte_cache_aligned thread {
 	struct rte_swx_pipeline *pipelines[THREAD_PIPELINES_MAX];
 	struct block *blocks[THREAD_BLOCKS_MAX];
 	volatile uint64_t n_pipelines;
 	volatile uint64_t n_blocks;
 	int enabled;
-} __rte_cache_aligned;
+};
 
 static struct thread threads[RTE_MAX_LCORE];
 
diff --git a/examples/qos_sched/app_thread.c b/examples/qos_sched/app_thread.c
index 059c470..e50cc33 100644
--- a/examples/qos_sched/app_thread.c
+++ b/examples/qos_sched/app_thread.c
@@ -62,7 +62,7 @@
 app_rx_thread(struct thread_conf **confs)
 {
 	uint32_t i, nb_rx;
-	struct rte_mbuf *rx_mbufs[burst_conf.rx_burst] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *rx_mbufs[burst_conf.rx_burst];
 	struct thread_conf *conf;
 	int conf_idx = 0;
 
diff --git a/examples/qos_sched/main.h b/examples/qos_sched/main.h
index bc647ec..04e77a4 100644
--- a/examples/qos_sched/main.h
+++ b/examples/qos_sched/main.h
@@ -63,7 +63,7 @@ struct thread_stat
 };
 
 
-struct thread_conf
+struct __rte_cache_aligned thread_conf
 {
 	uint16_t rx_port;
 	uint16_t tx_port;
@@ -76,7 +76,7 @@ struct thread_conf
 #if APP_COLLECT_STAT
 	struct thread_stat stat;
 #endif
-} __rte_cache_aligned;
+};
 
 
 struct flow_conf
diff --git a/examples/server_node_efd/shared/common.h b/examples/server_node_efd/shared/common.h
index 130fd4f..e1ab7e6 100644
--- a/examples/server_node_efd/shared/common.h
+++ b/examples/server_node_efd/shared/common.h
@@ -20,19 +20,19 @@
  * themselves are written by the nodes, so we have a distinct set, on different
  * cache lines for each node to use.
  */
-struct rx_stats {
+struct __rte_cache_aligned rx_stats {
 	uint64_t rx[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 
-struct tx_stats {
+struct __rte_cache_aligned tx_stats {
 	uint64_t tx[RTE_MAX_ETHPORTS];
 	uint64_t tx_drop[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 
-struct filter_stats {
+struct __rte_cache_aligned filter_stats {
 	uint64_t drop;
 	uint64_t passed;
-} __rte_cache_aligned;
+};
 
 struct shared_info {
 	uint8_t num_nodes;
diff --git a/examples/vhost/main.h b/examples/vhost/main.h
index 2fcb837..c1c9a42 100644
--- a/examples/vhost/main.h
+++ b/examples/vhost/main.h
@@ -32,7 +32,7 @@ struct vhost_queue {
 	uint16_t		last_used_idx;
 };
 
-struct vhost_dev {
+struct __rte_cache_aligned vhost_dev {
 	/**< Number of memory regions for gpa to hpa translation. */
 	uint32_t nregions_hpa;
 	/**< Device MAC address (Obtained on first TX packet). */
@@ -59,7 +59,7 @@ struct vhost_dev {
 
 #define MAX_QUEUE_PAIRS	4
 	struct vhost_queue queues[MAX_QUEUE_PAIRS * 2];
-} __rte_cache_aligned;
+};
 
 typedef uint16_t (*vhost_enqueue_burst_t)(struct vhost_dev *dev,
 			uint16_t queue_id, struct rte_mbuf **pkts,
diff --git a/examples/vhost_blk/vhost_blk.h b/examples/vhost_blk/vhost_blk.h
index 975f0b4..649a52b 100644
--- a/examples/vhost_blk/vhost_blk.h
+++ b/examples/vhost_blk/vhost_blk.h
@@ -66,7 +66,7 @@ struct vhost_block_dev {
 	uint8_t *data;
 };
 
-struct vhost_blk_ctrlr {
+struct __rte_cache_aligned vhost_blk_ctrlr {
 	uint8_t started;
 	/** ID for vhost library. */
 	int vid;
@@ -76,7 +76,7 @@ struct vhost_blk_ctrlr {
 	struct vhost_block_dev *bdev;
 	/** VM memory region */
 	struct rte_vhost_memory *mem;
-} __rte_cache_aligned;
+};
 
 #define VHOST_BLK_MAX_IOVS 128
 
diff --git a/examples/vhost_crypto/main.c b/examples/vhost_crypto/main.c
index 02987eb..558c09a 100644
--- a/examples/vhost_crypto/main.c
+++ b/examples/vhost_crypto/main.c
@@ -42,7 +42,7 @@ struct lcore_option {
 	uint16_t qid;
 };
 
-struct vhost_crypto_info {
+struct __rte_cache_aligned vhost_crypto_info {
 	int vids[MAX_NB_SOCKETS];
 	uint32_t nb_vids;
 	struct rte_mempool *sess_pool;
@@ -51,7 +51,7 @@ struct vhost_crypto_info {
 	uint32_t qid;
 	uint32_t nb_inflight_ops;
 	volatile uint32_t initialized[MAX_NB_SOCKETS];
-} __rte_cache_aligned;
+};
 
 struct vhost_crypto_options {
 	struct lcore_option los[MAX_NB_WORKER_CORES];
diff --git a/examples/vm_power_manager/power_manager.c b/examples/vm_power_manager/power_manager.c
index 739372d..0355a7f 100644
--- a/examples/vm_power_manager/power_manager.c
+++ b/examples/vm_power_manager/power_manager.c
@@ -32,11 +32,11 @@
 	rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl); \
 } while (0)
 
-struct freq_info {
+struct __rte_cache_aligned freq_info {
 	rte_spinlock_t power_sl;
 	uint32_t freqs[RTE_MAX_LCORE_FREQS];
 	unsigned num_freqs;
-} __rte_cache_aligned;
+};
 
 static struct freq_info global_core_freq_info[RTE_MAX_LCORE];
 
-- 
1.8.3.1

[PATCH v2 02/83] net/ark: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/ark/ark_ethdev_rx.c | 6 +++---
 drivers/net/ark/ark_ethdev_tx.c | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/ark/ark_ethdev_rx.c b/drivers/net/ark/ark_ethdev_rx.c
index 24f1c65..80e431f 100644
--- a/drivers/net/ark/ark_ethdev_rx.c
+++ b/drivers/net/ark/ark_ethdev_rx.c
@@ -28,7 +28,7 @@ static uint32_t eth_ark_rx_jumbo(struct ark_rx_queue *queue,
 static inline int eth_ark_rx_seed_mbufs(struct ark_rx_queue *queue);
 
 /* ************************************************************************* */
-struct ark_rx_queue {
+struct __rte_cache_aligned ark_rx_queue {
 	/* array of mbufs to populate */
 	struct rte_mbuf **reserve_q;
 	/* array of physical addresses of the mbuf data pointer */
@@ -60,10 +60,10 @@ struct ark_rx_queue {
 	uint32_t unused;
 
 	/* next cache line - fields written by device */
-	RTE_MARKER cacheline1 __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) RTE_MARKER cacheline1;
 
 	volatile uint32_t prod_index;	/* step 2 filled by FPGA */
-} __rte_cache_aligned;
+};
 
 /* ************************************************************************* */
 static int
diff --git a/drivers/net/ark/ark_ethdev_tx.c b/drivers/net/ark/ark_ethdev_tx.c
index 4792754..9c89c85 100644
--- a/drivers/net/ark/ark_ethdev_tx.c
+++ b/drivers/net/ark/ark_ethdev_tx.c
@@ -21,7 +21,7 @@
 #endif
 
 /* ************************************************************************* */
-struct ark_tx_queue {
+struct __rte_cache_aligned ark_tx_queue {
 	union ark_tx_meta *meta_q;
 	struct rte_mbuf **bufs;
 
@@ -48,9 +48,9 @@ struct ark_tx_queue {
 	uint16_t queue_index;
 
 	/* next cache line - fields written by device */
-	RTE_MARKER cacheline1 __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) RTE_MARKER cacheline1;
 	volatile int32_t cons_index;		/* hw is done, can be freed */
-} __rte_cache_aligned;
+};
 
 /* Forward declarations */
 static int eth_ark_tx_jumbo(struct ark_tx_queue *queue,
-- 
1.8.3.1

[PATCH v2 03/83] net/avp: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/avp/avp_ethdev.c     | 8 ++++----
 drivers/net/avp/rte_avp_common.h | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/avp/avp_ethdev.c b/drivers/net/avp/avp_ethdev.c
index 53d9e38..6733462 100644
--- a/drivers/net/avp/avp_ethdev.c
+++ b/drivers/net/avp/avp_ethdev.c
@@ -154,7 +154,7 @@ static int avp_dev_stats_get(struct rte_eth_dev *dev,
  * Defines the AVP device attributes which are attached to an RTE ethernet
  * device
  */
-struct avp_dev {
+struct __rte_cache_aligned avp_dev {
 	uint32_t magic; /**< Memory validation marker */
 	uint64_t device_id; /**< Unique system identifier */
 	struct rte_ether_addr ethaddr; /**< Host specified MAC address */
@@ -190,12 +190,12 @@ struct avp_dev {
 	void *sync_addr; /**< Req/Resp Mem address */
 	void *host_mbuf_addr; /**< (host) MBUF pool start address */
 	void *mbuf_addr; /**< MBUF pool start address */
-} __rte_cache_aligned;
+};
 
 /* RTE ethernet private data */
-struct avp_adapter {
+struct __rte_cache_aligned avp_adapter {
 	struct avp_dev avp;
-} __rte_cache_aligned;
+};
 
 
 /* 32-bit MMIO register write */
diff --git a/drivers/net/avp/rte_avp_common.h b/drivers/net/avp/rte_avp_common.h
index 908b31b..5ad71ac 100644
--- a/drivers/net/avp/rte_avp_common.h
+++ b/drivers/net/avp/rte_avp_common.h
@@ -100,7 +100,7 @@ struct rte_avp_fifo {
 /*
  * AVP packet buffer header used to define the exchange of packet data.
  */
-struct rte_avp_desc {
+struct __rte_cache_aligned rte_avp_desc {
 	uint64_t pad0;
 	void *pkt_mbuf; /**< Reference to packet mbuf */
 	uint8_t pad1[14];
@@ -114,7 +114,7 @@ struct rte_avp_desc {
 	uint32_t pad3;
 	uint16_t vlan_tci; /**< VLAN Tag Control Identifier (CPU order). */
 	uint32_t pad4;
-} __rte_packed __rte_cache_aligned;
+} __rte_packed;
 
 
 /**{ AVP device features */
-- 
1.8.3.1

[PATCH v2 04/83] net/axgbe: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/axgbe/axgbe_rxtx.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/axgbe/axgbe_rxtx.h b/drivers/net/axgbe/axgbe_rxtx.h
index a218bf0..a326ba9 100644
--- a/drivers/net/axgbe/axgbe_rxtx.h
+++ b/drivers/net/axgbe/axgbe_rxtx.h
@@ -56,7 +56,7 @@
 	} write;
 };
 
-struct axgbe_rx_queue {
+struct __rte_cache_aligned axgbe_rx_queue {
 	/* membuf pool for rx buffers */
 	struct rte_mempool *mb_pool;
 	/* H/w Rx buffer size configured in DMA */
@@ -101,7 +101,7 @@ struct axgbe_rx_queue {
 	/* Number of mbufs allocated from pool*/
 	uint64_t mbuf_alloc;
 	uint64_t offloads; /**< Rx offloads with RTE_ETH_RX_OFFLOAD_**/
-} __rte_cache_aligned;
+};
 
 /*Tx descriptor format */
 struct axgbe_tx_desc {
@@ -110,7 +110,7 @@ struct axgbe_tx_desc {
 	uint32_t desc3;
 };
 
-struct axgbe_tx_queue {
+struct __rte_cache_aligned axgbe_tx_queue {
 	/* Port private data reference */
 	struct axgbe_port *pdata;
 	/* Number of Tx descriptors in queue*/
@@ -150,7 +150,7 @@ struct axgbe_tx_queue {
 	uint64_t bytes;
 	uint64_t errors;
 	uint64_t offloads; /**< Tx offload flags of RTE_ETH_TX_OFFLOAD_* */
-} __rte_cache_aligned;
+};
 
 /*Queue related APIs */
 
-- 
1.8.3.1

[PATCH v2 05/83] net/bnxt: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/bnxt/bnxt_rxr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/bnxt/bnxt_rxr.c b/drivers/net/bnxt/bnxt_rxr.c
index 3542975..957b7d6 100644
--- a/drivers/net/bnxt/bnxt_rxr.c
+++ b/drivers/net/bnxt/bnxt_rxr.c
@@ -473,7 +473,7 @@ static inline struct rte_mbuf *bnxt_tpa_end(
 	return mbuf;
 }
 
-uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM] __rte_cache_aligned;
+alignas(RTE_CACHE_LINE_SIZE) uint32_t bnxt_ptype_table[BNXT_PTYPE_TBL_DIM];
 
 static void __rte_cold
 bnxt_init_ptype_table(void)
-- 
1.8.3.1

[PATCH v2 06/83] net/bonding: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/bonding/rte_eth_bond_8023ad.h | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/net/bonding/rte_eth_bond_8023ad.h b/drivers/net/bonding/rte_eth_bond_8023ad.h
index 4c280c7..b2deb26 100644
--- a/drivers/net/bonding/rte_eth_bond_8023ad.h
+++ b/drivers/net/bonding/rte_eth_bond_8023ad.h
@@ -57,12 +57,12 @@ struct slow_protocol {
 } __rte_packed;
 
 /** Generic slow protocol frame type structure */
-struct slow_protocol_frame {
+struct __rte_aligned(2) slow_protocol_frame {
 	struct rte_ether_hdr eth_hdr;
 	struct slow_protocol slow_protocol;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct port_params {
+struct __rte_aligned(2) port_params {
 	uint16_t system_priority;
 	/**< System priority (unused in current implementation) */
 	struct rte_ether_addr system;
@@ -73,18 +73,18 @@ struct port_params {
 	/**< Priority of this (unused in current implementation) */
 	uint16_t port_number;
 	/**< Port number. It corresponds to member port id. */
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct lacpdu_actor_partner_params {
+struct __rte_aligned(2) lacpdu_actor_partner_params {
 	uint8_t tlv_type_info;
 	uint8_t info_length;
 	struct port_params port_params;
 	uint8_t state;
 	uint8_t reserved_3[3];
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /** LACPDU structure (5.4.2 in 802.1AX documentation). */
-struct lacpdu {
+struct __rte_aligned(2) lacpdu {
 	uint8_t subtype;
 	uint8_t version_number;
 
@@ -99,15 +99,15 @@ struct lacpdu {
 	uint8_t tlv_type_terminator;
 	uint8_t terminator_length;
 	uint8_t reserved_50[50];
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 /** LACPDU frame: Contains ethernet header and LACPDU. */
-struct lacpdu_header {
+struct __rte_aligned(2) lacpdu_header {
 	struct rte_ether_hdr eth_hdr;
 	struct lacpdu lacpdu;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct marker {
+struct __rte_aligned(2) marker {
 	uint8_t subtype;
 	uint8_t version_number;
 
@@ -121,12 +121,12 @@ struct marker {
 	uint8_t tlv_type_terminator;
 	uint8_t terminator_length;
 	uint8_t reserved_90[90];
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
-struct marker_header {
+struct __rte_aligned(2) marker_header {
 	struct rte_ether_hdr eth_hdr;
 	struct marker marker;
-} __rte_packed __rte_aligned(2);
+} __rte_packed;
 
 struct rte_eth_bond_8023ad_conf {
 	uint32_t fast_periodic_ms;
-- 
1.8.3.1

[PATCH v2 07/83] net/cxgbe: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/cxgbe/base/adapter.h | 14 +++++++-------
 drivers/net/cxgbe/cxgbe_ofld.h   |  2 +-
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/cxgbe/base/adapter.h b/drivers/net/cxgbe/base/adapter.h
index 7bee5cf..d490c6f 100644
--- a/drivers/net/cxgbe/base/adapter.h
+++ b/drivers/net/cxgbe/base/adapter.h
@@ -155,12 +155,12 @@ struct sge_eth_rx_stats {	/* Ethernet rx queue statistics */
 	u64 rx_drops;		/* # of packets dropped due to no mem */
 };
 
-struct sge_eth_rxq {                /* a SW Ethernet Rx queue */
+struct __rte_cache_aligned sge_eth_rxq {                /* a SW Ethernet Rx queue */
 	unsigned int flags;         /* flags for state of the queue */
 	struct sge_rspq rspq;
 	struct sge_fl fl;
 	struct sge_eth_rx_stats stats;
-} __rte_cache_aligned;
+};
 
 /*
  * Currently there are two types of coalesce WR. Type 0 needs 48 bytes per
@@ -252,7 +252,7 @@ struct sge_eth_tx_stats {	/* Ethernet tx queue statistics */
 	u64 coal_pkts;          /* # of coalesced packets */
 };
 
-struct sge_eth_txq {                   /* state for an SGE Ethernet Tx queue */
+struct __rte_cache_aligned sge_eth_txq {                   /* state for an SGE Ethernet Tx queue */
 	struct sge_txq q;
 	struct rte_eth_dev *eth_dev;   /* port that this queue belongs to */
 	struct rte_eth_dev_data *data;
@@ -260,21 +260,21 @@ struct sge_eth_txq {                   /* state for an SGE Ethernet Tx queue */
 	rte_spinlock_t txq_lock;
 
 	unsigned int flags;            /* flags for state of the queue */
-} __rte_cache_aligned;
+};
 
-struct sge_ctrl_txq {                /* State for an SGE control Tx queue */
+struct __rte_cache_aligned sge_ctrl_txq {                /* State for an SGE control Tx queue */
 	struct sge_txq q;            /* txq */
 	struct adapter *adapter;     /* adapter associated with this queue */
 	rte_spinlock_t ctrlq_lock;   /* control queue lock */
 	u8 full;                     /* the Tx ring is full */
 	u64 txp;                     /* number of transmits */
 	struct rte_mempool *mb_pool; /* mempool to generate ctrl pkts */
-} __rte_cache_aligned;
+};
 
 struct sge {
 	struct sge_eth_txq *ethtxq;
 	struct sge_eth_rxq *ethrxq;
-	struct sge_rspq fw_evtq __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct sge_rspq fw_evtq;
 	struct sge_ctrl_txq ctrlq[MAX_CTRL_QUEUES];
 
 	u16 max_ethqsets;           /* # of available Ethernet queue sets */
diff --git a/drivers/net/cxgbe/cxgbe_ofld.h b/drivers/net/cxgbe/cxgbe_ofld.h
index 33697c7..7a4e30d 100644
--- a/drivers/net/cxgbe/cxgbe_ofld.h
+++ b/drivers/net/cxgbe/cxgbe_ofld.h
@@ -65,7 +65,7 @@ struct tid_info {
 	u32 hash_tids_in_use;
 	u32 conns_in_use;
 
-	rte_spinlock_t atid_lock __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) rte_spinlock_t atid_lock;
 	rte_spinlock_t ftid_lock;
 };
 
-- 
1.8.3.1

[PATCH v2 08/83] net/e1000: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/e1000/igb_rxtx.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c
index 5cafd6f..d61eaad 100644
--- a/drivers/net/e1000/igb_rxtx.c
+++ b/drivers/net/e1000/igb_rxtx.c
@@ -705,8 +705,8 @@ struct igb_tx_queue {
 static inline uint32_t
 igb_rxd_pkt_info_to_pkt_type(uint16_t pkt_info)
 {
-	static const uint32_t
-		ptype_table[IGB_PACKET_TYPE_MAX] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+		ptype_table[IGB_PACKET_TYPE_MAX] = {
 		[IGB_PACKET_TYPE_IPV4] = RTE_PTYPE_L2_ETHER |
 			RTE_PTYPE_L3_IPV4,
 		[IGB_PACKET_TYPE_IPV4_EXT] = RTE_PTYPE_L2_ETHER |
-- 
1.8.3.1

[PATCH v2 09/83] net/ena: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/ena/ena_ethdev.h | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ena/ena_ethdev.h b/drivers/net/ena/ena_ethdev.h
index 7513a3f..7d82d22 100644
--- a/drivers/net/ena/ena_ethdev.h
+++ b/drivers/net/ena/ena_ethdev.h
@@ -142,7 +142,7 @@ struct ena_stats_rx {
 	u64 bad_req_id;
 };
 
-struct ena_ring {
+struct __rte_cache_aligned ena_ring {
 	u16 next_to_use;
 	u16 next_to_clean;
 	uint64_t last_cleanup_ticks;
@@ -175,8 +175,7 @@ struct ena_ring {
 		uint16_t rx_free_thresh;
 	};
 
-	struct ena_com_rx_buf_info ena_bufs[ENA_PKT_MAX_BUFS]
-						__rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct ena_com_rx_buf_info ena_bufs[ENA_PKT_MAX_BUFS];
 
 	struct rte_mempool *mb_pool;
 	unsigned int port_id;
@@ -201,7 +200,7 @@ struct ena_ring {
 	unsigned int numa_socket_id;
 
 	uint32_t missing_tx_completion_threshold;
-} __rte_cache_aligned;
+};
 
 enum ena_adapter_state {
 	ENA_ADAPTER_STATE_FREE    = 0,
@@ -288,15 +287,15 @@ struct ena_adapter {
 	/* OS defined structs */
 	struct rte_eth_dev_data *edev_data;
 
-	struct ena_com_dev ena_dev __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct ena_com_dev ena_dev;
 
 	/* TX */
-	struct ena_ring tx_ring[ENA_MAX_NUM_QUEUES] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct ena_ring tx_ring[ENA_MAX_NUM_QUEUES];
 	u32 max_tx_ring_size;
 	u16 max_tx_sgl_size;
 
 	/* RX */
-	struct ena_ring rx_ring[ENA_MAX_NUM_QUEUES] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct ena_ring rx_ring[ENA_MAX_NUM_QUEUES];
 	u32 max_rx_ring_size;
 	u16 max_rx_sgl_size;
 
@@ -357,9 +356,9 @@ struct ena_adapter {
 	 * Helper variables for holding the information about the supported
 	 * metrics.
 	 */
-	uint64_t metrics_stats[ENA_MAX_CUSTOMER_METRICS] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t metrics_stats[ENA_MAX_CUSTOMER_METRICS];
 	uint16_t metrics_num;
-	struct ena_stats_srd srd_stats __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct ena_stats_srd srd_stats;
 };
 
 int ena_mp_indirect_table_set(struct ena_adapter *adapter);
-- 
1.8.3.1

[PATCH v2 10/83] net/enic: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/enic/enic_rxtx_common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/enic/enic_rxtx_common.h b/drivers/net/enic/enic_rxtx_common.h
index 9d6d347..c55eea4 100644
--- a/drivers/net/enic/enic_rxtx_common.h
+++ b/drivers/net/enic/enic_rxtx_common.h
@@ -114,7 +114,7 @@
 	 * Also, as there is no tunnel type info (VXLAN, NVGRE, or GENEVE), set
 	 * RTE_PTYPE_TUNNEL_GRENAT..
 	 */
-	static const uint32_t cq_type_table[128] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t cq_type_table[128] = {
 		[0x00] = RTE_PTYPE_UNKNOWN,
 		[0x01] = RTE_PTYPE_UNKNOWN |
 			 RTE_PTYPE_TUNNEL_GRENAT |
-- 
1.8.3.1

[PATCH v2 11/83] net/fm10k: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/fm10k/fm10k_rxtx.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/net/fm10k/fm10k_rxtx.c b/drivers/net/fm10k/fm10k_rxtx.c
index c0841ab..690142b 100644
--- a/drivers/net/fm10k/fm10k_rxtx.c
+++ b/drivers/net/fm10k/fm10k_rxtx.c
@@ -53,9 +53,8 @@ static inline void dump_rxd(union fm10k_rx_desc *rxd)
 static inline void
 rx_desc_to_ol_flags(struct rte_mbuf *m, const union fm10k_rx_desc *d)
 {
-	static const uint32_t
-		ptype_table[FM10K_RXD_PKTTYPE_MASK >> FM10K_RXD_PKTTYPE_SHIFT]
-			__rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+		ptype_table[FM10K_RXD_PKTTYPE_MASK >> FM10K_RXD_PKTTYPE_SHIFT] = {
 		[FM10K_PKTTYPE_OTHER] = RTE_PTYPE_L2_ETHER,
 		[FM10K_PKTTYPE_IPV4] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4,
 		[FM10K_PKTTYPE_IPV4_EX] = RTE_PTYPE_L2_ETHER |
-- 
1.8.3.1

[PATCH v2 12/83] net/hinic: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/hinic/hinic_pmd_rx.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/hinic/hinic_pmd_rx.h b/drivers/net/hinic/hinic_pmd_rx.h
index 5c30339..2dde3ec 100644
--- a/drivers/net/hinic/hinic_pmd_rx.h
+++ b/drivers/net/hinic/hinic_pmd_rx.h
@@ -28,18 +28,18 @@ struct hinic_rq_ctrl {
 	u32	ctrl_fmt;
 };
 
+#if defined(RTE_ARCH_ARM64)
+struct __rte_cache_aligned hinic_rq_cqe {
+#else
 struct hinic_rq_cqe {
+#endif
 	u32 status;
 	u32 vlan_len;
 	u32 offload_type;
 	u32 rss_hash;
 
 	u32 rsvd[4];
-#if defined(RTE_ARCH_ARM64)
-} __rte_cache_aligned;
-#else
 };
-#endif
 
 struct hinic_rq_cqe_sect {
 	struct hinic_sge	sge;
-- 
1.8.3.1

[PATCH v2 13/83] net/hns3: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/hns3/hns3_ethdev.h | 4 ++--
 drivers/net/hns3/hns3_fdir.c   | 4 ++--
 drivers/net/hns3/hns3_rxtx.h   | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h
index e70c5ff..a4bc62a 100644
--- a/drivers/net/hns3/hns3_ethdev.h
+++ b/drivers/net/hns3/hns3_ethdev.h
@@ -767,7 +767,7 @@ struct hns3_ptype_table {
 	 * descriptor, it functions only when firmware report the capability of
 	 * HNS3_CAPS_RXD_ADV_LAYOUT_B and driver enabled it.
 	 */
-	uint32_t ptype[HNS3_PTYPE_NUM] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t ptype[HNS3_PTYPE_NUM];
 };
 
 #define HNS3_FIXED_MAX_TQP_NUM_MODE		0
@@ -872,7 +872,7 @@ struct hns3_adapter {
 	uint64_t dev_caps_mask;
 	uint16_t mbx_time_limit_ms; /* wait time for mbx message */
 
-	struct hns3_ptype_table ptype_tbl __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct hns3_ptype_table ptype_tbl;
 };
 
 enum hns3_dev_cap {
diff --git a/drivers/net/hns3/hns3_fdir.c b/drivers/net/hns3/hns3_fdir.c
index d100e58..4843066 100644
--- a/drivers/net/hns3/hns3_fdir.c
+++ b/drivers/net/hns3/hns3_fdir.c
@@ -724,8 +724,8 @@ static int hns3_config_key(struct hns3_adapter *hns,
 	struct hns3_fd_key_cfg *key_cfg;
 	uint8_t *cur_key_x;
 	uint8_t *cur_key_y;
-	uint8_t key_x[MAX_KEY_BYTES] __rte_aligned(4);
-	uint8_t key_y[MAX_KEY_BYTES] __rte_aligned(4);
+	alignas(4) uint8_t key_x[MAX_KEY_BYTES];
+	alignas(4) uint8_t key_y[MAX_KEY_BYTES];
 	uint8_t vf_id = rule->vf_id;
 	uint8_t meta_data_region;
 	uint8_t tuple_size;
diff --git a/drivers/net/hns3/hns3_rxtx.h b/drivers/net/hns3/hns3_rxtx.h
index e2ad42b..e975cd1 100644
--- a/drivers/net/hns3/hns3_rxtx.h
+++ b/drivers/net/hns3/hns3_rxtx.h
@@ -366,7 +366,7 @@ struct hns3_rx_queue {
 	 * The following fields are not accessed in the I/O path, so they are
 	 * placed at the end.
 	 */
-	void *io_base __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *io_base;
 	struct hns3_adapter *hns;
 	uint64_t rx_ring_phys_addr; /* RX ring DMA address */
 	const struct rte_memzone *mz;
@@ -540,7 +540,7 @@ struct hns3_tx_queue {
 	 * The following fields are not accessed in the I/O path, so they are
 	 * placed at the end.
 	 */
-	void *io_base __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *io_base;
 	struct hns3_adapter *hns;
 	uint64_t tx_ring_phys_addr; /* TX ring DMA address */
 	const struct rte_memzone *mz;
-- 
1.8.3.1

[PATCH v2 14/83] net/i40e: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/i40e/i40e_ethdev.h | 4 ++--
 drivers/net/i40e/i40e_rxtx.h   | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
index b9628ca..31fc926 100644
--- a/drivers/net/i40e/i40e_ethdev.h
+++ b/drivers/net/i40e/i40e_ethdev.h
@@ -1261,9 +1261,9 @@ struct i40e_adapter {
 	struct rte_timecounter tx_tstamp_tc;
 
 	/* ptype mapping table */
-	uint32_t ptype_tbl[I40E_MAX_PKT_TYPE] __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) uint32_t ptype_tbl[I40E_MAX_PKT_TYPE];
 	/* flow type to pctype mapping table */
-	uint64_t pctypes_tbl[I40E_FLOW_TYPE_MAX] __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) uint64_t pctypes_tbl[I40E_FLOW_TYPE_MAX];
 	uint64_t flow_types_mask;
 	uint64_t pctypes_mask;
 
diff --git a/drivers/net/i40e/i40e_rxtx.h b/drivers/net/i40e/i40e_rxtx.h
index 70320cf..2f2f890 100644
--- a/drivers/net/i40e/i40e_rxtx.h
+++ b/drivers/net/i40e/i40e_rxtx.h
@@ -279,7 +279,7 @@ uint16_t i40e_xmit_pkts_vec_avx512(void *tx_queue,
 static inline uint32_t
 i40e_get_default_pkt_type(uint8_t ptype)
 {
-	static const uint32_t type_table[UINT8_MAX + 1] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t type_table[UINT8_MAX + 1] = {
 		/* L2 types */
 		/* [0] reserved */
 		[1] = RTE_PTYPE_L2_ETHER,
-- 
1.8.3.1

[PATCH v2 15/83] net/iavf: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/iavf/iavf.h      | 2 +-
 drivers/net/iavf/iavf_rxtx.c | 3 +--
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/net/iavf/iavf.h b/drivers/net/iavf/iavf.h
index 824ae4a..7ab41c9 100644
--- a/drivers/net/iavf/iavf.h
+++ b/drivers/net/iavf/iavf.h
@@ -375,7 +375,7 @@ struct iavf_adapter {
 	/* For vector PMD */
 	bool rx_vec_allowed;
 	bool tx_vec_allowed;
-	uint32_t ptype_tbl[IAVF_MAX_PKT_TYPE] __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) uint32_t ptype_tbl[IAVF_MAX_PKT_TYPE];
 	bool stopped;
 	bool closed;
 	bool no_poll;
diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
index 0a5246d..59a0b9e 100644
--- a/drivers/net/iavf/iavf_rxtx.c
+++ b/drivers/net/iavf/iavf_rxtx.c
@@ -4449,8 +4449,7 @@ struct iavf_tx_context_desc_qws {
 static inline uint32_t
 iavf_get_default_ptype(uint16_t ptype)
 {
-	static const uint32_t ptype_tbl[IAVF_MAX_PKT_TYPE]
-		__rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t ptype_tbl[IAVF_MAX_PKT_TYPE] = {
 		/* L2 types */
 		/* [0] reserved */
 		[1] = RTE_PTYPE_L2_ETHER,
-- 
1.8.3.1

[PATCH v2 16/83] net/ice: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/ice/ice_ethdev.h | 2 +-
 drivers/net/ice/ice_rxtx.c   | 3 +--
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h
index 1a848b3..984479a 100644
--- a/drivers/net/ice/ice_ethdev.h
+++ b/drivers/net/ice/ice_ethdev.h
@@ -605,7 +605,7 @@ struct ice_adapter {
 	bool tx_vec_allowed;
 	bool tx_simple_allowed;
 	/* ptype mapping table */
-	uint32_t ptype_tbl[ICE_MAX_PKT_TYPE] __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) uint32_t ptype_tbl[ICE_MAX_PKT_TYPE];
 	bool is_safe_mode;
 	struct ice_devargs devargs;
 	enum ice_pkg_type active_pkg_type; /* loaded ddp package type */
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index 13aabe9..95a2db3 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -4013,8 +4013,7 @@
 static inline uint32_t
 ice_get_default_pkt_type(uint16_t ptype)
 {
-	static const uint32_t type_table[ICE_MAX_PKT_TYPE]
-		__rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t type_table[ICE_MAX_PKT_TYPE] = {
 		/* L2 types */
 		/* [0] reserved */
 		[1] = RTE_PTYPE_L2_ETHER,
-- 
1.8.3.1

[PATCH v2 17/83] net/igc: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/igc/igc_txrx.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/igc/igc_txrx.c b/drivers/net/igc/igc_txrx.c
index 5c60e3e..d0cee1b 100644
--- a/drivers/net/igc/igc_txrx.c
+++ b/drivers/net/igc/igc_txrx.c
@@ -148,8 +148,8 @@
 static inline uint32_t
 rx_desc_pkt_info_to_pkt_type(uint32_t pkt_info)
 {
-	static const uint32_t
-		ptype_table[IGC_PACKET_TYPE_MAX] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+		ptype_table[IGC_PACKET_TYPE_MAX] = {
 		[IGC_PACKET_TYPE_IPV4] = RTE_PTYPE_L2_ETHER |
 			RTE_PTYPE_L3_IPV4,
 		[IGC_PACKET_TYPE_IPV4_EXT] = RTE_PTYPE_L2_ETHER |
-- 
1.8.3.1

[PATCH v2 18/83] net/ionic: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/ionic/ionic_lif.h  | 2 +-
 drivers/net/ionic/ionic_rxtx.c | 6 ++----
 2 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h
index 591cf1a..f4a1b99 100644
--- a/drivers/net/ionic/ionic_lif.h
+++ b/drivers/net/ionic/ionic_lif.h
@@ -98,7 +98,7 @@ struct ionic_rx_qcq {
 	struct ionic_rx_stats stats;
 
 	/* cacheline4+ */
-	struct rte_mbuf *mbs[IONIC_MBUF_BULK_ALLOC] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *mbs[IONIC_MBUF_BULK_ALLOC];
 
 	struct ionic_admin_ctx admin_ctx;
 };
diff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c
index f0bd3ff..923f517 100644
--- a/drivers/net/ionic/ionic_rxtx.c
+++ b/drivers/net/ionic/ionic_rxtx.c
@@ -607,8 +607,7 @@
 }
 
 #define IONIC_CSUM_FLAG_MASK (IONIC_RXQ_COMP_CSUM_F_VLAN - 1)
-const uint64_t ionic_csum_flags[IONIC_CSUM_FLAG_MASK]
-		__rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) uint64_t ionic_csum_flags[IONIC_CSUM_FLAG_MASK] = {
 	/* IP_BAD set */
 	[IONIC_RXQ_COMP_CSUM_F_IP_BAD] = RTE_MBUF_F_RX_IP_CKSUM_BAD,
 	[IONIC_RXQ_COMP_CSUM_F_IP_BAD | IONIC_RXQ_COMP_CSUM_F_TCP_OK] =
@@ -637,8 +636,7 @@
 };
 
 /* RTE_PTYPE_UNKNOWN is 0x0 */
-const uint32_t ionic_ptype_table[IONIC_RXQ_COMP_PKT_TYPE_MASK]
-		__rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) uint32_t ionic_ptype_table[IONIC_RXQ_COMP_PKT_TYPE_MASK] = {
 	[IONIC_PKT_TYPE_NON_IP]   = RTE_PTYPE_UNKNOWN,
 	[IONIC_PKT_TYPE_IPV4]     = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4,
 	[IONIC_PKT_TYPE_IPV4_TCP] =
-- 
1.8.3.1

[PATCH v2 19/83] net/ixgbe: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/ixgbe/ixgbe_ipsec.h |  4 ++--
 drivers/net/ixgbe/ixgbe_rxtx.c  | 10 +++++-----
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ixgbe/ixgbe_ipsec.h b/drivers/net/ixgbe/ixgbe_ipsec.h
index e218c0a..be39199 100644
--- a/drivers/net/ixgbe/ixgbe_ipsec.h
+++ b/drivers/net/ixgbe/ixgbe_ipsec.h
@@ -60,7 +60,7 @@ struct ipaddr {
 };
 
 /** inline crypto crypto private session structure */
-struct ixgbe_crypto_session {
+struct __rte_cache_aligned ixgbe_crypto_session {
 	enum ixgbe_operation op;
 	const uint8_t *key;
 	uint32_t key_len;
@@ -70,7 +70,7 @@ struct ixgbe_crypto_session {
 	struct ipaddr src_ip;
 	struct ipaddr dst_ip;
 	struct rte_eth_dev *dev;
-} __rte_cache_aligned;
+};
 
 struct ixgbe_crypto_rx_ip_table {
 	struct ipaddr ip;
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index f6c17d4..3d39eaa 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -1101,8 +1101,8 @@
  * Use 2 different table for normal packet and tunnel packet
  * to save the space.
  */
-const uint32_t
-	ptype_table[IXGBE_PACKET_TYPE_MAX] __rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+	ptype_table[IXGBE_PACKET_TYPE_MAX] = {
 	[IXGBE_PACKET_TYPE_ETHER] = RTE_PTYPE_L2_ETHER,
 	[IXGBE_PACKET_TYPE_IPV4] = RTE_PTYPE_L2_ETHER |
 		RTE_PTYPE_L3_IPV4,
@@ -1187,8 +1187,8 @@
 		RTE_PTYPE_INNER_L3_IPV6_EXT | RTE_PTYPE_INNER_L4_SCTP,
 };
 
-const uint32_t
-	ptype_table_tn[IXGBE_PACKET_TYPE_TN_MAX] __rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+	ptype_table_tn[IXGBE_PACKET_TYPE_TN_MAX] = {
 	[IXGBE_PACKET_TYPE_NVGRE] = RTE_PTYPE_L2_ETHER |
 		RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_TUNNEL_GRE |
 		RTE_PTYPE_INNER_L2_ETHER,
@@ -1429,7 +1429,7 @@
 static inline uint64_t
 ixgbe_rxd_pkt_info_to_pkt_flags(uint16_t pkt_info)
 {
-	static uint64_t ip_rss_types_map[16] __rte_cache_aligned = {
+	static alignas(RTE_CACHE_LINE_SIZE) uint64_t ip_rss_types_map[16] = {
 		0, RTE_MBUF_F_RX_RSS_HASH, RTE_MBUF_F_RX_RSS_HASH, RTE_MBUF_F_RX_RSS_HASH,
 		0, RTE_MBUF_F_RX_RSS_HASH, 0, RTE_MBUF_F_RX_RSS_HASH,
 		RTE_MBUF_F_RX_RSS_HASH, 0, 0, 0,
-- 
1.8.3.1

[PATCH v2 20/83] net/memif: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/memif/memif.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/memif/memif.h b/drivers/net/memif/memif.h
index cb72c69..f5a4693 100644
--- a/drivers/net/memif/memif.h
+++ b/drivers/net/memif/memif.h
@@ -162,7 +162,7 @@ typedef struct __rte_packed __rte_aligned(128)
 } memif_desc_t;
 
 #define MEMIF_CACHELINE_ALIGN_MARK(mark) \
-	RTE_MARKER mark __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) RTE_MARKER mark;
 
 typedef struct {
 	MEMIF_CACHELINE_ALIGN_MARK(cacheline0);
-- 
1.8.3.1

[PATCH v2 21/83] net/mlx5: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/mlx5/hws/mlx5dr_send.h |  4 ++--
 drivers/net/mlx5/mlx5.h            |  6 +++---
 drivers/net/mlx5/mlx5_flow.h       |  4 ++--
 drivers/net/mlx5/mlx5_hws_cnt.h    | 14 +++++++-------
 drivers/net/mlx5/mlx5_rx.h         |  4 ++--
 drivers/net/mlx5/mlx5_rxtx.c       |  6 +++---
 drivers/net/mlx5/mlx5_tx.h         | 10 +++++-----
 drivers/net/mlx5/mlx5_utils.h      |  2 +-
 8 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/drivers/net/mlx5/hws/mlx5dr_send.h b/drivers/net/mlx5/hws/mlx5dr_send.h
index c4eaea5..0c67a9e 100644
--- a/drivers/net/mlx5/hws/mlx5dr_send.h
+++ b/drivers/net/mlx5/hws/mlx5dr_send.h
@@ -144,7 +144,7 @@ struct mlx5dr_completed_poll {
 	uint16_t mask;
 };
 
-struct mlx5dr_send_engine {
+struct __rte_cache_aligned mlx5dr_send_engine {
 	struct mlx5dr_send_ring send_ring[MLX5DR_NUM_SEND_RINGS]; /* For now 1:1 mapping */
 	struct mlx5dv_devx_uar *uar; /* Uar is shared between rings of a queue */
 	struct mlx5dr_completed_poll completed;
@@ -153,7 +153,7 @@ struct mlx5dr_send_engine {
 	uint16_t rings;
 	uint16_t num_entries;
 	bool err;
-} __rte_cache_aligned;
+};
 
 struct mlx5dr_send_engine_post_ctrl {
 	struct mlx5dr_send_engine *queue;
diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h
index 0091a24..3646d20 100644
--- a/drivers/net/mlx5/mlx5.h
+++ b/drivers/net/mlx5/mlx5.h
@@ -415,7 +415,7 @@ struct mlx5_hw_q_job {
 };
 
 /* HW steering job descriptor LIFO pool. */
-struct mlx5_hw_q {
+struct __rte_cache_aligned mlx5_hw_q {
 	uint32_t job_idx; /* Free job index. */
 	uint32_t size; /* Job LIFO queue size. */
 	uint32_t ongoing_flow_ops; /* Number of ongoing flow operations. */
@@ -424,7 +424,7 @@ struct mlx5_hw_q {
 	struct rte_ring *indir_iq; /* Indirect action SW in progress queue. */
 	struct rte_ring *flow_transfer_pending;
 	struct rte_ring *flow_transfer_completed;
-} __rte_cache_aligned;
+};
 
 
 #define MLX5_COUNTER_POOLS_MAX_NUM (1 << 15)
@@ -1405,7 +1405,7 @@ struct mlx5_hws_cnt_svc_mng {
 	uint32_t query_interval;
 	rte_thread_t service_thread;
 	uint8_t svc_running;
-	struct mlx5_hws_aso_mng aso_mng __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct mlx5_hws_aso_mng aso_mng;
 };
 
 #define MLX5_FLOW_HW_TAGS_MAX 12
diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h
index 0065727..cc1e8cf 100644
--- a/drivers/net/mlx5/mlx5_flow.h
+++ b/drivers/net/mlx5/mlx5_flow.h
@@ -1654,9 +1654,9 @@ struct mlx5_matcher_info {
 	RTE_ATOMIC(uint32_t) refcnt;
 };
 
-struct mlx5_dr_rule_action_container {
+struct __rte_cache_aligned mlx5_dr_rule_action_container {
 	struct mlx5dr_rule_action acts[MLX5_HW_MAX_ACTS];
-} __rte_cache_aligned;
+};
 
 struct rte_flow_template_table {
 	LIST_ENTRY(rte_flow_template_table) next;
diff --git a/drivers/net/mlx5/mlx5_hws_cnt.h b/drivers/net/mlx5/mlx5_hws_cnt.h
index e005960..1cb0564 100644
--- a/drivers/net/mlx5/mlx5_hws_cnt.h
+++ b/drivers/net/mlx5/mlx5_hws_cnt.h
@@ -97,11 +97,11 @@ struct mlx5_hws_cnt_pool_caches {
 	struct rte_ring *qcache[];
 };
 
-struct mlx5_hws_cnt_pool {
+struct __rte_cache_aligned mlx5_hws_cnt_pool {
 	LIST_ENTRY(mlx5_hws_cnt_pool) next;
-	struct mlx5_hws_cnt_pool_cfg cfg __rte_cache_aligned;
-	struct mlx5_hws_cnt_dcs_mng dcs_mng __rte_cache_aligned;
-	uint32_t query_gen __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct mlx5_hws_cnt_pool_cfg cfg;
+	alignas(RTE_CACHE_LINE_SIZE) struct mlx5_hws_cnt_dcs_mng dcs_mng;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t query_gen;
 	struct mlx5_hws_cnt *pool;
 	struct mlx5_hws_cnt_raw_data_mng *raw_mng;
 	struct rte_ring *reuse_list;
@@ -110,7 +110,7 @@ struct mlx5_hws_cnt_pool {
 	struct mlx5_hws_cnt_pool_caches *cache;
 	uint64_t time_of_last_age_check;
 	struct mlx5_priv *priv;
-} __rte_cache_aligned;
+};
 
 /* HWS AGE status. */
 enum {
@@ -133,7 +133,7 @@ enum {
 };
 
 /* HWS counter age parameter. */
-struct mlx5_hws_age_param {
+struct __rte_cache_aligned mlx5_hws_age_param {
 	uint32_t timeout; /* Aging timeout in seconds (atomically accessed). */
 	uint32_t sec_since_last_hit;
 	/* Time in seconds since last hit (atomically accessed). */
@@ -149,7 +149,7 @@ struct mlx5_hws_age_param {
 	cnt_id_t own_cnt_index;
 	/* Counter action created specifically for this AGE action. */
 	void *context; /* Flow AGE context. */
-} __rte_packed __rte_cache_aligned;
+} __rte_packed;
 
 
 /**
diff --git a/drivers/net/mlx5/mlx5_rx.h b/drivers/net/mlx5/mlx5_rx.h
index 2fce908..fb4d8e6 100644
--- a/drivers/net/mlx5/mlx5_rx.h
+++ b/drivers/net/mlx5/mlx5_rx.h
@@ -79,7 +79,7 @@ struct mlx5_eth_rxseg {
 };
 
 /* RX queue descriptor. */
-struct mlx5_rxq_data {
+struct __rte_cache_aligned mlx5_rxq_data {
 	unsigned int csum:1; /* Enable checksum offloading. */
 	unsigned int hw_timestamp:1; /* Enable HW timestamp. */
 	unsigned int rt_timestamp:1; /* Realtime timestamp format. */
@@ -146,7 +146,7 @@ struct mlx5_rxq_data {
 	uint32_t rxseg_n; /* Number of split segment descriptions. */
 	struct mlx5_eth_rxseg rxseg[MLX5_MAX_RXQ_NSEG];
 	/* Buffer split segment descriptions - sizes, offsets, pools. */
-} __rte_cache_aligned;
+};
 
 /* RX queue control descriptor. */
 struct mlx5_rxq_ctrl {
diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
index 54d410b..d3d4470 100644
--- a/drivers/net/mlx5/mlx5_rxtx.c
+++ b/drivers/net/mlx5/mlx5_rxtx.c
@@ -77,12 +77,12 @@
 static_assert(MLX5_WQE_SIZE == 4 * MLX5_WSEG_SIZE,
 		"invalid WQE size");
 
-uint32_t mlx5_ptype_table[] __rte_cache_aligned = {
+alignas(RTE_CACHE_LINE_SIZE) uint32_t mlx5_ptype_table[] = {
 	[0xff] = RTE_PTYPE_ALL_MASK, /* Last entry for errored packet. */
 };
 
-uint8_t mlx5_cksum_table[1 << 10] __rte_cache_aligned;
-uint8_t mlx5_swp_types_table[1 << 10] __rte_cache_aligned;
+alignas(RTE_CACHE_LINE_SIZE) uint8_t mlx5_cksum_table[1 << 10];
+alignas(RTE_CACHE_LINE_SIZE) uint8_t mlx5_swp_types_table[1 << 10];
 
 uint64_t rte_net_mlx5_dynf_inline_mask;
 
diff --git a/drivers/net/mlx5/mlx5_tx.h b/drivers/net/mlx5/mlx5_tx.h
index b1e8ea1..107d7ab 100644
--- a/drivers/net/mlx5/mlx5_tx.h
+++ b/drivers/net/mlx5/mlx5_tx.h
@@ -83,9 +83,9 @@ enum mlx5_txcmp_code {
 extern uint64_t rte_net_mlx5_dynf_inline_mask;
 #define RTE_MBUF_F_TX_DYNF_NOINLINE rte_net_mlx5_dynf_inline_mask
 
-extern uint32_t mlx5_ptype_table[] __rte_cache_aligned;
-extern uint8_t mlx5_cksum_table[1 << 10] __rte_cache_aligned;
-extern uint8_t mlx5_swp_types_table[1 << 10] __rte_cache_aligned;
+extern alignas(RTE_CACHE_LINE_SIZE) uint32_t mlx5_ptype_table[];
+extern alignas(RTE_CACHE_LINE_SIZE) uint8_t mlx5_cksum_table[1 << 10];
+extern alignas(RTE_CACHE_LINE_SIZE) uint8_t mlx5_swp_types_table[1 << 10];
 
 struct mlx5_txq_stats {
 #ifdef MLX5_PMD_SOFT_COUNTERS
@@ -112,7 +112,7 @@ struct mlx5_txq_local {
 
 /* TX queue descriptor. */
 __extension__
-struct mlx5_txq_data {
+struct __rte_cache_aligned mlx5_txq_data {
 	uint16_t elts_head; /* Current counter in (*elts)[]. */
 	uint16_t elts_tail; /* Counter of first element awaiting completion. */
 	uint16_t elts_comp; /* elts index since last completion request. */
@@ -173,7 +173,7 @@ struct mlx5_txq_data {
 	struct mlx5_uar_data uar_data;
 	struct rte_mbuf *elts[];
 	/* Storage for queued packets, must be the last field. */
-} __rte_cache_aligned;
+};
 
 /* TX queue control descriptor. */
 __extension__
diff --git a/drivers/net/mlx5/mlx5_utils.h b/drivers/net/mlx5/mlx5_utils.h
index f3c0d76..b51d977 100644
--- a/drivers/net/mlx5/mlx5_utils.h
+++ b/drivers/net/mlx5/mlx5_utils.h
@@ -235,7 +235,7 @@ struct mlx5_indexed_trunk {
 	uint32_t next; /* Next free trunk in free list. */
 	uint32_t free; /* Free entries available */
 	struct rte_bitmap *bmp;
-	uint8_t data[] __rte_cache_aligned; /* Entry data start. */
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t data[]; /* Entry data start. */
 };
 
 struct mlx5_indexed_cache {
-- 
1.8.3.1

[PATCH v2 22/83] net/mlx4: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/mlx4/mlx4_rxtx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/mlx4/mlx4_rxtx.c b/drivers/net/mlx4/mlx4_rxtx.c
index 059e432..947cae4 100644
--- a/drivers/net/mlx4/mlx4_rxtx.c
+++ b/drivers/net/mlx4/mlx4_rxtx.c
@@ -62,7 +62,7 @@ struct tso_info {
 };
 
 /** A table to translate Rx completion flags to packet type. */
-uint32_t mlx4_ptype_table[0x100] __rte_cache_aligned = {
+alignas(RTE_CACHE_LINE_SIZE) uint32_t mlx4_ptype_table[0x100] = {
 	/*
 	 * The index to the array should have:
 	 *  bit[7] - MLX4_CQE_L2_TUNNEL
-- 
1.8.3.1

[PATCH v2 23/83] net/mvpp2: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/mvpp2/mrvl_ethdev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/mvpp2/mrvl_ethdev.h b/drivers/net/mvpp2/mrvl_ethdev.h
index 3b69a6e..178b510 100644
--- a/drivers/net/mvpp2/mrvl_ethdev.h
+++ b/drivers/net/mvpp2/mrvl_ethdev.h
@@ -147,10 +147,10 @@ struct mrvl_priv {
 	uint16_t bpool_init_size; /**< Configured BPool size  */
 
 	/** Mapping for DPDK rx queue->(TC, MRVL relative inq) */
-	struct {
+	alignas(RTE_CACHE_LINE_SIZE) struct {
 		uint8_t tc;  /**< Traffic Class */
 		uint8_t inq; /**< Relative in-queue number */
-	} rxq_map[MRVL_PP2_RXQ_MAX] __rte_cache_aligned;
+	} rxq_map[MRVL_PP2_RXQ_MAX];
 
 	/* Configuration data, used sporadically. */
 	uint8_t pp_id;
-- 
1.8.3.1

[PATCH v2 24/83] net/netvsc: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/netvsc/hn_var.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/netvsc/hn_var.h b/drivers/net/netvsc/hn_var.h
index ba86129..0f638bc 100644
--- a/drivers/net/netvsc/hn_var.h
+++ b/drivers/net/netvsc/hn_var.h
@@ -94,12 +94,12 @@ struct hn_rx_queue {
 
 
 /* multi-packet data from host */
-struct hn_rx_bufinfo {
+struct __rte_cache_aligned hn_rx_bufinfo {
 	struct vmbus_channel *chan;
 	struct hn_rx_queue *rxq;
 	uint64_t	xactid;
 	struct rte_mbuf_ext_shared_info shinfo;
-} __rte_cache_aligned;
+};
 
 #define HN_INVALID_PORT	UINT16_MAX
 
-- 
1.8.3.1

[PATCH v2 25/83] net/nfp: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/nfp/flower/nfp_flower_flow.c | 4 ++--
 drivers/net/nfp/nfp_ipsec.h              | 4 ++--
 drivers/net/nfp/nfp_rxtx.h               | 8 ++++----
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/nfp/flower/nfp_flower_flow.c b/drivers/net/nfp/flower/nfp_flower_flow.c
index 086cc80..26ee920 100644
--- a/drivers/net/nfp/flower/nfp_flower_flow.c
+++ b/drivers/net/nfp/flower/nfp_flower_flow.c
@@ -141,11 +141,11 @@ struct nfp_mask_id_entry {
 	uint8_t mask_id;
 };
 
-struct nfp_pre_tun_entry {
+struct __rte_aligned(32) nfp_pre_tun_entry {
 	uint16_t mac_index;
 	uint16_t ref_cnt;
 	struct rte_ether_addr mac_addr;
-} __rte_aligned(32);
+};
 
 static inline struct nfp_flow_priv *
 nfp_flow_dev_to_priv(struct rte_eth_dev *dev)
diff --git a/drivers/net/nfp/nfp_ipsec.h b/drivers/net/nfp/nfp_ipsec.h
index 8fdb7fd..29ca27d 100644
--- a/drivers/net/nfp/nfp_ipsec.h
+++ b/drivers/net/nfp/nfp_ipsec.h
@@ -142,7 +142,7 @@ struct nfp_ipsec_msg {
 	};
 };
 
-struct nfp_ipsec_session {
+struct __rte_cache_aligned nfp_ipsec_session {
 	/** Opaque user defined data */
 	void *user_data;
 	/** NFP sa_entries database parameter index */
@@ -155,7 +155,7 @@ struct nfp_ipsec_session {
 	struct rte_security_ipsec_xform ipsec;
 	/** Security session action type */
 	enum rte_security_session_action_type action;
-} __rte_cache_aligned;
+};
 
 struct nfp_net_ipsec_data {
 	int pkt_dynfield_offset;
diff --git a/drivers/net/nfp/nfp_rxtx.h b/drivers/net/nfp/nfp_rxtx.h
index 6ecabc2..344005e 100644
--- a/drivers/net/nfp/nfp_rxtx.h
+++ b/drivers/net/nfp/nfp_rxtx.h
@@ -27,7 +27,7 @@ struct nfp_tx_ipsec_desc_msg {
 	} esn;                  /**< Extended Sequence Number */
 };
 
-struct nfp_net_txq {
+struct __rte_aligned(64) nfp_net_txq {
 	/** Backpointer to nfp_net structure */
 	struct nfp_net_hw *hw;
 
@@ -77,7 +77,7 @@ struct nfp_net_txq {
 	 * in a cache line.
 	 */
 	uint64_t dma;
-} __rte_aligned(64);
+};
 
 /* RX and freelist descriptor format */
 #define PCIE_DESC_RX_DD                 (1 << 7)
@@ -129,7 +129,7 @@ struct nfp_net_rx_desc {
 	};
 };
 
-struct nfp_net_rxq {
+struct __rte_aligned(64) nfp_net_rxq {
 	/** Backpointer to nfp_net structure */
 	struct nfp_net_hw *hw;
 
@@ -197,7 +197,7 @@ struct nfp_net_rxq {
 
 	/** DMA address of the queue */
 	uint64_t dma;
-} __rte_aligned(64);
+};
 
 static inline void
 nfp_net_mbuf_alloc_failed(struct nfp_net_rxq *rxq)
-- 
1.8.3.1

[PATCH v2 26/83] net/ngbe: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/ngbe/ngbe_ptypes.c | 2 +-
 drivers/net/ngbe/ngbe_rxtx.c   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ngbe/ngbe_ptypes.c b/drivers/net/ngbe/ngbe_ptypes.c
index d823982..d633dbc 100644
--- a/drivers/net/ngbe/ngbe_ptypes.c
+++ b/drivers/net/ngbe/ngbe_ptypes.c
@@ -36,7 +36,7 @@
 #define RTE_PTYPE_INNER_L3_NONE         0
 #define RTE_PTYPE_INNER_L4_NONE         0
 
-static u32 ngbe_ptype_lookup[NGBE_PTID_MAX] __rte_cache_aligned = {
+static alignas(RTE_CACHE_LINE_SIZE) u32 ngbe_ptype_lookup[NGBE_PTID_MAX] = {
 	/* L2:0-3 L3:4-7 L4:8-11 TUN:12-15 EL2:16-19 EL3:20-23 EL2:24-27 */
 	/* L2: ETH */
 	TPTE(0x10, ETHER,          NONE, NONE, NONE, NONE, NONE, NONE),
diff --git a/drivers/net/ngbe/ngbe_rxtx.c b/drivers/net/ngbe/ngbe_rxtx.c
index 8a873b8..4aea70b 100644
--- a/drivers/net/ngbe/ngbe_rxtx.c
+++ b/drivers/net/ngbe/ngbe_rxtx.c
@@ -872,7 +872,7 @@
 static inline uint64_t
 ngbe_rxd_pkt_info_to_pkt_flags(uint32_t pkt_info)
 {
-	static uint64_t ip_rss_types_map[16] __rte_cache_aligned = {
+	static alignas(RTE_CACHE_LINE_SIZE) uint64_t ip_rss_types_map[16] = {
 		0, RTE_MBUF_F_RX_RSS_HASH, RTE_MBUF_F_RX_RSS_HASH, RTE_MBUF_F_RX_RSS_HASH,
 		0, RTE_MBUF_F_RX_RSS_HASH, 0, RTE_MBUF_F_RX_RSS_HASH,
 		RTE_MBUF_F_RX_RSS_HASH, 0, 0, 0,
-- 
1.8.3.1

[PATCH v2 27/83] net/octeontx: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/octeontx/octeontx_ethdev.c |  4 ++--
 drivers/net/octeontx/octeontx_ethdev.h | 12 ++++++------
 drivers/net/octeontx/octeontx_rxtx.h   |  2 +-
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/net/octeontx/octeontx_ethdev.c b/drivers/net/octeontx/octeontx_ethdev.c
index bec54fd..e397136 100644
--- a/drivers/net/octeontx/octeontx_ethdev.c
+++ b/drivers/net/octeontx/octeontx_ethdev.c
@@ -36,9 +36,9 @@
 #define OCTEONTX_QLM_MODE_SGMII  7
 #define OCTEONTX_QLM_MODE_XFI   12
 
-struct evdev_priv_data {
+struct __rte_cache_aligned evdev_priv_data {
 	OFFLOAD_FLAGS; /*Sequence should not be changed */
-} __rte_cache_aligned;
+};
 
 struct octeontx_vdev_init_params {
 	uint8_t	nr_port;
diff --git a/drivers/net/octeontx/octeontx_ethdev.h b/drivers/net/octeontx/octeontx_ethdev.h
index 7e04fad..efd6cf5 100644
--- a/drivers/net/octeontx/octeontx_ethdev.h
+++ b/drivers/net/octeontx/octeontx_ethdev.h
@@ -105,7 +105,7 @@ struct octeontx_fc_info {
 };
 
 /* Octeontx ethdev nic */
-struct octeontx_nic {
+struct __rte_cache_aligned octeontx_nic {
 	struct rte_eth_dev *dev;
 	int node;
 	int port_id;
@@ -145,15 +145,15 @@ struct octeontx_nic {
 	int print_flag;
 	struct octeontx_fc_info fc;
 	bool reconfigure;
-} __rte_cache_aligned;
+};
 
-struct octeontx_txq {
+struct __rte_cache_aligned octeontx_txq {
 	uint16_t queue_id;
 	octeontx_dq_t dq;
 	struct rte_eth_dev *eth_dev;
-} __rte_cache_aligned;
+};
 
-struct octeontx_rxq {
+struct __rte_cache_aligned octeontx_rxq {
 	uint16_t queue_id;
 	uint16_t port_id;
 	uint8_t evdev;
@@ -161,7 +161,7 @@ struct octeontx_rxq {
 	uint16_t ev_queues;
 	uint16_t ev_ports;
 	struct rte_mempool *pool;
-} __rte_cache_aligned;
+};
 
 void
 octeontx_set_tx_function(struct rte_eth_dev *dev);
diff --git a/drivers/net/octeontx/octeontx_rxtx.h b/drivers/net/octeontx/octeontx_rxtx.h
index b6e3515..cd581f5 100644
--- a/drivers/net/octeontx/octeontx_rxtx.h
+++ b/drivers/net/octeontx/octeontx_rxtx.h
@@ -71,7 +71,7 @@ struct octeontx_send_hdr_s {
 	union octeontx_send_hdr_w1_u w1;
 };
 
-static const uint32_t __rte_cache_aligned
+static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
 ptype_table[PTYPE_SIZE][PTYPE_SIZE][PTYPE_SIZE] = {
 	[LC_NONE][LE_NONE][LF_NONE] = RTE_PTYPE_UNKNOWN,
 	[LC_NONE][LE_NONE][LF_IPSEC_ESP] = RTE_PTYPE_UNKNOWN,
-- 
1.8.3.1

[PATCH v2 28/83] net/pfe: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/pfe/base/pfe.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/pfe/base/pfe.h b/drivers/net/pfe/base/pfe.h
index b9cf682..a97c47f 100644
--- a/drivers/net/pfe/base/pfe.h
+++ b/drivers/net/pfe/base/pfe.h
@@ -209,7 +209,7 @@ enum {
 #define UTIL_MASK	BIT(UTIL_ID)
 #endif
 
-struct pe_status {
+struct __rte_aligned(16) pe_status {
 	u32	cpu_state;
 	u32	activity_counter;
 	u32	rx;
@@ -222,7 +222,7 @@ struct pe_status {
 	u32	debug_indicator;
 	u32	debug[16];
 #endif
-} __rte_aligned(16);
+};
 
 struct pe_sync_mailbox {
 	u32 stop;
-- 
1.8.3.1

[PATCH v2 29/83] net/qede: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/qede/qede_rxtx.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index c35585f..ede5fc8 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ b/drivers/net/qede/qede_rxtx.c
@@ -38,7 +38,7 @@ static inline int qede_alloc_rx_buffer(struct qede_rx_queue *rxq)
 
 static inline int qede_alloc_rx_bulk_mbufs(struct qede_rx_queue *rxq, int count)
 {
-	void *obj_p[QEDE_MAX_BULK_ALLOC_COUNT] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *obj_p[QEDE_MAX_BULK_ALLOC_COUNT];
 	struct rte_mbuf *mbuf = NULL;
 	struct eth_rx_bd *rx_bd;
 	dma_addr_t mapping;
@@ -1124,8 +1124,8 @@ static inline uint32_t qede_rx_cqe_to_pkt_type_inner(uint16_t flags)
 	uint16_t val;
 
 	/* Lookup table */
-	static const uint32_t
-	ptype_lkup_tbl[QEDE_PKT_TYPE_MAX] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+	ptype_lkup_tbl[QEDE_PKT_TYPE_MAX] = {
 		[QEDE_PKT_TYPE_IPV4] = RTE_PTYPE_INNER_L3_IPV4		|
 				       RTE_PTYPE_INNER_L2_ETHER,
 		[QEDE_PKT_TYPE_IPV6] = RTE_PTYPE_INNER_L3_IPV6		|
@@ -1197,8 +1197,8 @@ static inline uint32_t qede_rx_cqe_to_pkt_type(uint16_t flags)
 	uint16_t val;
 
 	/* Lookup table */
-	static const uint32_t
-	ptype_lkup_tbl[QEDE_PKT_TYPE_MAX] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+	ptype_lkup_tbl[QEDE_PKT_TYPE_MAX] = {
 		[QEDE_PKT_TYPE_IPV4] = RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L2_ETHER,
 		[QEDE_PKT_TYPE_IPV6] = RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L2_ETHER,
 		[QEDE_PKT_TYPE_IPV4_TCP] = RTE_PTYPE_L3_IPV4	|
@@ -1398,8 +1398,8 @@ static inline uint32_t qede_rx_cqe_to_tunn_pkt_type(uint16_t flags)
 	uint32_t val;
 
 	/* Lookup table */
-	static const uint32_t
-	ptype_tunn_lkup_tbl[QEDE_PKT_TYPE_TUNN_MAX_TYPE] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint32_t
+	ptype_tunn_lkup_tbl[QEDE_PKT_TYPE_TUNN_MAX_TYPE] = {
 		[QEDE_PKT_TYPE_UNKNOWN] = RTE_PTYPE_UNKNOWN,
 		[QEDE_PKT_TYPE_TUNN_GENEVE] = RTE_PTYPE_TUNNEL_GENEVE,
 		[QEDE_PKT_TYPE_TUNN_GRE] = RTE_PTYPE_TUNNEL_GRE,
-- 
1.8.3.1

[PATCH v2 30/83] net/softnic: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/softnic/rte_eth_softnic_internals.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/softnic/rte_eth_softnic_internals.h b/drivers/net/softnic/rte_eth_softnic_internals.h
index a1c2309..d3975da 100644
--- a/drivers/net/softnic/rte_eth_softnic_internals.h
+++ b/drivers/net/softnic/rte_eth_softnic_internals.h
@@ -123,7 +123,7 @@ struct softnic_thread {
 /**
  * Data plane threads: context
  */
-struct softnic_thread_data {
+struct __rte_cache_aligned softnic_thread_data {
 	struct rte_swx_pipeline *p[THREAD_PIPELINES_MAX];
 	uint32_t n_pipelines;
 
@@ -132,7 +132,7 @@ struct softnic_thread_data {
 	uint64_t timer_period; /* Measured in CPU cycles. */
 	uint64_t time_next;
 	uint64_t iter;
-} __rte_cache_aligned;
+};
 
 /**
  * PMD Internals
-- 
1.8.3.1

[PATCH v2 31/83] net/tap: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/tap/tap_bpf.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/tap/tap_bpf.h b/drivers/net/tap/tap_bpf.h
index 0d38bc1..d843792 100644
--- a/drivers/net/tap/tap_bpf.h
+++ b/drivers/net/tap/tap_bpf.h
@@ -50,7 +50,7 @@ enum bpf_map_type {
 };
 
 /* union of anonymous structs used with TAP BPF commands */
-union bpf_attr {
+union __rte_aligned(8) bpf_attr {
 	/* BPF_MAP_CREATE command */
 	struct {
 		__u32	map_type;
@@ -84,7 +84,7 @@ enum bpf_map_type {
 		__u32		kern_version;
 		__u32		prog_flags;
 	};
-} __rte_aligned(8);
+};
 
 #ifndef __NR_bpf
 # if defined(__i386__)
-- 
1.8.3.1

[PATCH v2 32/83] net/thunderx: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/thunderx/nicvf_rxtx.c   |  8 ++++----
 drivers/net/thunderx/nicvf_struct.h | 16 ++++++++--------
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/net/thunderx/nicvf_rxtx.c b/drivers/net/thunderx/nicvf_rxtx.c
index defa551..74f43b9 100644
--- a/drivers/net/thunderx/nicvf_rxtx.c
+++ b/drivers/net/thunderx/nicvf_rxtx.c
@@ -76,7 +76,7 @@
 	uint32_t curr_head;
 	uint32_t head = sq->head;
 	struct rte_mbuf **txbuffs = sq->txbuffs;
-	void *obj_p[NICVF_MAX_TX_FREE_THRESH] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *obj_p[NICVF_MAX_TX_FREE_THRESH];
 
 	curr_head = nicvf_addr_read(sq->sq_head) >> 4;
 	while (head != curr_head) {
@@ -239,7 +239,7 @@
 	return i;
 }
 
-static const uint32_t ptype_table[16][16] __rte_cache_aligned = {
+static const alignas(RTE_CACHE_LINE_SIZE) uint32_t ptype_table[16][16] = {
 	[L3_NONE][L4_NONE] = RTE_PTYPE_UNKNOWN,
 	[L3_NONE][L4_IPSEC_ESP] = RTE_PTYPE_UNKNOWN,
 	[L3_NONE][L4_IPFRAG] = RTE_PTYPE_L4_FRAG,
@@ -342,7 +342,7 @@
 static inline uint64_t __rte_hot
 nicvf_set_olflags(const cqe_rx_word0_t cqe_rx_w0)
 {
-	static const uint64_t flag_table[3] __rte_cache_aligned = {
+	static const alignas(RTE_CACHE_LINE_SIZE) uint64_t flag_table[3] = {
 		RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_GOOD,
 		RTE_MBUF_F_RX_IP_CKSUM_BAD | RTE_MBUF_F_RX_L4_CKSUM_UNKNOWN,
 		RTE_MBUF_F_RX_IP_CKSUM_GOOD | RTE_MBUF_F_RX_L4_CKSUM_BAD,
@@ -363,7 +363,7 @@
 	struct rbdr_entry_t *desc = rbdr->desc;
 	uint32_t qlen_mask = rbdr->qlen_mask;
 	uintptr_t door = rbdr->rbdr_door;
-	void *obj_p[NICVF_MAX_RX_FREE_THRESH] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *obj_p[NICVF_MAX_RX_FREE_THRESH];
 
 	if (unlikely(rte_mempool_get_bulk(rxq->pool, obj_p, to_fill) < 0)) {
 		rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed +=
diff --git a/drivers/net/thunderx/nicvf_struct.h b/drivers/net/thunderx/nicvf_struct.h
index 13cf8fe..cfcd942 100644
--- a/drivers/net/thunderx/nicvf_struct.h
+++ b/drivers/net/thunderx/nicvf_struct.h
@@ -14,7 +14,7 @@
 #include <ethdev_driver.h>
 #include <rte_memory.h>
 
-struct nicvf_rbdr {
+struct __rte_cache_aligned nicvf_rbdr {
 	uintptr_t rbdr_status;
 	uintptr_t rbdr_door;
 	struct rbdr_entry_t *desc;
@@ -24,9 +24,9 @@ struct nicvf_rbdr {
 	uint32_t next_tail;
 	uint32_t head;
 	uint32_t qlen_mask;
-} __rte_cache_aligned;
+};
 
-struct nicvf_txq {
+struct __rte_cache_aligned nicvf_txq {
 	union sq_entry_t *desc;
 	nicvf_iova_addr_t phys;
 	struct rte_mbuf **txbuffs;
@@ -42,7 +42,7 @@ struct nicvf_txq {
 	uint64_t offloads;
 	uint16_t queue_id;
 	uint16_t tx_free_thresh;
-} __rte_cache_aligned;
+};
 
 union mbuf_initializer {
 	struct {
@@ -54,7 +54,7 @@ struct nicvf_txq {
 	uint64_t value;
 };
 
-struct nicvf_rxq {
+struct __rte_cache_aligned nicvf_rxq {
 	RTE_MARKER rxq_fastpath_data_start;
 	uint8_t  rbptr_offset;
 	uint16_t rx_free_thresh;
@@ -76,9 +76,9 @@ struct nicvf_rxq {
 	uint16_t queue_id;
 	struct nicvf *nic;
 	nicvf_iova_addr_t phys;
-} __rte_cache_aligned;
+};
 
-struct nicvf {
+struct __rte_cache_aligned nicvf {
 	uint8_t vf_id;
 	uint8_t node;
 	uintptr_t reg_base;
@@ -111,7 +111,7 @@ struct nicvf {
 	uint8_t sqs_count;
 #define MAX_SQS_PER_VF 11
 	struct nicvf *snicvf[MAX_SQS_PER_VF];
-} __rte_cache_aligned;
+};
 
 struct change_link_mode {
 	bool	   enable;
-- 
1.8.3.1

[PATCH v2 33/83] net/txgbe: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/txgbe/txgbe_ipsec.h  |  4 ++--
 drivers/net/txgbe/txgbe_ptypes.c | 10 +++++-----
 drivers/net/txgbe/txgbe_rxtx.c   |  2 +-
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/txgbe/txgbe_ipsec.h b/drivers/net/txgbe/txgbe_ipsec.h
index 995e29e..e93f9a3 100644
--- a/drivers/net/txgbe/txgbe_ipsec.h
+++ b/drivers/net/txgbe/txgbe_ipsec.h
@@ -44,7 +44,7 @@ struct ipaddr {
 };
 
 /** inline crypto private session structure */
-struct txgbe_crypto_session {
+struct __rte_cache_aligned txgbe_crypto_session {
 	enum txgbe_operation op;
 	const uint8_t *key;
 	uint32_t key_len;
@@ -54,7 +54,7 @@ struct txgbe_crypto_session {
 	struct ipaddr src_ip;
 	struct ipaddr dst_ip;
 	struct rte_eth_dev *dev;
-} __rte_cache_aligned;
+};
 
 struct txgbe_crypto_rx_ip_table {
 	struct ipaddr ip;
diff --git a/drivers/net/txgbe/txgbe_ptypes.c b/drivers/net/txgbe/txgbe_ptypes.c
index c07977b..a8e7271 100644
--- a/drivers/net/txgbe/txgbe_ptypes.c
+++ b/drivers/net/txgbe/txgbe_ptypes.c
@@ -47,7 +47,7 @@
 #define RTE_PTYPE_INNER_L3_NONE         0
 #define RTE_PTYPE_INNER_L4_NONE         0
 
-static u32 txgbe_ptype_lookup[TXGBE_PTID_MAX] __rte_cache_aligned = {
+static alignas(RTE_CACHE_LINE_SIZE) u32 txgbe_ptype_lookup[TXGBE_PTID_MAX] = {
 	/* L2:0-3 L3:4-7 L4:8-11 TUN:12-15 EL2:16-19 EL3:20-23 EL2:24-27 */
 	/* L2: ETH */
 	TPTE(0x10, ETHER,          NONE, NONE, NONE, NONE, NONE, NONE),
@@ -393,8 +393,8 @@ u8 txgbe_encode_ptype(u32 ptype)
  * Use 2 different table for normal packet and tunnel packet
  * to save the space.
  */
-const u32
-txgbe_ptype_table[TXGBE_PTID_MAX] __rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) u32
+txgbe_ptype_table[TXGBE_PTID_MAX] = {
 	[TXGBE_PT_ETHER] = RTE_PTYPE_L2_ETHER,
 	[TXGBE_PT_IPV4] = RTE_PTYPE_L2_ETHER |
 		RTE_PTYPE_L3_IPV4,
@@ -478,8 +478,8 @@ u8 txgbe_encode_ptype(u32 ptype)
 		RTE_PTYPE_INNER_L3_IPV6_EXT | RTE_PTYPE_INNER_L4_SCTP,
 };
 
-const u32
-txgbe_ptype_table_tn[TXGBE_PTID_MAX] __rte_cache_aligned = {
+const alignas(RTE_CACHE_LINE_SIZE) u32
+txgbe_ptype_table_tn[TXGBE_PTID_MAX] = {
 	[TXGBE_PT_NVGRE] = RTE_PTYPE_L2_ETHER |
 		RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_TUNNEL_GRE |
 		RTE_PTYPE_INNER_L2_ETHER,
diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 1cd4b25..2568bf0 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -1107,7 +1107,7 @@
 static inline uint64_t
 txgbe_rxd_pkt_info_to_pkt_flags(uint32_t pkt_info)
 {
-	static uint64_t ip_rss_types_map[16] __rte_cache_aligned = {
+	static alignas(RTE_CACHE_LINE_SIZE) uint64_t ip_rss_types_map[16] = {
 		0, RTE_MBUF_F_RX_RSS_HASH, RTE_MBUF_F_RX_RSS_HASH, RTE_MBUF_F_RX_RSS_HASH,
 		0, RTE_MBUF_F_RX_RSS_HASH, 0, RTE_MBUF_F_RX_RSS_HASH,
 		RTE_MBUF_F_RX_RSS_HASH, 0, 0, 0,
-- 
1.8.3.1

[PATCH v2 34/83] net/virtio: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/net/virtio/virtqueue.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/virtio/virtqueue.h b/drivers/net/virtio/virtqueue.h
index 5d0c039..75d70f1 100644
--- a/drivers/net/virtio/virtqueue.h
+++ b/drivers/net/virtio/virtqueue.h
@@ -261,11 +261,11 @@ struct virtio_net_hdr_mrg_rxbuf {
 #define VIRTIO_MAX_TX_INDIRECT 8
 struct virtio_tx_region {
 	struct virtio_net_hdr_mrg_rxbuf tx_hdr;
-	union {
+	union __rte_aligned(16) {
 		struct vring_desc tx_indir[VIRTIO_MAX_TX_INDIRECT];
 		struct vring_packed_desc
 			tx_packed_indir[VIRTIO_MAX_TX_INDIRECT];
-	} __rte_aligned(16);
+	};
 };
 
 static inline int
-- 
1.8.3.1

[PATCH v2 35/83] vdpa/mlx5: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/vdpa/mlx5/mlx5_vdpa.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/vdpa/mlx5/mlx5_vdpa.h b/drivers/vdpa/mlx5/mlx5_vdpa.h
index 7b37c98..4ce6977 100644
--- a/drivers/vdpa/mlx5/mlx5_vdpa.h
+++ b/drivers/vdpa/mlx5/mlx5_vdpa.h
@@ -90,13 +90,13 @@ enum mlx5_vdpa_task_type {
 };
 
 /* Generic task information and size must be multiple of 4B. */
-struct mlx5_vdpa_task {
+struct __rte_aligned(4) mlx5_vdpa_task {
 	struct mlx5_vdpa_priv *priv;
 	enum mlx5_vdpa_task_type type;
 	uint32_t *remaining_cnt;
 	uint32_t *err_cnt;
 	uint32_t idx;
-} __rte_packed __rte_aligned(4);
+} __rte_packed;
 
 /* Generic mlx5_vdpa_c_thread information. */
 struct mlx5_vdpa_c_thread {
-- 
1.8.3.1

[PATCH v2 36/83] regex/cn9k: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/regex/cn9k/cn9k_regexdev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/regex/cn9k/cn9k_regexdev.h b/drivers/regex/cn9k/cn9k_regexdev.h
index c715502..e24a800 100644
--- a/drivers/regex/cn9k/cn9k_regexdev.h
+++ b/drivers/regex/cn9k/cn9k_regexdev.h
@@ -21,7 +21,7 @@
 /**
  * Device private data
  */
-struct cn9k_ree_data {
+struct __rte_cache_aligned cn9k_ree_data {
 	uint32_t regexdev_capa;
 	uint64_t rule_flags;
 	/**< Feature flags exposes HW/SW features for the given device */
@@ -39,6 +39,6 @@ struct cn9k_ree_data {
 	/**< rules to be compiled */
 	uint16_t nb_rules;
 	/**< number of rules */
-} __rte_cache_aligned;
+};
 
 #endif /* _CN9K_REGEXDEV_H_ */
-- 
1.8.3.1

[PATCH v2 37/83] raw/ntb: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/raw/ntb/ntb.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/raw/ntb/ntb.h b/drivers/raw/ntb/ntb.h
index a30a6b6..563cedd 100644
--- a/drivers/raw/ntb/ntb.h
+++ b/drivers/raw/ntb/ntb.h
@@ -186,9 +186,9 @@ struct ntb_tx_queue {
 };
 
 struct ntb_header {
-	uint16_t avail_cnt __rte_cache_aligned;
-	uint16_t used_cnt __rte_cache_aligned;
-	struct ntb_desc desc_ring[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t avail_cnt;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t used_cnt;
+	alignas(RTE_CACHE_LINE_SIZE) struct ntb_desc desc_ring[];
 };
 
 /* ntb private data. */
-- 
1.8.3.1

[PATCH v2 38/83] ml/cnxk: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/ml/cnxk/cnxk_ml_ops.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/ml/cnxk/cnxk_ml_ops.h b/drivers/ml/cnxk/cnxk_ml_ops.h
index 7b49793..e348cc4 100644
--- a/drivers/ml/cnxk/cnxk_ml_ops.h
+++ b/drivers/ml/cnxk/cnxk_ml_ops.h
@@ -19,7 +19,7 @@
 #endif
 
 /* Request structure */
-struct cnxk_ml_req {
+struct __rte_aligned(ROC_ALIGN) cnxk_ml_req {
 	/* Device specific request */
 	union {
 		/* CN10K */
@@ -39,7 +39,7 @@ struct cnxk_ml_req {
 
 	/* Op */
 	struct rte_ml_op *op;
-} __rte_aligned(ROC_ALIGN);
+};
 
 /* Request queue */
 struct cnxk_ml_queue {
-- 
1.8.3.1

[PATCH v2 39/83] mempool/cnxk: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/mempool/cnxk/cn10k_mempool_ops.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mempool/cnxk/cn10k_mempool_ops.c b/drivers/mempool/cnxk/cn10k_mempool_ops.c
index 2a5aad0..a5be0cc 100644
--- a/drivers/mempool/cnxk/cn10k_mempool_ops.c
+++ b/drivers/mempool/cnxk/cn10k_mempool_ops.c
@@ -21,13 +21,13 @@ enum batch_op_status {
 struct batch_op_mem {
 	unsigned int sz;
 	enum batch_op_status status;
-	uint64_t objs[BATCH_ALLOC_SZ] __rte_aligned(ROC_ALIGN);
+	alignas(ROC_ALIGN) uint64_t objs[BATCH_ALLOC_SZ];
 };
 
 struct batch_op_data {
 	uint64_t lmt_addr;
 	uint32_t max_async_batch;
-	struct batch_op_mem mem[RTE_MAX_LCORE] __rte_aligned(ROC_ALIGN);
+	alignas(ROC_ALIGN) struct batch_op_mem mem[RTE_MAX_LCORE];
 };
 
 static struct batch_op_data **batch_op_data_tbl;
-- 
1.8.3.1

[PATCH v2 40/83] event/sw: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/event/sw/event_ring.h |  2 +-
 drivers/event/sw/iq_chunk.h   |  4 ++--
 drivers/event/sw/sw_evdev.h   | 18 +++++++++---------
 3 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/event/sw/event_ring.h b/drivers/event/sw/event_ring.h
index 2b86ca9..29db267 100644
--- a/drivers/event/sw/event_ring.h
+++ b/drivers/event/sw/event_ring.h
@@ -27,7 +27,7 @@ struct rob_ring {
 	uint32_t size;
 	uint32_t write_idx;
 	uint32_t read_idx;
-	void *ring[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *ring[0];
 };
 
 static inline struct rob_ring *
diff --git a/drivers/event/sw/iq_chunk.h b/drivers/event/sw/iq_chunk.h
index 31d013e..7a7a878 100644
--- a/drivers/event/sw/iq_chunk.h
+++ b/drivers/event/sw/iq_chunk.h
@@ -11,10 +11,10 @@
 
 #define IQ_ROB_NAMESIZE 12
 
-struct sw_queue_chunk {
+struct __rte_cache_aligned sw_queue_chunk {
 	struct rte_event events[SW_EVS_PER_Q_CHUNK];
 	struct sw_queue_chunk *next;
-} __rte_cache_aligned;
+};
 
 static __rte_always_inline bool
 iq_empty(struct sw_iq *iq)
diff --git a/drivers/event/sw/sw_evdev.h b/drivers/event/sw/sw_evdev.h
index c7b943a..c6e649c 100644
--- a/drivers/event/sw/sw_evdev.h
+++ b/drivers/event/sw/sw_evdev.h
@@ -170,14 +170,14 @@ struct sw_port {
 	int16_t num_ordered_qids;
 
 	/** Ring and buffer for pulling events from workers for scheduling */
-	struct rte_event_ring *rx_worker_ring __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event_ring *rx_worker_ring;
 	/** Ring and buffer for pushing packets to workers after scheduling */
 	struct rte_event_ring *cq_worker_ring;
 
 	/* hole */
 
 	/* num releases yet to be completed on this port */
-	uint16_t outstanding_releases __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t outstanding_releases;
 	uint16_t inflight_max; /* app requested max inflights for this port */
 	uint16_t inflight_credits; /* num credits this port has right now */
 	uint8_t implicit_release; /* release events before dequeuing */
@@ -191,7 +191,7 @@ struct sw_port {
 		/* bucket values in 4s for shorter reporting */
 
 	/* History list structs, containing info on pkts egressed to worker */
-	uint16_t hist_head __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t hist_head;
 	uint16_t hist_tail;
 	uint16_t inflights;
 	struct sw_hist_list_entry hist_list[SW_PORT_HIST_LIST];
@@ -221,7 +221,7 @@ struct sw_evdev {
 	uint32_t xstats_count_mode_queue;
 
 	/* Minimum burst size*/
-	uint32_t sched_min_burst_size __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t sched_min_burst_size;
 	/* Port dequeue burst size*/
 	uint32_t sched_deq_burst_size;
 	/* Refill pp buffers only once per scheduler call*/
@@ -231,9 +231,9 @@ struct sw_evdev {
 	uint32_t sched_min_burst;
 
 	/* Contains all ports - load balanced and directed */
-	struct sw_port ports[SW_PORTS_MAX] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct sw_port ports[SW_PORTS_MAX];
 
-	rte_atomic32_t inflights __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) rte_atomic32_t inflights;
 
 	/*
 	 * max events in this instance. Cached here for performance.
@@ -242,18 +242,18 @@ struct sw_evdev {
 	uint32_t nb_events_limit;
 
 	/* Internal queues - one per logical queue */
-	struct sw_qid qids[RTE_EVENT_MAX_QUEUES_PER_DEV] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct sw_qid qids[RTE_EVENT_MAX_QUEUES_PER_DEV];
 	struct sw_queue_chunk *chunk_list_head;
 	struct sw_queue_chunk *chunks;
 
 	/* Cache how many packets are in each cq */
-	uint16_t cq_ring_space[SW_PORTS_MAX] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint16_t cq_ring_space[SW_PORTS_MAX];
 
 	/* Array of pointers to load-balanced QIDs sorted by priority level */
 	struct sw_qid *qids_prioritized[RTE_EVENT_MAX_QUEUES_PER_DEV];
 
 	/* Stats */
-	struct sw_point_stats stats __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct sw_point_stats stats;
 	uint64_t sched_called;
 	int32_t sched_quanta;
 	uint64_t sched_no_iq_enqueues;
-- 
1.8.3.1

[PATCH v2 41/83] event/skeleton: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/event/skeleton/skeleton_eventdev.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/event/skeleton/skeleton_eventdev.h b/drivers/event/skeleton/skeleton_eventdev.h
index 9c1ed4e..283342a 100644
--- a/drivers/event/skeleton/skeleton_eventdev.h
+++ b/drivers/event/skeleton/skeleton_eventdev.h
@@ -24,17 +24,17 @@
 	rte_log(RTE_LOG_ERR, skeleton_eventdev_logtype, \
 		"%s(): " fmt "\n", __func__, ## args)
 
-struct skeleton_eventdev {
+struct __rte_cache_aligned skeleton_eventdev {
 	uintptr_t reg_base;
 	uint16_t device_id;
 	uint16_t vendor_id;
 	uint16_t subsystem_device_id;
 	uint16_t subsystem_vendor_id;
-} __rte_cache_aligned;
+};
 
-struct skeleton_port {
+struct __rte_cache_aligned skeleton_port {
 	uint8_t port_id;
-} __rte_cache_aligned;
+};
 
 static inline struct skeleton_eventdev *
 skeleton_pmd_priv(const struct rte_eventdev *eventdev)
-- 
1.8.3.1

[PATCH v2 42/83] event/opdl: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/event/opdl/opdl_evdev.h |  6 +++---
 drivers/event/opdl/opdl_ring.c  | 19 +++++++++----------
 2 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/drivers/event/opdl/opdl_evdev.h b/drivers/event/opdl/opdl_evdev.h
index 1ca166b..176990e 100644
--- a/drivers/event/opdl/opdl_evdev.h
+++ b/drivers/event/opdl/opdl_evdev.h
@@ -234,15 +234,15 @@ struct opdl_evdev {
 	uint32_t nb_q_md;
 
 	/* Internal queues - one per logical queue */
-	struct opdl_queue
-		queue[RTE_EVENT_MAX_QUEUES_PER_DEV] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct opdl_queue
+		queue[RTE_EVENT_MAX_QUEUES_PER_DEV];
 
 	uint32_t nb_queues;
 
 	struct opdl_stage_meta_data s_md[OPDL_PORTS_MAX];
 
 	/* Contains all ports - load balanced and directed */
-	struct opdl_port ports[OPDL_PORTS_MAX] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct opdl_port ports[OPDL_PORTS_MAX];
 	uint32_t nb_ports;
 
 	uint8_t q_map_ex_to_in[OPDL_INVALID_QID];
diff --git a/drivers/event/opdl/opdl_ring.c b/drivers/event/opdl/opdl_ring.c
index da5ea02..e87ffd5 100644
--- a/drivers/event/opdl/opdl_ring.c
+++ b/drivers/event/opdl/opdl_ring.c
@@ -43,7 +43,7 @@ enum dep_type {
  * Care is needed when accessing and the layout is important, especially to
  * limit the adjacent cache-line HW prefetcher from impacting performance.
  */
-struct shared_state {
+struct __rte_cache_aligned shared_state {
 	/* Last known minimum sequence number of dependencies, used for multi
 	 * thread operation
 	 */
@@ -54,7 +54,7 @@ struct shared_state {
 	struct opdl_stage *stage;  /* back pointer */
 	uint32_t tail;  /* Tail sequence number */
 	char _pad3[RTE_CACHE_LINE_SIZE * 2];
-} __rte_cache_aligned;
+};
 
 /* A structure to keep track of "unfinished" claims. This is only used for
  * stages that are threadsafe. Each lcore accesses its own instance of this
@@ -63,7 +63,7 @@ struct shared_state {
  * forward the shared tail when the shared tail matches the tail value recorded
  * here.
  */
-struct claim_manager {
+struct __rte_cache_aligned claim_manager {
 	uint32_t num_to_disclaim;
 	uint32_t num_claimed;
 	uint32_t mgr_head;
@@ -72,13 +72,13 @@ struct claim_manager {
 		uint32_t head;
 		uint32_t tail;
 	} claims[OPDL_DISCLAIMS_PER_LCORE];
-} __rte_cache_aligned;
+};
 
 /* Context for each stage of opdl_ring.
  * Calculations on sequence numbers need to be done with other uint32_t values
  * so that results are modulus 2^32, and not undefined.
  */
-struct opdl_stage {
+struct __rte_cache_aligned opdl_stage {
 	struct opdl_ring *t;  /* back pointer, set at init */
 	uint32_t num_slots;  /* Number of slots for entries, set at init */
 	uint32_t index;  /* ID for this stage, set at init */
@@ -99,14 +99,13 @@ struct opdl_stage {
 	/* Direct dependencies of this stage */
 	struct shared_state **deps;
 	/* Other stages read this! */
-	struct shared_state shared __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct shared_state shared;
 	/* For managing disclaims in multi-threaded processing stages */
-	struct claim_manager pending_disclaims[RTE_MAX_LCORE]
-					       __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct claim_manager pending_disclaims[RTE_MAX_LCORE];
 	uint32_t shadow_head;  /* Shadow head for single-thread operation */
 	uint32_t queue_id;     /* ID of Queue which is assigned to this stage */
 	uint32_t pos;		/* Atomic scan position */
-} __rte_cache_aligned;
+};
 
 /* Context for opdl_ring */
 struct opdl_ring {
@@ -120,7 +119,7 @@ struct opdl_ring {
 	/* Stages indexed by ID */
 	struct opdl_stage *stages;
 	/* Memory for storing slot data */
-	uint8_t slots[0] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t slots[0];
 };
 
 
-- 
1.8.3.1

[PATCH v2 43/83] event/octeontx: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/event/octeontx/ssovf_evdev.h  | 8 ++++----
 drivers/event/octeontx/timvf_evdev.h  | 8 ++++----
 drivers/event/octeontx/timvf_worker.c | 2 +-
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 8a4cb20..293eb85 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -134,7 +134,7 @@ enum ssovf_type {
 	OCTEONTX_SSO_HWS,  /* SSO hardware workslot vf */
 };
 
-struct ssovf_evdev {
+struct __rte_cache_aligned ssovf_evdev {
 	OFFLOAD_FLAGS; /*Sequence should not be changed */
 	uint8_t max_event_queues;
 	uint8_t max_event_ports;
@@ -150,10 +150,10 @@ struct ssovf_evdev {
 	uint8_t *rxq_pool_rcnt;
 	uint16_t tim_ring_cnt;
 	uint16_t *tim_ring_ids;
-} __rte_cache_aligned;
+};
 
 /* Event port aka HWS */
-struct ssows {
+struct __rte_cache_aligned ssows {
 	uint8_t cur_tt;
 	uint8_t cur_grp;
 	uint8_t swtag_req;
@@ -162,7 +162,7 @@ struct ssows {
 	uint8_t *grps[SSO_MAX_VHGRP];
 	uint8_t port;
 	void *lookup_mem;
-} __rte_cache_aligned;
+};
 
 static inline struct ssovf_evdev *
 ssovf_pmd_priv(const struct rte_eventdev *eventdev)
diff --git a/drivers/event/octeontx/timvf_evdev.h b/drivers/event/octeontx/timvf_evdev.h
index cef02cd..e7a63e4 100644
--- a/drivers/event/octeontx/timvf_evdev.h
+++ b/drivers/event/octeontx/timvf_evdev.h
@@ -123,7 +123,7 @@ enum timvf_clk_src {
 };
 
 /* TIM_MEM_BUCKET */
-struct tim_mem_bucket {
+struct __rte_aligned(8) tim_mem_bucket {
 	uint64_t first_chunk;
 	union {
 		uint64_t w1;
@@ -139,7 +139,7 @@ struct tim_mem_bucket {
 	};
 	uint64_t current_chunk;
 	uint64_t pad;
-} __rte_packed __rte_aligned(8);
+} __rte_packed;
 
 struct tim_mem_entry {
 	uint64_t w0;
@@ -160,7 +160,7 @@ struct timvf_ctrl_reg {
 		struct tim_mem_bucket * const bkt,
 		struct timvf_ring * const timr);
 
-struct timvf_ring {
+struct __rte_cache_aligned timvf_ring {
 	bkt_id get_target_bkt;
 	refill_chunk refill_chunk;
 	struct rte_reciprocal_u64 fast_div;
@@ -178,7 +178,7 @@ struct timvf_ring {
 	uint64_t nb_timers;
 	enum timvf_clk_src clk_src;
 	uint16_t tim_ring_id;
-} __rte_cache_aligned;
+};
 
 static __rte_always_inline uint32_t
 bkt_mod(const uint32_t rel_bkt, const uint32_t nb_bkts)
diff --git a/drivers/event/octeontx/timvf_worker.c b/drivers/event/octeontx/timvf_worker.c
index 50790e1..feb7c4d 100644
--- a/drivers/event/octeontx/timvf_worker.c
+++ b/drivers/event/octeontx/timvf_worker.c
@@ -146,7 +146,7 @@
 	uint16_t idx;
 	uint16_t arr_idx = 0;
 	struct timvf_ring *timr = adptr->data->adapter_priv;
-	struct tim_mem_entry entry[TIMVF_MAX_BURST] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct tim_mem_entry entry[TIMVF_MAX_BURST];
 
 	if (unlikely(!timeout_tick || timeout_tick >= timr->nb_bkts)) {
 		const enum rte_event_timer_state state = timeout_tick ?
-- 
1.8.3.1

[PATCH v2 44/83] event/dsw: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/event/dsw/dsw_evdev.h | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/event/dsw/dsw_evdev.h b/drivers/event/dsw/dsw_evdev.h
index d745c89..3a5989f 100644
--- a/drivers/event/dsw/dsw_evdev.h
+++ b/drivers/event/dsw/dsw_evdev.h
@@ -131,7 +131,7 @@ enum dsw_migration_state {
 	DSW_MIGRATION_STATE_UNPAUSING
 };
 
-struct dsw_port {
+struct __rte_cache_aligned dsw_port {
 	uint16_t id;
 
 	/* Keeping a pointer here to avoid container_of() calls, which
@@ -222,22 +222,22 @@ struct dsw_port {
 	 */
 	struct rte_event in_buffer[DSW_MAX_EVENTS];
 
-	struct rte_event_ring *in_ring __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event_ring *in_ring;
 
-	struct rte_ring *ctl_in_ring __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_ring *ctl_in_ring;
 
 	/* Estimate of current port load. */
-	int16_t load __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int16_t load;
 	/* Estimate of flows currently migrating to this port. */
-	int32_t immigration_load __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int32_t immigration_load;
+};
 
 struct dsw_queue {
 	uint8_t schedule_type;
 	uint64_t serving_ports;
 	uint16_t num_serving_ports;
 
-	uint8_t flow_to_port_map[DSW_MAX_FLOWS] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t flow_to_port_map[DSW_MAX_FLOWS];
 };
 
 /* Limited by the size of the 'serving_ports' bitmask */
@@ -252,19 +252,19 @@ struct dsw_evdev {
 	uint8_t num_queues;
 	int32_t max_inflight;
 
-	int32_t credits_on_loan __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int32_t credits_on_loan;
 };
 
 #define DSW_CTL_PAUS_REQ (0)
 #define DSW_CTL_UNPAUS_REQ (1)
 #define DSW_CTL_CFM (2)
 
-struct dsw_ctl_msg {
+struct __rte_aligned(4) dsw_ctl_msg {
 	uint8_t type;
 	uint8_t originating_port_id;
 	uint8_t qfs_len;
 	struct dsw_queue_flow qfs[DSW_MAX_FLOWS_PER_MIGRATION];
-} __rte_aligned(4);
+};
 
 uint16_t dsw_event_enqueue(void *port, const struct rte_event *event);
 uint16_t dsw_event_enqueue_burst(void *port,
-- 
1.8.3.1

[PATCH v2 45/83] event/dlb2: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/event/dlb2/dlb2_priv.h | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h
index 31a3bee..49f1c66 100644
--- a/drivers/event/dlb2/dlb2_priv.h
+++ b/drivers/event/dlb2/dlb2_priv.h
@@ -429,13 +429,13 @@ enum dlb2_cos {
 	DLB2_COS_NUM_VALS
 };
 
-struct dlb2_hw_dev {
+struct __rte_cache_aligned dlb2_hw_dev {
 	struct dlb2_config cfg;
 	struct dlb2_hw_resource_info info;
 	void *pf_dev; /* opaque pointer to PF PMD dev (struct dlb2_dev) */
 	uint32_t domain_id;
 	rte_spinlock_t resource_lock; /* for MP support */
-} __rte_cache_aligned;
+};
 
 /* End HW related defines and structs */
 
@@ -516,13 +516,13 @@ struct dlb2_port_stats {
 	struct dlb2_queue_stats queue[DLB2_MAX_NUM_QUEUES_ALL];
 };
 
-struct dlb2_eventdev_port {
+struct __rte_cache_aligned dlb2_eventdev_port {
 	struct dlb2_port qm_port; /* hw specific data structure */
 	struct rte_event_port_conf conf; /* user-supplied configuration */
 	uint16_t inflight_credits; /* num credits this port has right now */
 	uint16_t credit_update_quanta;
 	struct dlb2_eventdev *dlb2; /* backlink optimization */
-	struct dlb2_port_stats stats __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct dlb2_port_stats stats;
 	struct dlb2_event_queue_link link[DLB2_MAX_NUM_QIDS_PER_LDB_CQ];
 	int num_links;
 	uint32_t id; /* port id */
@@ -539,7 +539,7 @@ struct dlb2_eventdev_port {
 	uint8_t implicit_release; /* release events before dequeuing */
 	uint32_t cq_weight; /* DLB2.5 and above ldb ports only */
 	int cos_id; /*ldb port class of service */
-}  __rte_cache_aligned;
+};
 
 struct dlb2_queue {
 	uint32_t num_qid_inflights; /* User config */
@@ -624,14 +624,14 @@ struct dlb2_eventdev {
 			uint16_t max_ldb_credits;
 			uint16_t max_dir_credits;
 			/* use __atomic builtins */ /* shared hw cred */
-			uint32_t ldb_credit_pool __rte_cache_aligned;
+			alignas(RTE_CACHE_LINE_SIZE) uint32_t ldb_credit_pool;
 			/* use __atomic builtins */ /* shared hw cred */
-			uint32_t dir_credit_pool __rte_cache_aligned;
+			alignas(RTE_CACHE_LINE_SIZE) uint32_t dir_credit_pool;
 		};
 		struct {
 			uint16_t max_credits;
 			/* use __atomic builtins */ /* shared hw cred */
-			uint32_t credit_pool __rte_cache_aligned;
+			alignas(RTE_CACHE_LINE_SIZE) uint32_t credit_pool;
 		};
 	};
 	uint32_t cos_ports[DLB2_COS_NUM_VALS]; /* total ldb ports in each class */
-- 
1.8.3.1

[PATCH v2 46/83] event/cnxk: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/event/cnxk/cn10k_eventdev.h  |  8 ++++----
 drivers/event/cnxk/cnxk_eventdev.h   | 24 ++++++++++++------------
 drivers/event/cnxk/cnxk_tim_evdev.h  |  4 ++--
 drivers/event/cnxk/cnxk_tim_worker.c |  2 +-
 4 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/event/cnxk/cn10k_eventdev.h b/drivers/event/cnxk/cn10k_eventdev.h
index e79b68e..3721214 100644
--- a/drivers/event/cnxk/cn10k_eventdev.h
+++ b/drivers/event/cnxk/cn10k_eventdev.h
@@ -8,7 +8,7 @@
 #define CN10K_SSO_DEFAULT_STASH_OFFSET -1
 #define CN10K_SSO_DEFAULT_STASH_LENGTH 2
 
-struct cn10k_sso_hws {
+struct __rte_cache_aligned cn10k_sso_hws {
 	uint64_t base;
 	uint32_t gw_wdata;
 	void *lookup_mem;
@@ -19,15 +19,15 @@ struct cn10k_sso_hws {
 	struct cnxk_timesync_info **tstamp;
 	uint64_t meta_aura;
 	/* Add Work Fastpath data */
-	int64_t *fc_mem __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) int64_t *fc_mem;
 	int64_t *fc_cache_space;
 	uintptr_t aw_lmt;
 	uintptr_t grp_base;
 	int32_t xaq_lmt;
 	/* Tx Fastpath data */
-	uintptr_t lmt_base __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uintptr_t lmt_base;
 	uint64_t lso_tun_fmt;
 	uint8_t tx_adptr_data[];
-} __rte_cache_aligned;
+};
 
 #endif /* __CN10K_EVENTDEV_H__ */
diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h
index fa99ded..ece4939 100644
--- a/drivers/event/cnxk/cnxk_eventdev.h
+++ b/drivers/event/cnxk/cnxk_eventdev.h
@@ -80,7 +80,7 @@ struct cnxk_sso_stash {
 	uint16_t stash_length;
 };
 
-struct cnxk_sso_evdev {
+struct __rte_cache_aligned cnxk_sso_evdev {
 	struct roc_sso sso;
 	uint8_t max_event_queues;
 	uint8_t max_event_ports;
@@ -124,10 +124,10 @@ struct cnxk_sso_evdev {
 	uint32_t gw_mode;
 	uint16_t stash_cnt;
 	struct cnxk_sso_stash *stash_parse_data;
-} __rte_cache_aligned;
+};
 
 /* Event port a.k.a GWS */
-struct cn9k_sso_hws {
+struct __rte_cache_aligned cn9k_sso_hws {
 	uint64_t base;
 	uint64_t gw_wdata;
 	void *lookup_mem;
@@ -136,15 +136,15 @@ struct cn9k_sso_hws {
 	/* PTP timestamp */
 	struct cnxk_timesync_info **tstamp;
 	/* Add Work Fastpath data */
-	uint64_t xaq_lmt __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t xaq_lmt;
 	uint64_t *fc_mem;
 	uintptr_t grp_base;
 	/* Tx Fastpath data */
-	uint64_t lso_tun_fmt __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t lso_tun_fmt;
 	uint8_t tx_adptr_data[];
-} __rte_cache_aligned;
+};
 
-struct cn9k_sso_hws_dual {
+struct __rte_cache_aligned cn9k_sso_hws_dual {
 	uint64_t base[2]; /* Ping and Pong */
 	uint64_t gw_wdata;
 	void *lookup_mem;
@@ -154,18 +154,18 @@ struct cn9k_sso_hws_dual {
 	/* PTP timestamp */
 	struct cnxk_timesync_info **tstamp;
 	/* Add Work Fastpath data */
-	uint64_t xaq_lmt __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t xaq_lmt;
 	uint64_t *fc_mem;
 	uintptr_t grp_base;
 	/* Tx Fastpath data */
-	uint64_t lso_tun_fmt __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t lso_tun_fmt;
 	uint8_t tx_adptr_data[];
-} __rte_cache_aligned;
+};
 
-struct cnxk_sso_hws_cookie {
+struct __rte_cache_aligned cnxk_sso_hws_cookie {
 	const struct rte_eventdev *event_dev;
 	bool configured;
-} __rte_cache_aligned;
+};
 
 static inline int
 parse_kvargs_flag(const char *key, const char *value, void *opaque)
diff --git a/drivers/event/cnxk/cnxk_tim_evdev.h b/drivers/event/cnxk/cnxk_tim_evdev.h
index b91fcb3..6cf10db 100644
--- a/drivers/event/cnxk/cnxk_tim_evdev.h
+++ b/drivers/event/cnxk/cnxk_tim_evdev.h
@@ -123,7 +123,7 @@ struct cnxk_tim_bkt {
 	uint64_t pad;
 };
 
-struct cnxk_tim_ring {
+struct __rte_cache_aligned cnxk_tim_ring {
 	uint16_t nb_chunk_slots;
 	uint32_t nb_bkts;
 	uintptr_t tbase;
@@ -149,7 +149,7 @@ struct cnxk_tim_ring {
 	uint64_t nb_chunks;
 	uint64_t chunk_sz;
 	enum roc_tim_clk_src clk_src;
-} __rte_cache_aligned;
+};
 
 struct cnxk_tim_ent {
 	uint64_t w0;
diff --git a/drivers/event/cnxk/cnxk_tim_worker.c b/drivers/event/cnxk/cnxk_tim_worker.c
index 944490d..1f2f2fe 100644
--- a/drivers/event/cnxk/cnxk_tim_worker.c
+++ b/drivers/event/cnxk/cnxk_tim_worker.c
@@ -92,7 +92,7 @@
 			    const uint64_t timeout_tick,
 			    const uint16_t nb_timers, const uint8_t flags)
 {
-	struct cnxk_tim_ent entry[CNXK_TIM_MAX_BURST] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct cnxk_tim_ent entry[CNXK_TIM_MAX_BURST];
 	struct cnxk_tim_ring *tim_ring = adptr->data->adapter_priv;
 	uint16_t set_timers = 0;
 	uint16_t arr_idx = 0;
-- 
1.8.3.1

[PATCH v2 47/83] dma/skeleton: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/dma/skeleton/skeleton_dmadev.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/skeleton/skeleton_dmadev.h b/drivers/dma/skeleton/skeleton_dmadev.h
index c9bf315..cfd37d1 100644
--- a/drivers/dma/skeleton/skeleton_dmadev.h
+++ b/drivers/dma/skeleton/skeleton_dmadev.h
@@ -73,13 +73,13 @@ struct skeldma_hw {
 	struct rte_ring *desc_completed;
 
 	/* Cache delimiter for dataplane API's operation data */
-	char cache1 __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char cache1;
 	uint16_t ridx;  /* ring idx */
 	uint16_t last_ridx;
 	uint64_t submitted_count;
 
 	/* Cache delimiter for cpuwork thread's operation data */
-	char cache2 __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) char cache2;
 	volatile uint32_t zero_req_count;
 	uint64_t completed_count;
 };
-- 
1.8.3.1

[PATCH v2 48/83] dma/ioat: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/dma/ioat/ioat_internal.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/ioat/ioat_internal.h b/drivers/dma/ioat/ioat_internal.h
index 4fa19eb..f4285c5 100644
--- a/drivers/dma/ioat/ioat_internal.h
+++ b/drivers/dma/ioat/ioat_internal.h
@@ -12,7 +12,7 @@ struct ioat_dmadev {
 	struct rte_dma_vchan_conf qcfg;
 	struct rte_dma_stats stats;
 
-	volatile uint16_t *doorbell __rte_cache_aligned;
+	volatile alignas(RTE_CACHE_LINE_SIZE) uint16_t *doorbell;
 	phys_addr_t status_addr;
 	phys_addr_t ring_addr;
 
@@ -25,7 +25,7 @@ struct ioat_dmadev {
 	unsigned int failure; /* Used to store chanerr for error handling. */
 
 	/* To report completions, the device will write status back here. */
-	volatile uint64_t status __rte_cache_aligned;
+	volatile alignas(RTE_CACHE_LINE_SIZE) uint64_t status;
 
 	/* Pointer to the register bar. */
 	volatile struct ioat_registers *regs;
-- 
1.8.3.1

[PATCH v2 49/83] dma/idxd: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/dma/idxd/idxd_hw_defs.h | 38 +++++++++++++++++++-------------------
 1 file changed, 19 insertions(+), 19 deletions(-)

diff --git a/drivers/dma/idxd/idxd_hw_defs.h b/drivers/dma/idxd/idxd_hw_defs.h
index 7113d22..435c1cd 100644
--- a/drivers/dma/idxd/idxd_hw_defs.h
+++ b/drivers/dma/idxd/idxd_hw_defs.h
@@ -26,7 +26,7 @@ enum rte_idxd_ops {
  * Hardware descriptor used by DSA hardware, for both bursts and
  * for individual operations.
  */
-struct idxd_hw_desc {
+struct __rte_aligned(64) idxd_hw_desc {
 	uint32_t pasid;
 	uint32_t op_flags;
 	rte_iova_t completion;
@@ -43,7 +43,7 @@ struct idxd_hw_desc {
 
 	/* remaining 26 bytes are reserved */
 	uint16_t reserved[13];
-} __rte_aligned(64);
+};
 
 #define IDXD_COMP_STATUS_INCOMPLETE        0
 #define IDXD_COMP_STATUS_SUCCESS           1
@@ -55,7 +55,7 @@ struct idxd_hw_desc {
 /**
  * Completion record structure written back by DSA
  */
-struct idxd_completion {
+struct __rte_aligned(32) idxd_completion {
 	uint8_t status;
 	uint8_t result;
 	/* 16-bits pad here */
@@ -63,7 +63,7 @@ struct idxd_completion {
 
 	rte_iova_t fault_address;
 	uint32_t invalid_flags;
-} __rte_aligned(32);
+};
 
 /*** Definitions for Intel(R) Data Streaming Accelerator  ***/
 
@@ -83,20 +83,20 @@ enum rte_idxd_cmds {
 
 /* General bar0 registers */
 struct rte_idxd_bar0 {
-	uint32_t __rte_cache_aligned version;    /* offset 0x00 */
-	uint64_t __rte_aligned(0x10) gencap;     /* offset 0x10 */
-	uint64_t __rte_aligned(0x10) wqcap;      /* offset 0x20 */
-	uint64_t __rte_aligned(0x10) grpcap;     /* offset 0x30 */
-	uint64_t __rte_aligned(0x08) engcap;     /* offset 0x38 */
-	uint64_t __rte_aligned(0x10) opcap;      /* offset 0x40 */
-	uint64_t __rte_aligned(0x20) offsets[2]; /* offset 0x60 */
-	uint32_t __rte_aligned(0x20) gencfg;     /* offset 0x80 */
-	uint32_t __rte_aligned(0x08) genctrl;    /* offset 0x88 */
-	uint32_t __rte_aligned(0x10) gensts;     /* offset 0x90 */
-	uint32_t __rte_aligned(0x08) intcause;   /* offset 0x98 */
-	uint32_t __rte_aligned(0x10) cmd;        /* offset 0xA0 */
-	uint32_t __rte_aligned(0x08) cmdstatus;  /* offset 0xA8 */
-	uint64_t __rte_aligned(0x20) swerror[4]; /* offset 0xC0 */
+	alignas(RTE_CACHE_LINE_SIZE) uint32_t version;    /* offset 0x00 */
+	alignas(0x10) uint64_t gencap;     /* offset 0x10 */
+	alignas(0x10) uint64_t wqcap;      /* offset 0x20 */
+	alignas(0x10) uint64_t grpcap;     /* offset 0x30 */
+	alignas(0x08) uint64_t engcap;     /* offset 0x38 */
+	alignas(0x10) uint64_t opcap;      /* offset 0x40 */
+	alignas(0x20) uint64_t offsets[2]; /* offset 0x60 */
+	alignas(0x20) uint32_t gencfg;     /* offset 0x80 */
+	alignas(0x08) uint32_t genctrl;    /* offset 0x88 */
+	alignas(0x10) uint32_t gensts;     /* offset 0x90 */
+	alignas(0x08) uint32_t intcause;   /* offset 0x98 */
+	alignas(0x10) uint32_t cmd;        /* offset 0xA0 */
+	alignas(0x08) uint32_t cmdstatus;  /* offset 0xA8 */
+	alignas(0x20) uint64_t swerror[4]; /* offset 0xC0 */
 };
 
 /* workqueue config is provided by array of uint32_t. */
@@ -118,7 +118,7 @@ enum rte_idxd_wqcfg {
 #define WQ_STATE_MASK 0x3
 
 struct rte_idxd_grpcfg {
-	uint64_t grpwqcfg[4]  __rte_cache_aligned; /* 64-byte register set */
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t grpwqcfg[4]; /* 64-byte register set */
 	uint64_t grpengcfg;  /* offset 32 */
 	uint32_t grpflags;   /* offset 40 */
 };
-- 
1.8.3.1

[PATCH v2 50/83] crypto/uadk: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/uadk/uadk_crypto_pmd_private.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/crypto/uadk/uadk_crypto_pmd_private.h b/drivers/crypto/uadk/uadk_crypto_pmd_private.h
index 5a7dbff..7a35c94 100644
--- a/drivers/crypto/uadk/uadk_crypto_pmd_private.h
+++ b/drivers/crypto/uadk/uadk_crypto_pmd_private.h
@@ -9,7 +9,7 @@
 /* Maximum length for digest (SHA-512 needs 64 bytes) */
 #define DIGEST_LENGTH_MAX 64
 
-struct uadk_qp {
+struct __rte_cache_aligned uadk_qp {
 	/* Ring for placing process packets */
 	struct rte_ring *processed_pkts;
 	/* Queue pair statistics */
@@ -23,7 +23,7 @@ struct uadk_qp {
 	 * by the user (using authentication verify operation)
 	 */
 	uint8_t temp_digest[DIGEST_LENGTH_MAX];
-} __rte_cache_aligned;
+};
 
 enum uadk_chain_order {
 	UADK_CHAIN_ONLY_CIPHER,
@@ -33,7 +33,7 @@ enum uadk_chain_order {
 	UADK_CHAIN_NOT_SUPPORTED
 };
 
-struct uadk_crypto_session {
+struct __rte_cache_aligned uadk_crypto_session {
 	handle_t handle_cipher;
 	handle_t handle_digest;
 	enum uadk_chain_order chain_order;
@@ -56,19 +56,19 @@ struct uadk_crypto_session {
 		enum rte_crypto_auth_operation operation;
 		uint16_t digest_length;
 	} auth;
-} __rte_cache_aligned;
+};
 
 enum uadk_crypto_version {
 	UADK_CRYPTO_V2,
 	UADK_CRYPTO_V3,
 };
 
-struct uadk_crypto_priv {
+struct __rte_cache_aligned uadk_crypto_priv {
 	bool env_cipher_init;
 	bool env_auth_init;
 	enum uadk_crypto_version version;
 	unsigned int max_nb_qpairs;
-} __rte_cache_aligned;
+};
 
 extern int uadk_crypto_logtype;
 
-- 
1.8.3.1

[PATCH v2 51/83] crypto/scheduler: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/scheduler/scheduler_pkt_size_distr.c | 4 ++--
 drivers/crypto/scheduler/scheduler_pmd_private.h    | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/crypto/scheduler/scheduler_pkt_size_distr.c b/drivers/crypto/scheduler/scheduler_pkt_size_distr.c
index 30bb5ce..1334a79 100644
--- a/drivers/crypto/scheduler/scheduler_pkt_size_distr.c
+++ b/drivers/crypto/scheduler/scheduler_pkt_size_distr.c
@@ -20,12 +20,12 @@ struct psd_scheduler_ctx {
 };
 
 /** pkt size based scheduler queue pair context */
-struct psd_scheduler_qp_ctx {
+struct __rte_cache_aligned psd_scheduler_qp_ctx {
 	struct scheduler_worker primary_worker;
 	struct scheduler_worker secondary_worker;
 	uint32_t threshold;
 	uint8_t deq_idx;
-} __rte_cache_aligned;
+};
 
 /** scheduling operation variables' wrapping */
 struct psd_schedule_op {
diff --git a/drivers/crypto/scheduler/scheduler_pmd_private.h b/drivers/crypto/scheduler/scheduler_pmd_private.h
index 2611027..0f0a6b4 100644
--- a/drivers/crypto/scheduler/scheduler_pmd_private.h
+++ b/drivers/crypto/scheduler/scheduler_pmd_private.h
@@ -27,7 +27,7 @@ struct scheduler_worker {
 	uint8_t driver_id;
 };
 
-struct scheduler_ctx {
+struct __rte_cache_aligned scheduler_ctx {
 	void *private_ctx;
 	/**< private scheduler context pointer */
 
@@ -55,15 +55,15 @@ struct scheduler_ctx {
 
 	char *init_worker_names[RTE_CRYPTODEV_SCHEDULER_MAX_NB_WORKERS];
 	int nb_init_workers;
-} __rte_cache_aligned;
+};
 
-struct scheduler_qp_ctx {
+struct __rte_cache_aligned scheduler_qp_ctx {
 	void *private_qp_ctx;
 
 	uint32_t max_nb_objs;
 
 	struct rte_ring *order_ring;
-} __rte_cache_aligned;
+};
 
 struct scheduler_session_ctx {
 	uint32_t ref_cnt;
-- 
1.8.3.1

[PATCH v2 52/83] crypto/qat: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/qat/qat_asym.h        | 15 +++++++--------
 drivers/crypto/qat/qat_sym.h         |  8 ++++----
 drivers/crypto/qat/qat_sym_session.h | 10 +++++-----
 3 files changed, 16 insertions(+), 17 deletions(-)

diff --git a/drivers/crypto/qat/qat_asym.h b/drivers/crypto/qat/qat_asym.h
index 6628656..00275fa 100644
--- a/drivers/crypto/qat/qat_asym.h
+++ b/drivers/crypto/qat/qat_asym.h
@@ -18,7 +18,6 @@
 typedef uint64_t large_int_ptr;
 #define MAX_PKE_PARAMS	8
 #define QAT_PKE_MAX_LN_SIZE 512
-#define _PKE_ALIGN_ __rte_aligned(8)
 
 #define QAT_ASYM_MAX_PARAMS			8
 #define QAT_ASYM_MODINV_NUM_IN_PARAMS		2
@@ -57,20 +56,20 @@
 		}							\
 	}
 
-struct qat_asym_op_cookie {
+struct __rte_aligned(8) qat_asym_op_cookie {
 	uint64_t error;
 	uint32_t alg_bytesize; /*< Bytesize of algorithm */
 	uint32_t qat_func_alignsize; /*< Aligned bytesize of qat function */
 	rte_iova_t input_addr;
 	rte_iova_t output_addr;
-	large_int_ptr input_params_ptrs[MAX_PKE_PARAMS] _PKE_ALIGN_;
-	large_int_ptr output_params_ptrs[MAX_PKE_PARAMS] _PKE_ALIGN_;
-	union {
+	alignas(8) large_int_ptr input_params_ptrs[MAX_PKE_PARAMS];
+	alignas(8) large_int_ptr output_params_ptrs[MAX_PKE_PARAMS];
+	union __rte_aligned(8) {
 		uint8_t input_array[MAX_PKE_PARAMS][QAT_PKE_MAX_LN_SIZE];
 		uint8_t input_buffer[MAX_PKE_PARAMS * QAT_PKE_MAX_LN_SIZE];
-	} _PKE_ALIGN_;
-	uint8_t output_array[MAX_PKE_PARAMS][QAT_PKE_MAX_LN_SIZE] _PKE_ALIGN_;
-} _PKE_ALIGN_;
+	};
+	alignas(8) uint8_t output_array[MAX_PKE_PARAMS][QAT_PKE_MAX_LN_SIZE];
+};
 
 struct qat_asym_session {
 	struct icp_qat_fw_pke_request req_tmpl;
diff --git a/drivers/crypto/qat/qat_sym.h b/drivers/crypto/qat/qat_sym.h
index 6616064..eedf5de 100644
--- a/drivers/crypto/qat/qat_sym.h
+++ b/drivers/crypto/qat/qat_sym.h
@@ -103,10 +103,10 @@
 
 struct qat_sym_session;
 
-struct qat_sym_sgl {
+struct __rte_cache_aligned qat_sym_sgl {
 	qat_sgl_hdr;
 	struct qat_flat_buf buffers[QAT_SYM_SGL_MAX_NUMBER];
-} __rte_packed __rte_cache_aligned;
+} __rte_packed;
 
 struct qat_sym_op_cookie {
 	struct qat_sym_sgl qat_sgl_src;
@@ -116,8 +116,8 @@ struct qat_sym_op_cookie {
 	union {
 		/* Used for Single-Pass AES-GMAC only */
 		struct {
-			struct icp_qat_hw_cipher_algo_blk cd_cipher
-					__rte_packed __rte_cache_aligned;
+			alignas(RTE_CACHE_LINE_SIZE) struct icp_qat_hw_cipher_algo_blk cd_cipher
+					__rte_packed;
 			phys_addr_t cd_phys_addr;
 		} spc_gmac;
 	} opt;
diff --git a/drivers/crypto/qat/qat_sym_session.h b/drivers/crypto/qat/qat_sym_session.h
index c41f8cc..f263477 100644
--- a/drivers/crypto/qat/qat_sym_session.h
+++ b/drivers/crypto/qat/qat_sym_session.h
@@ -92,7 +92,7 @@ typedef int (*qat_sym_build_request_t)(void *in_op, struct qat_sym_session *ctx,
 		uint8_t *out_msg, void *op_cookie);
 
 /* Common content descriptor */
-struct qat_sym_cd {
+struct __rte_cache_aligned qat_sym_cd {
 	struct icp_qat_hw_cipher_algo_blk cipher;
 	union {
 		struct icp_qat_hw_auth_algo_blk hash;
@@ -100,7 +100,7 @@ struct qat_sym_cd {
 		struct icp_qat_hw_gen3_crc_cd crc_gen3;
 		struct icp_qat_hw_gen4_crc_cd crc_gen4;
 	};
-} __rte_packed __rte_cache_aligned;
+} __rte_packed;
 
 struct qat_sym_session {
 	enum icp_qat_fw_la_cmd_id qat_cmd;
@@ -115,7 +115,7 @@ struct qat_sym_session {
 		struct qat_sym_cd cd;
 		uint8_t key_array[32];
 	};
-	uint8_t prefix_state[QAT_PREFIX_TBL_SIZE] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t prefix_state[QAT_PREFIX_TBL_SIZE];
 	uint8_t *cd_cur_ptr;
 	union {
 		phys_addr_t cd_paddr;
@@ -153,8 +153,8 @@ struct qat_sym_session {
 	qat_sym_build_request_t build_request[2];
 #ifndef RTE_QAT_OPENSSL
 	IMB_MGR *mb_mgr;
-	uint64_t expkey[4*15] __rte_aligned(16);
-	uint32_t dust[4*15] __rte_aligned(16);
+	alignas(16) uint64_t expkey[4 * 15];
+	alignas(16) uint32_t dust[4 * 15];
 	uint8_t docsis_key_len;
 #endif
 };
-- 
1.8.3.1

[PATCH v2 53/83] crypto/openssl: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/openssl/openssl_pmd_private.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/crypto/openssl/openssl_pmd_private.h b/drivers/crypto/openssl/openssl_pmd_private.h
index 334912d..0f038b2 100644
--- a/drivers/crypto/openssl/openssl_pmd_private.h
+++ b/drivers/crypto/openssl/openssl_pmd_private.h
@@ -62,7 +62,7 @@ struct openssl_private {
 };
 
 /** OPENSSL crypto queue pair */
-struct openssl_qp {
+struct __rte_cache_aligned openssl_qp {
 	uint16_t id;
 	/**< Queue Pair Identifier */
 	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
@@ -78,10 +78,10 @@ struct openssl_qp {
 	 * by the driver when verifying a digest provided
 	 * by the user (using authentication verify operation)
 	 */
-} __rte_cache_aligned;
+};
 
 /** OPENSSL crypto private session structure */
-struct openssl_session {
+struct __rte_cache_aligned openssl_session {
 	enum openssl_chain_order chain_order;
 	/**< chain order mode */
 
@@ -166,10 +166,10 @@ struct openssl_session {
 		/**< digest length */
 	} auth;
 
-} __rte_cache_aligned;
+};
 
 /** OPENSSL crypto private asymmetric session structure */
-struct openssl_asym_session {
+struct __rte_cache_aligned openssl_asym_session {
 	enum rte_crypto_asym_xform_type xfrm_type;
 	union {
 		struct rsa {
@@ -213,7 +213,7 @@ struct openssl_asym_session {
 #endif
 		} sm2;
 	} u;
-} __rte_cache_aligned;
+};
 /** Set and validate OPENSSL crypto session parameters */
 extern int
 openssl_set_session_parameters(struct openssl_session *sess,
-- 
1.8.3.1

[PATCH v2 54/83] crypto/octeontx: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/octeontx/otx_cryptodev_hw_access.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
index 4647d56..6e2afde 100644
--- a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
+++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h
@@ -77,7 +77,7 @@ struct command_queue {
 /**
  * CPT VF device structure
  */
-struct cpt_vf {
+struct __rte_cache_aligned cpt_vf {
 	/** CPT instance */
 	struct cpt_instance instance;
 	/** Register start address */
@@ -111,7 +111,7 @@ struct cpt_vf {
 
 	/** Device name */
 	char dev_name[32];
-} __rte_cache_aligned;
+};
 
 /*
  * CPT Registers map for 81xx
-- 
1.8.3.1

[PATCH v2 55/83] crypto/null: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/null/null_crypto_pmd_private.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/null/null_crypto_pmd_private.h b/drivers/crypto/null/null_crypto_pmd_private.h
index ae34ce6..645a68d 100644
--- a/drivers/crypto/null/null_crypto_pmd_private.h
+++ b/drivers/crypto/null/null_crypto_pmd_private.h
@@ -22,7 +22,7 @@ struct null_crypto_private {
 };
 
 /** NULL crypto queue pair */
-struct null_crypto_qp {
+struct __rte_cache_aligned null_crypto_qp {
 	uint16_t id;
 	/**< Queue Pair Identifier */
 	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
@@ -33,13 +33,13 @@ struct null_crypto_qp {
 	/**< Session Mempool */
 	struct rte_cryptodev_stats qp_stats;
 	/**< Queue pair statistics */
-} __rte_cache_aligned;
+};
 
 
 /** NULL crypto private session structure */
-struct null_crypto_session {
+struct __rte_cache_aligned null_crypto_session {
 	uint32_t reserved;
-} __rte_cache_aligned;
+};
 
 /** Set and validate NULL crypto session parameters */
 extern int
-- 
1.8.3.1

[PATCH v2 56/83] crypto/mvsam: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/mvsam/mrvl_pmd_private.h | 12 ++++++------
 drivers/crypto/mvsam/rte_mrvl_pmd.c     | 12 +++++-------
 2 files changed, 11 insertions(+), 13 deletions(-)

diff --git a/drivers/crypto/mvsam/mrvl_pmd_private.h b/drivers/crypto/mvsam/mrvl_pmd_private.h
index 719d73d..80ff229 100644
--- a/drivers/crypto/mvsam/mrvl_pmd_private.h
+++ b/drivers/crypto/mvsam/mrvl_pmd_private.h
@@ -44,7 +44,7 @@ struct mrvl_crypto_private {
 };
 
 /** MRVL crypto queue pair structure. */
-struct mrvl_crypto_qp {
+struct __rte_cache_aligned mrvl_crypto_qp {
 	/** SAM CIO (MUSDK Queue Pair equivalent).*/
 	struct sam_cio *cio;
 
@@ -59,10 +59,10 @@ struct mrvl_crypto_qp {
 
 	/** CIO initialization parameters.*/
 	struct sam_cio_params cio_params;
-} __rte_cache_aligned;
+};
 
 /** MRVL crypto private session structure. */
-struct mrvl_crypto_session {
+struct __rte_cache_aligned mrvl_crypto_session {
 	/** Crypto operations chain order. */
 	enum mrvl_crypto_chain_order chain_order;
 
@@ -74,12 +74,12 @@ struct mrvl_crypto_session {
 
 	/** Cipher IV offset. */
 	uint16_t cipher_iv_offset;
-} __rte_cache_aligned;
+};
 
-struct mrvl_crypto_src_table {
+struct __rte_cache_aligned mrvl_crypto_src_table {
 	uint16_t iter_ops;
 	struct sam_buf_info src_bd[MRVL_MAX_SEGMENTS];
-} __rte_cache_aligned;
+};
 
 /** Set and validate MRVL crypto session parameters */
 int
diff --git a/drivers/crypto/mvsam/rte_mrvl_pmd.c b/drivers/crypto/mvsam/rte_mrvl_pmd.c
index 1641da9..193b7fb 100644
--- a/drivers/crypto/mvsam/rte_mrvl_pmd.c
+++ b/drivers/crypto/mvsam/rte_mrvl_pmd.c
@@ -47,22 +47,20 @@ enum algo_supported {
 };
 
 /** Map elements for cipher mapping.*/
-struct cipher_params_mapping {
+/* We want to squeeze in multiple maps into the cache line. */
+struct __rte_aligned(32) cipher_params_mapping {
 	enum algo_supported  supported;   /**< On/Off switch */
 	enum sam_cipher_alg  cipher_alg;  /**< Cipher algorithm */
 	enum sam_cipher_mode cipher_mode; /**< Cipher mode */
 	unsigned int max_key_len;         /**< Maximum key length (in bytes)*/
-}
-/* We want to squeeze in multiple maps into the cache line. */
-__rte_aligned(32);
+};
 
 /** Map elements for auth mapping.*/
-struct auth_params_mapping {
+/* We want to squeeze in multiple maps into the cache line. */
+struct __rte_aligned(32) auth_params_mapping {
 	enum algo_supported supported;  /**< On/off switch */
 	enum sam_auth_alg   auth_alg;   /**< Auth algorithm */
 }
-/* We want to squeeze in multiple maps into the cache line. */
-__rte_aligned(32);
 
 /**
  * Map of supported cipher algorithms.
-- 
1.8.3.1

[PATCH v2 57/83] crypto/mlx5: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/mlx5/mlx5_crypto.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/mlx5/mlx5_crypto.h b/drivers/crypto/mlx5/mlx5_crypto.h
index 36dacdc..5432484 100644
--- a/drivers/crypto/mlx5/mlx5_crypto.h
+++ b/drivers/crypto/mlx5/mlx5_crypto.h
@@ -80,12 +80,12 @@ struct mlx5_crypto_qp {
 	uint16_t cpy_tag_op;
 };
 
-struct mlx5_crypto_dek {
+struct __rte_cache_aligned mlx5_crypto_dek {
 	struct mlx5_list_entry entry; /* Pointer to DEK hash list entry. */
 	struct mlx5_devx_obj *obj; /* Pointer to DEK DevX object. */
 	uint8_t data[MLX5_CRYPTO_KEY_LENGTH]; /* DEK key data. */
 	uint32_t size; /* key+keytag size. */
-} __rte_cache_aligned;
+};
 
 struct mlx5_crypto_devarg_params {
 	bool login_devarg;
-- 
1.8.3.1

[PATCH v2 58/83] crypto/ipsec_mb: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/ipsec_mb/pmd_aesni_mb.c         |  4 ++--
 drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h    | 24 ++++++++++++------------
 drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h |  4 ++--
 drivers/crypto/ipsec_mb/pmd_kasumi_priv.h      |  4 ++--
 drivers/crypto/ipsec_mb/pmd_snow3g_priv.h      |  4 ++--
 drivers/crypto/ipsec_mb/pmd_zuc_priv.h         |  4 ++--
 6 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
index 4de4866..69a5466 100644
--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
@@ -32,8 +32,8 @@ struct aesni_mb_op_buf_data {
 {
 	uint32_t i, length;
 
-	uint8_t ipad_buf[blocksize] __rte_aligned(16);
-	uint8_t opad_buf[blocksize] __rte_aligned(16);
+	alignas(16) uint8_t ipad_buf[blocksize];
+	alignas(16) uint8_t opad_buf[blocksize];
 
 	/* Setup inner and outer pads */
 	memset(ipad_buf, HMAC_IPAD_VALUE, blocksize);
diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
index 85994fe..eec8931 100644
--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
@@ -848,7 +848,7 @@ struct aesni_mb_qp_data {
 }
 
 /** AES-NI multi-buffer private session structure */
-struct aesni_mb_session {
+struct __rte_cache_aligned aesni_mb_session {
 	IMB_JOB template_job;
 	/*< Template job structure */
 	uint32_t session_id;
@@ -869,9 +869,9 @@ struct aesni_mb_session {
 	struct {
 		union {
 			struct {
-				uint32_t encode[60] __rte_aligned(16);
+				alignas(16) uint32_t encode[60];
 				/* *< encode key */
-				uint32_t decode[60] __rte_aligned(16);
+				alignas(16) uint32_t decode[60];
 				/* *< decode key */
 			} expanded_aes_keys;
 			/* *< Expanded AES keys - Allocating space to
@@ -903,9 +903,9 @@ struct aesni_mb_session {
 		/* *< auth operation generate or verify */
 		union {
 			struct {
-				uint8_t inner[128] __rte_aligned(16);
+				alignas(16) uint8_t inner[128];
 				/* *< inner pad */
-				uint8_t outer[128] __rte_aligned(16);
+				alignas(16) uint8_t outer[128];
 				/* *< outer pad */
 			} pads;
 			/* *< HMAC Authentication pads -
@@ -915,20 +915,20 @@ struct aesni_mb_session {
 			 */
 
 			struct {
-				uint32_t k1_expanded[44] __rte_aligned(16);
+				alignas(16) uint32_t k1_expanded[44];
 				/* *< k1 (expanded key). */
-				uint8_t k2[16] __rte_aligned(16);
+				alignas(16) uint8_t k2[16];
 				/* *< k2. */
-				uint8_t k3[16] __rte_aligned(16);
+				alignas(16) uint8_t k3[16];
 				/* *< k3. */
 			} xcbc;
 
 			struct {
-				uint32_t expkey[60] __rte_aligned(16);
+				alignas(16) uint32_t expkey[60];
 				/* *< k1 (expanded key). */
-				uint32_t skey1[4] __rte_aligned(16);
+				alignas(16) uint32_t skey1[4];
 				/* *< k2. */
-				uint32_t skey2[4] __rte_aligned(16);
+				alignas(16) uint32_t skey2[4];
 				/* *< k3. */
 			} cmac;
 			/* *< Expanded XCBC authentication keys */
@@ -943,7 +943,7 @@ struct aesni_mb_session {
 		uint16_t req_digest_len;
 
 	} auth;
-} __rte_cache_aligned;
+};
 
 typedef void (*hash_one_block_t)(const void *data, void *digest);
 typedef void (*aes_keyexp_t)(const void *key, void *enc_exp_keys,
diff --git a/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h b/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h
index 842f62f..0eca63c 100644
--- a/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h
@@ -46,7 +46,7 @@ struct rte_cryptodev_capabilities chacha20_poly1305_capabilities[] = {
 uint8_t pmd_driver_id_chacha20_poly1305;
 
 /** CHACHA20 POLY1305 private session structure */
-struct chacha20_poly1305_session {
+struct __rte_cache_aligned chacha20_poly1305_session {
 	struct {
 		uint16_t length;
 		uint16_t offset;
@@ -60,7 +60,7 @@ struct chacha20_poly1305_session {
 	/**< Generated digest length */
 	uint8_t key[CHACHA20_POLY1305_KEY_SIZE];
 	enum ipsec_mb_operation op;
-} __rte_cache_aligned;
+};
 
 struct chacha20_poly1305_qp_data {
 	struct chacha20_poly1305_context_data chacha20_poly1305_ctx_data;
diff --git a/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h b/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h
index 8db1d1c..c2e28ea 100644
--- a/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_kasumi_priv.h
@@ -61,14 +61,14 @@
 };
 
 /** KASUMI private session structure */
-struct kasumi_session {
+struct __rte_cache_aligned kasumi_session {
 	/* Keys have to be 16-byte aligned */
 	kasumi_key_sched_t pKeySched_cipher;
 	kasumi_key_sched_t pKeySched_hash;
 	enum ipsec_mb_operation op;
 	enum rte_crypto_auth_operation auth_op;
 	uint16_t cipher_iv_offset;
-} __rte_cache_aligned;
+};
 
 struct kasumi_qp_data {
 	uint8_t temp_digest[KASUMI_DIGEST_LENGTH];
diff --git a/drivers/crypto/ipsec_mb/pmd_snow3g_priv.h b/drivers/crypto/ipsec_mb/pmd_snow3g_priv.h
index ca1ce7f..9492a0b 100644
--- a/drivers/crypto/ipsec_mb/pmd_snow3g_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_snow3g_priv.h
@@ -65,14 +65,14 @@
 };
 
 /** SNOW 3G private session structure */
-struct snow3g_session {
+struct __rte_cache_aligned snow3g_session {
 	enum ipsec_mb_operation op;
 	enum rte_crypto_auth_operation auth_op;
 	snow3g_key_schedule_t pKeySched_cipher;
 	snow3g_key_schedule_t pKeySched_hash;
 	uint16_t cipher_iv_offset;
 	uint16_t auth_iv_offset;
-} __rte_cache_aligned;
+};
 
 struct snow3g_qp_data {
 	uint8_t temp_digest[SNOW3G_DIGEST_LENGTH];
diff --git a/drivers/crypto/ipsec_mb/pmd_zuc_priv.h b/drivers/crypto/ipsec_mb/pmd_zuc_priv.h
index 76fd675..a17a65a 100644
--- a/drivers/crypto/ipsec_mb/pmd_zuc_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_zuc_priv.h
@@ -64,14 +64,14 @@
 };
 
 /** ZUC private session structure */
-struct zuc_session {
+struct __rte_cache_aligned zuc_session {
 	enum ipsec_mb_operation op;
 	enum rte_crypto_auth_operation auth_op;
 	uint8_t pKey_cipher[ZUC_IV_KEY_LENGTH];
 	uint8_t pKey_hash[ZUC_IV_KEY_LENGTH];
 	uint16_t cipher_iv_offset;
 	uint16_t auth_iv_offset;
-} __rte_cache_aligned;
+};
 
 struct zuc_qp_data {
 
-- 
1.8.3.1

[PATCH v2 59/83] crypto/cnxk: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/cnxk/cn10k_cryptodev_sec.h | 4 ++--
 drivers/crypto/cnxk/cn10k_ipsec.h         | 4 ++--
 drivers/crypto/cnxk/cn10k_tls.h           | 4 ++--
 drivers/crypto/cnxk/cn9k_cryptodev_ops.c  | 2 +-
 drivers/crypto/cnxk/cn9k_ipsec.h          | 8 ++++----
 drivers/crypto/cnxk/cnxk_cryptodev_ops.h  | 4 ++--
 drivers/crypto/cnxk/cnxk_se.h             | 4 ++--
 7 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_sec.h b/drivers/crypto/cnxk/cn10k_cryptodev_sec.h
index 878cf78..77faaa0 100644
--- a/drivers/crypto/cnxk/cn10k_cryptodev_sec.h
+++ b/drivers/crypto/cnxk/cn10k_cryptodev_sec.h
@@ -25,7 +25,7 @@ struct cn10k_tls_opt {
 	uint16_t mac_len : 7;
 };
 
-struct cn10k_sec_session {
+struct __rte_aligned(ROC_ALIGN) cn10k_sec_session {
 	uint8_t rte_sess[SEC_SESS_SIZE];
 
 	/** PMD private space */
@@ -57,7 +57,7 @@ struct cn10k_sec_session {
 		struct cn10k_ipsec_sa sa;
 		struct cn10k_tls_record tls_rec;
 	};
-} __rte_aligned(ROC_ALIGN);
+};
 
 static inline uint64_t
 cpt_inst_w7_get(struct roc_cpt *roc_cpt, void *cptr)
diff --git a/drivers/crypto/cnxk/cn10k_ipsec.h b/drivers/crypto/cnxk/cn10k_ipsec.h
index 0d1e14a..4e4e68f 100644
--- a/drivers/crypto/cnxk/cn10k_ipsec.h
+++ b/drivers/crypto/cnxk/cn10k_ipsec.h
@@ -18,14 +18,14 @@
 /* Forward declaration */
 struct cn10k_sec_session;
 
-struct cn10k_ipsec_sa {
+struct __rte_aligned(ROC_ALIGN) cn10k_ipsec_sa {
 	union {
 		/** Inbound SA */
 		struct roc_ot_ipsec_inb_sa in_sa;
 		/** Outbound SA */
 		struct roc_ot_ipsec_outb_sa out_sa;
 	};
-} __rte_aligned(ROC_ALIGN);
+};
 
 int cn10k_ipsec_session_create(struct cnxk_cpt_vf *vf, struct cnxk_cpt_qp *qp,
 			       struct rte_security_ipsec_xform *ipsec_xfrm,
diff --git a/drivers/crypto/cnxk/cn10k_tls.h b/drivers/crypto/cnxk/cn10k_tls.h
index 9635bdd..c6bd16d 100644
--- a/drivers/crypto/cnxk/cn10k_tls.h
+++ b/drivers/crypto/cnxk/cn10k_tls.h
@@ -16,14 +16,14 @@
 /* Forward declaration */
 struct cn10k_sec_session;
 
-struct cn10k_tls_record {
+struct __rte_aligned(ROC_ALIGN) cn10k_tls_record {
 	union {
 		/** Read SA */
 		struct roc_ie_ot_tls_read_sa read_sa;
 		/** Write SA */
 		struct roc_ie_ot_tls_write_sa write_sa;
 	};
-} __rte_aligned(ROC_ALIGN);
+};
 
 int cn10k_tls_record_session_update(struct cnxk_cpt_vf *vf, struct cnxk_cpt_qp *qp,
 				    struct cn10k_sec_session *sess,
diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
index 125a464..96a75a7 100644
--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c
@@ -126,7 +126,7 @@
 cn9k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)
 {
 	struct cpt_inflight_req *infl_req_1, *infl_req_2;
-	struct cpt_inst_s inst[2] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct cpt_inst_s inst[2];
 	struct rte_crypto_op *op_1, *op_2;
 	uint16_t nb_allowed, count = 0;
 	struct cnxk_cpt_qp *qp = qptr;
diff --git a/drivers/crypto/cnxk/cn9k_ipsec.h b/drivers/crypto/cnxk/cn9k_ipsec.h
index d28642e..4e8d815 100644
--- a/drivers/crypto/cnxk/cn9k_ipsec.h
+++ b/drivers/crypto/cnxk/cn9k_ipsec.h
@@ -11,18 +11,18 @@
 #include "cnxk_security.h"
 #include "cnxk_security_ar.h"
 
-struct cn9k_ipsec_sa {
+struct __rte_aligned(8) cn9k_ipsec_sa {
 	union {
 		/** Inbound SA */
 		struct roc_ie_on_inb_sa in_sa;
 		/** Outbound SA */
 		struct roc_ie_on_outb_sa out_sa;
 	};
-} __rte_aligned(8);
+};
 
 #define SEC_SESS_SIZE sizeof(struct rte_security_session)
 
-struct cn9k_sec_session {
+struct __rte_cache_aligned cn9k_sec_session {
 	uint8_t rte_sess[SEC_SESS_SIZE];
 
 	/** PMD private space */
@@ -57,7 +57,7 @@ struct cn9k_sec_session {
 	struct cnxk_cpt_qp *qp;
 
 	struct cn9k_ipsec_sa sa;
-} __rte_cache_aligned;
+};
 
 void cn9k_sec_ops_override(void);
 
diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
index e7bba25..46efc4a 100644
--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.h
@@ -42,7 +42,7 @@ struct cpt_qp_meta_info {
 #define CPT_OP_FLAGS_IPSEC_DIR_INBOUND (1 << 2)
 #define CPT_OP_FLAGS_IPSEC_INB_REPLAY  (1 << 3)
 
-struct cpt_inflight_req {
+struct __rte_aligned(ROC_ALIGN) cpt_inflight_req {
 	union cpt_res_s res;
 	union {
 		void *opaque;
@@ -59,7 +59,7 @@ struct cpt_inflight_req {
 	uint8_t *rptr;
 #endif
 	void *qp;
-} __rte_aligned(ROC_ALIGN);
+};
 
 PLT_STATIC_ASSERT(sizeof(struct cpt_inflight_req) == ROC_CACHE_LINE_SZ);
 
diff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h
index c211884..6374718 100644
--- a/drivers/crypto/cnxk/cnxk_se.h
+++ b/drivers/crypto/cnxk/cnxk_se.h
@@ -31,7 +31,7 @@ enum cpt_dp_thread_type {
 
 #define SYM_SESS_SIZE sizeof(struct rte_cryptodev_sym_session)
 
-struct cnxk_se_sess {
+struct __rte_aligned(ROC_ALIGN) cnxk_se_sess {
 	uint8_t rte_sess[SYM_SESS_SIZE];
 
 	uint8_t aes_gcm : 1;
@@ -67,7 +67,7 @@ struct cnxk_se_sess {
 	struct cnxk_cpt_qp *qp;
 	struct roc_se_ctx roc_se_ctx;
 	struct roc_cpt_lf *lf;
-} __rte_aligned(ROC_ALIGN);
+};
 
 struct cnxk_sym_dp_ctx {
 	struct cnxk_se_sess *sess;
-- 
1.8.3.1

[PATCH v2 60/83] crypto/ccp: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/ccp/ccp_crypto.h      | 4 ++--
 drivers/crypto/ccp/ccp_dev.h         | 8 ++++----
 drivers/crypto/ccp/ccp_pmd_private.h | 8 ++++----
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/crypto/ccp/ccp_crypto.h b/drivers/crypto/ccp/ccp_crypto.h
index d307f73..d0b417c 100644
--- a/drivers/crypto/ccp/ccp_crypto.h
+++ b/drivers/crypto/ccp/ccp_crypto.h
@@ -246,7 +246,7 @@ enum ccp_hash_op {
 };
 
 /* CCP crypto private session structure */
-struct ccp_session {
+struct __rte_cache_aligned ccp_session {
 	bool auth_opt;
 	enum ccp_cmd_order cmd_id;
 	/**< chain order mode */
@@ -314,7 +314,7 @@ struct ccp_session {
 	/**< AEAD Algorithm */
 
 	uint32_t reserved;
-} __rte_cache_aligned;
+};
 
 extern uint8_t ccp_cryptodev_driver_id;
 
diff --git a/drivers/crypto/ccp/ccp_dev.h b/drivers/crypto/ccp/ccp_dev.h
index e3ec481..cd63830 100644
--- a/drivers/crypto/ccp/ccp_dev.h
+++ b/drivers/crypto/ccp/ccp_dev.h
@@ -178,7 +178,7 @@ static inline uint32_t ccp_pci_reg_read(void *base, int offset)
 /**
  * A structure describing a CCP command queue.
  */
-struct ccp_queue {
+struct __rte_cache_aligned ccp_queue {
 	struct ccp_device *dev;
 	char memz_name[RTE_MEMZONE_NAMESIZE];
 
@@ -214,12 +214,12 @@ struct ccp_queue {
 	/**< lsb assigned for sha ctx */
 	uint32_t sb_hmac;
 	/**< lsb assigned for hmac ctx */
-} __rte_cache_aligned;
+};
 
 /**
  * A structure describing a CCP device.
  */
-struct ccp_device {
+struct __rte_cache_aligned ccp_device {
 	TAILQ_ENTRY(ccp_device) next;
 	int id;
 	/**< ccp dev id on platform */
@@ -237,7 +237,7 @@ struct ccp_device {
 	/**< current queue index */
 	int hwrng_retries;
 	/**< retry counter for CCP TRNG */
-} __rte_cache_aligned;
+};
 
 /**< CCP H/W engine related */
 /**
diff --git a/drivers/crypto/ccp/ccp_pmd_private.h b/drivers/crypto/ccp/ccp_pmd_private.h
index 6704e39..390442f 100644
--- a/drivers/crypto/ccp/ccp_pmd_private.h
+++ b/drivers/crypto/ccp/ccp_pmd_private.h
@@ -46,7 +46,7 @@ struct ccp_private {
 };
 
 /* CCP batch info */
-struct ccp_batch_info {
+struct __rte_cache_aligned ccp_batch_info {
 	struct rte_crypto_op *op[CCP_MAX_BURST];
 	/**< optable populated at enque time from app*/
 	int op_idx;
@@ -66,10 +66,10 @@ struct ccp_batch_info {
 	int lsb_buf_idx;
 	uint16_t auth_ctr;
 	/**< auth only ops batch for CPU based auth */
-} __rte_cache_aligned;
+};
 
 /**< CCP crypto queue pair */
-struct ccp_qp {
+struct __rte_cache_aligned ccp_qp {
 	uint16_t id;
 	/**< Queue Pair Identifier */
 	char name[RTE_CRYPTODEV_NAME_MAX_LEN];
@@ -91,7 +91,7 @@ struct ccp_qp {
 	 * by the driver when verifying a digest provided
 	 * by the user (using authentication verify operation)
 	 */
-} __rte_cache_aligned;
+};
 
 
 /**< device specific operations function pointer structure */
-- 
1.8.3.1

[PATCH v2 61/83] crypto/caam_jr: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/caam_jr/caam_jr_desc.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/caam_jr/caam_jr_desc.h b/drivers/crypto/caam_jr/caam_jr_desc.h
index 6fe6184..c85278b 100644
--- a/drivers/crypto/caam_jr/caam_jr_desc.h
+++ b/drivers/crypto/caam_jr/caam_jr_desc.h
@@ -261,15 +261,15 @@ struct load_command_s {
  * will be type-casted to this one
  * this one.
  */
-struct sec_sd_t {
+struct __rte_aligned(64) sec_sd_t {
 	uint32_t rsvd[MAX_DESC_SIZE_WORDS];
-} __rte_packed __rte_aligned(64);
+} __rte_packed;
 
 /* Structure encompassing a job descriptor which processes
  * a single packet from a context. The job descriptor references
  * a shared descriptor from a SEC context.
  */
-struct sec_job_descriptor_t {
+struct __rte_aligned(64) sec_job_descriptor_t {
 	struct descriptor_header_s deschdr;
 	dma_addr_t sd_ptr;
 	struct seq_out_command_s seq_out;
@@ -280,6 +280,6 @@ struct sec_job_descriptor_t {
 	uint32_t in_ext_length;
 	struct load_command_s load_dpovrd;
 	uint32_t dpovrd;
-} __rte_packed __rte_aligned(64);
+} __rte_packed;
 
 #endif
-- 
1.8.3.1

[PATCH v2 62/83] crypto/bcmfs: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/bcmfs/bcmfs_qp.h          | 4 ++--
 drivers/crypto/bcmfs/bcmfs_sym_session.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/bcmfs/bcmfs_qp.h b/drivers/crypto/bcmfs/bcmfs_qp.h
index 57fe0a9..42adff9 100644
--- a/drivers/crypto/bcmfs/bcmfs_qp.h
+++ b/drivers/crypto/bcmfs/bcmfs_qp.h
@@ -76,7 +76,7 @@ struct bcmfs_queue {
 	char memz_name[RTE_MEMZONE_NAMESIZE];
 };
 
-struct bcmfs_qp {
+struct __rte_cache_aligned bcmfs_qp {
 	/* Queue-pair ID */
 	uint16_t qpair_id;
 	/* Mapped IO address */
@@ -104,7 +104,7 @@ struct bcmfs_qp {
 	/* a temporary buffer to keep message pointers */
 	struct bcmfs_qp_message *infl_msgs[BCMFS_MAX_REQS_BUFF];
 
-} __rte_cache_aligned;
+};
 
 /* Structure defining h/w queue pair operations */
 struct bcmfs_hw_queue_pair_ops {
diff --git a/drivers/crypto/bcmfs/bcmfs_sym_session.h b/drivers/crypto/bcmfs/bcmfs_sym_session.h
index 4a0a012..12e95f6 100644
--- a/drivers/crypto/bcmfs/bcmfs_sym_session.h
+++ b/drivers/crypto/bcmfs/bcmfs_sym_session.h
@@ -24,7 +24,7 @@ enum bcmfs_sym_chain_order {
 };
 
 /* BCMFS_SYM crypto private session structure */
-struct bcmfs_sym_session {
+struct __rte_cache_aligned bcmfs_sym_session {
 	enum bcmfs_sym_chain_order chain_order;
 
 	/* Cipher Parameters */
@@ -83,7 +83,7 @@ struct bcmfs_sym_session {
 	} aead;
 
 	bool cipher_first;
-} __rte_cache_aligned;
+};
 
 int
 bcmfs_process_crypto_op(struct rte_crypto_op *op,
-- 
1.8.3.1

[PATCH v2 63/83] crypto/armv8: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/crypto/armv8/armv8_pmd_private.h | 14 ++++++--------
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/crypto/armv8/armv8_pmd_private.h b/drivers/crypto/armv8/armv8_pmd_private.h
index 41292d8..c9bbcc2 100644
--- a/drivers/crypto/armv8/armv8_pmd_private.h
+++ b/drivers/crypto/armv8/armv8_pmd_private.h
@@ -99,7 +99,7 @@ struct armv8_crypto_private {
 };
 
 /** ARMv8 crypto queue pair */
-struct armv8_crypto_qp {
+struct __rte_cache_aligned armv8_crypto_qp {
 	uint16_t id;
 	/**< Queue Pair Identifier */
 	struct rte_ring *processed_ops;
@@ -115,10 +115,10 @@ struct armv8_crypto_qp {
 	 * by the driver when verifying a digest provided
 	 * by the user (using authentication verify operation)
 	 */
-} __rte_cache_aligned;
+};
 
 /** ARMv8 crypto private session structure */
-struct armv8_crypto_session {
+struct __rte_cache_aligned armv8_crypto_session {
 	enum armv8_crypto_chain_order chain_order;
 	/**< chain order mode */
 	crypto_func_t crypto_func;
@@ -160,11 +160,9 @@ struct armv8_crypto_session {
 			} auth;
 
 			struct {
-				uint8_t i_key_pad[SHA_BLOCK_MAX]
-							__rte_cache_aligned;
+				alignas(RTE_CACHE_LINE_SIZE) uint8_t i_key_pad[SHA_BLOCK_MAX];
 				/**< inner pad (max supported block length) */
-				uint8_t o_key_pad[SHA_BLOCK_MAX]
-							__rte_cache_aligned;
+				alignas(RTE_CACHE_LINE_SIZE) uint8_t o_key_pad[SHA_BLOCK_MAX];
 				/**< outer pad (max supported block length) */
 				uint8_t key[SHA_BLOCK_MAX];
 				/**< HMAC key (max supported block length)*/
@@ -174,7 +172,7 @@ struct armv8_crypto_session {
 		/* Digest length */
 	} auth;
 
-} __rte_cache_aligned;
+};
 
 /** Set and validate ARMv8 crypto session parameters */
 extern int armv8_crypto_set_session_parameters(
-- 
1.8.3.1

[PATCH v2 64/83] compress/zlib: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/compress/zlib/zlib_pmd_private.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/compress/zlib/zlib_pmd_private.h b/drivers/compress/zlib/zlib_pmd_private.h
index e36c5dc..46a33d4 100644
--- a/drivers/compress/zlib/zlib_pmd_private.h
+++ b/drivers/compress/zlib/zlib_pmd_private.h
@@ -30,7 +30,7 @@ struct zlib_private {
 	struct rte_mempool *mp;
 };
 
-struct zlib_qp {
+struct __rte_cache_aligned zlib_qp {
 	struct rte_ring *processed_pkts;
 	/**< Ring for placing process packets */
 	struct rte_compressdev_stats qp_stats;
@@ -39,7 +39,7 @@ struct zlib_qp {
 	/**< Queue Pair Identifier */
 	char name[RTE_COMPRESSDEV_NAME_MAX_LEN];
 	/**< Unique Queue Pair Name */
-} __rte_cache_aligned;
+};
 
 /* Algorithm handler function prototype */
 typedef void (*comp_func_t)(struct rte_comp_op *op, z_stream *strm);
@@ -47,19 +47,19 @@ struct zlib_qp {
 typedef int (*comp_free_t)(z_stream *strm);
 
 /** ZLIB Stream structure */
-struct zlib_stream {
+struct __rte_cache_aligned zlib_stream {
 	z_stream strm;
 	/**< zlib stream structure */
 	comp_func_t comp;
 	/**< Operation (compression/decompression) */
 	comp_free_t free;
 	/**< Free Operation (compression/decompression) */
-} __rte_cache_aligned;
+};
 
 /** ZLIB private xform structure */
-struct zlib_priv_xform {
+struct __rte_cache_aligned zlib_priv_xform {
 	struct zlib_stream stream;
-} __rte_cache_aligned;
+};
 
 int
 zlib_set_stream_parameters(const struct rte_comp_xform *xform,
-- 
1.8.3.1

[PATCH v2 65/83] compress/qat: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/compress/qat/qat_comp.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/compress/qat/qat_comp.h b/drivers/compress/qat/qat_comp.h
index dc220cd..1da4770 100644
--- a/drivers/compress/qat/qat_comp.h
+++ b/drivers/compress/qat/qat_comp.h
@@ -50,10 +50,10 @@ struct array_of_ptrs {
 	phys_addr_t pointer[0];
 };
 
-struct qat_inter_sgl {
+struct __rte_cache_aligned qat_inter_sgl {
 	qat_sgl_hdr;
 	struct qat_flat_buf buffers[QAT_NUM_BUFS_IN_IM_SGL];
-} __rte_packed __rte_cache_aligned;
+} __rte_packed;
 
 
 struct qat_comp_op_cookie {
-- 
1.8.3.1

[PATCH v2 66/83] compress/octeontx: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/compress/octeontx/otx_zip.h | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/compress/octeontx/otx_zip.h b/drivers/compress/octeontx/otx_zip.h
index 7391360..bb19854 100644
--- a/drivers/compress/octeontx/otx_zip.h
+++ b/drivers/compress/octeontx/otx_zip.h
@@ -106,21 +106,21 @@ typedef int (*comp_func_t)(struct rte_comp_op *op, struct zipvf_qp *qp,
 			   struct zip_stream *zstrm, int num);
 
 /* Scatter gather list */
-struct zipvf_sginfo {
+struct __rte_aligned(16) zipvf_sginfo {
 	union zip_zptr_addr_s  sg_addr;
 	union zip_zptr_ctl_s   sg_ctl;
-} __rte_aligned(16);
+};
 
 /**
  * ZIP private stream structure
  */
-struct zip_stream {
+struct __rte_cache_aligned zip_stream {
 	union zip_inst_s *inst[ZIP_BURST_SIZE];
 	/* zip instruction pointer */
 	comp_func_t func;
 	/* function to process comp operation */
 	void *bufs[MAX_BUFS_PER_STREAM * ZIP_BURST_SIZE];
-} __rte_cache_aligned;
+};
 
 
 /**
@@ -140,7 +140,7 @@ struct zipvf_cmdq {
 /**
  * ZIP device queue structure
  */
-struct zipvf_qp {
+struct __rte_cache_aligned zipvf_qp {
 	struct zipvf_cmdq cmdq;
 	/* Hardware instruction queue structure */
 	struct rte_ring *processed_pkts;
@@ -158,12 +158,12 @@ struct zipvf_qp {
 	/* SGL pointers */
 	uint64_t num_sgbuf;
 	uint64_t enqed;
-} __rte_cache_aligned;
+};
 
 /**
  * ZIP VF device structure.
  */
-struct zip_vf {
+struct __rte_cache_aligned zip_vf {
 	int vfid;
 	/* vf index */
 	struct rte_pci_device *pdev;
@@ -177,7 +177,7 @@ struct zip_vf {
 	struct rte_mempool *zip_mp;
 	struct rte_mempool *sg_mp;
 	/* pointer to pools */
-} __rte_cache_aligned;
+};
 
 
 static inline int
-- 
1.8.3.1

[PATCH v2 67/83] compress/nitrox: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/compress/nitrox/nitrox_comp_reqmgr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/compress/nitrox/nitrox_comp_reqmgr.c b/drivers/compress/nitrox/nitrox_comp_reqmgr.c
index ca45c3e..89af855 100644
--- a/drivers/compress/nitrox/nitrox_comp_reqmgr.c
+++ b/drivers/compress/nitrox/nitrox_comp_reqmgr.c
@@ -304,7 +304,7 @@ struct nitrox_sgtable {
 
 struct nitrox_softreq {
 	struct nitrox_zip_instr instr;
-	struct nitrox_zip_result zip_res __rte_aligned(8);
+	alignas(8) struct nitrox_zip_result zip_res;
 	uint8_t decomp_threshold[NITROX_ZIP_MAX_ONFSIZE];
 	struct rte_comp_op *op;
 	struct nitrox_sgtable src;
-- 
1.8.3.1

[PATCH v2 68/83] compress/isal: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/compress/isal/isal_compress_pmd_private.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/compress/isal/isal_compress_pmd_private.h b/drivers/compress/isal/isal_compress_pmd_private.h
index 46e9fcf..c713a5b 100644
--- a/drivers/compress/isal/isal_compress_pmd_private.h
+++ b/drivers/compress/isal/isal_compress_pmd_private.h
@@ -19,7 +19,7 @@ struct isal_comp_private {
 };
 
 /** ISA-L queue pair */
-struct isal_comp_qp {
+struct __rte_cache_aligned isal_comp_qp {
 	/* Queue Pair Identifier */
 	uint16_t id;
 	/* Unique Queue Pair Name */
@@ -34,17 +34,17 @@ struct isal_comp_qp {
 	struct inflate_state *state;
 	/* Number of free elements on ring */
 	uint16_t num_free_elements;
-} __rte_cache_aligned;
+};
 
 /** ISA-L private xform structure */
-struct isal_priv_xform {
+struct __rte_cache_aligned isal_priv_xform {
 	enum rte_comp_xform_type type;
 	union {
 		struct rte_comp_compress_xform compress;
 		struct rte_comp_decompress_xform decompress;
 	};
 	uint32_t level_buffer_size;
-} __rte_cache_aligned;
+};
 
 /** Set and validate NULL comp private xform parameters */
 extern int
-- 
1.8.3.1

[PATCH v2 69/83] common/qat: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/common/qat/qat_adf/icp_qat_hw.h | 8 ++++----
 drivers/common/qat/qat_common.h         | 4 ++--
 drivers/common/qat/qat_qp.h             | 6 +++---
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/common/qat/qat_adf/icp_qat_hw.h b/drivers/common/qat/qat_adf/icp_qat_hw.h
index 21ee3cf..1d61a0b 100644
--- a/drivers/common/qat/qat_adf/icp_qat_hw.h
+++ b/drivers/common/qat/qat_adf/icp_qat_hw.h
@@ -391,10 +391,10 @@ enum icp_qat_hw_cipher_convert {
 #define ICP_QAT_HW_CCM_MSG_LEN_MAX_FIELD_SIZE 4
 #define ICP_QAT_HW_CCM_NONCE_OFFSET 1
 
-struct icp_qat_hw_cipher_algo_blk {
+struct __rte_cache_aligned icp_qat_hw_cipher_algo_blk {
 	struct icp_qat_hw_cipher_config cipher_config;
 	uint8_t key[ICP_QAT_HW_CIPHER_MAX_KEY_SZ];
-} __rte_cache_aligned;
+};
 
 struct icp_qat_hw_gen2_crc_cd {
 	uint32_t flags;
@@ -423,10 +423,10 @@ struct icp_qat_hw_ucs_cipher_config {
 	uint32_t reserved[3];
 };
 
-struct icp_qat_hw_cipher_algo_blk20 {
+struct __rte_cache_aligned icp_qat_hw_cipher_algo_blk20 {
 	struct icp_qat_hw_ucs_cipher_config cipher_config;
 	uint8_t key[ICP_QAT_HW_CIPHER_MAX_KEY_SZ];
-} __rte_cache_aligned;
+};
 
 enum icp_qat_hw_ucs_cipher_reflect_out {
 	ICP_QAT_HW_CIPHER_UCS_REFLECT_OUT_DISABLED = 0,
diff --git a/drivers/common/qat/qat_common.h b/drivers/common/qat/qat_common.h
index 6d0f4ae..70d78ee 100644
--- a/drivers/common/qat/qat_common.h
+++ b/drivers/common/qat/qat_common.h
@@ -61,11 +61,11 @@ struct qat_flat_buf {
 }
 
 __extension__
-struct qat_sgl {
+struct __rte_cache_aligned qat_sgl {
 	qat_sgl_hdr;
 	/* flexible array of flat buffers*/
 	struct qat_flat_buf buffers[0];
-} __rte_packed __rte_cache_aligned;
+} __rte_packed;
 
 /** Common, i.e. not service-specific, statistics */
 struct qat_common_stats {
diff --git a/drivers/common/qat/qat_qp.h b/drivers/common/qat/qat_qp.h
index ae18fb9..94590d3 100644
--- a/drivers/common/qat/qat_qp.h
+++ b/drivers/common/qat/qat_qp.h
@@ -81,7 +81,7 @@ typedef int (*qat_op_dequeue_t)(void **op, uint8_t *resp, void *op_cookie,
 
 #define QAT_BUILD_REQUEST_MAX_OPAQUE_SIZE	2
 
-struct qat_qp {
+struct __rte_cache_aligned qat_qp {
 	void			*mmap_bar_addr;
 	struct qat_queue	tx_q;
 	struct qat_queue	rx_q;
@@ -95,10 +95,10 @@ struct qat_qp {
 	struct qat_pci_device *qat_dev;
 	/**< qat device this qp is on */
 	uint32_t enqueued;
-	uint32_t dequeued __rte_aligned(4);
+	alignas(sizeof(uint32_t)) uint32_t dequeued;
 	uint16_t max_inflights;
 	uint16_t min_enq_burst_threshold;
-} __rte_cache_aligned;
+};
 
 /**
  * Structure with data needed for creation of queue pair.
-- 
1.8.3.1

[PATCH v2 70/83] common/mlx5: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/common/mlx5/linux/mlx5_glue.c   |  2 +-
 drivers/common/mlx5/linux/mlx5_nl.c     |  2 +-
 drivers/common/mlx5/mlx5_common_mr.h    |  4 ++--
 drivers/common/mlx5/mlx5_common_utils.h | 12 ++++++------
 drivers/common/mlx5/mlx5_prm.h          |  4 ++--
 5 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/common/mlx5/linux/mlx5_glue.c b/drivers/common/mlx5/linux/mlx5_glue.c
index 6f858db..99761ea 100644
--- a/drivers/common/mlx5/linux/mlx5_glue.c
+++ b/drivers/common/mlx5/linux/mlx5_glue.c
@@ -1578,7 +1578,7 @@
 #endif
 }
 
-__rte_cache_aligned
+alignas(RTE_CACHE_LINE_SIZE)
 const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue) {
 	.version = MLX5_GLUE_VERSION,
 	.fork_init = mlx5_glue_fork_init,
diff --git a/drivers/common/mlx5/linux/mlx5_nl.c b/drivers/common/mlx5/linux/mlx5_nl.c
index 28a1f56..61192eb 100644
--- a/drivers/common/mlx5/linux/mlx5_nl.c
+++ b/drivers/common/mlx5/linux/mlx5_nl.c
@@ -1507,7 +1507,7 @@ struct mlx5_nl_port_info {
 	struct ifinfomsg *ifm;
 	char name[sizeof(MLX5_VMWA_VLAN_DEVICE_PFX) + 32];
 
-	__rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE)
 	uint8_t buf[NLMSG_ALIGN(sizeof(struct nlmsghdr)) +
 		    NLMSG_ALIGN(sizeof(struct ifinfomsg)) +
 		    NLMSG_ALIGN(sizeof(struct nlattr)) * 8 +
diff --git a/drivers/common/mlx5/mlx5_common_mr.h b/drivers/common/mlx5/mlx5_common_mr.h
index 8789d40..aa10b68 100644
--- a/drivers/common/mlx5/mlx5_common_mr.h
+++ b/drivers/common/mlx5/mlx5_common_mr.h
@@ -91,7 +91,7 @@ struct mlx5_mr_share_cache {
 } __rte_packed;
 
 /* Multi-Packet RQ buffer header. */
-struct mlx5_mprq_buf {
+struct __rte_cache_aligned mlx5_mprq_buf {
 	struct rte_mempool *mp;
 	uint16_t refcnt; /* Atomically accessed refcnt. */
 	struct rte_mbuf_ext_shared_info shinfos[];
@@ -100,7 +100,7 @@ struct mlx5_mprq_buf {
 	 * More memory will be allocated for the first stride head-room and for
 	 * the strides data.
 	 */
-} __rte_cache_aligned;
+};
 
 __rte_internal
 void mlx5_mprq_buf_free_cb(void *addr, void *opaque);
diff --git a/drivers/common/mlx5/mlx5_common_utils.h b/drivers/common/mlx5/mlx5_common_utils.h
index ae15119..44eba50 100644
--- a/drivers/common/mlx5/mlx5_common_utils.h
+++ b/drivers/common/mlx5/mlx5_common_utils.h
@@ -29,7 +29,7 @@
  */
 struct mlx5_list_entry {
 	LIST_ENTRY(mlx5_list_entry) next; /* Entry pointers in the list. */
-	uint32_t ref_cnt __rte_aligned(8); /* 0 means, entry is invalid. */
+	alignas(8) uint32_t ref_cnt; /* 0 means, entry is invalid. */
 	uint32_t lcore_idx;
 	union {
 		struct mlx5_list_entry *gentry;
@@ -37,10 +37,10 @@ struct mlx5_list_entry {
 	};
 } __rte_packed;
 
-struct mlx5_list_cache {
+struct __rte_cache_aligned mlx5_list_cache {
 	LIST_HEAD(mlx5_list_head, mlx5_list_entry) h;
 	uint32_t inv_cnt; /* Invalid entries counter. */
-} __rte_cache_aligned;
+};
 
 /**
  * Type of callback function for entry removal.
@@ -243,9 +243,9 @@ int mlx5_list_unregister(struct mlx5_list *list,
 /********************* Hash List **********************/
 
 /* Hash list bucket. */
-struct mlx5_hlist_bucket {
+struct __rte_cache_aligned mlx5_hlist_bucket {
 	struct mlx5_list_inconst l;
-} __rte_cache_aligned;
+};
 
 /**
  * Hash list table structure
@@ -257,7 +257,7 @@ struct mlx5_hlist {
 	uint8_t flags;
 	bool direct_key; /* Whether to use the key directly as hash index. */
 	struct mlx5_list_const l_const; /* List constant data. */
-	struct mlx5_hlist_bucket buckets[] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct mlx5_hlist_bucket buckets[];
 };
 
 /**
diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h
index c671c75..2bbbc44 100644
--- a/drivers/common/mlx5/mlx5_prm.h
+++ b/drivers/common/mlx5/mlx5_prm.h
@@ -319,12 +319,12 @@ enum mlx5_mpw_mode {
 };
 
 /* WQE Control segment. */
-struct mlx5_wqe_cseg {
+struct __rte_aligned(MLX5_WSEG_SIZE) mlx5_wqe_cseg {
 	uint32_t opcode;
 	uint32_t sq_ds;
 	uint32_t flags;
 	uint32_t misc;
-} __rte_packed __rte_aligned(MLX5_WSEG_SIZE);
+} __rte_packed;
 
 /*
  * WQE CSEG opcode field size is 32 bits, divided:
-- 
1.8.3.1

[PATCH v2 71/83] common/idpf: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/common/idpf/idpf_common_device.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/common/idpf/idpf_common_device.h b/drivers/common/idpf/idpf_common_device.h
index 2b94f03..3834c1f 100644
--- a/drivers/common/idpf/idpf_common_device.h
+++ b/drivers/common/idpf/idpf_common_device.h
@@ -52,7 +52,7 @@ struct idpf_adapter {
 	uint32_t cmd_retval; /* return value of the cmd response from cp */
 	uint8_t *mbx_resp; /* buffer to store the mailbox response from cp */
 
-	uint32_t ptype_tbl[IDPF_MAX_PKT_TYPE] __rte_cache_min_aligned;
+	alignas(RTE_CACHE_LINE_MIN_SIZE) uint32_t ptype_tbl[IDPF_MAX_PKT_TYPE];
 
 	bool is_tx_singleq; /* true - single queue model, false - split queue model */
 	bool is_rx_singleq; /* true - single queue model, false - split queue model */
-- 
1.8.3.1

[PATCH v2 72/83] common/cpt: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/common/cpt/cpt_common.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/common/cpt/cpt_common.h b/drivers/common/cpt/cpt_common.h
index d70668a..6596cc0 100644
--- a/drivers/common/cpt/cpt_common.h
+++ b/drivers/common/cpt/cpt_common.h
@@ -41,7 +41,7 @@ struct pending_queue {
 	unsigned int head;
 };
 
-struct cpt_request_info {
+struct __rte_aligned(8) cpt_request_info {
 	/** Data path fields */
 	uint64_t comp_baddr;
 	volatile uint64_t *completion_addr;
@@ -58,7 +58,7 @@ struct cpt_request_info {
 	/** Control path fields */
 	uint64_t time_out;
 	uint8_t extra_time;
-} __rte_aligned(8);
+};
 
 static __rte_always_inline void
 pending_queue_push(struct pending_queue *q, void *rid, unsigned int off,
-- 
1.8.3.1

[PATCH v2 73/83] bus/fslmc: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index bd949ad..169c791 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -151,7 +151,7 @@ typedef void (dpaa2_queue_cb_dqrr_t)(struct qbman_swp *swp,
 typedef void (dpaa2_queue_cb_eqresp_free_t)(uint16_t eqresp_ci,
 					struct dpaa2_queue *dpaa2_q);
 
-struct dpaa2_queue {
+struct __rte_cache_aligned dpaa2_queue {
 	struct rte_mempool *mb_pool; /**< mbuf pool to populate RX ring. */
 	union {
 		struct rte_eth_dev_data *eth_data;
@@ -179,7 +179,7 @@ struct dpaa2_queue {
 	uint16_t resv;
 	uint64_t offloads;
 	uint64_t lpbk_cntx;
-} __rte_cache_aligned;
+};
 
 struct swp_active_dqs {
 	struct qbman_result *global_active_dqs;
-- 
1.8.3.1

[PATCH v2 74/83] baseband/turbo_sw: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/baseband/turbo_sw/bbdev_turbo_software.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/baseband/turbo_sw/bbdev_turbo_software.c b/drivers/baseband/turbo_sw/bbdev_turbo_software.c
index 8ddc7ff..574743a 100644
--- a/drivers/baseband/turbo_sw/bbdev_turbo_software.c
+++ b/drivers/baseband/turbo_sw/bbdev_turbo_software.c
@@ -72,7 +72,7 @@ struct turbo_sw_params {
 };
 
 /* queue */
-struct turbo_sw_queue {
+struct __rte_cache_aligned turbo_sw_queue {
 	/* Ring for processed (encoded/decoded) operations which are ready to
 	 * be dequeued.
 	 */
@@ -95,7 +95,7 @@ struct turbo_sw_queue {
 	uint8_t *adapter_output;
 	/* Operation type of this queue */
 	enum rte_bbdev_op_type type;
-} __rte_cache_aligned;
+};
 
 
 #ifdef RTE_BBDEV_SDK_AVX2
-- 
1.8.3.1

[PATCH v2 75/83] baseband/null: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/baseband/null/bbdev_null.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/baseband/null/bbdev_null.c b/drivers/baseband/null/bbdev_null.c
index 662663c..75f7899 100644
--- a/drivers/baseband/null/bbdev_null.c
+++ b/drivers/baseband/null/bbdev_null.c
@@ -47,9 +47,9 @@ struct bbdev_private {
 };
 
 /* queue */
-struct bbdev_queue {
+struct __rte_cache_aligned bbdev_queue {
 	struct rte_ring *processed_pkts;  /* Ring for processed packets */
-} __rte_cache_aligned;
+};
 
 /* Get device info */
 static void
-- 
1.8.3.1

[PATCH v2 76/83] app/test: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 app/test/test_cryptodev_aead_test_vectors.h            |  6 +++---
 app/test/test_cryptodev_blockcipher.h                  |  2 +-
 app/test/test_cryptodev_kasumi_test_vectors.h          |  2 +-
 app/test/test_cryptodev_mixed_test_vectors.h           |  2 +-
 app/test/test_cryptodev_security_docsis_test_vectors.h |  2 +-
 app/test/test_cryptodev_snow3g_test_vectors.h          |  2 +-
 app/test/test_cryptodev_zuc_test_vectors.h             |  2 +-
 app/test/test_distributor.c                            | 12 ++++++------
 app/test/test_distributor_perf.c                       |  6 +++---
 app/test/test_mempool_perf.c                           |  6 +++---
 app/test/test_pmd_perf.c                               |  4 ++--
 app/test/test_ring_stress_impl.h                       | 10 +++++-----
 app/test/test_rwlock.c                                 |  8 ++++----
 app/test/test_seqlock.c                                |  8 ++++----
 app/test/test_ticketlock.c                             |  4 ++--
 app/test/test_trace_perf.c                             |  8 ++++----
 16 files changed, 42 insertions(+), 42 deletions(-)

diff --git a/app/test/test_cryptodev_aead_test_vectors.h b/app/test/test_cryptodev_aead_test_vectors.h
index 35ae64c..e9b0590 100644
--- a/app/test/test_cryptodev_aead_test_vectors.h
+++ b/app/test/test_cryptodev_aead_test_vectors.h
@@ -47,7 +47,7 @@ struct aead_test_data {
 	} key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned len;
 	} iv;
 
@@ -79,7 +79,7 @@ struct gmac_test_data {
 	} key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned len;
 	} iv;
 
@@ -2025,7 +2025,7 @@ struct cryptodev_perf_test_data {
 	} key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned len;
 	} iv;
 
diff --git a/app/test/test_cryptodev_blockcipher.h b/app/test/test_cryptodev_blockcipher.h
index e6f6c18..a73bee0 100644
--- a/app/test/test_cryptodev_blockcipher.h
+++ b/app/test/test_cryptodev_blockcipher.h
@@ -72,7 +72,7 @@ struct blockcipher_test_data {
 	} cipher_key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned int len;
 	} iv;
 
diff --git a/app/test/test_cryptodev_kasumi_test_vectors.h b/app/test/test_cryptodev_kasumi_test_vectors.h
index f0a6d55..3b51704 100644
--- a/app/test/test_cryptodev_kasumi_test_vectors.h
+++ b/app/test/test_cryptodev_kasumi_test_vectors.h
@@ -12,7 +12,7 @@ struct kasumi_test_data {
 	} key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned int len;
 	} cipher_iv;
 
diff --git a/app/test/test_cryptodev_mixed_test_vectors.h b/app/test/test_cryptodev_mixed_test_vectors.h
index 9c43131..25c4a48 100644
--- a/app/test/test_cryptodev_mixed_test_vectors.h
+++ b/app/test/test_cryptodev_mixed_test_vectors.h
@@ -32,7 +32,7 @@ struct mixed_cipher_auth_test_data {
 	} cipher_key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned int len; /* length must be in Bytes */
 	} cipher_iv;
 
diff --git a/app/test/test_cryptodev_security_docsis_test_vectors.h b/app/test/test_cryptodev_security_docsis_test_vectors.h
index aa7f56a..7e9909b 100644
--- a/app/test/test_cryptodev_security_docsis_test_vectors.h
+++ b/app/test/test_cryptodev_security_docsis_test_vectors.h
@@ -21,7 +21,7 @@ struct docsis_test_data {
 	} key;
 
 	struct {
-		uint8_t data[16] __rte_aligned(16);
+		alignas(16) uint8_t data[16];
 		unsigned int len;
 	} iv;
 
diff --git a/app/test/test_cryptodev_snow3g_test_vectors.h b/app/test/test_cryptodev_snow3g_test_vectors.h
index 3b7e442..10db4f6 100644
--- a/app/test/test_cryptodev_snow3g_test_vectors.h
+++ b/app/test/test_cryptodev_snow3g_test_vectors.h
@@ -12,7 +12,7 @@ struct snow3g_test_data {
 	} key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned len;
 	} cipher_iv;
 
diff --git a/app/test/test_cryptodev_zuc_test_vectors.h b/app/test/test_cryptodev_zuc_test_vectors.h
index cb1b51e..714d681 100644
--- a/app/test/test_cryptodev_zuc_test_vectors.h
+++ b/app/test/test_cryptodev_zuc_test_vectors.h
@@ -12,7 +12,7 @@ struct wireless_test_data {
 	} key;
 
 	struct {
-		uint8_t data[64] __rte_aligned(16);
+		alignas(16) uint8_t data[64];
 		unsigned len;
 	} cipher_iv;
 
diff --git a/app/test/test_distributor.c b/app/test/test_distributor.c
index d2037b7..13357b9 100644
--- a/app/test/test_distributor.c
+++ b/app/test/test_distributor.c
@@ -53,9 +53,9 @@ struct worker_params {
 static volatile unsigned worker_idx;
 static volatile unsigned zero_idx;
 
-struct worker_stats {
+struct __rte_cache_aligned worker_stats {
 	volatile unsigned handled_packets;
-} __rte_cache_aligned;
+};
 struct worker_stats worker_stats[RTE_MAX_LCORE];
 
 /* returns the total count of the number of packets handled by the worker
@@ -87,7 +87,7 @@ struct worker_stats {
 static int
 handle_work(void *arg)
 {
-	struct rte_mbuf *buf[8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *buf[8];
 	struct worker_params *wp = arg;
 	struct rte_distributor *db = wp->dist;
 	unsigned int num;
@@ -306,7 +306,7 @@ struct worker_stats {
 static int
 handle_work_with_free_mbufs(void *arg)
 {
-	struct rte_mbuf *buf[8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *buf[8];
 	struct worker_params *wp = arg;
 	struct rte_distributor *d = wp->dist;
 	unsigned int i;
@@ -375,7 +375,7 @@ struct worker_stats {
 static int
 handle_work_for_shutdown_test(void *arg)
 {
-	struct rte_mbuf *buf[8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *buf[8];
 	struct worker_params *wp = arg;
 	struct rte_distributor *d = wp->dist;
 	unsigned int num;
@@ -592,7 +592,7 @@ struct worker_stats {
 static int
 handle_and_mark_work(void *arg)
 {
-	struct rte_mbuf *buf[8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *buf[8];
 	struct worker_params *wp = arg;
 	struct rte_distributor *db = wp->dist;
 	unsigned int num, i;
diff --git a/app/test/test_distributor_perf.c b/app/test/test_distributor_perf.c
index ca86845..c0ad39d 100644
--- a/app/test/test_distributor_perf.c
+++ b/app/test/test_distributor_perf.c
@@ -33,9 +33,9 @@
 static volatile int quit;
 static volatile unsigned worker_idx;
 
-struct worker_stats {
+struct __rte_cache_aligned worker_stats {
 	volatile unsigned handled_packets;
-} __rte_cache_aligned;
+};
 static struct worker_stats worker_stats[RTE_MAX_LCORE];
 
 /*
@@ -122,7 +122,7 @@ struct worker_stats {
 	unsigned int num = 0;
 	int i;
 	unsigned int id = __atomic_fetch_add(&worker_idx, 1, __ATOMIC_RELAXED);
-	struct rte_mbuf *buf[8] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_mbuf *buf[8];
 
 	for (i = 0; i < 8; i++)
 		buf[i] = NULL;
diff --git a/app/test/test_mempool_perf.c b/app/test/test_mempool_perf.c
index 96de347..a42a772 100644
--- a/app/test/test_mempool_perf.c
+++ b/app/test/test_mempool_perf.c
@@ -101,9 +101,9 @@
 static int use_constant_values;
 
 /* number of enqueues / dequeues */
-struct mempool_test_stats {
+struct __rte_cache_aligned mempool_test_stats {
 	uint64_t enq_count;
-} __rte_cache_aligned;
+};
 
 static struct mempool_test_stats stats[RTE_MAX_LCORE];
 
@@ -124,7 +124,7 @@ struct mempool_test_stats {
 test_loop(struct rte_mempool *mp, struct rte_mempool_cache *cache,
 	  unsigned int x_keep, unsigned int x_get_bulk, unsigned int x_put_bulk)
 {
-	void *obj_table[MAX_KEEP] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) void *obj_table[MAX_KEEP];
 	unsigned int idx;
 	unsigned int i;
 	int ret;
diff --git a/app/test/test_pmd_perf.c b/app/test/test_pmd_perf.c
index f6d97f2..35fa068 100644
--- a/app/test/test_pmd_perf.c
+++ b/app/test/test_pmd_perf.c
@@ -94,12 +94,12 @@ enum {
 	LCORE_USED,
 };
 
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint8_t status;
 	uint8_t socketid;
 	uint16_t nb_ports;
 	uint16_t portlist[RTE_MAX_ETHPORTS];
-} __rte_cache_aligned;
+};
 
 struct lcore_conf lcore_conf[RTE_MAX_LCORE];
 
diff --git a/app/test/test_ring_stress_impl.h b/app/test/test_ring_stress_impl.h
index 2dec897..202d47d 100644
--- a/app/test/test_ring_stress_impl.h
+++ b/app/test/test_ring_stress_impl.h
@@ -24,7 +24,7 @@ enum {
 	WRK_CMD_RUN,
 };
 
-static uint32_t wrk_cmd __rte_cache_aligned = WRK_CMD_STOP;
+static alignas(RTE_CACHE_LINE_SIZE) uint32_t wrk_cmd = WRK_CMD_STOP;
 
 /* test run-time in seconds */
 static const uint32_t run_time = 60;
@@ -41,14 +41,14 @@ struct lcore_stat {
 	} op;
 };
 
-struct lcore_arg {
+struct __rte_cache_aligned lcore_arg {
 	struct rte_ring *rng;
 	struct lcore_stat stats;
-} __rte_cache_aligned;
+};
 
-struct ring_elem {
+struct __rte_cache_aligned ring_elem {
 	uint32_t cnt[RTE_CACHE_LINE_SIZE / sizeof(uint32_t)];
-} __rte_cache_aligned;
+};
 
 /*
  * redefinable functions
diff --git a/app/test/test_rwlock.c b/app/test/test_rwlock.c
index 5079895..e8767da 100644
--- a/app/test/test_rwlock.c
+++ b/app/test/test_rwlock.c
@@ -42,7 +42,7 @@ enum {
 	LC_TYPE_WRLOCK,
 };
 
-static struct {
+static alignas(RTE_CACHE_LINE_SIZE) struct {
 	rte_rwlock_t lock;
 	uint64_t tick;
 
@@ -50,9 +50,9 @@ enum {
 		uint8_t u8[RTE_CACHE_LINE_SIZE];
 		uint64_t u64[RTE_CACHE_LINE_SIZE / sizeof(uint64_t)];
 	} data;
-} __rte_cache_aligned try_rwlock_data;
+} try_rwlock_data;
 
-struct try_rwlock_lcore {
+struct __rte_cache_aligned try_rwlock_lcore {
 	int32_t rc;
 	int32_t type;
 	struct {
@@ -60,7 +60,7 @@ struct try_rwlock_lcore {
 		uint64_t fail;
 		uint64_t success;
 	} stat;
-} __rte_cache_aligned;
+};
 
 static struct try_rwlock_lcore try_lcore_data[RTE_MAX_LCORE];
 
diff --git a/app/test/test_seqlock.c b/app/test/test_seqlock.c
index 873bd60..bab8b0f 100644
--- a/app/test/test_seqlock.c
+++ b/app/test/test_seqlock.c
@@ -12,13 +12,13 @@
 
 #include "test.h"
 
-struct data {
+struct __rte_cache_aligned data {
 	rte_seqlock_t lock;
 
 	uint64_t a;
-	uint64_t b __rte_cache_aligned;
-	uint64_t c __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t b;
+	alignas(RTE_CACHE_LINE_SIZE) uint64_t c;
+};
 
 struct reader {
 	struct data *data;
diff --git a/app/test/test_ticketlock.c b/app/test/test_ticketlock.c
index 1fbbedb..7a6cb4c 100644
--- a/app/test/test_ticketlock.c
+++ b/app/test/test_ticketlock.c
@@ -95,8 +95,8 @@
 }
 
 static rte_ticketlock_t lk = RTE_TICKETLOCK_INITIALIZER;
-static uint64_t lcount __rte_cache_aligned;
-static uint64_t lcore_count[RTE_MAX_LCORE] __rte_cache_aligned;
+static alignas(RTE_CACHE_LINE_SIZE) uint64_t lcount;
+static alignas(RTE_CACHE_LINE_SIZE) uint64_t lcore_count[RTE_MAX_LCORE];
 static uint64_t time_cost[RTE_MAX_LCORE];
 
 #define MAX_LOOP 10000
diff --git a/app/test/test_trace_perf.c b/app/test/test_trace_perf.c
index a6dd075..8257cc0 100644
--- a/app/test/test_trace_perf.c
+++ b/app/test/test_trace_perf.c
@@ -14,17 +14,17 @@
 
 struct test_data;
 
-struct lcore_data {
+struct __rte_cache_aligned lcore_data {
 	volatile bool done;
 	volatile bool started;
 	uint64_t total_cycles;
 	uint64_t total_calls;
-} __rte_cache_aligned;
+};
 
-struct test_data {
+struct __rte_cache_aligned test_data {
 	unsigned int nb_workers;
 	struct lcore_data ldata[];
-} __rte_cache_aligned;
+};
 
 #define STEP 100
 #define CENT_OPS(OP) do {     \
-- 
1.8.3.1

[PATCH v2 77/83] app/test-pipeline: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 app/test-pipeline/main.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/app/test-pipeline/main.h b/app/test-pipeline/main.h
index 9df157d..ee9c58a 100644
--- a/app/test-pipeline/main.h
+++ b/app/test-pipeline/main.h
@@ -18,7 +18,7 @@ struct app_mbuf_array {
 #define APP_MAX_PORTS 4
 #endif
 
-struct app_params {
+struct __rte_cache_aligned app_params {
 	/* CPU cores */
 	uint32_t core_rx;
 	uint32_t core_worker;
@@ -56,7 +56,7 @@ struct app_params {
 
 	/* App behavior */
 	uint32_t pipeline_type;
-} __rte_cache_aligned;
+};
 
 extern struct app_params app;
 
-- 
1.8.3.1

[PATCH v2 78/83] app/test-mldev: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 app/test-mldev/test_device_ops.h       | 4 ++--
 app/test-mldev/test_inference_common.h | 4 ++--
 app/test-mldev/test_model_ops.h        | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/app/test-mldev/test_device_ops.h b/app/test-mldev/test_device_ops.h
index be78b17..2e0173e 100644
--- a/app/test-mldev/test_device_ops.h
+++ b/app/test-mldev/test_device_ops.h
@@ -9,9 +9,9 @@
 
 #include "test_common.h"
 
-struct test_device {
+struct __rte_cache_aligned test_device {
 	/* common data */
 	struct test_common cmn;
-} __rte_cache_aligned;
+};
 
 #endif /* TEST_DEVICE_OPS_H */
diff --git a/app/test-mldev/test_inference_common.h b/app/test-mldev/test_inference_common.h
index 3f4ba32..1c9ad90 100644
--- a/app/test-mldev/test_inference_common.h
+++ b/app/test-mldev/test_inference_common.h
@@ -37,7 +37,7 @@ struct ml_core_args {
 	uint64_t end_cycles;
 };
 
-struct test_inference {
+struct __rte_cache_aligned test_inference {
 	/* common data */
 	struct test_common cmn;
 
@@ -59,7 +59,7 @@ struct test_inference {
 	struct rte_ml_dev_xstats_map *xstats_map;
 	uint64_t *xstats_values;
 	int xstats_size;
-} __rte_cache_aligned;
+};
 
 bool test_inference_cap_check(struct ml_options *opt);
 int test_inference_opt_check(struct ml_options *opt);
diff --git a/app/test-mldev/test_model_ops.h b/app/test-mldev/test_model_ops.h
index 19645a1..83bfd76 100644
--- a/app/test-mldev/test_model_ops.h
+++ b/app/test-mldev/test_model_ops.h
@@ -9,12 +9,12 @@
 
 #include "test_model_common.h"
 
-struct test_model_ops {
+struct __rte_cache_aligned test_model_ops {
 	/* common data */
 	struct test_common cmn;
 
 	/* test specific data */
 	struct ml_model model[ML_TEST_MAX_MODELS];
-} __rte_cache_aligned;
+};
 
 #endif /* TEST_MODEL_OPS_H */
-- 
1.8.3.1

[PATCH v2 79/83] app/test-flow-perf: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 app/test-flow-perf/actions_gen.c | 51 ++++++++++++++++++++++------------------
 app/test-flow-perf/items_gen.c   | 22 +++++++++--------
 app/test-flow-perf/main.c        |  8 +++----
 3 files changed, 44 insertions(+), 37 deletions(-)

diff --git a/app/test-flow-perf/actions_gen.c b/app/test-flow-perf/actions_gen.c
index f1d5931..b5336e8 100644
--- a/app/test-flow-perf/actions_gen.c
+++ b/app/test-flow-perf/actions_gen.c
@@ -62,7 +62,8 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_mark mark_actions[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct rte_flow_action_mark mark_actions[RTE_MAX_LCORE];
 	uint32_t counter = para.counter;
 
 	do {
@@ -79,7 +80,8 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_queue queue_actions[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct rte_flow_action_queue queue_actions[RTE_MAX_LCORE];
 
 	do {
 		queue_actions[para.core_idx].index = para.queue;
@@ -109,7 +111,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct action_rss_data *rss_data[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct action_rss_data *rss_data[RTE_MAX_LCORE];
 
 	uint16_t queue;
 
@@ -208,7 +210,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_mac set_macs[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_mac set_macs[RTE_MAX_LCORE];
 	uint32_t mac = para.counter;
 	uint16_t i;
 
@@ -231,7 +233,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_mac set_macs[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_mac set_macs[RTE_MAX_LCORE];
 	uint32_t mac = para.counter;
 	uint16_t i;
 
@@ -254,7 +256,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_ipv4 set_ipv4[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_ipv4 set_ipv4[RTE_MAX_LCORE];
 	uint32_t ip = para.counter;
 
 	/* Fixed value */
@@ -273,7 +275,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_ipv4 set_ipv4[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_ipv4 set_ipv4[RTE_MAX_LCORE];
 	uint32_t ip = para.counter;
 
 	/* Fixed value */
@@ -292,7 +294,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_ipv6 set_ipv6[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_ipv6 set_ipv6[RTE_MAX_LCORE];
 	uint32_t ipv6 = para.counter;
 	uint8_t i;
 
@@ -315,7 +317,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_ipv6 set_ipv6[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_ipv6 set_ipv6[RTE_MAX_LCORE];
 	uint32_t ipv6 = para.counter;
 	uint8_t i;
 
@@ -338,7 +340,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_tp set_tp[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_tp set_tp[RTE_MAX_LCORE];
 	uint32_t tp = para.counter;
 
 	/* Fixed value */
@@ -359,7 +361,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_tp set_tp[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_tp set_tp[RTE_MAX_LCORE];
 	uint32_t tp = para.counter;
 
 	/* Fixed value */
@@ -381,7 +383,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static rte_be32_t value[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) rte_be32_t value[RTE_MAX_LCORE];
 	uint32_t ack_value = para.counter;
 
 	/* Fixed value */
@@ -399,7 +401,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static rte_be32_t value[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) rte_be32_t value[RTE_MAX_LCORE];
 	uint32_t ack_value = para.counter;
 
 	/* Fixed value */
@@ -417,7 +419,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static rte_be32_t value[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) rte_be32_t value[RTE_MAX_LCORE];
 	uint32_t seq_value = para.counter;
 
 	/* Fixed value */
@@ -435,7 +437,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static rte_be32_t value[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) rte_be32_t value[RTE_MAX_LCORE];
 	uint32_t seq_value = para.counter;
 
 	/* Fixed value */
@@ -453,7 +455,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_ttl set_ttl[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_ttl set_ttl[RTE_MAX_LCORE];
 	uint32_t ttl_value = para.counter;
 
 	/* Fixed value */
@@ -482,7 +484,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_dscp set_dscp[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_dscp set_dscp[RTE_MAX_LCORE];
 	uint32_t dscp_value = para.counter;
 
 	/* Fixed value */
@@ -503,7 +505,7 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_action_set_dscp set_dscp[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_set_dscp set_dscp[RTE_MAX_LCORE];
 	uint32_t dscp_value = para.counter;
 
 	/* Fixed value */
@@ -770,7 +772,8 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct action_raw_encap_data *action_encap_data[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct action_raw_encap_data *action_encap_data[RTE_MAX_LCORE];
 	uint64_t encap_data = para.encap_data;
 	uint8_t *header;
 	uint8_t i;
@@ -807,7 +810,8 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	struct additional_para para)
 {
-	static struct action_raw_decap_data *action_decap_data[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct action_raw_decap_data *action_decap_data[RTE_MAX_LCORE];
 	uint64_t decap_data = para.decap_data;
 	uint8_t *header;
 	uint8_t i;
@@ -844,7 +848,8 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	__rte_unused struct additional_para para)
 {
-	static struct rte_flow_action_vxlan_encap vxlan_encap[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct rte_flow_action_vxlan_encap vxlan_encap[RTE_MAX_LCORE];
 	static struct rte_flow_item items[5];
 	static struct rte_flow_item_eth item_eth;
 	static struct rte_flow_item_ipv4 item_ipv4;
@@ -900,8 +905,8 @@ struct action_rss_data {
 	uint8_t actions_counter,
 	__rte_unused struct additional_para para)
 {
-	static struct rte_flow_action_meter
-		meters[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_action_meter
+		meters[RTE_MAX_LCORE];
 
 	meters[para.core_idx].mtr_id = para.counter;
 	actions[actions_counter].type = RTE_FLOW_ACTION_TYPE_METER;
diff --git a/app/test-flow-perf/items_gen.c b/app/test-flow-perf/items_gen.c
index 8592834..4ae7250 100644
--- a/app/test-flow-perf/items_gen.c
+++ b/app/test-flow-perf/items_gen.c
@@ -52,8 +52,8 @@ struct additional_para {
 add_ipv4(struct rte_flow_item *items,
 	uint8_t items_counter, struct additional_para para)
 {
-	static struct rte_flow_item_ipv4 ipv4_specs[RTE_MAX_LCORE] __rte_cache_aligned;
-	static struct rte_flow_item_ipv4 ipv4_masks[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_ipv4 ipv4_specs[RTE_MAX_LCORE];
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_ipv4 ipv4_masks[RTE_MAX_LCORE];
 	uint8_t ti = para.core_idx;
 
 	ipv4_specs[ti].hdr.src_addr = RTE_BE32(para.src_ip);
@@ -69,8 +69,8 @@ struct additional_para {
 add_ipv6(struct rte_flow_item *items,
 	uint8_t items_counter, struct additional_para para)
 {
-	static struct rte_flow_item_ipv6 ipv6_specs[RTE_MAX_LCORE] __rte_cache_aligned;
-	static struct rte_flow_item_ipv6 ipv6_masks[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_ipv6 ipv6_specs[RTE_MAX_LCORE];
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_ipv6 ipv6_masks[RTE_MAX_LCORE];
 	uint8_t ti = para.core_idx;
 	uint8_t i;
 
@@ -118,8 +118,8 @@ struct additional_para {
 	uint8_t items_counter,
 	struct additional_para para)
 {
-	static struct rte_flow_item_vxlan vxlan_specs[RTE_MAX_LCORE] __rte_cache_aligned;
-	static struct rte_flow_item_vxlan vxlan_masks[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_vxlan vxlan_specs[RTE_MAX_LCORE];
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_vxlan vxlan_masks[RTE_MAX_LCORE];
 	uint8_t ti = para.core_idx;
 	uint32_t vni_value;
 	uint8_t i;
@@ -145,8 +145,10 @@ struct additional_para {
 	uint8_t items_counter,
 	__rte_unused struct additional_para para)
 {
-	static struct rte_flow_item_vxlan_gpe vxlan_gpe_specs[RTE_MAX_LCORE] __rte_cache_aligned;
-	static struct rte_flow_item_vxlan_gpe vxlan_gpe_masks[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct rte_flow_item_vxlan_gpe vxlan_gpe_specs[RTE_MAX_LCORE];
+	static alignas(RTE_CACHE_LINE_SIZE)
+	    struct rte_flow_item_vxlan_gpe vxlan_gpe_masks[RTE_MAX_LCORE];
 	uint8_t ti = para.core_idx;
 	uint32_t vni_value;
 	uint8_t i;
@@ -189,8 +191,8 @@ struct additional_para {
 	uint8_t items_counter,
 	__rte_unused struct additional_para para)
 {
-	static struct rte_flow_item_geneve geneve_specs[RTE_MAX_LCORE] __rte_cache_aligned;
-	static struct rte_flow_item_geneve geneve_masks[RTE_MAX_LCORE] __rte_cache_aligned;
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_geneve geneve_specs[RTE_MAX_LCORE];
+	static alignas(RTE_CACHE_LINE_SIZE) struct rte_flow_item_geneve geneve_masks[RTE_MAX_LCORE];
 	uint8_t ti = para.core_idx;
 	uint32_t vni_value;
 	uint8_t i;
diff --git a/app/test-flow-perf/main.c b/app/test-flow-perf/main.c
index e224ef6..07ddfe0 100644
--- a/app/test-flow-perf/main.c
+++ b/app/test-flow-perf/main.c
@@ -113,7 +113,7 @@ struct stream {
 	int rx_queue;
 };
 
-struct lcore_info {
+struct __rte_cache_aligned lcore_info {
 	int mode;
 	int streams_nb;
 	struct stream streams[MAX_STREAMS];
@@ -122,7 +122,7 @@ struct lcore_info {
 	uint64_t tx_drops;
 	uint64_t rx_pkts;
 	struct rte_mbuf *pkts[MAX_PKT_BURST];
-} __rte_cache_aligned;
+};
 
 static struct lcore_info lcore_infos[RTE_MAX_LCORE];
 
@@ -131,14 +131,14 @@ struct used_cpu_time {
 	double deletion[MAX_PORTS][RTE_MAX_LCORE];
 };
 
-struct multi_cores_pool {
+struct __rte_cache_aligned multi_cores_pool {
 	uint32_t cores_count;
 	uint32_t rules_count;
 	struct used_cpu_time meters_record;
 	struct used_cpu_time flows_record;
 	int64_t last_alloc[RTE_MAX_LCORE];
 	int64_t current_alloc[RTE_MAX_LCORE];
-} __rte_cache_aligned;
+};
 
 static struct multi_cores_pool mc_pool = {
 	.cores_count = 1,
-- 
1.8.3.1

[PATCH v2 80/83] app/test-eventdev: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 app/test-eventdev/test_order_common.h    |  4 ++--
 app/test-eventdev/test_perf_common.h     | 24 ++++++++++++------------
 app/test-eventdev/test_pipeline_common.h | 18 +++++++++---------
 3 files changed, 23 insertions(+), 23 deletions(-)

diff --git a/app/test-eventdev/test_order_common.h b/app/test-eventdev/test_order_common.h
index 1507265..d4cbc5c 100644
--- a/app/test-eventdev/test_order_common.h
+++ b/app/test-eventdev/test_order_common.h
@@ -39,7 +39,7 @@ struct prod_data {
 	struct test_order *t;
 };
 
-struct test_order {
+struct __rte_cache_aligned test_order {
 	/* Don't change the offset of "err". Signal handler use this memory
 	 * to terminate all lcores work.
 	 */
@@ -60,7 +60,7 @@ struct test_order {
 	uint32_t *producer_flow_seq;
 	uint32_t *expected_flow_seq;
 	struct evt_options *opt;
-} __rte_cache_aligned;
+};
 
 static inline void
 order_flow_id_copy_from_mbuf(struct test_order *t, struct rte_event *event)
diff --git a/app/test-eventdev/test_perf_common.h b/app/test-eventdev/test_perf_common.h
index 2b4f572..bc627de 100644
--- a/app/test-eventdev/test_perf_common.h
+++ b/app/test-eventdev/test_perf_common.h
@@ -31,13 +31,13 @@
 
 struct test_perf;
 
-struct worker_data {
+struct __rte_cache_aligned worker_data {
 	uint64_t processed_pkts;
 	uint64_t latency;
 	uint8_t dev_id;
 	uint8_t port_id;
 	struct test_perf *t;
-} __rte_cache_aligned;
+};
 
 struct crypto_adptr_data {
 	uint8_t cdev_id;
@@ -51,16 +51,16 @@ struct dma_adptr_data {
 	void **dma_op;
 };
 
-struct prod_data {
+struct __rte_cache_aligned prod_data {
 	uint8_t dev_id;
 	uint8_t port_id;
 	uint8_t queue_id;
 	struct crypto_adptr_data ca;
 	struct dma_adptr_data da;
 	struct test_perf *t;
-} __rte_cache_aligned;
+};
 
-struct test_perf {
+struct __rte_cache_aligned test_perf {
 	/* Don't change the offset of "done". Signal handler use this memory
 	 * to terminate all lcores work.
 	 */
@@ -74,17 +74,17 @@ struct test_perf {
 	struct prod_data prod[EVT_MAX_PORTS];
 	struct worker_data worker[EVT_MAX_PORTS];
 	struct evt_options *opt;
-	uint8_t sched_type_list[EVT_MAX_STAGES] __rte_cache_aligned;
-	struct rte_event_timer_adapter *timer_adptr[
-		RTE_EVENT_TIMER_ADAPTER_NUM_MAX] __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t sched_type_list[EVT_MAX_STAGES];
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event_timer_adapter *timer_adptr[
+		RTE_EVENT_TIMER_ADAPTER_NUM_MAX];
 	struct rte_mempool *ca_op_pool;
 	struct rte_mempool *ca_sess_pool;
 	struct rte_mempool *ca_asym_sess_pool;
 	struct rte_mempool *ca_vector_pool;
 	struct rte_mempool *da_op_pool;
-} __rte_cache_aligned;
+};
 
-struct perf_elt {
+struct __rte_cache_aligned perf_elt {
 	union {
 		struct rte_event_timer tim;
 		struct {
@@ -92,7 +92,7 @@ struct perf_elt {
 			uint64_t timestamp;
 		};
 	};
-} __rte_cache_aligned;
+};
 
 #define BURST_SIZE 16
 #define MAX_PROD_ENQ_BURST_SIZE 128
@@ -111,7 +111,7 @@ struct perf_elt {
 	const uint8_t nb_stages = t->opt->nb_stages;\
 	const uint8_t laststage = nb_stages - 1;\
 	uint8_t cnt = 0;\
-	void *bufs[16] __rte_cache_aligned;\
+	alignas(RTE_CACHE_LINE_SIZE) void *bufs[16];\
 	int const sz = RTE_DIM(bufs);\
 	uint8_t stage;\
 	struct perf_elt *pe = NULL;\
diff --git a/app/test-eventdev/test_pipeline_common.h b/app/test-eventdev/test_pipeline_common.h
index 2b7f3e7..cb6375f 100644
--- a/app/test-eventdev/test_pipeline_common.h
+++ b/app/test-eventdev/test_pipeline_common.h
@@ -31,14 +31,14 @@
 
 struct test_pipeline;
 
-struct worker_data {
+struct __rte_cache_aligned worker_data {
 	uint64_t processed_pkts;
 	uint8_t dev_id;
 	uint8_t port_id;
 	struct test_pipeline *t;
-} __rte_cache_aligned;
+};
 
-struct test_pipeline {
+struct __rte_cache_aligned test_pipeline {
 	/* Don't change the offset of "done". Signal handler use this memory
 	 * to terminate all lcores work.
 	 */
@@ -52,8 +52,8 @@ struct test_pipeline {
 	struct rte_mempool *pool[RTE_MAX_ETHPORTS];
 	struct worker_data worker[EVT_MAX_PORTS];
 	struct evt_options *opt;
-	uint8_t sched_type_list[EVT_MAX_STAGES] __rte_cache_aligned;
-} __rte_cache_aligned;
+	alignas(RTE_CACHE_LINE_SIZE) uint8_t sched_type_list[EVT_MAX_STAGES];
+};
 
 #define BURST_SIZE 16
 
@@ -62,7 +62,7 @@ struct test_pipeline {
 	struct test_pipeline *t = w->t;   \
 	const uint8_t dev = w->dev_id;    \
 	const uint8_t port = w->port_id;  \
-	struct rte_event ev __rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event ev
 
 #define PIPELINE_WORKER_SINGLE_STAGE_BURST_INIT \
 	int i;                                  \
@@ -70,7 +70,7 @@ struct test_pipeline {
 	struct test_pipeline *t = w->t;         \
 	const uint8_t dev = w->dev_id;          \
 	const uint8_t port = w->port_id;        \
-	struct rte_event ev[BURST_SIZE + 1] __rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event ev[BURST_SIZE + 1]
 
 #define PIPELINE_WORKER_MULTI_STAGE_INIT                         \
 	struct worker_data *w  = arg;                            \
@@ -81,7 +81,7 @@ struct test_pipeline {
 	const uint8_t last_queue = t->opt->nb_stages - 1;        \
 	uint8_t *const sched_type_list = &t->sched_type_list[0]; \
 	const uint8_t nb_stages = t->opt->nb_stages + 1;	 \
-	struct rte_event ev __rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event ev
 
 #define PIPELINE_WORKER_MULTI_STAGE_BURST_INIT                   \
 	int i;                                                   \
@@ -93,7 +93,7 @@ struct test_pipeline {
 	const uint8_t last_queue = t->opt->nb_stages - 1;        \
 	uint8_t *const sched_type_list = &t->sched_type_list[0]; \
 	const uint8_t nb_stages = t->opt->nb_stages + 1;	 \
-	struct rte_event ev[BURST_SIZE + 1] __rte_cache_aligned
+	alignas(RTE_CACHE_LINE_SIZE) struct rte_event ev[BURST_SIZE + 1]
 
 static __rte_always_inline void
 pipeline_fwd_event(struct rte_event *ev, uint8_t sched)
-- 
1.8.3.1

[PATCH v2 81/83] app/pdump: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 app/pdump/main.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/app/pdump/main.c b/app/pdump/main.c
index a9205e1..3bdbb8d 100644
--- a/app/pdump/main.c
+++ b/app/pdump/main.c
@@ -106,7 +106,7 @@ struct pdump_stats {
 	uint64_t freed_pkts;
 };
 
-struct pdump_tuples {
+struct __rte_cache_aligned pdump_tuples {
 	/* cli params */
 	uint16_t port;
 	char *device_id;
@@ -133,7 +133,7 @@ struct pdump_tuples {
 
 	/* stats */
 	struct pdump_stats stats;
-} __rte_cache_aligned;
+};
 static struct pdump_tuples pdump_t[APP_ARG_TCPDUMP_MAX_TUPLES];
 
 struct parse_val {
-- 
1.8.3.1

[PATCH v2 82/83] app/graph: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 app/graph/ethdev_rx.h      | 4 ++--
 app/graph/ethdev_rx_priv.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/app/graph/ethdev_rx.h b/app/graph/ethdev_rx.h
index ec3c972..f8c8f1f 100644
--- a/app/graph/ethdev_rx.h
+++ b/app/graph/ethdev_rx.h
@@ -17,13 +17,13 @@ struct lcore_rx_queue {
 	char node_name[RTE_NODE_NAMESIZE];
 };
 
-struct lcore_conf {
+struct __rte_cache_aligned lcore_conf {
 	uint16_t n_rx_queue;
 	struct lcore_rx_queue rx_queue_list[ETHDEV_RX_QUEUE_PER_LCORE_MAX];
 	struct rte_graph *graph;
 	char name[RTE_GRAPH_NAMESIZE];
 	rte_graph_t graph_id;
-} __rte_cache_aligned;
+};
 
 uint8_t ethdev_rx_num_rx_queues_get(uint16_t port);
 
diff --git a/app/graph/ethdev_rx_priv.h b/app/graph/ethdev_rx_priv.h
index d714f83..a76ebac 100644
--- a/app/graph/ethdev_rx_priv.h
+++ b/app/graph/ethdev_rx_priv.h
@@ -14,10 +14,10 @@
 #define MAX_JUMBO_PKT_LEN  9600
 #define NB_SOCKETS 8
 
-struct lcore_params {
+struct __rte_cache_aligned lcore_params {
 	uint16_t port_id;
 	uint8_t queue_id;
 	uint8_t lcore_id;
-} __rte_cache_aligned;
+};
 
 #endif
-- 
1.8.3.1

[PATCH v2 83/83] bus/dpaa: move alignment attribute on types

[Tyler Retzlaff]

Move location of __rte_aligned(a) to new conventional location. The new
placement between {struct,union} and the tag allows the desired
alignment to be imparted on the type regardless of the toolchain being
used for both C and C++. Additionally, it avoids confusion by Doxygen
when generating documentation.

Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
---
 drivers/bus/dpaa/base/qbman/qman.c  |  3 +--
 drivers/bus/dpaa/include/fsl_bman.h |  4 ++--
 drivers/bus/dpaa/include/fsl_qman.h | 20 ++++++++++----------
 3 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/drivers/bus/dpaa/base/qbman/qman.c b/drivers/bus/dpaa/base/qbman/qman.c
index 83db0a5..6d2fbdc 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -95,8 +95,7 @@ struct qman_portal {
 	 * to 2 ** 10 to ensure DQRR index calculations based shadow copy
 	 * address (6 bits for address shift + 4 bits for the DQRR size).
 	 */
-	struct qm_dqrr_entry shadow_dqrr[QM_DQRR_SIZE]
-		    __rte_aligned(1024);
+	alignas(1024) struct qm_dqrr_entry shadow_dqrr[QM_DQRR_SIZE];
 #endif
 };
 
diff --git a/drivers/bus/dpaa/include/fsl_bman.h b/drivers/bus/dpaa/include/fsl_bman.h
index 6719a4e..34d7eb3 100644
--- a/drivers/bus/dpaa/include/fsl_bman.h
+++ b/drivers/bus/dpaa/include/fsl_bman.h
@@ -41,7 +41,7 @@ static inline void bman_depletion_fill(struct bman_depletion *c)
  * pool id specific to this buffer is needed (BM_RCR_VERB_CMD_BPID_MULTI,
  * BM_MCC_VERB_ACQUIRE), the 'bpid' field is used.
  */
-struct bm_buffer {
+struct __rte_aligned(8) bm_buffer {
 	union {
 		struct {
 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
@@ -67,7 +67,7 @@ struct bm_buffer {
 		};
 		u64 opaque;
 	};
-} __rte_aligned(8);
+};
 static inline u64 bm_buffer_get64(const struct bm_buffer *buf)
 {
 	return buf->addr;
diff --git a/drivers/bus/dpaa/include/fsl_qman.h b/drivers/bus/dpaa/include/fsl_qman.h
index 5953309..acdfb45 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -124,7 +124,7 @@ enum qm_fd_format {
 #define QM_FD_COMPOUND	QM_FD_FORMAT_COMPOUND
 
 /* "Frame Descriptor (FD)" */
-struct qm_fd {
+struct __rte_aligned(8) qm_fd {
 	union {
 		struct {
 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
@@ -200,7 +200,7 @@ struct qm_fd {
 		u32 cmd;
 		u32 status;
 	};
-} __rte_aligned(8);
+};
 #define QM_FD_DD_NULL		0x00
 #define QM_FD_PID_MASK		0x3f
 static inline u64 qm_fd_addr_get64(const struct qm_fd *fd)
@@ -330,9 +330,9 @@ struct __rte_aligned(8) qm_dqrr_entry {
 
 /* "ERN Message Response" */
 /* "FQ State Change Notification" */
-struct qm_mr_entry {
+struct __rte_aligned(8) qm_mr_entry {
 	union {
-		struct {
+		alignas(8) struct {
 			u8 verb;
 			u8 dca;
 			u16 seqnum;
@@ -341,8 +341,8 @@ struct qm_mr_entry {
 			u32 fqid;	/* 24-bit */
 			u32 tag;
 			struct qm_fd fd; /* this has alignment 8 */
-		} __packed __rte_aligned(8) ern;
-		struct {
+		} __packed ern;
+		alignas(8) struct {
 			u8 verb;
 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
 			u8 colour:2;	/* See QM_MR_DCERN_COLOUR_* */
@@ -359,18 +359,18 @@ struct qm_mr_entry {
 			u32 fqid;	/* 24-bit */
 			u32 tag;
 			struct qm_fd fd; /* this has alignment 8 */
-		} __packed __rte_aligned(8) dcern;
-		struct {
+		} __packed dcern;
+		alignas(8) struct {
 			u8 verb;
 			u8 fqs;		/* Frame Queue Status */
 			u8 __reserved1[6];
 			u32 fqid;	/* 24-bit */
 			u32 contextB;
 			u8 __reserved2[16];
-		} __packed __rte_aligned(8) fq;	/* FQRN/FQRNI/FQRL/FQPN */
+		} __packed fq;	/* FQRN/FQRNI/FQRL/FQPN */
 	};
 	u8 __reserved2[32];
-} __packed __rte_aligned(8);
+} __packed;
 #define QM_MR_VERB_VBIT			0x80
 /*
  * ERNs originating from direct-connect portals ("dcern") use 0x20 as a verb
-- 
1.8.3.1

RE: [EXTERNAL] [PATCH v2 76/83] app/test: move alignment attribute on types

[Akhil Goyal]

> Move location of __rte_aligned(a) to new conventional location. The new
> placement between {struct,union} and the tag allows the desired
> alignment to be imparted on the type regardless of the toolchain being
> used for both C and C++. Additionally, it avoids confusion by Doxygen
> when generating documentation.
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  app/test/test_cryptodev_aead_test_vectors.h            |  6 +++---
>  app/test/test_cryptodev_blockcipher.h                  |  2 +-
>  app/test/test_cryptodev_kasumi_test_vectors.h          |  2 +-
>  app/test/test_cryptodev_mixed_test_vectors.h           |  2 +-
>  app/test/test_cryptodev_security_docsis_test_vectors.h |  2 +-
>  app/test/test_cryptodev_snow3g_test_vectors.h          |  2 +-
>  app/test/test_cryptodev_zuc_test_vectors.h             |  2 +-

Acked-by: Akhil Goyal <gakhil@marvell.com>

RE: [EXTERNAL] [PATCH v2 01/83] examples: move alignment attribute on types

[Akhil Goyal]

> Move location of __rte_aligned(a) to new conventional location. The new
> placement between {struct,union} and the tag allows the desired
> alignment to be imparted on the type regardless of the toolchain being
> used for both C and C++. Additionally, it avoids confusion by Doxygen
> when generating documentation.
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Reviewed-by: Morten Brørup <mb@smartsharesystems.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---


>  examples/ipsec-secgw/ipsec-secgw.c                 |  4 +--
>  examples/ipsec-secgw/ipsec-secgw.h                 |  8 +++---
>  examples/ipsec-secgw/ipsec.h                       | 22 +++++++--------
>  examples/ipsec-secgw/ipsec_worker.h                |  4 +--

Acked-by:  Akhil Goyal <gakhil@marvell.com>

Re: [PATCH v2 00/83] move alignment attribute on types

[David Marchand]

Hello Tyler,

On Mon, Apr 15, 2024 at 10:05 PM Tyler Retzlaff
<roretzla@linux.microsoft.com> wrote:
>
> The current location used for __rte_aligned(a) for alignment of types
> and variables is not compatible with MSVC. There is only a single
> location accepted by both toolchains.
>
> After having established this as the conventional standard for lib/*
> this series is intended to convert the remainder of the source tree to
> use the same location for __rte_aligned(a) and alignas(a) for
> consistency.
>
> v2:
>   * examples/ipsec remove alignment of pointers to size of a pointer
>     explicit alignment is unnecessary.
>
> Tyler Retzlaff (83):
>   examples: move alignment attribute on types
>   net/ark: move alignment attribute on types
>   net/avp: move alignment attribute on types
>   net/axgbe: move alignment attribute on types
>   net/bnxt: move alignment attribute on types
>   net/bonding: move alignment attribute on types
>   net/cxgbe: move alignment attribute on types
>   net/e1000: move alignment attribute on types
>   net/ena: move alignment attribute on types
>   net/enic: move alignment attribute on types
>   net/fm10k: move alignment attribute on types
>   net/hinic: move alignment attribute on types
>   net/hns3: move alignment attribute on types
>   net/i40e: move alignment attribute on types
>   net/iavf: move alignment attribute on types
>   net/ice: move alignment attribute on types
>   net/igc: move alignment attribute on types
>   net/ionic: move alignment attribute on types
>   net/ixgbe: move alignment attribute on types
>   net/memif: move alignment attribute on types
>   net/mlx5: move alignment attribute on types
>   net/mlx4: move alignment attribute on types
>   net/mvpp2: move alignment attribute on types
>   net/netvsc: move alignment attribute on types
>   net/nfp: move alignment attribute on types
>   net/ngbe: move alignment attribute on types
>   net/octeontx: move alignment attribute on types
>   net/pfe: move alignment attribute on types
>   net/qede: move alignment attribute on types
>   net/softnic: move alignment attribute on types
>   net/tap: move alignment attribute on types
>   net/thunderx: move alignment attribute on types
>   net/txgbe: move alignment attribute on types
>   net/virtio: move alignment attribute on types
>   vdpa/mlx5: move alignment attribute on types
>   regex/cn9k: move alignment attribute on types
>   raw/ntb: move alignment attribute on types
>   ml/cnxk: move alignment attribute on types
>   mempool/cnxk: move alignment attribute on types
>   event/sw: move alignment attribute on types
>   event/skeleton: move alignment attribute on types
>   event/opdl: move alignment attribute on types
>   event/octeontx: move alignment attribute on types
>   event/dsw: move alignment attribute on types
>   event/dlb2: move alignment attribute on types
>   event/cnxk: move alignment attribute on types
>   dma/skeleton: move alignment attribute on types
>   dma/ioat: move alignment attribute on types
>   dma/idxd: move alignment attribute on types
>   crypto/uadk: move alignment attribute on types
>   crypto/scheduler: move alignment attribute on types
>   crypto/qat: move alignment attribute on types
>   crypto/openssl: move alignment attribute on types
>   crypto/octeontx: move alignment attribute on types
>   crypto/null: move alignment attribute on types
>   crypto/mvsam: move alignment attribute on types
>   crypto/mlx5: move alignment attribute on types
>   crypto/ipsec_mb: move alignment attribute on types
>   crypto/cnxk: move alignment attribute on types
>   crypto/ccp: move alignment attribute on types
>   crypto/caam_jr: move alignment attribute on types
>   crypto/bcmfs: move alignment attribute on types
>   crypto/armv8: move alignment attribute on types
>   compress/zlib: move alignment attribute on types
>   compress/qat: move alignment attribute on types
>   compress/octeontx: move alignment attribute on types
>   compress/nitrox: move alignment attribute on types
>   compress/isal: move alignment attribute on types
>   common/qat: move alignment attribute on types
>   common/mlx5: move alignment attribute on types
>   common/idpf: move alignment attribute on types
>   common/cpt: move alignment attribute on types
>   bus/fslmc: move alignment attribute on types
>   baseband/turbo_sw: move alignment attribute on types
>   baseband/null: move alignment attribute on types
>   app/test: move alignment attribute on types
>   app/test-pipeline: move alignment attribute on types
>   app/test-mldev: move alignment attribute on types
>   app/test-flow-perf: move alignment attribute on types
>   app/test-eventdev: move alignment attribute on types
>   app/pdump: move alignment attribute on types
>   app/graph: move alignment attribute on types
>   bus/dpaa: move alignment attribute on types
>
>  app/graph/ethdev_rx.h                              |  4 +-
>  app/graph/ethdev_rx_priv.h                         |  4 +-
>  app/pdump/main.c                                   |  4 +-
>  app/test-eventdev/test_order_common.h              |  4 +-
>  app/test-eventdev/test_perf_common.h               | 24 +++++-----
>  app/test-eventdev/test_pipeline_common.h           | 18 ++++----
>  app/test-flow-perf/actions_gen.c                   | 51 ++++++++++++----------
>  app/test-flow-perf/items_gen.c                     | 22 +++++-----
>  app/test-flow-perf/main.c                          |  8 ++--
>  app/test-mldev/test_device_ops.h                   |  4 +-
>  app/test-mldev/test_inference_common.h             |  4 +-
>  app/test-mldev/test_model_ops.h                    |  4 +-
>  app/test-pipeline/main.h                           |  4 +-
>  app/test/test_cryptodev_aead_test_vectors.h        |  6 +--
>  app/test/test_cryptodev_blockcipher.h              |  2 +-
>  app/test/test_cryptodev_kasumi_test_vectors.h      |  2 +-
>  app/test/test_cryptodev_mixed_test_vectors.h       |  2 +-
>  .../test_cryptodev_security_docsis_test_vectors.h  |  2 +-
>  app/test/test_cryptodev_snow3g_test_vectors.h      |  2 +-
>  app/test/test_cryptodev_zuc_test_vectors.h         |  2 +-
>  app/test/test_distributor.c                        | 12 ++---
>  app/test/test_distributor_perf.c                   |  6 +--
>  app/test/test_mempool_perf.c                       |  6 +--
>  app/test/test_pmd_perf.c                           |  4 +-
>  app/test/test_ring_stress_impl.h                   | 10 ++---
>  app/test/test_rwlock.c                             |  8 ++--
>  app/test/test_seqlock.c                            |  8 ++--
>  app/test/test_ticketlock.c                         |  4 +-
>  app/test/test_trace_perf.c                         |  8 ++--
>  drivers/baseband/null/bbdev_null.c                 |  4 +-
>  drivers/baseband/turbo_sw/bbdev_turbo_software.c   |  4 +-
>  drivers/bus/dpaa/base/qbman/qman.c                 |  3 +-
>  drivers/bus/dpaa/include/fsl_bman.h                |  4 +-
>  drivers/bus/dpaa/include/fsl_qman.h                | 20 ++++-----
>  drivers/bus/fslmc/portal/dpaa2_hw_pvt.h            |  4 +-
>  drivers/common/cpt/cpt_common.h                    |  4 +-
>  drivers/common/idpf/idpf_common_device.h           |  2 +-
>  drivers/common/mlx5/linux/mlx5_glue.c              |  2 +-
>  drivers/common/mlx5/linux/mlx5_nl.c                |  2 +-
>  drivers/common/mlx5/mlx5_common_mr.h               |  4 +-
>  drivers/common/mlx5/mlx5_common_utils.h            | 12 ++---
>  drivers/common/mlx5/mlx5_prm.h                     |  4 +-
>  drivers/common/qat/qat_adf/icp_qat_hw.h            |  8 ++--
>  drivers/common/qat/qat_common.h                    |  4 +-
>  drivers/common/qat/qat_qp.h                        |  6 +--
>  drivers/compress/isal/isal_compress_pmd_private.h  |  8 ++--
>  drivers/compress/nitrox/nitrox_comp_reqmgr.c       |  2 +-
>  drivers/compress/octeontx/otx_zip.h                | 16 +++----
>  drivers/compress/qat/qat_comp.h                    |  4 +-
>  drivers/compress/zlib/zlib_pmd_private.h           | 12 ++---
>  drivers/crypto/armv8/armv8_pmd_private.h           | 14 +++---
>  drivers/crypto/bcmfs/bcmfs_qp.h                    |  4 +-
>  drivers/crypto/bcmfs/bcmfs_sym_session.h           |  4 +-
>  drivers/crypto/caam_jr/caam_jr_desc.h              |  8 ++--
>  drivers/crypto/ccp/ccp_crypto.h                    |  4 +-
>  drivers/crypto/ccp/ccp_dev.h                       |  8 ++--
>  drivers/crypto/ccp/ccp_pmd_private.h               |  8 ++--
>  drivers/crypto/cnxk/cn10k_cryptodev_sec.h          |  4 +-
>  drivers/crypto/cnxk/cn10k_ipsec.h                  |  4 +-
>  drivers/crypto/cnxk/cn10k_tls.h                    |  4 +-
>  drivers/crypto/cnxk/cn9k_cryptodev_ops.c           |  2 +-
>  drivers/crypto/cnxk/cn9k_ipsec.h                   |  8 ++--
>  drivers/crypto/cnxk/cnxk_cryptodev_ops.h           |  4 +-
>  drivers/crypto/cnxk/cnxk_se.h                      |  4 +-
>  drivers/crypto/ipsec_mb/pmd_aesni_mb.c             |  4 +-
>  drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h        | 24 +++++-----
>  drivers/crypto/ipsec_mb/pmd_chacha_poly_priv.h     |  4 +-
>  drivers/crypto/ipsec_mb/pmd_kasumi_priv.h          |  4 +-
>  drivers/crypto/ipsec_mb/pmd_snow3g_priv.h          |  4 +-
>  drivers/crypto/ipsec_mb/pmd_zuc_priv.h             |  4 +-
>  drivers/crypto/mlx5/mlx5_crypto.h                  |  4 +-
>  drivers/crypto/mvsam/mrvl_pmd_private.h            | 12 ++---
>  drivers/crypto/mvsam/rte_mrvl_pmd.c                | 12 +++--
>  drivers/crypto/null/null_crypto_pmd_private.h      |  8 ++--
>  drivers/crypto/octeontx/otx_cryptodev_hw_access.h  |  4 +-
>  drivers/crypto/openssl/openssl_pmd_private.h       | 12 ++---
>  drivers/crypto/qat/qat_asym.h                      | 15 +++----
>  drivers/crypto/qat/qat_sym.h                       |  8 ++--
>  drivers/crypto/qat/qat_sym_session.h               | 10 ++---
>  .../crypto/scheduler/scheduler_pkt_size_distr.c    |  4 +-
>  drivers/crypto/scheduler/scheduler_pmd_private.h   |  8 ++--
>  drivers/crypto/uadk/uadk_crypto_pmd_private.h      | 12 ++---
>  drivers/dma/idxd/idxd_hw_defs.h                    | 38 ++++++++--------
>  drivers/dma/ioat/ioat_internal.h                   |  4 +-
>  drivers/dma/skeleton/skeleton_dmadev.h             |  4 +-
>  drivers/event/cnxk/cn10k_eventdev.h                |  8 ++--
>  drivers/event/cnxk/cnxk_eventdev.h                 | 24 +++++-----
>  drivers/event/cnxk/cnxk_tim_evdev.h                |  4 +-
>  drivers/event/cnxk/cnxk_tim_worker.c               |  2 +-
>  drivers/event/dlb2/dlb2_priv.h                     | 16 +++----
>  drivers/event/dsw/dsw_evdev.h                      | 20 ++++-----
>  drivers/event/octeontx/ssovf_evdev.h               |  8 ++--
>  drivers/event/octeontx/timvf_evdev.h               |  8 ++--
>  drivers/event/octeontx/timvf_worker.c              |  2 +-
>  drivers/event/opdl/opdl_evdev.h                    |  6 +--
>  drivers/event/opdl/opdl_ring.c                     | 19 ++++----
>  drivers/event/skeleton/skeleton_eventdev.h         |  8 ++--
>  drivers/event/sw/event_ring.h                      |  2 +-
>  drivers/event/sw/iq_chunk.h                        |  4 +-
>  drivers/event/sw/sw_evdev.h                        | 18 ++++----
>  drivers/mempool/cnxk/cn10k_mempool_ops.c           |  4 +-
>  drivers/ml/cnxk/cnxk_ml_ops.h                      |  4 +-
>  drivers/net/ark/ark_ethdev_rx.c                    |  6 +--
>  drivers/net/ark/ark_ethdev_tx.c                    |  6 +--
>  drivers/net/avp/avp_ethdev.c                       |  8 ++--
>  drivers/net/avp/rte_avp_common.h                   |  4 +-
>  drivers/net/axgbe/axgbe_rxtx.h                     |  8 ++--
>  drivers/net/bnxt/bnxt_rxr.c                        |  2 +-
>  drivers/net/bonding/rte_eth_bond_8023ad.h          | 28 ++++++------
>  drivers/net/cxgbe/base/adapter.h                   | 14 +++---
>  drivers/net/cxgbe/cxgbe_ofld.h                     |  2 +-
>  drivers/net/e1000/igb_rxtx.c                       |  4 +-
>  drivers/net/ena/ena_ethdev.h                       | 17 ++++----
>  drivers/net/enic/enic_rxtx_common.h                |  2 +-
>  drivers/net/fm10k/fm10k_rxtx.c                     |  5 +--
>  drivers/net/hinic/hinic_pmd_rx.h                   |  8 ++--
>  drivers/net/hns3/hns3_ethdev.h                     |  4 +-
>  drivers/net/hns3/hns3_fdir.c                       |  4 +-
>  drivers/net/hns3/hns3_rxtx.h                       |  4 +-
>  drivers/net/i40e/i40e_ethdev.h                     |  4 +-
>  drivers/net/i40e/i40e_rxtx.h                       |  2 +-
>  drivers/net/iavf/iavf.h                            |  2 +-
>  drivers/net/iavf/iavf_rxtx.c                       |  3 +-
>  drivers/net/ice/ice_ethdev.h                       |  2 +-
>  drivers/net/ice/ice_rxtx.c                         |  3 +-
>  drivers/net/igc/igc_txrx.c                         |  4 +-
>  drivers/net/ionic/ionic_lif.h                      |  2 +-
>  drivers/net/ionic/ionic_rxtx.c                     |  6 +--
>  drivers/net/ixgbe/ixgbe_ipsec.h                    |  4 +-
>  drivers/net/ixgbe/ixgbe_rxtx.c                     | 10 ++---
>  drivers/net/memif/memif.h                          |  2 +-
>  drivers/net/mlx4/mlx4_rxtx.c                       |  2 +-
>  drivers/net/mlx5/hws/mlx5dr_send.h                 |  4 +-
>  drivers/net/mlx5/mlx5.h                            |  6 +--
>  drivers/net/mlx5/mlx5_flow.h                       |  4 +-
>  drivers/net/mlx5/mlx5_hws_cnt.h                    | 14 +++---
>  drivers/net/mlx5/mlx5_rx.h                         |  4 +-
>  drivers/net/mlx5/mlx5_rxtx.c                       |  6 +--
>  drivers/net/mlx5/mlx5_tx.h                         | 10 ++---
>  drivers/net/mlx5/mlx5_utils.h                      |  2 +-
>  drivers/net/mvpp2/mrvl_ethdev.h                    |  4 +-
>  drivers/net/netvsc/hn_var.h                        |  4 +-
>  drivers/net/nfp/flower/nfp_flower_flow.c           |  4 +-
>  drivers/net/nfp/nfp_ipsec.h                        |  4 +-
>  drivers/net/nfp/nfp_rxtx.h                         |  8 ++--
>  drivers/net/ngbe/ngbe_ptypes.c                     |  2 +-
>  drivers/net/ngbe/ngbe_rxtx.c                       |  2 +-
>  drivers/net/octeontx/octeontx_ethdev.c             |  4 +-
>  drivers/net/octeontx/octeontx_ethdev.h             | 12 ++---
>  drivers/net/octeontx/octeontx_rxtx.h               |  2 +-
>  drivers/net/pfe/base/pfe.h                         |  4 +-
>  drivers/net/qede/qede_rxtx.c                       | 14 +++---
>  drivers/net/softnic/rte_eth_softnic_internals.h    |  4 +-
>  drivers/net/tap/tap_bpf.h                          |  4 +-
>  drivers/net/thunderx/nicvf_rxtx.c                  |  8 ++--
>  drivers/net/thunderx/nicvf_struct.h                | 16 +++----
>  drivers/net/txgbe/txgbe_ipsec.h                    |  4 +-
>  drivers/net/txgbe/txgbe_ptypes.c                   | 10 ++---
>  drivers/net/txgbe/txgbe_rxtx.c                     |  2 +-
>  drivers/net/virtio/virtqueue.h                     |  4 +-
>  drivers/raw/ntb/ntb.h                              |  6 +--
>  drivers/regex/cn9k/cn9k_regexdev.h                 |  4 +-
>  drivers/vdpa/mlx5/mlx5_vdpa.h                      |  4 +-
>  examples/bbdev_app/main.c                          |  8 ++--
>  examples/bond/main.c                               |  2 +-
>  examples/distributor/main.c                        | 32 +++++++-------
>  examples/eventdev_pipeline/pipeline_common.h       |  8 ++--
>  examples/ip_fragmentation/main.c                   |  4 +-
>  examples/ip_pipeline/thread.c                      |  4 +-
>  examples/ip_reassembly/main.c                      |  4 +-
>  examples/ipsec-secgw/ipsec-secgw.c                 |  4 +-
>  examples/ipsec-secgw/ipsec-secgw.h                 |  8 ++--
>  examples/ipsec-secgw/ipsec.h                       | 22 +++++-----
>  examples/ipsec-secgw/ipsec_worker.h                |  4 +-
>  examples/ipv4_multicast/main.c                     |  4 +-
>  examples/l2fwd-crypto/main.c                       | 12 ++---
>  examples/l2fwd-event/l2fwd_common.h                |  8 ++--
>  examples/l2fwd-event/l2fwd_poll.h                  |  4 +-
>  examples/l2fwd-jobstats/main.c                     |  8 ++--
>  examples/l2fwd-keepalive/main.c                    |  8 ++--
>  examples/l2fwd-macsec/main.c                       | 12 ++---
>  examples/l2fwd/main.c                              | 12 ++---
>  examples/l3fwd-graph/main.c                        |  8 ++--
>  examples/l3fwd-power/main.c                        | 24 +++++-----
>  examples/l3fwd-power/main.h                        |  4 +-
>  examples/l3fwd-power/perf_core.c                   |  4 +-
>  examples/l3fwd/l3fwd.h                             |  8 ++--
>  examples/l3fwd/l3fwd_em.c                          |  4 +-
>  examples/l3fwd/main.c                              |  4 +-
>  examples/link_status_interrupt/main.c              |  8 ++--
>  .../multi_process/client_server_mp/shared/common.h |  8 ++--
>  examples/multi_process/symmetric_mp/main.c         |  4 +-
>  examples/ntb/ntb_fwd.c                             |  4 +-
>  examples/packet_ordering/main.c                    | 16 +++----
>  examples/pipeline/thread.c                         |  4 +-
>  examples/qos_sched/app_thread.c                    |  2 +-
>  examples/qos_sched/main.h                          |  4 +-
>  examples/server_node_efd/shared/common.h           | 12 ++---
>  examples/vhost/main.h                              |  4 +-
>  examples/vhost_blk/vhost_blk.h                     |  4 +-
>  examples/vhost_crypto/main.c                       |  4 +-
>  examples/vm_power_manager/power_manager.c          |  4 +-
>  202 files changed, 726 insertions(+), 732 deletions(-)

v1 looked good.
CI is happy on v2.
No one objected.

Let's merge this work early before too many patches are merged in subtrees.


Series applied, thanks.

-- 
David Marchand

Re: [PATCH v2 31/83] net/tap: move alignment attribute on types

[Stephen Hemminger]

On Mon, 15 Apr 2024 13:03:53 -0700
Tyler Retzlaff <roretzla@linux.microsoft.com> wrote:

> Move location of __rte_aligned(a) to new conventional location. The new
> placement between {struct,union} and the tag allows the desired
> alignment to be imparted on the type regardless of the toolchain being
> used for both C and C++. Additionally, it avoids confusion by Doxygen
> when generating documentation.
> 
> Signed-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
> Acked-by: Morten Brørup <mb@smartsharesystems.com>
> ---
>  drivers/net/tap/tap_bpf.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/tap/tap_bpf.h b/drivers/net/tap/tap_bpf.h
> index 0d38bc1..d843792 100644
> --- a/drivers/net/tap/tap_bpf.h
> +++ b/drivers/net/tap/tap_bpf.h
> @@ -50,7 +50,7 @@ enum bpf_map_type {
>  };
>  
>  /* union of anonymous structs used with TAP BPF commands */
> -union bpf_attr {
> +union __rte_aligned(8) bpf_attr {
>  	/* BPF_MAP_CREATE command */
>  	struct {
>  		__u32	map_type;
> @@ -84,7 +84,7 @@ enum bpf_map_type {
>  		__u32		kern_version;
>  		__u32		prog_flags;
>  	};
> -} __rte_aligned(8);
> +};
>  
>  #ifndef __NR_bpf
>  # if defined(__i386__)

This file is removed in the BPF fix patchset.