* [PATCH 21.11 0/7] baseband/acc100: backporting patches
@ 2022-11-17 4:46 Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 1/7] baseband/acc100: add LDPC encoder padding function Hernan Vargas
` (7 more replies)
0 siblings, 8 replies; 9+ messages in thread
From: Hernan Vargas @ 2022-11-17 4:46 UTC (permalink / raw)
To: stable, ktraynor; +Cc: nicolas.chautru, Hernan Vargas
Backporting the following patches from the main branch:
6f3325bbfa Hernan Vargas baseband/acc100: add LDPC encoder padding function
2df5fe2023 Hernan Vargas baseband/acc100: check AQ availability
c24d53b4cc Hernan Vargas baseband/acc100: fix ring availability calculation
5802f36dd4 Hernan Vargas baseband/acc100: enforce additional check on FCW
75114f78cf Hernan Vargas baseband/acc100: fix null HARQ input case
e23491fc2e Hernan Vargas baseband/acc100: fix ring/queue allocation
beaf1f876c Hernan Vargas baseband/acc100: fix double MSI intr in TB mode
Hernan Vargas (7):
baseband/acc100: add LDPC encoder padding function
baseband/acc100: check AQ availability
baseband/acc100: fix ring availability calculation
baseband/acc100: enforce additional check on FCW
baseband/acc100: fix null HARQ input case
baseband/acc100: fix ring/queue allocation
baseband/acc100: fix double MSI intr in TB mode
drivers/baseband/acc100/rte_acc100_pmd.c | 268 +++++++++++++++--------
drivers/baseband/acc100/rte_acc100_pmd.h | 2 +
2 files changed, 181 insertions(+), 89 deletions(-)
--
2.37.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 21.11 1/7] baseband/acc100: add LDPC encoder padding function
2022-11-17 4:46 [PATCH 21.11 0/7] baseband/acc100: backporting patches Hernan Vargas
@ 2022-11-17 4:46 ` Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 2/7] baseband/acc100: check AQ availability Hernan Vargas
` (6 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Hernan Vargas @ 2022-11-17 4:46 UTC (permalink / raw)
To: stable, ktraynor; +Cc: nicolas.chautru, Hernan Vargas, Maxime Coquelin
[ upstream commit 6f3325bbfa556e8fe39df15f32424f40b2eb1d05 ]
LDPC Encoder input may need to be padded to avoid small beat for ACC100.
Padding 5GDL input buffer length (BLEN) to avoid case (BLEN % 64) <= 8.
Adding protection for corner case to avoid for 5GDL occurrence of last
beat within the ACC100 fabric with <= 8B which might trigger a fabric
corner case hang issue.
Fixes: 5ad5060f8f7 ("baseband/acc100: add LDPC processing functions")
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/baseband/acc100/rte_acc100_pmd.c | 63 ++++++++++++++++--------
1 file changed, 43 insertions(+), 20 deletions(-)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index b59548315f..254f256c80 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1438,6 +1438,8 @@ acc100_fcw_ld_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
* Store information about device capabilities
* @param next_triplet
* Index for ACC100 DMA Descriptor triplet
+ * @param scattergather
+ * Flag to support scatter-gather for the mbuf
*
* @return
* Returns index of next triplet on success, other value if lengths of
@@ -1447,12 +1449,16 @@ acc100_fcw_ld_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
static inline int
acc100_dma_fill_blk_type_in(struct acc100_dma_req_desc *desc,
struct rte_mbuf **input, uint32_t *offset, uint32_t cb_len,
- uint32_t *seg_total_left, int next_triplet)
+ uint32_t *seg_total_left, int next_triplet,
+ bool scattergather)
{
uint32_t part_len;
struct rte_mbuf *m = *input;
- part_len = (*seg_total_left < cb_len) ? *seg_total_left : cb_len;
+ if (scattergather)
+ part_len = (*seg_total_left < cb_len) ? *seg_total_left : cb_len;
+ else
+ part_len = cb_len;
cb_len -= part_len;
*seg_total_left -= part_len;
@@ -1588,7 +1594,9 @@ acc100_dma_desc_te_fill(struct rte_bbdev_enc_op *op,
}
next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset,
- length, seg_total_left, next_triplet);
+ length, seg_total_left, next_triplet,
+ check_bit(op->turbo_enc.op_flags,
+ RTE_BBDEV_TURBO_ENC_SCATTER_GATHER));
if (unlikely(next_triplet < 0)) {
rte_bbdev_log(ERR,
"Mismatch between data to process and mbuf data length in bbdev_op: %p",
@@ -1624,6 +1632,19 @@ acc100_dma_desc_te_fill(struct rte_bbdev_enc_op *op,
return 0;
}
+/* May need to pad LDPC Encoder input to avoid small beat for ACC100. */
+static inline uint16_t
+pad_le_in(uint16_t blen)
+{
+ uint16_t last_beat;
+
+ last_beat = blen % 64;
+ if ((last_beat > 0) && (last_beat <= 8))
+ blen += 8;
+
+ return blen;
+}
+
static inline int
acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,
struct acc100_dma_req_desc *desc, struct rte_mbuf **input,
@@ -1652,8 +1673,7 @@ acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,
}
next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset,
- in_length_in_bytes,
- seg_total_left, next_triplet);
+ pad_le_in(in_length_in_bytes), seg_total_left, next_triplet, false);
if (unlikely(next_triplet < 0)) {
rte_bbdev_log(ERR,
"Mismatch between data to process and mbuf data length in bbdev_op: %p",
@@ -1741,7 +1761,9 @@ acc100_dma_desc_td_fill(struct rte_bbdev_dec_op *op,
}
next_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset, kw,
- seg_total_left, next_triplet);
+ seg_total_left, next_triplet,
+ check_bit(op->turbo_dec.op_flags,
+ RTE_BBDEV_TURBO_DEC_SCATTER_GATHER));
if (unlikely(next_triplet < 0)) {
rte_bbdev_log(ERR,
"Mismatch between data to process and mbuf data length in bbdev_op: %p",
@@ -1843,7 +1865,9 @@ acc100_dma_desc_ld_fill(struct rte_bbdev_dec_op *op,
next_triplet = acc100_dma_fill_blk_type_in(desc, input,
in_offset, input_length,
- seg_total_left, next_triplet);
+ seg_total_left, next_triplet,
+ check_bit(op->ldpc_dec.op_flags,
+ RTE_BBDEV_LDPC_DEC_SCATTER_GATHER));
if (unlikely(next_triplet < 0)) {
rte_bbdev_log(ERR,
@@ -2378,7 +2402,7 @@ enqueue_ldpc_enc_n_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ops,
acc100_header_init(&desc->req);
desc->req.numCBs = num;
- in_length_in_bytes = ops[0]->ldpc_enc.input.data->data_len;
+ in_length_in_bytes = pad_le_in(ops[0]->ldpc_enc.input.data->data_len);
out_length = (enc->cb_params.e + 7) >> 3;
desc->req.m2dlen = 1 + num;
desc->req.d2mlen = num;
@@ -2988,10 +3012,9 @@ enqueue_ldpc_dec_one_op_cb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
fcw = &desc->req.fcw_ld;
acc100_fcw_ld_fill(op, fcw, harq_layout);
- /* Special handling when overusing mbuf */
- if (fcw->rm_e < ACC100_MAX_E_MBUF)
- seg_total_left = rte_pktmbuf_data_len(input)
- - in_offset;
+ /* Special handling when using mbuf or not */
+ if (check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_DEC_SCATTER_GATHER))
+ seg_total_left = rte_pktmbuf_data_len(input) - in_offset;
else
seg_total_left = fcw->rm_e;
@@ -3066,7 +3089,10 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
while (mbuf_total_left > 0 && r < c) {
- seg_total_left = rte_pktmbuf_data_len(input) - in_offset;
+ if (check_bit(op->ldpc_dec.op_flags, RTE_BBDEV_LDPC_DEC_SCATTER_GATHER))
+ seg_total_left = rte_pktmbuf_data_len(input) - in_offset;
+ else
+ seg_total_left = op->ldpc_dec.input.length;
/* Set up DMA descriptor */
desc = q->ring_addr + ((q->sw_ring_head + total_enqueued_cbs)
@@ -3093,7 +3119,9 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
rte_memdump(stderr, "Req Desc.", desc, sizeof(*desc));
#endif
- if (seg_total_left == 0) {
+ if (check_bit(op->ldpc_dec.op_flags,
+ RTE_BBDEV_LDPC_DEC_SCATTER_GATHER)
+ && (seg_total_left == 0)) {
/* Go to the next mbuf */
input = input->next;
in_offset = 0;
@@ -3694,8 +3722,6 @@ dequeue_enc_one_op_cb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
/* Clearing status, it will be set based on response */
op->status = 0;
- op->status |= ((rsp.input_err)
- ? (1 << RTE_BBDEV_DATA_ERROR) : 0);
op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
@@ -3766,8 +3792,6 @@ dequeue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op **ref_op,
rte_bbdev_log_debug("Resp. desc %p: %x", desc,
rsp.val);
- op->status |= ((rsp.input_err)
- ? (1 << RTE_BBDEV_DATA_ERROR) : 0);
op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
@@ -3947,8 +3971,7 @@ dequeue_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op **ref_op,
rte_bbdev_log_debug("Resp. desc %p: %x", desc,
rsp.val);
- op->status |= ((rsp.input_err)
- ? (1 << RTE_BBDEV_DATA_ERROR) : 0);
+ op->status |= ((rsp.input_err) ? (1 << RTE_BBDEV_DATA_ERROR) : 0);
op->status |= ((rsp.dma_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
op->status |= ((rsp.fcw_err) ? (1 << RTE_BBDEV_DRV_ERROR) : 0);
--
2.37.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 21.11 2/7] baseband/acc100: check AQ availability
2022-11-17 4:46 [PATCH 21.11 0/7] baseband/acc100: backporting patches Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 1/7] baseband/acc100: add LDPC encoder padding function Hernan Vargas
@ 2022-11-17 4:46 ` Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 3/7] baseband/acc100: fix ring availability calculation Hernan Vargas
` (5 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Hernan Vargas @ 2022-11-17 4:46 UTC (permalink / raw)
To: stable, ktraynor; +Cc: nicolas.chautru, Hernan Vargas, Maxime Coquelin
[ upstream commit 2df5fe2023c9c7e4a858960f70c7a3b849be1bc1 ]
In some corner case to run more batch enqueue than
supported. A protection is required to avoid that corner case.
Enhance all ACC100 enqueue operations with check to see if there is room
in the atomic queue(AQ) for enqueueing batches into the queue manager.
Fixes: 5ad5060f8f7 ("baseband/acc100: add LDPC processing functions")
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/baseband/acc100/rte_acc100_pmd.c | 31 ++++++++++++++++++------
1 file changed, 24 insertions(+), 7 deletions(-)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 254f256c80..d13f574b46 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -3464,12 +3464,27 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
return i;
}
+/* Check room in AQ for the enqueues batches into Qmgr */
+static inline int32_t
+acc100_aq_avail(struct rte_bbdev_queue_data *q_data, uint16_t num_ops)
+{
+ struct acc100_queue *q = q_data->queue_private;
+ int32_t aq_avail = q->aq_depth -
+ ((q->aq_enqueued - q->aq_dequeued +
+ ACC100_MAX_QUEUE_DEPTH) % ACC100_MAX_QUEUE_DEPTH)
+ - (num_ops >> 7);
+
+ return aq_avail;
+}
+
/* Enqueue encode operations for ACC100 device. */
static uint16_t
acc100_enqueue_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
- if (unlikely(num == 0))
+ int32_t aq_avail = acc100_aq_avail(q_data, num);
+
+ if (unlikely((aq_avail <= 0) || (num == 0)))
return 0;
if (ops[0]->turbo_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
return acc100_enqueue_enc_tb(q_data, ops, num);
@@ -3482,7 +3497,9 @@ static uint16_t
acc100_enqueue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
- if (unlikely(num == 0))
+ int32_t aq_avail = acc100_aq_avail(q_data, num);
+
+ if (unlikely((aq_avail <= 0) || (num == 0)))
return 0;
if (ops[0]->ldpc_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
return acc100_enqueue_enc_tb(q_data, ops, num);
@@ -3667,7 +3684,9 @@ static uint16_t
acc100_enqueue_dec(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
- if (unlikely(num == 0))
+ int32_t aq_avail = acc100_aq_avail(q_data, num);
+
+ if (unlikely((aq_avail <= 0) || (num == 0)))
return 0;
if (ops[0]->turbo_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
return acc100_enqueue_dec_tb(q_data, ops, num);
@@ -3680,11 +3699,9 @@ static uint16_t
acc100_enqueue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
- struct acc100_queue *q = q_data->queue_private;
- int32_t aq_avail = q->aq_depth +
- (q->aq_dequeued - q->aq_enqueued) / 128;
+ int32_t aq_avail = acc100_aq_avail(q_data, num);
- if (unlikely((aq_avail == 0) || (num == 0)))
+ if (unlikely((aq_avail <= 0) || (num == 0)))
return 0;
if (ops[0]->ldpc_dec.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)
--
2.37.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 21.11 3/7] baseband/acc100: fix ring availability calculation
2022-11-17 4:46 [PATCH 21.11 0/7] baseband/acc100: backporting patches Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 1/7] baseband/acc100: add LDPC encoder padding function Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 2/7] baseband/acc100: check AQ availability Hernan Vargas
@ 2022-11-17 4:46 ` Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 4/7] baseband/acc100: enforce additional check on FCW Hernan Vargas
` (4 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Hernan Vargas @ 2022-11-17 4:46 UTC (permalink / raw)
To: stable, ktraynor; +Cc: nicolas.chautru, Hernan Vargas, Maxime Coquelin
[ upstream commit c24d53b4cc13e9e7fc6d7a2db368bd41bc4b89a5 ]
Refactored queue availability computation to prevent the
application to dequeue more than what may have been enqueued.
Fixes: 5ad5060f8f7 ("baseband/acc100: add LDPC processing functions")
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/baseband/acc100/rte_acc100_pmd.c | 36 ++++++++++++++++--------
1 file changed, 25 insertions(+), 11 deletions(-)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index d13f574b46..d63d8dd4bc 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -3322,13 +3322,27 @@ get_num_cbs_in_tb_ldpc_dec(struct rte_bbdev_op_ldpc_dec *ldpc_dec)
return cbs_in_tb;
}
+/* Number of available descriptor in ring to enqueue */
+static inline uint32_t
+acc100_ring_avail_enq(struct acc100_queue *q)
+{
+ return (q->sw_ring_depth - 1 + q->sw_ring_tail - q->sw_ring_head) & q->sw_ring_wrap_mask;
+}
+
+/* Number of available descriptor in ring to dequeue */
+static inline uint32_t
+acc100_ring_avail_deq(struct acc100_queue *q)
+{
+ return (q->sw_ring_depth + q->sw_ring_head - q->sw_ring_tail) & q->sw_ring_wrap_mask;
+}
+
/* Enqueue encode operations for ACC100 device in CB mode. */
static uint16_t
acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc100_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc100_ring_avail_enq(q);
uint16_t i;
union acc100_dma_desc *desc;
int ret;
@@ -3384,7 +3398,7 @@ acc100_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc100_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc100_ring_avail_enq(q);
uint16_t i = 0;
union acc100_dma_desc *desc;
int ret, desc_idx = 0;
@@ -3435,7 +3449,7 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc100_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc100_ring_avail_enq(q);
uint16_t i, enqueued_cbs = 0;
uint8_t cbs_in_tb;
int ret;
@@ -3514,7 +3528,7 @@ acc100_enqueue_dec_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc100_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc100_ring_avail_enq(q);
uint16_t i;
union acc100_dma_desc *desc;
int ret;
@@ -3567,7 +3581,7 @@ acc100_enqueue_ldpc_dec_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc100_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc100_ring_avail_enq(q);
uint16_t i, enqueued_cbs = 0;
uint8_t cbs_in_tb;
int ret;
@@ -3602,7 +3616,7 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc100_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc100_ring_avail_enq(q);
uint16_t i;
union acc100_dma_desc *desc;
int ret;
@@ -3652,7 +3666,7 @@ acc100_enqueue_dec_tb(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_dec_op **ops, uint16_t num)
{
struct acc100_queue *q = q_data->queue_private;
- int32_t avail = q->sw_ring_depth + q->sw_ring_tail - q->sw_ring_head;
+ int32_t avail = acc100_ring_avail_enq(q);
uint16_t i, enqueued_cbs = 0;
uint8_t cbs_in_tb;
int ret;
@@ -4022,7 +4036,7 @@ acc100_dequeue_enc(struct rte_bbdev_queue_data *q_data,
{
struct acc100_queue *q = q_data->queue_private;
uint16_t dequeue_num;
- uint32_t avail = q->sw_ring_head - q->sw_ring_tail;
+ uint32_t avail = acc100_ring_avail_deq(q);
uint32_t aq_dequeued = 0;
uint16_t i, dequeued_cbs = 0;
struct rte_bbdev_enc_op *op;
@@ -4067,7 +4081,7 @@ acc100_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,
struct rte_bbdev_enc_op **ops, uint16_t num)
{
struct acc100_queue *q = q_data->queue_private;
- uint32_t avail = q->sw_ring_head - q->sw_ring_tail;
+ uint32_t avail = acc100_ring_avail_deq(q);
uint32_t aq_dequeued = 0;
uint16_t dequeue_num, i, dequeued_cbs = 0, dequeued_descs = 0;
int ret;
@@ -4107,7 +4121,7 @@ acc100_dequeue_dec(struct rte_bbdev_queue_data *q_data,
{
struct acc100_queue *q = q_data->queue_private;
uint16_t dequeue_num;
- uint32_t avail = q->sw_ring_head - q->sw_ring_tail;
+ uint32_t avail = acc100_ring_avail_deq(q);
uint32_t aq_dequeued = 0;
uint16_t i;
uint16_t dequeued_cbs = 0;
@@ -4154,7 +4168,7 @@ acc100_dequeue_ldpc_dec(struct rte_bbdev_queue_data *q_data,
{
struct acc100_queue *q = q_data->queue_private;
uint16_t dequeue_num;
- uint32_t avail = q->sw_ring_head - q->sw_ring_tail;
+ uint32_t avail = acc100_ring_avail_deq(q);
uint32_t aq_dequeued = 0;
uint16_t i;
uint16_t dequeued_cbs = 0;
--
2.37.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 21.11 4/7] baseband/acc100: enforce additional check on FCW
2022-11-17 4:46 [PATCH 21.11 0/7] baseband/acc100: backporting patches Hernan Vargas
` (2 preceding siblings ...)
2022-11-17 4:46 ` [PATCH 21.11 3/7] baseband/acc100: fix ring availability calculation Hernan Vargas
@ 2022-11-17 4:46 ` Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 5/7] baseband/acc100: fix null HARQ input case Hernan Vargas
` (3 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Hernan Vargas @ 2022-11-17 4:46 UTC (permalink / raw)
To: stable, ktraynor; +Cc: nicolas.chautru, Hernan Vargas, Maxime Coquelin
[ upstream commit 5802f36dd492f4b8c4a270a5d9cc1f11776f1edf ]
Enforce additional check on Frame Control Word validity and
add stronger alignment for decompression mode.
Fixes: 5ad5060f8f7 ("baseband/acc100: add LDPC processing functions")
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/baseband/acc100/rte_acc100_pmd.c | 68 +++++++++++++++++++-----
drivers/baseband/acc100/rte_acc100_pmd.h | 2 +
2 files changed, 58 insertions(+), 12 deletions(-)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index d63d8dd4bc..1fb2d24ded 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1294,13 +1294,14 @@ acc100_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_td *fcw)
/* Fill in a frame control word for LDPC decoding. */
static inline void
-acc100_fcw_ld_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
+acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
union acc100_harq_layout_data *harq_layout)
{
uint16_t harq_out_length, harq_in_length, ncb_p, k0_p, parity_offset;
uint16_t harq_index;
uint32_t l;
bool harq_prun = false;
+ uint32_t max_hc_in;
fcw->qm = op->ldpc_dec.q_m;
fcw->nfiller = op->ldpc_dec.n_filler;
@@ -1350,13 +1351,21 @@ acc100_fcw_ld_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
harq_in_length = op->ldpc_dec.harq_combined_input.length;
if (fcw->hcin_decomp_mode > 0)
harq_in_length = harq_in_length * 8 / 6;
- harq_in_length = RTE_ALIGN(harq_in_length, 64);
- if ((harq_layout[harq_index].offset > 0) & harq_prun) {
+ harq_in_length = RTE_MIN(harq_in_length, op->ldpc_dec.n_cb
+ - op->ldpc_dec.n_filler);
+
+ /* Alignment on next 64B - Already enforced from HC output */
+ harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, ACC100_HARQ_ALIGN_64B);
+
+ /* Stronger alignment requirement when in decompression mode */
+ if (fcw->hcin_decomp_mode > 0)
+ harq_in_length = RTE_ALIGN_FLOOR(harq_in_length, ACC100_HARQ_ALIGN_COMP);
+
+ if ((harq_layout[harq_index].offset > 0) && harq_prun) {
rte_bbdev_log_debug("HARQ IN offset unexpected for now\n");
fcw->hcin_size0 = harq_layout[harq_index].size0;
fcw->hcin_offset = harq_layout[harq_index].offset;
- fcw->hcin_size1 = harq_in_length -
- harq_layout[harq_index].offset;
+ fcw->hcin_size1 = harq_in_length - harq_layout[harq_index].offset;
} else {
fcw->hcin_size0 = harq_in_length;
fcw->hcin_offset = 0;
@@ -1368,6 +1377,21 @@ acc100_fcw_ld_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
fcw->hcin_size1 = 0;
}
+ /* Enforce additional check on FCW validity */
+ max_hc_in = RTE_ALIGN_CEIL(fcw->ncb - fcw->nfiller, ACC100_HARQ_ALIGN_64B);
+ if ((fcw->hcin_size0 > max_hc_in) ||
+ (fcw->hcin_size1 + fcw->hcin_offset > max_hc_in) ||
+ ((fcw->hcin_size0 > fcw->hcin_offset) &&
+ (fcw->hcin_size1 != 0))) {
+ rte_bbdev_log(ERR, " Invalid FCW : HCIn %d %d %d, Ncb %d F %d",
+ fcw->hcin_size0, fcw->hcin_size1,
+ fcw->hcin_offset,
+ fcw->ncb, fcw->nfiller);
+ /* Disable HARQ input in that case to carry forward */
+ op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE;
+ fcw->hcin_en = 0;
+ }
+
fcw->itmax = op->ldpc_dec.iter_max;
fcw->itstop = check_bit(op->ldpc_dec.op_flags,
RTE_BBDEV_LDPC_ITERATION_STOP_ENABLE);
@@ -1392,15 +1416,27 @@ acc100_fcw_ld_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
if (fcw->hcout_en > 0) {
parity_offset = (op->ldpc_dec.basegraph == 1 ? 20 : 8)
* op->ldpc_dec.z_c - op->ldpc_dec.n_filler;
- k0_p = (fcw->k0 > parity_offset) ?
- fcw->k0 - op->ldpc_dec.n_filler : fcw->k0;
+ k0_p = (fcw->k0 > parity_offset) ? fcw->k0 - op->ldpc_dec.n_filler : fcw->k0;
ncb_p = fcw->ncb - op->ldpc_dec.n_filler;
- l = k0_p + fcw->rm_e;
+ l = RTE_MIN(k0_p + fcw->rm_e, INT16_MAX);
harq_out_length = (uint16_t) fcw->hcin_size0;
- harq_out_length = RTE_MIN(RTE_MAX(harq_out_length, l), ncb_p);
- harq_out_length = (harq_out_length + 0x3F) & 0xFFC0;
- if ((k0_p > fcw->hcin_size0 + ACC100_HARQ_OFFSET_THRESHOLD) &&
- harq_prun) {
+ harq_out_length = RTE_MAX(harq_out_length, l);
+
+ /* Stronger alignment when in compression mode */
+ if (fcw->hcout_comp_mode > 0)
+ harq_out_length = RTE_ALIGN_CEIL(harq_out_length, ACC100_HARQ_ALIGN_COMP);
+
+ /* Cannot exceed the pruned Ncb circular buffer */
+ harq_out_length = RTE_MIN(harq_out_length, ncb_p);
+
+ /* Alignment on next 64B */
+ harq_out_length = RTE_ALIGN_CEIL(harq_out_length, ACC100_HARQ_ALIGN_64B);
+
+ /* Stronger alignment when in compression mode enforced again */
+ if (fcw->hcout_comp_mode > 0)
+ harq_out_length = RTE_ALIGN_FLOOR(harq_out_length, ACC100_HARQ_ALIGN_COMP);
+
+ if ((k0_p > fcw->hcin_size0 + ACC100_HARQ_OFFSET_THRESHOLD) && harq_prun) {
fcw->hcout_size0 = (uint16_t) fcw->hcin_size0;
fcw->hcout_offset = k0_p & 0xFFC0;
fcw->hcout_size1 = harq_out_length - fcw->hcout_offset;
@@ -1409,6 +1445,14 @@ acc100_fcw_ld_fill(const struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
fcw->hcout_size1 = 0;
fcw->hcout_offset = 0;
}
+
+ if (fcw->hcout_size0 == 0) {
+ rte_bbdev_log(ERR, " Invalid FCW : HCout %d",
+ fcw->hcout_size0);
+ op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_OUT_ENABLE;
+ fcw->hcout_en = 0;
+ }
+
harq_layout[harq_index].offset = fcw->hcout_offset;
harq_layout[harq_index].size0 = fcw->hcout_size0;
} else {
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.h b/drivers/baseband/acc100/rte_acc100_pmd.h
index 071b37cf9d..9dcdf4653b 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.h
+++ b/drivers/baseband/acc100/rte_acc100_pmd.h
@@ -170,6 +170,8 @@
#define ACC100_PRQ_DDR_VER 0x10092020
#define ACC100_MS_IN_US (1000)
#define ACC100_DDR_TRAINING_MAX (5000)
+#define ACC100_HARQ_ALIGN_COMP 256
+#define ACC100_HARQ_ALIGN_64B 64
/* ACC100 DMA Descriptor triplet */
struct acc100_dma_triplet {
--
2.37.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 21.11 5/7] baseband/acc100: fix null HARQ input case
2022-11-17 4:46 [PATCH 21.11 0/7] baseband/acc100: backporting patches Hernan Vargas
` (3 preceding siblings ...)
2022-11-17 4:46 ` [PATCH 21.11 4/7] baseband/acc100: enforce additional check on FCW Hernan Vargas
@ 2022-11-17 4:46 ` Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 6/7] baseband/acc100: fix ring/queue allocation Hernan Vargas
` (2 subsequent siblings)
7 siblings, 0 replies; 9+ messages in thread
From: Hernan Vargas @ 2022-11-17 4:46 UTC (permalink / raw)
To: stable, ktraynor; +Cc: nicolas.chautru, Hernan Vargas, Maxime Coquelin
[ upstream commit 75114f78cf5819ab857f45d4ed1fc1de0368042e ]
An invalid HW operation may be caused in case the user provide
the BBDEV API and HARQ operation with input enabled and zero input.
Added protection for that case.
Fixes: 5ad5060f8f7 ("baseband/acc100: add LDPC processing functions")
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/baseband/acc100/rte_acc100_pmd.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 1fb2d24ded..c90d7b8e1a 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -1318,6 +1318,14 @@ acc100_fcw_ld_fill(struct rte_bbdev_dec_op *op, struct acc100_fcw_ld *fcw,
op->ldpc_dec.tb_params.ea :
op->ldpc_dec.tb_params.eb;
+ if (unlikely(check_bit(op->ldpc_dec.op_flags,
+ RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE) &&
+ (op->ldpc_dec.harq_combined_input.length == 0))) {
+ rte_bbdev_log(WARNING, "Null HARQ input size provided");
+ /* Disable HARQ input in that case to carry forward. */
+ op->ldpc_dec.op_flags ^= RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE;
+ }
+
fcw->hcin_en = check_bit(op->ldpc_dec.op_flags,
RTE_BBDEV_LDPC_HQ_COMBINE_IN_ENABLE);
fcw->hcout_en = check_bit(op->ldpc_dec.op_flags,
--
2.37.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 21.11 6/7] baseband/acc100: fix ring/queue allocation
2022-11-17 4:46 [PATCH 21.11 0/7] baseband/acc100: backporting patches Hernan Vargas
` (4 preceding siblings ...)
2022-11-17 4:46 ` [PATCH 21.11 5/7] baseband/acc100: fix null HARQ input case Hernan Vargas
@ 2022-11-17 4:46 ` Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 7/7] baseband/acc100: fix double MSI intr in TB mode Hernan Vargas
2022-11-23 18:13 ` [PATCH 21.11 0/7] baseband/acc100: backporting patches Kevin Traynor
7 siblings, 0 replies; 9+ messages in thread
From: Hernan Vargas @ 2022-11-17 4:46 UTC (permalink / raw)
To: stable, ktraynor; +Cc: nicolas.chautru, Hernan Vargas, Maxime Coquelin
[ upstream commit e23491fc2e0028535891af85fcbfedc9b23b1149 ]
Allocate info ring, tail pointers and HARQ layout memory
for a device only if it hasn't already been allocated.
Fixes: 06531464151 ("baseband/acc100: support interrupt")
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/baseband/acc100/rte_acc100_pmd.c | 23 +++++++++++++++++------
1 file changed, 17 insertions(+), 6 deletions(-)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index c90d7b8e1a..3030265c16 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -661,7 +661,8 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
acc100_reg_write(d, reg_addr->ring_size, value);
/* Configure tail pointer for use when SDONE enabled */
- d->tail_ptrs = rte_zmalloc_socket(
+ if (d->tail_ptrs == NULL)
+ d->tail_ptrs = rte_zmalloc_socket(
dev->device->driver->name,
ACC100_NUM_QGRPS * ACC100_NUM_AQS * sizeof(uint32_t),
RTE_CACHE_LINE_SIZE, socket_id);
@@ -669,8 +670,8 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
rte_bbdev_log(ERR, "Failed to allocate tail ptr for %s:%u",
dev->device->driver->name,
dev->data->dev_id);
- rte_free(d->sw_rings);
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto free_sw_rings;
}
d->tail_ptr_iova = rte_malloc_virt2iova(d->tail_ptrs);
@@ -693,15 +694,16 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
/* Continue */
}
- d->harq_layout = rte_zmalloc_socket("HARQ Layout",
+ if (d->harq_layout == NULL)
+ d->harq_layout = rte_zmalloc_socket("HARQ Layout",
ACC100_HARQ_LAYOUT * sizeof(*d->harq_layout),
RTE_CACHE_LINE_SIZE, dev->data->socket_id);
if (d->harq_layout == NULL) {
rte_bbdev_log(ERR, "Failed to allocate harq_layout for %s:%u",
dev->device->driver->name,
dev->data->dev_id);
- rte_free(d->sw_rings);
- return -ENOMEM;
+ ret = -ENOMEM;
+ goto free_tail_ptrs;
}
/* Mark as configured properly */
@@ -712,6 +714,15 @@ acc100_setup_queues(struct rte_bbdev *dev, uint16_t num_queues, int socket_id)
PRIx64, dev->data->name, d->sw_rings, d->sw_rings_iova);
return 0;
+
+free_tail_ptrs:
+ rte_free(d->tail_ptrs);
+ d->tail_ptrs = NULL;
+free_sw_rings:
+ rte_free(d->sw_rings_base);
+ d->sw_rings = NULL;
+
+ return ret;
}
static int
--
2.37.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 21.11 7/7] baseband/acc100: fix double MSI intr in TB mode
2022-11-17 4:46 [PATCH 21.11 0/7] baseband/acc100: backporting patches Hernan Vargas
` (5 preceding siblings ...)
2022-11-17 4:46 ` [PATCH 21.11 6/7] baseband/acc100: fix ring/queue allocation Hernan Vargas
@ 2022-11-17 4:46 ` Hernan Vargas
2022-11-23 18:13 ` [PATCH 21.11 0/7] baseband/acc100: backporting patches Kevin Traynor
7 siblings, 0 replies; 9+ messages in thread
From: Hernan Vargas @ 2022-11-17 4:46 UTC (permalink / raw)
To: stable, ktraynor; +Cc: nicolas.chautru, Hernan Vargas, Maxime Coquelin
[ upstream commit beaf1f876c2c871f0197f9dd090eabed8f7e1e3d ]
Fix logical bug in SW causing MSI to be issued twice when running in
transport block mode.
Fixes: f404dfe35cc ("baseband/acc100: support 4G processing")
Fixes: bec597b78a0 ("baseband/acc200: add LTE processing")
Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
---
drivers/baseband/acc100/rte_acc100_pmd.c | 39 ++++--------------------
1 file changed, 6 insertions(+), 33 deletions(-)
diff --git a/drivers/baseband/acc100/rte_acc100_pmd.c b/drivers/baseband/acc100/rte_acc100_pmd.c
index 3030265c16..eba6eb0df4 100644
--- a/drivers/baseband/acc100/rte_acc100_pmd.c
+++ b/drivers/baseband/acc100/rte_acc100_pmd.c
@@ -2073,6 +2073,7 @@ acc100_dma_enqueue(struct acc100_queue *q, uint16_t n,
struct rte_bbdev_stats *queue_stats)
{
union acc100_enqueue_reg_fmt enq_req;
+ union acc100_dma_desc *desc;
#ifdef RTE_BBDEV_OFFLOAD_COST
uint64_t start_time = 0;
queue_stats->acc_offload_cycles = 0;
@@ -2080,13 +2081,17 @@ acc100_dma_enqueue(struct acc100_queue *q, uint16_t n,
RTE_SET_USED(queue_stats);
#endif
+ /* Set Sdone and IRQ enable bit on last descriptor. */
+ desc = q->ring_addr + ((q->sw_ring_head + n - 1) & q->sw_ring_wrap_mask);
+ desc->req.sdone_enable = 1;
+ desc->req.irq_enable = q->irq_enable;
+
enq_req.val = 0;
/* Setting offset, 100b for 256 DMA Desc */
enq_req.addr_offset = ACC100_DESC_OFFSET;
/* Split ops into batches */
do {
- union acc100_dma_desc *desc;
uint16_t enq_batch_size;
uint64_t offset;
rte_iova_t req_elem_addr;
@@ -2638,7 +2643,6 @@ enqueue_enc_one_op_tb(struct acc100_queue *q, struct rte_bbdev_enc_op *op,
/* Set SDone on last CB descriptor for TB mode. */
desc->req.sdone_enable = 1;
- desc->req.irq_enable = q->irq_enable;
return current_enqueued_cbs;
}
@@ -3202,7 +3206,6 @@ enqueue_ldpc_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
#endif
/* Set SDone on last CB descriptor for TB mode */
desc->req.sdone_enable = 1;
- desc->req.irq_enable = q->irq_enable;
return current_enqueued_cbs;
}
@@ -3304,7 +3307,6 @@ enqueue_dec_one_op_tb(struct acc100_queue *q, struct rte_bbdev_dec_op *op,
#endif
/* Set SDone on last CB descriptor for TB mode */
desc->req.sdone_enable = 1;
- desc->req.irq_enable = q->irq_enable;
return current_enqueued_cbs;
}
@@ -3407,7 +3409,6 @@ acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
struct acc100_queue *q = q_data->queue_private;
int32_t avail = acc100_ring_avail_enq(q);
uint16_t i;
- union acc100_dma_desc *desc;
int ret;
for (i = 0; i < num; ++i) {
@@ -3424,12 +3425,6 @@ acc100_enqueue_enc_cb(struct rte_bbdev_queue_data *q_data,
if (unlikely(i == 0))
return 0; /* Nothing to enqueue */
- /* Set SDone in last CB in enqueued ops for CB mode*/
- desc = q->ring_addr + ((q->sw_ring_head + i - 1)
- & q->sw_ring_wrap_mask);
- desc->req.sdone_enable = 1;
- desc->req.irq_enable = q->irq_enable;
-
acc100_dma_enqueue(q, i, &q_data->queue_stats);
/* Update stats */
@@ -3463,7 +3458,6 @@ acc100_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
struct acc100_queue *q = q_data->queue_private;
int32_t avail = acc100_ring_avail_enq(q);
uint16_t i = 0;
- union acc100_dma_desc *desc;
int ret, desc_idx = 0;
int16_t enq, left = num;
@@ -3491,12 +3485,6 @@ acc100_enqueue_ldpc_enc_cb(struct rte_bbdev_queue_data *q_data,
if (unlikely(i == 0))
return 0; /* Nothing to enqueue */
- /* Set SDone in last CB in enqueued ops for CB mode*/
- desc = q->ring_addr + ((q->sw_ring_head + desc_idx - 1)
- & q->sw_ring_wrap_mask);
- desc->req.sdone_enable = 1;
- desc->req.irq_enable = q->irq_enable;
-
acc100_dma_enqueue(q, desc_idx, &q_data->queue_stats);
/* Update stats */
@@ -3593,7 +3581,6 @@ acc100_enqueue_dec_cb(struct rte_bbdev_queue_data *q_data,
struct acc100_queue *q = q_data->queue_private;
int32_t avail = acc100_ring_avail_enq(q);
uint16_t i;
- union acc100_dma_desc *desc;
int ret;
for (i = 0; i < num; ++i) {
@@ -3610,12 +3597,6 @@ acc100_enqueue_dec_cb(struct rte_bbdev_queue_data *q_data,
if (unlikely(i == 0))
return 0; /* Nothing to enqueue */
- /* Set SDone in last CB in enqueued ops for CB mode*/
- desc = q->ring_addr + ((q->sw_ring_head + i - 1)
- & q->sw_ring_wrap_mask);
- desc->req.sdone_enable = 1;
- desc->req.irq_enable = q->irq_enable;
-
acc100_dma_enqueue(q, i, &q_data->queue_stats);
/* Update stats */
@@ -3681,7 +3662,6 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
struct acc100_queue *q = q_data->queue_private;
int32_t avail = acc100_ring_avail_enq(q);
uint16_t i;
- union acc100_dma_desc *desc;
int ret;
bool same_op = false;
for (i = 0; i < num; ++i) {
@@ -3707,13 +3687,6 @@ acc100_enqueue_ldpc_dec_cb(struct rte_bbdev_queue_data *q_data,
if (unlikely(i == 0))
return 0; /* Nothing to enqueue */
- /* Set SDone in last CB in enqueued ops for CB mode*/
- desc = q->ring_addr + ((q->sw_ring_head + i - 1)
- & q->sw_ring_wrap_mask);
-
- desc->req.sdone_enable = 1;
- desc->req.irq_enable = q->irq_enable;
-
acc100_dma_enqueue(q, i, &q_data->queue_stats);
/* Update stats */
--
2.37.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 21.11 0/7] baseband/acc100: backporting patches
2022-11-17 4:46 [PATCH 21.11 0/7] baseband/acc100: backporting patches Hernan Vargas
` (6 preceding siblings ...)
2022-11-17 4:46 ` [PATCH 21.11 7/7] baseband/acc100: fix double MSI intr in TB mode Hernan Vargas
@ 2022-11-23 18:13 ` Kevin Traynor
7 siblings, 0 replies; 9+ messages in thread
From: Kevin Traynor @ 2022-11-23 18:13 UTC (permalink / raw)
To: Hernan Vargas, stable; +Cc: nicolas.chautru
On 17/11/2022 04:46, Hernan Vargas wrote:
> Backporting the following patches from the main branch:
> 6f3325bbfa Hernan Vargas baseband/acc100: add LDPC encoder padding function
> 2df5fe2023 Hernan Vargas baseband/acc100: check AQ availability
> c24d53b4cc Hernan Vargas baseband/acc100: fix ring availability calculation
> 5802f36dd4 Hernan Vargas baseband/acc100: enforce additional check on FCW
> 75114f78cf Hernan Vargas baseband/acc100: fix null HARQ input case
> e23491fc2e Hernan Vargas baseband/acc100: fix ring/queue allocation
> beaf1f876c Hernan Vargas baseband/acc100: fix double MSI intr in TB mode
>
> Hernan Vargas (7):
> baseband/acc100: add LDPC encoder padding function
> baseband/acc100: check AQ availability
> baseband/acc100: fix ring availability calculation
> baseband/acc100: enforce additional check on FCW
> baseband/acc100: fix null HARQ input case
> baseband/acc100: fix ring/queue allocation
> baseband/acc100: fix double MSI intr in TB mode
>
> drivers/baseband/acc100/rte_acc100_pmd.c | 268 +++++++++++++++--------
> drivers/baseband/acc100/rte_acc100_pmd.h | 2 +
> 2 files changed, 181 insertions(+), 89 deletions(-)
>
Thanks Hernan. These are pushed to 21.11 branch now.
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2022-11-23 18:13 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
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2022-11-17 4:46 [PATCH 21.11 0/7] baseband/acc100: backporting patches Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 1/7] baseband/acc100: add LDPC encoder padding function Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 2/7] baseband/acc100: check AQ availability Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 3/7] baseband/acc100: fix ring availability calculation Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 4/7] baseband/acc100: enforce additional check on FCW Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 5/7] baseband/acc100: fix null HARQ input case Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 6/7] baseband/acc100: fix ring/queue allocation Hernan Vargas
2022-11-17 4:46 ` [PATCH 21.11 7/7] baseband/acc100: fix double MSI intr in TB mode Hernan Vargas
2022-11-23 18:13 ` [PATCH 21.11 0/7] baseband/acc100: backporting patches Kevin Traynor
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