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* [dpdk-dev] [PATCH 00/70] update e1000 base code
@ 2020-06-22  6:45 Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 01/70] net/e1000/base: i210 slow system clock update Guinan Sun
                   ` (71 more replies)
  0 siblings, 72 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun

update e1000 base code.

Guinan Sun (70):
  net/e1000/base: i210 slow system clock update
  net/e1000/base: add initial support for Foxville
  net/e1000/base: add ICL device id's
  net/e1000/base: remove shadowing variable declarations
  net/e1000/base: introduce flag
  net/e1000/base: modify MAC initialization
  net/e1000/base: modify flash presence for i225 devices
  net/e1000/base: add i225 devices PHY type
  net/e1000/base: expose xmdio methods
  net/e1000/base: modify negotiation advertisement
  net/e1000/base: fall through explicitly
  net/e1000/base: add function parameter descriptions
  net/e1000/base: modify klocwork errors
  net/e1000/base: add 2.5G speed advertisement
  net/e1000/base: setup copper link function for i225
  net/e1000/base: implement Low-Power-Link-Up (LPLU) for i225
  net/e1000/base: add new wakeup/proxy registers for i225
  net/e1000/base: modify klockwork about unused return values
  net/e1000/base: improve coding style
  net/e1000/base: modify HW level time sync mechanisms
  net/e1000/base: modify description
  net/e1000/base: add EEE support for i225
  net/e1000/base: remove duplicated codes from 82575
  net/e1000/base: add info structure
  net/e1000/base: wrap the e1000 defines.h
  net/e1000/base: wrap the e1000 regs.h file
  net/e1000/base: cleanup duplicate declaration
  net/e1000/base: modify wrapper for registers and definitions
  net/e1000/base: more function name cleanup
  net/e1000/base: expose EEE defines
  net/e1000/base: expose the manage functionality
  net/e1000/base: modify the wrong return value
  net/e1000/base: wrap the unneeded code
  net/e1000/base: clean family specific functions from base
  net/e1000/base: expose more time synchronization registers
  net/e1000/base: add define to PCIm function state
  net/e1000/base: add missing register defines
  net/e1000/base: move the device reset definition
  net/e1000/base: increased timeout for ME ULP exit
  net/e1000/base: add missing device ID
  net/e1000/base: add Foxville device IDs
  net/e1000/base: expose more future extended NVM
  net/e1000/base: add definition of EEE 2.5G setup register
  net/e1000/base: add FXVL's Blank NVM device ID
  net/e1000/base: remove useless statement
  net/e1000/base: add missed define for VFTA
  net/e1000/base: modify flow control setup
  net/e1000/base: support I225 update NVM flow
  net/e1000/base: led blinking fix for i210
  net/e1000/base: clean up dead code
  net/e1000/base: expose new FEXTNVM registers and masks
  net/e1000/base: cleanup duplicate defines
  net/e1000/base: add WUC registers and defines
  net/e1000/base: correct PHY power up flow for i225
  net/e1000/base: add support for Nahum10
  net/e1000/base: add fall-through comments for switch cases
  net/e1000/base: add EEE functions and defines for IGC
  net/e1000/base: add PHY power management control
  net/e1000/base: introduce DPGFR register
  net/e1000/base: add new device IDs for Foxville B2
  net/e1000/base: add address and queue select
  net/e1000/base: introduce IEEE PHY ID mask
  net/e1000/base: modify VLAN names
  net/e1000/base: add EEE set function to share code API
  net/e1000/base: add defines for source address filters
  net/e1000/base: add LPI counters
  net/e1000/base: remove conditional compilation wrapper
  net/e1000/base: modify copyright
  net/e1000/base: update version
  net/e1000/base: resolve core dump

 drivers/net/e1000/Makefile                 |    2 +
 drivers/net/e1000/base/README              |    4 +-
 drivers/net/e1000/base/e1000_80003es2lan.c |    3 +-
 drivers/net/e1000/base/e1000_80003es2lan.h |    2 +-
 drivers/net/e1000/base/e1000_82540.c       |    2 +-
 drivers/net/e1000/base/e1000_82541.c       |    2 +-
 drivers/net/e1000/base/e1000_82541.h       |    2 +-
 drivers/net/e1000/base/e1000_82542.c       |    2 +-
 drivers/net/e1000/base/e1000_82543.c       |    2 +-
 drivers/net/e1000/base/e1000_82543.h       |    2 +-
 drivers/net/e1000/base/e1000_82571.c       |    2 +-
 drivers/net/e1000/base/e1000_82571.h       |    2 +-
 drivers/net/e1000/base/e1000_82575.c       |  524 +++------
 drivers/net/e1000/base/e1000_82575.h       |  124 +-
 drivers/net/e1000/base/e1000_api.c         |   51 +-
 drivers/net/e1000/base/e1000_api.h         |    6 +-
 drivers/net/e1000/base/e1000_base.c        |  191 ++++
 drivers/net/e1000/base/e1000_base.h        |  127 +++
 drivers/net/e1000/base/e1000_defines.h     |  225 +++-
 drivers/net/e1000/base/e1000_hw.h          |   62 +-
 drivers/net/e1000/base/e1000_i210.c        |  101 +-
 drivers/net/e1000/base/e1000_i210.h        |    6 +-
 drivers/net/e1000/base/e1000_i225.c        | 1205 ++++++++++++++++++++
 drivers/net/e1000/base/e1000_i225.h        |  109 ++
 drivers/net/e1000/base/e1000_ich8lan.c     |  115 +-
 drivers/net/e1000/base/e1000_ich8lan.h     |   28 +-
 drivers/net/e1000/base/e1000_mac.c         |  163 +--
 drivers/net/e1000/base/e1000_mac.h         |    5 +-
 drivers/net/e1000/base/e1000_manage.c      |    6 +-
 drivers/net/e1000/base/e1000_manage.h      |    3 +-
 drivers/net/e1000/base/e1000_mbx.c         |    7 +-
 drivers/net/e1000/base/e1000_mbx.h         |    2 +-
 drivers/net/e1000/base/e1000_nvm.c         |   17 +-
 drivers/net/e1000/base/e1000_nvm.h         |    2 +-
 drivers/net/e1000/base/e1000_phy.c         |  216 +++-
 drivers/net/e1000/base/e1000_phy.h         |   24 +-
 drivers/net/e1000/base/e1000_regs.h        |   89 +-
 drivers/net/e1000/base/e1000_vf.c          |    4 +-
 drivers/net/e1000/base/e1000_vf.h          |    2 +-
 drivers/net/e1000/base/meson.build         |    2 +
 drivers/net/e1000/igb_rxtx.c               |    2 +-
 41 files changed, 2597 insertions(+), 848 deletions(-)
 create mode 100644 drivers/net/e1000/base/e1000_base.c
 create mode 100644 drivers/net/e1000/base/e1000_base.h
 create mode 100644 drivers/net/e1000/base/e1000_i225.c
 create mode 100644 drivers/net/e1000/base/e1000_i225.h

-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 01/70] net/e1000/base: i210 slow system clock update
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 02/70] net/e1000/base: add initial support for Foxville Guinan Sun
                   ` (70 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Todd Fujinaka

This code is required for the update to i210 errata #25.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i210.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index 9298223c3..d9cd1a084 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -900,6 +900,8 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 	u16 nvm_word, phy_word, pci_word, tmp_nvm;
 	int i;
 
+	/* Get PHY semaphore */
+	hw->phy.ops.acquire(hw);
 	/* Get and set needed register values */
 	wuc = E1000_READ_REG(hw, E1000_WUC);
 	mdicnfg = E1000_READ_REG(hw, E1000_MDICNFG);
@@ -915,8 +917,11 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 	phy_word = E1000_PHY_PLL_UNCONF;
 	for (i = 0; i < E1000_MAX_PLL_TRIES; i++) {
 		/* check current state directly from internal PHY */
-		e1000_read_phy_reg_gs40g(hw, (E1000_PHY_PLL_FREQ_PAGE |
-					 E1000_PHY_PLL_FREQ_REG), &phy_word);
+		e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0xFC);
+		usec_delay(20);
+		e1000_read_phy_reg_mdic(hw, E1000_PHY_PLL_FREQ_REG, &phy_word);
+		usec_delay(20);
+		e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0);
 		if ((phy_word & E1000_PHY_PLL_UNCONF)
 		    != E1000_PHY_PLL_UNCONF) {
 			ret_val = E1000_SUCCESS;
@@ -950,6 +955,8 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 	}
 	/* restore MDICNFG setting */
 	E1000_WRITE_REG(hw, E1000_MDICNFG, mdicnfg);
+	/* Release PHY semaphore */
+	hw->phy.ops.release(hw);
 	return ret_val;
 }
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 02/70] net/e1000/base: add initial support for Foxville
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 01/70] net/e1000/base: i210 slow system clock update Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 03/70] net/e1000/base: add ICL device id's Guinan Sun
                   ` (69 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Add Foxville device's ID and mac type,
bind device's ID and MAC type.
Add basic Foxville functionality.
Add phy ID's for Foxville.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/Makefile             |    1 +
 drivers/net/e1000/base/e1000_82575.c   |   10 +-
 drivers/net/e1000/base/e1000_api.c     |    9 +
 drivers/net/e1000/base/e1000_api.h     |    1 +
 drivers/net/e1000/base/e1000_defines.h |   52 ++
 drivers/net/e1000/base/e1000_hw.h      |   19 +
 drivers/net/e1000/base/e1000_i225.c    | 1119 ++++++++++++++++++++++++
 drivers/net/e1000/base/e1000_i225.h    |  105 +++
 drivers/net/e1000/base/e1000_regs.h    |    6 +
 drivers/net/e1000/base/meson.build     |    1 +
 10 files changed, 1321 insertions(+), 2 deletions(-)
 create mode 100644 drivers/net/e1000/base/e1000_i225.c
 create mode 100644 drivers/net/e1000/base/e1000_i225.h

diff --git a/drivers/net/e1000/Makefile b/drivers/net/e1000/Makefile
index 9fb038cf0..82e156ecb 100644
--- a/drivers/net/e1000/Makefile
+++ b/drivers/net/e1000/Makefile
@@ -58,6 +58,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_82543.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_82571.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_82575.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_i210.c
+SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_i225.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_api.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_ich8lan.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_logs.c
diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 4c3611c6d..35a6ba502 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -14,6 +14,7 @@
 
 #include "e1000_api.h"
 #include "e1000_i210.h"
+#include "e1000_i225.h"
 
 STATIC s32  e1000_init_phy_params_82575(struct e1000_hw *hw);
 STATIC s32  e1000_init_mac_params_82575(struct e1000_hw *hw);
@@ -430,12 +431,17 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	if (mac->type >= e1000_82580)
 		mac->ops.reset_hw = e1000_reset_hw_82580;
 	else
-	mac->ops.reset_hw = e1000_reset_hw_82575;
+		mac->ops.reset_hw = e1000_reset_hw_82575;
 	/* hw initialization */
 	if ((mac->type == e1000_i210) || (mac->type == e1000_i211))
 		mac->ops.init_hw = e1000_init_hw_i210;
 	else
-	mac->ops.init_hw = e1000_init_hw_82575;
+#ifndef NO_I225_SUPPORT
+	if (mac->type == e1000_i225)
+		mac->ops.init_hw = e1000_init_hw_i225;
+	else
+#endif /* NO_I225_SUPPORT */
+		mac->ops.init_hw = e1000_init_hw_82575;
 	/* link setup */
 	mac->ops.setup_link = e1000_setup_link_generic;
 	/* physical interface link setup */
diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index 718952801..90845d477 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -333,6 +333,12 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 	case E1000_DEV_ID_I211_COPPER:
 		mac->type = e1000_i211;
 		break;
+#ifndef NO_I225_SUPPORT
+	case E1000_DEV_ID_I225_LM:
+	case E1000_DEV_ID_I225_V:
+		mac->type = e1000_i225;
+		break;
+#endif /* NO_I225_SUPPORT */
 	case E1000_DEV_ID_82576_VF:
 	case E1000_DEV_ID_82576_VF_HV:
 		mac->type = e1000_vfadapt;
@@ -451,6 +457,9 @@ s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device)
 	case e1000_i211:
 		e1000_init_function_pointers_i210(hw);
 		break;
+	case e1000_i225:
+		e1000_init_function_pointers_i225(hw);
+		break;
 	case e1000_vfadapt:
 		e1000_init_function_pointers_vf(hw);
 		break;
diff --git a/drivers/net/e1000/base/e1000_api.h b/drivers/net/e1000/base/e1000_api.h
index 3054d5b9d..34e065054 100644
--- a/drivers/net/e1000/base/e1000_api.h
+++ b/drivers/net/e1000/base/e1000_api.h
@@ -20,6 +20,7 @@ extern void e1000_init_function_pointers_vf(struct e1000_hw *hw);
 extern void e1000_power_up_fiber_serdes_link(struct e1000_hw *hw);
 extern void e1000_shutdown_fiber_serdes_link(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_i210(struct e1000_hw *hw);
+extern void e1000_init_function_pointers_i225(struct e1000_hw *hw);
 
 s32 e1000_set_obff_timer(struct e1000_hw *hw, u32 itr);
 s32 e1000_set_mac_type(struct e1000_hw *hw);
diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 8831da7ca..ee2ecceee 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -843,6 +843,11 @@
 #define E1000_EEE_SU_LPI_CLK_STP	0x00800000 /* EEE LPI Clock Stop */
 #define E1000_EEE_LP_ADV_DEV_I210	7          /* EEE LP Adv Device */
 #define E1000_EEE_LP_ADV_ADDR_I210	61         /* EEE LP Adv Register */
+#ifndef NO_I225_SUPPORT
+#define E1000_EEE_LP_ADV_DEV_I225	7          /* EEE LP Adv Device */
+#define E1000_EEE_LP_ADV_ADDR_I225	61         /* EEE LP Adv Register */
+
+#endif /* NO_I225_SUPPORT */
 /* PCI Express Control */
 #define E1000_GCR_RXD_NO_SNOOP		0x00000001
 #define E1000_GCR_RXDSCW_NO_SNOOP	0x00000002
@@ -1027,6 +1032,12 @@
 /* Firmware code revision field word offset*/
 #define E1000_I210_FW_VER_OFFSET	328
 
+#ifndef NO_I225_SUPPORT
+#define E1000_EECD_FLUPD_I225		0x00800000 /* Update FLASH */
+#define E1000_EECD_FLUDONE_I225		0x04000000 /* Update FLASH done */
+#define E1000_EECD_FLASH_DETECTED_I225	0x00080000 /* FLASH detected */
+
+#endif /* NO_I225_SUPPORT */
 #define E1000_NVM_RW_REG_DATA	16  /* Offset to data in NVM read/write regs */
 #define E1000_NVM_RW_REG_DONE	2   /* Offset to READ/WRITE done bit */
 #define E1000_NVM_RW_REG_START	1   /* Start operation */
@@ -1244,6 +1255,9 @@
 #define I82580_I_PHY_ID		0x015403A0
 #define I350_I_PHY_ID		0x015403B0
 #define I210_I_PHY_ID		0x01410C00
+#ifndef NO_I225_SUPPORT
+#define I225_I_PHY_ID		0x67C9DC00
+#endif /* NO_I225_SUPPORT */
 #define IGP04E1000_E_PHY_ID	0x02A80391
 #define BCM54616_E_PHY_ID	0x03625D10
 #define M88_VENDOR		0x0141
@@ -1454,6 +1468,43 @@
 #define I210_TXPBSIZE_DEFAULT		0x04000014 /* TXPBSIZE default */
 
 
+#ifndef NO_I225_SUPPORT
+#define I225_RXPBSIZE_DEFAULT		0x000000A2 /* RXPBSIZE default */
+#define I225_TXPBSIZE_DEFAULT		0x04000014 /* TXPBSIZE default */
+#define E1000_RXPBS_SIZE_I225_MASK	0x0000003F /* Rx packet buffer size */
+#define E1000_TXPB0S_SIZE_I225_MASK	0x0000003F /* Tx packet buffer 0 size */
+#define E1000_STM_OPCODE		0xDB00
+#define E1000_EEPROM_FLASH_SIZE_WORD	0x11
+#define INVM_DWORD_TO_RECORD_TYPE(invm_dword) \
+	(u8)((invm_dword) & 0x7)
+#define INVM_DWORD_TO_WORD_ADDRESS(invm_dword) \
+	(u8)(((invm_dword) & 0x0000FE00) >> 9)
+#define INVM_DWORD_TO_WORD_DATA(invm_dword) \
+	(u16)(((invm_dword) & 0xFFFF0000) >> 16)
+#define E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS	8
+#define E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS	1
+#define E1000_INVM_ULT_BYTES_SIZE		8
+#define E1000_INVM_RECORD_SIZE_IN_BYTES	4
+#define E1000_INVM_VER_FIELD_ONE		0x1FF8
+#define E1000_INVM_VER_FIELD_TWO		0x7FE000
+#define E1000_INVM_IMGTYPE_FIELD		0x1F800000
+
+#define E1000_INVM_MAJOR_MASK	0x3F0
+#define E1000_INVM_MINOR_MASK	0xF
+#define E1000_INVM_MAJOR_SHIFT	4
+
+/* PLL Defines */
+#define E1000_PCI_PMCSR		0x44
+#define E1000_PCI_PMCSR_D3		0x03
+#define E1000_MAX_PLL_TRIES		5
+#define E1000_PHY_PLL_UNCONF		0xFF
+#define E1000_PHY_PLL_FREQ_PAGE	0xFC0000
+#define E1000_PHY_PLL_FREQ_REG		0x000E
+#define E1000_INVM_DEFAULT_AL		0x202F
+#define E1000_INVM_AUTOLOAD		0x0A
+#define E1000_INVM_PLL_WO_VAL		0x0010
+
+#endif /* NO_I225_SUPPORT */
 /* Proxy Filter Control */
 #define E1000_PROXYFC_D0		0x00000001 /* Enable offload in D0 */
 #define E1000_PROXYFC_EX		0x00000004 /* Directed exact proxy */
@@ -1476,6 +1527,7 @@
 /* Lan ID bit field offset in status register */
 #define E1000_STATUS_LAN_ID_OFFSET	2
 #define E1000_VFTA_ENTRIES		128
+
 #ifndef E1000_UNUSEDARG
 #define E1000_UNUSEDARG
 #endif /* E1000_UNUSEDARG */
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 9793b724e..a47fa9822 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -155,6 +155,10 @@ struct e1000_hw;
 #define E1000_DEV_ID_I210_COPPER_FLASHLESS	0x157B
 #define E1000_DEV_ID_I210_SERDES_FLASHLESS	0x157C
 #define E1000_DEV_ID_I211_COPPER		0x1539
+#ifndef NO_I225_SUPPORT
+#define E1000_DEV_ID_I225_LM			0x15F2
+#define E1000_DEV_ID_I225_V			0x15F3
+#endif /* NO_I225_SUPPORT */
 #define E1000_DEV_ID_I354_BACKPLANE_1GBPS	0x1F40
 #define E1000_DEV_ID_I354_SGMII			0x1F41
 #define E1000_DEV_ID_I354_BACKPLANE_2_5GBPS	0x1F45
@@ -214,6 +218,9 @@ enum e1000_mac_type {
 	e1000_i354,
 	e1000_i210,
 	e1000_i211,
+#ifndef NO_I225_SUPPORT
+	e1000_i225,
+#endif /* NO_I225_SUPPORT */
 	e1000_vfadapt,
 	e1000_vfadapt_i350,
 	e1000_num_macs  /* List is 1-based, so subtract 1 for true count. */
@@ -348,6 +355,17 @@ enum e1000_serdes_link_state {
 	e1000_serdes_link_forced_up
 };
 
+#ifndef NO_I225_SUPPORT
+enum e1000_invm_structure_type {
+	e1000_invm_unitialized_structure		= 0x00,
+	e1000_invm_word_autoload_structure		= 0x01,
+	e1000_invm_csr_autoload_structure		= 0x02,
+	e1000_invm_phy_register_autoload_structure	= 0x03,
+	e1000_invm_rsa_key_sha256_structure		= 0x04,
+	e1000_invm_invalidated_structure		= 0x0f,
+};
+
+#endif /* NO_I225_SUPPORT */
 #define __le16 u16
 #define __le32 u32
 #define __le64 u64
@@ -1008,6 +1026,7 @@ struct e1000_hw {
 #include "e1000_ich8lan.h"
 #include "e1000_82575.h"
 #include "e1000_i210.h"
+#include "e1000_i225.h"
 
 /* These functions must be implemented by drivers */
 void e1000_pci_clear_mwi(struct e1000_hw *hw);
diff --git a/drivers/net/e1000/base/e1000_i225.c b/drivers/net/e1000/base/e1000_i225.c
new file mode 100644
index 000000000..4ba6c45be
--- /dev/null
+++ b/drivers/net/e1000/base/e1000_i225.c
@@ -0,0 +1,1119 @@
+#ifndef NO_API_SUPPORT
+#include "e1000_api.h"
+#else
+#include "e1000_hw.h"
+#endif /* NO_API_SUPPORT */
+#ifndef EXTERNAL_RELEASE
+#ifdef WPP_TRACING_ENABLED
+#include <e1000_i225.tmh>
+#endif /* WPP_TRACING_ENABLED */
+#endif /* EXTERNAL_RELEASE */
+
+STATIC s32 e1000_acquire_nvm_i225(struct e1000_hw *hw);
+STATIC void e1000_release_nvm_i225(struct e1000_hw *hw);
+STATIC s32 e1000_get_hw_semaphore_i225(struct e1000_hw *hw);
+#ifndef QV_RELEASE
+STATIC s32 __e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
+				  u16 *data);
+#endif /* QV_RELEASE */
+STATIC s32 e1000_pool_flash_update_done_i225(struct e1000_hw *hw);
+STATIC s32 e1000_valid_led_default_i225(struct e1000_hw *hw, u16 *data);
+
+/* e1000_acquire_nvm_i225 - Request for access to EEPROM
+ * @hw: pointer to the HW structure
+ *
+ * Acquire the necessary semaphores for exclusive access to the EEPROM.
+ * Set the EEPROM access request bit and wait for EEPROM access grant bit.
+ * Return successful if access grant bit set, else clear the request for
+ * EEPROM access and return -E1000_ERR_NVM (-1).
+ */
+STATIC s32 e1000_acquire_nvm_i225(struct e1000_hw *hw)
+{
+	s32 ret_val;
+
+	DEBUGFUNC("e1000_acquire_nvm_i225");
+
+	ret_val = e1000_acquire_swfw_sync_i225(hw, E1000_SWFW_EEP_SM);
+
+	return ret_val;
+}
+
+/* e1000_release_nvm_i225 - Release exclusive access to EEPROM
+ * @hw: pointer to the HW structure
+ *
+ * Stop any current commands to the EEPROM and clear the EEPROM request bit,
+ * then release the semaphores acquired.
+ */
+STATIC void e1000_release_nvm_i225(struct e1000_hw *hw)
+{
+	DEBUGFUNC("e1000_release_nvm_i225");
+
+	e1000_release_swfw_sync_i225(hw, E1000_SWFW_EEP_SM);
+}
+
+/* e1000_acquire_swfw_sync_i225 - Acquire SW/FW semaphore
+ * @hw: pointer to the HW structure
+ * @mask: specifies which semaphore to acquire
+ *
+ * Acquire the SW/FW semaphore to access the PHY or NVM.  The mask
+ * will also specify which port we're acquiring the lock for.
+ */
+s32 e1000_acquire_swfw_sync_i225(struct e1000_hw *hw, u16 mask)
+{
+	u32 swfw_sync;
+	u32 swmask = mask;
+	u32 fwmask = mask << 16;
+	s32 ret_val = E1000_SUCCESS;
+	s32 i = 0, timeout = 200; /* FIXME: find real value to use here */
+
+	DEBUGFUNC("e1000_acquire_swfw_sync_i225");
+
+	while (i < timeout) {
+		if (e1000_get_hw_semaphore_i225(hw)) {
+			ret_val = -E1000_ERR_SWFW_SYNC;
+			goto out;
+		}
+
+		swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
+		if (!(swfw_sync & (fwmask | swmask)))
+			break;
+
+		/* Firmware currently using resource (fwmask)
+		 * or other software thread using resource (swmask)
+		 */
+		e1000_put_hw_semaphore_generic(hw);
+		msec_delay_irq(5);
+		i++;
+	}
+
+	if (i == timeout) {
+		DEBUGOUT("Driver can't access resource, SW_FW_SYNC timeout.\n");
+		ret_val = -E1000_ERR_SWFW_SYNC;
+		goto out;
+	}
+
+	swfw_sync |= swmask;
+	E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
+
+	e1000_put_hw_semaphore_generic(hw);
+
+out:
+	return ret_val;
+}
+
+/* e1000_release_swfw_sync_i225 - Release SW/FW semaphore
+ * @hw: pointer to the HW structure
+ * @mask: specifies which semaphore to acquire
+ *
+ * Release the SW/FW semaphore used to access the PHY or NVM.  The mask
+ * will also specify which port we're releasing the lock for.
+ */
+void e1000_release_swfw_sync_i225(struct e1000_hw *hw, u16 mask)
+{
+	u32 swfw_sync;
+
+	DEBUGFUNC("e1000_release_swfw_sync_i225");
+
+	while (e1000_get_hw_semaphore_i225(hw) != E1000_SUCCESS)
+		; /* Empty */
+
+	swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
+	swfw_sync &= ~mask;
+	E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
+
+	e1000_put_hw_semaphore_generic(hw);
+}
+
+/* e1000_get_hw_semaphore_i225 - Acquire hardware semaphore
+ * @hw: pointer to the HW structure
+ *
+ * Acquire the HW semaphore to access the PHY or NVM
+ */
+STATIC s32 e1000_get_hw_semaphore_i225(struct e1000_hw *hw)
+{
+	u32 swsm;
+	s32 timeout = hw->nvm.word_size + 1;
+	s32 i = 0;
+
+	DEBUGFUNC("e1000_get_hw_semaphore_i225");
+
+	/* Get the SW semaphore */
+	while (i < timeout) {
+		swsm = E1000_READ_REG(hw, E1000_SWSM);
+		if (!(swsm & E1000_SWSM_SMBI))
+			break;
+
+		usec_delay(50);
+		i++;
+	}
+
+	if (i == timeout) {
+		/* In rare circumstances, the SW semaphore may already be held
+		 * unintentionally. Clear the semaphore once before giving up.
+		 */
+		if (hw->dev_spec._82575.clear_semaphore_once) {
+			hw->dev_spec._82575.clear_semaphore_once = false;
+			e1000_put_hw_semaphore_generic(hw);
+			for (i = 0; i < timeout; i++) {
+				swsm = E1000_READ_REG(hw, E1000_SWSM);
+				if (!(swsm & E1000_SWSM_SMBI))
+					break;
+
+				usec_delay(50);
+			}
+		}
+
+		/* If we do not have the semaphore here, we have to give up. */
+		if (i == timeout) {
+			DEBUGOUT("Driver can't access device -\n");
+			DEBUGOUT("SMBI bit is set.\n");
+			return -E1000_ERR_NVM;
+		}
+	}
+
+	/* Get the FW semaphore. */
+	for (i = 0; i < timeout; i++) {
+		swsm = E1000_READ_REG(hw, E1000_SWSM);
+		E1000_WRITE_REG(hw, E1000_SWSM, swsm | E1000_SWSM_SWESMBI);
+
+		/* Semaphore acquired if bit latched */
+		if (E1000_READ_REG(hw, E1000_SWSM) & E1000_SWSM_SWESMBI)
+			break;
+
+		usec_delay(50);
+	}
+
+	if (i == timeout) {
+		/* Release semaphores */
+		e1000_put_hw_semaphore_generic(hw);
+		DEBUGOUT("Driver can't access the NVM\n");
+		return -E1000_ERR_NVM;
+	}
+
+	return E1000_SUCCESS;
+}
+
+/* e1000_read_nvm_srrd_i225 - Reads Shadow Ram using EERD register
+ * @hw: pointer to the HW structure
+ * @offset: offset of word in the Shadow Ram to read
+ * @words: number of words to read
+ * @data: word read from the Shadow Ram
+ *
+ * Reads a 16 bit word from the Shadow Ram using the EERD register.
+ * Uses necessary synchronization semaphores.
+ */
+s32 e1000_read_nvm_srrd_i225(struct e1000_hw *hw, u16 offset, u16 words,
+			     u16 *data)
+{
+	s32 status = E1000_SUCCESS;
+	u16 i, count;
+
+	DEBUGFUNC("e1000_read_nvm_srrd_i225");
+
+	/* We cannot hold synchronization semaphores for too long,
+	 * because of forceful takeover procedure. However it is more efficient
+	 * to read in bursts than synchronizing access for each word.
+	 */
+	for (i = 0; i < words; i += E1000_EERD_EEWR_MAX_COUNT) {
+		count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?
+			E1000_EERD_EEWR_MAX_COUNT : (words - i);
+		if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
+			status = e1000_read_nvm_eerd(hw, offset, count,
+						     data + i);
+			hw->nvm.ops.release(hw);
+		} else {
+			status = E1000_ERR_SWFW_SYNC;
+		}
+
+		if (status != E1000_SUCCESS)
+			break;
+	}
+
+	return status;
+}
+
+/* e1000_write_nvm_srwr_i225 - Write to Shadow RAM using EEWR
+ * @hw: pointer to the HW structure
+ * @offset: offset within the Shadow RAM to be written to
+ * @words: number of words to write
+ * @data: 16 bit word(s) to be written to the Shadow RAM
+ *
+ * Writes data to Shadow RAM at offset using EEWR register.
+ *
+ * If e1000_update_nvm_checksum is not called after this function , the
+ * data will not be committed to FLASH and also Shadow RAM will most likely
+ * contain an invalid checksum.
+ *
+ * If error code is returned, data and Shadow RAM may be inconsistent - buffer
+ * partially written.
+ */
+s32 e1000_write_nvm_srwr_i225(struct e1000_hw *hw, u16 offset, u16 words,
+			      u16 *data)
+{
+	s32 status = E1000_SUCCESS;
+	u16 i, count;
+
+	DEBUGFUNC("e1000_write_nvm_srwr_i225");
+
+	/* We cannot hold synchronization semaphores for too long,
+	 * because of forceful takeover procedure. However it is more efficient
+	 * to write in bursts than synchronizing access for each word.
+	 */
+	for (i = 0; i < words; i += E1000_EERD_EEWR_MAX_COUNT) {
+		count = (words - i) / E1000_EERD_EEWR_MAX_COUNT > 0 ?
+			E1000_EERD_EEWR_MAX_COUNT : (words - i);
+		if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
+			status = __e1000_write_nvm_srwr(hw, offset, count,
+							data + i);
+			hw->nvm.ops.release(hw);
+		} else {
+			status = E1000_ERR_SWFW_SYNC;
+		}
+
+		if (status != E1000_SUCCESS)
+			break;
+	}
+
+	return status;
+}
+
+/* __e1000_write_nvm_srwr - Write to Shadow Ram using EEWR
+ * @hw: pointer to the HW structure
+ * @offset: offset within the Shadow Ram to be written to
+ * @words: number of words to write
+ * @data: 16 bit word(s) to be written to the Shadow Ram
+ *
+ * Writes data to Shadow Ram at offset using EEWR register.
+ *
+ * If e1000_update_nvm_checksum is not called after this function , the
+ * Shadow Ram will most likely contain an invalid checksum.
+ */
+STATIC s32 __e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
+				  u16 *data)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 i, k, eewr = 0;
+	u32 attempts = 100000;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("__e1000_write_nvm_srwr");
+
+	/* A check for invalid values:  offset too large, too many words,
+	 * too many words for the offset, and not enough words.
+	 */
+	if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
+	    (words == 0)) {
+		DEBUGOUT("nvm parameter(s) out of bounds\n");
+		ret_val = -E1000_ERR_NVM;
+		goto out;
+	}
+
+	for (i = 0; i < words; i++) {
+		eewr = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) |
+			(data[i] << E1000_NVM_RW_REG_DATA) |
+			E1000_NVM_RW_REG_START;
+
+		E1000_WRITE_REG(hw, E1000_SRWR, eewr);
+
+		for (k = 0; k < attempts; k++) {
+			if (E1000_NVM_RW_REG_DONE &
+			    E1000_READ_REG(hw, E1000_SRWR)) {
+				ret_val = E1000_SUCCESS;
+				break;
+			}
+			usec_delay(5);
+		}
+
+		if (ret_val != E1000_SUCCESS) {
+			DEBUGOUT("Shadow RAM write EEWR timed out\n");
+			break;
+		}
+	}
+
+out:
+	return ret_val;
+}
+
+/* e1000_read_invm_word_i225 - Reads OTP
+ * @hw: pointer to the HW structure
+ * @address: the word address (aka eeprom offset) to read
+ * @data: pointer to the data read
+ *
+ * Reads 16-bit words from the OTP. Return error when the word is not
+ * stored in OTP.
+ */
+STATIC s32 e1000_read_invm_word_i225(struct e1000_hw *hw, u8 address, u16 *data)
+{
+	s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND;
+	u32 invm_dword;
+	u16 i;
+	u8 record_type, word_address;
+
+	DEBUGFUNC("e1000_read_invm_word_i225");
+
+	for (i = 0; i < E1000_INVM_SIZE; i++) {
+		invm_dword = E1000_READ_REG(hw, E1000_INVM_DATA_REG(i));
+		/* Get record type */
+		record_type = INVM_DWORD_TO_RECORD_TYPE(invm_dword);
+		if (record_type == e1000_invm_unitialized_structure)
+			break;
+		if (record_type == e1000_invm_csr_autoload_structure)
+			i += E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS;
+		if (record_type == e1000_invm_rsa_key_sha256_structure)
+			i += E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS;
+		if (record_type == e1000_invm_word_autoload_structure) {
+			word_address = INVM_DWORD_TO_WORD_ADDRESS(invm_dword);
+			if (word_address == address) {
+				*data = INVM_DWORD_TO_WORD_DATA(invm_dword);
+				DEBUGOUT2("Read INVM Word 0x%02x = %x",
+					  address, *data);
+				status = E1000_SUCCESS;
+				break;
+			}
+		}
+	}
+	if (status != E1000_SUCCESS)
+		DEBUGOUT1("Requested word 0x%02x not found in OTP\n", address);
+	return status;
+}
+
+/* e1000_read_invm_i225 - Read invm wrapper function for I225
+ * @hw: pointer to the HW structure
+ * @address: the word address (aka eeprom offset) to read
+ * @data: pointer to the data read
+ *
+ * Wrapper function to return data formerly found in the NVM.
+ */
+STATIC s32 e1000_read_invm_i225(struct e1000_hw *hw, u16 offset,
+				u16 E1000_UNUSEDARG words, u16 *data)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	UNREFERENCED_1PARAMETER(words);
+
+	DEBUGFUNC("e1000_read_invm_i225");
+
+	/* Only the MAC addr is required to be present in the iNVM */
+	switch (offset) {
+	case NVM_MAC_ADDR:
+		ret_val = e1000_read_invm_word_i225(hw, (u8)offset, &data[0]);
+		ret_val |= e1000_read_invm_word_i225(hw, (u8)offset + 1,
+						     &data[1]);
+		ret_val |= e1000_read_invm_word_i225(hw, (u8)offset + 2,
+						     &data[2]);
+		if (ret_val != E1000_SUCCESS)
+			DEBUGOUT("MAC Addr not found in iNVM\n");
+		break;
+	case NVM_INIT_CTRL_2:
+		ret_val = e1000_read_invm_word_i225(hw, (u8)offset, data);
+		if (ret_val != E1000_SUCCESS) {
+			*data = NVM_INIT_CTRL_2_DEFAULT_I225;
+			ret_val = E1000_SUCCESS;
+		}
+		break;
+	case NVM_INIT_CTRL_4:
+		ret_val = e1000_read_invm_word_i225(hw, (u8)offset, data);
+		if (ret_val != E1000_SUCCESS) {
+			*data = NVM_INIT_CTRL_4_DEFAULT_I225;
+			ret_val = E1000_SUCCESS;
+		}
+		break;
+	case NVM_LED_1_CFG:
+		ret_val = e1000_read_invm_word_i225(hw, (u8)offset, data);
+		if (ret_val != E1000_SUCCESS) {
+			*data = NVM_LED_1_CFG_DEFAULT_I225;
+			ret_val = E1000_SUCCESS;
+		}
+		break;
+	case NVM_LED_0_2_CFG:
+		ret_val = e1000_read_invm_word_i225(hw, (u8)offset, data);
+		if (ret_val != E1000_SUCCESS) {
+			*data = NVM_LED_0_2_CFG_DEFAULT_I225;
+			ret_val = E1000_SUCCESS;
+		}
+		break;
+	case NVM_ID_LED_SETTINGS:
+		ret_val = e1000_read_invm_word_i225(hw, (u8)offset, data);
+		if (ret_val != E1000_SUCCESS) {
+			*data = ID_LED_RESERVED_FFFF;
+			ret_val = E1000_SUCCESS;
+		}
+		break;
+	case NVM_SUB_DEV_ID:
+		*data = hw->subsystem_device_id;
+		break;
+	case NVM_SUB_VEN_ID:
+		*data = hw->subsystem_vendor_id;
+		break;
+	case NVM_DEV_ID:
+		*data = hw->device_id;
+		break;
+	case NVM_VEN_ID:
+		*data = hw->vendor_id;
+		break;
+	default:
+		DEBUGOUT1("NVM word 0x%02x is not mapped.\n", offset);
+		*data = NVM_RESERVED_WORD;
+		break;
+	}
+	return ret_val;
+}
+
+#if defined(NVM_VERSION_SUPPORT) || defined(QV_RELEASE)
+/* e1000_read_invm_version_i225 - Reads iNVM version and image type
+ * @hw: pointer to the HW structure
+ * @invm_ver: version structure for the version read
+ *
+ * Reads iNVM version and image type.
+ */
+s32 e1000_read_invm_version_i225(struct e1000_hw *hw,
+				 struct e1000_fw_version *invm_ver)
+{
+	u32 *record = NULL;
+	u32 *next_record = NULL;
+	u32 i = 0;
+	u32 invm_dword = 0;
+	u32 invm_blocks = E1000_INVM_SIZE - (E1000_INVM_ULT_BYTES_SIZE /
+					     E1000_INVM_RECORD_SIZE_IN_BYTES);
+	u32 buffer[E1000_INVM_SIZE];
+	s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND;
+	u16 version = 0;
+
+	DEBUGFUNC("e1000_read_invm_version_i225");
+
+	/* Read iNVM memory */
+	for (i = 0; i < E1000_INVM_SIZE; i++) {
+		invm_dword = E1000_READ_REG(hw, E1000_INVM_DATA_REG(i));
+		buffer[i] = invm_dword;
+	}
+
+	/* Read version number */
+	for (i = 1; i < invm_blocks; i++) {
+		record = &buffer[invm_blocks - i];
+		next_record = &buffer[invm_blocks - i + 1];
+
+		/* Check if we have first version location used */
+		if ((i == 1) && ((*record & E1000_INVM_VER_FIELD_ONE) == 0)) {
+			version = 0;
+			status = E1000_SUCCESS;
+			break;
+		}
+		/* Check if we have second version location used */
+		else if ((i == 1) &&
+			 ((*record & E1000_INVM_VER_FIELD_TWO) == 0)) {
+			version = (*record & E1000_INVM_VER_FIELD_ONE) >> 3;
+			status = E1000_SUCCESS;
+			break;
+		}
+		/* Check if we have odd version location
+		 * used and it is the last one used
+		 */
+		else if ((((*record & E1000_INVM_VER_FIELD_ONE) == 0) &&
+			  ((*record & 0x3) == 0)) || (((*record & 0x3) != 0) &&
+			   (i != 1))) {
+			version = (*next_record & E1000_INVM_VER_FIELD_TWO)
+				  >> 13;
+			status = E1000_SUCCESS;
+			break;
+		}
+		/* Check if we have even version location
+		 * used and it is the last one used
+		 */
+		else if (((*record & E1000_INVM_VER_FIELD_TWO) == 0) &&
+			 ((*record & 0x3) == 0)) {
+			version = (*record & E1000_INVM_VER_FIELD_ONE) >> 3;
+			status = E1000_SUCCESS;
+			break;
+		}
+	}
+
+	if (status == E1000_SUCCESS) {
+		invm_ver->invm_major = (version & E1000_INVM_MAJOR_MASK)
+					>> E1000_INVM_MAJOR_SHIFT;
+		invm_ver->invm_minor = version & E1000_INVM_MINOR_MASK;
+	}
+	/* Read Image Type */
+	for (i = 1; i < invm_blocks; i++) {
+		record = &buffer[invm_blocks - i];
+		next_record = &buffer[invm_blocks - i + 1];
+
+		/* Check if we have image type in first location used */
+		if ((i == 1) && ((*record & E1000_INVM_IMGTYPE_FIELD) == 0)) {
+			invm_ver->invm_img_type = 0;
+			status = E1000_SUCCESS;
+			break;
+		}
+		/* Check if we have image type in first location used */
+		else if ((((*record & 0x3) == 0) &&
+			  ((*record & E1000_INVM_IMGTYPE_FIELD) == 0)) ||
+			    ((((*record & 0x3) != 0) && (i != 1)))) {
+			invm_ver->invm_img_type =
+				(*next_record & E1000_INVM_IMGTYPE_FIELD) >> 23;
+			status = E1000_SUCCESS;
+			break;
+		}
+	}
+	return status;
+}
+
+#endif /* NVM_VERSION_SUPPORT or QV_RELEASE */
+/* e1000_validate_nvm_checksum_i225 - Validate EEPROM checksum
+ * @hw: pointer to the HW structure
+ *
+ * Calculates the EEPROM checksum by reading/adding each word of the EEPROM
+ * and then verifies that the sum of the EEPROM is equal to 0xBABA.
+ */
+s32 e1000_validate_nvm_checksum_i225(struct e1000_hw *hw)
+{
+	s32 status = E1000_SUCCESS;
+	s32 (*read_op_ptr)(struct e1000_hw *, u16, u16, u16 *);
+
+	DEBUGFUNC("e1000_validate_nvm_checksum_i225");
+
+	if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
+		/* Replace the read function with semaphore grabbing with
+		 * the one that skips this for a while.
+		 * We have semaphore taken already here.
+		 */
+		read_op_ptr = hw->nvm.ops.read;
+		hw->nvm.ops.read = e1000_read_nvm_eerd;
+
+		status = e1000_validate_nvm_checksum_generic(hw);
+
+		/* Revert original read operation. */
+		hw->nvm.ops.read = read_op_ptr;
+
+		hw->nvm.ops.release(hw);
+	} else {
+		status = E1000_ERR_SWFW_SYNC;
+	}
+
+	return status;
+}
+
+/* e1000_update_nvm_checksum_i225 - Update EEPROM checksum
+ * @hw: pointer to the HW structure
+ *
+ * Updates the EEPROM checksum by reading/adding each word of the EEPROM
+ * up to the checksum.  Then calculates the EEPROM checksum and writes the
+ * value to the EEPROM. Next commit EEPROM data onto the Flash.
+ */
+s32 e1000_update_nvm_checksum_i225(struct e1000_hw *hw)
+{
+	s32 ret_val;
+	u16 checksum = 0;
+	u16 i, nvm_data;
+
+	DEBUGFUNC("e1000_update_nvm_checksum_i225");
+
+	/* Read the first word from the EEPROM. If this times out or fails, do
+	 * not continue or we could be in for a very long wait while every
+	 * EEPROM read fails
+	 */
+	ret_val = e1000_read_nvm_eerd(hw, 0, 1, &nvm_data);
+	if (ret_val != E1000_SUCCESS) {
+		DEBUGOUT("EEPROM read failed\n");
+		goto out;
+	}
+
+	if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
+		/* Do not use hw->nvm.ops.write, hw->nvm.ops.read
+		 * because we do not want to take the synchronization
+		 * semaphores twice here.
+		 */
+
+		for (i = 0; i < NVM_CHECKSUM_REG; i++) {
+			ret_val = e1000_read_nvm_eerd(hw, i, 1, &nvm_data);
+			if (ret_val) {
+				hw->nvm.ops.release(hw);
+				DEBUGOUT("NVM Read Error while updating\n");
+				DEBUGOUT("checksum.\n");
+				goto out;
+			}
+			checksum += nvm_data;
+		}
+		checksum = (u16)NVM_SUM - checksum;
+		ret_val = __e1000_write_nvm_srwr(hw, NVM_CHECKSUM_REG, 1,
+						 &checksum);
+		if (ret_val != E1000_SUCCESS) {
+			hw->nvm.ops.release(hw);
+			DEBUGOUT("NVM Write Error while updating checksum.\n");
+			goto out;
+		}
+
+		hw->nvm.ops.release(hw);
+
+		ret_val = e1000_update_flash_i225(hw);
+	} else {
+		ret_val = E1000_ERR_SWFW_SYNC;
+	}
+out:
+	return ret_val;
+}
+
+/* e1000_get_flash_presence_i225 - Check if flash device is detected.
+ * @hw: pointer to the HW structure
+ */
+bool e1000_get_flash_presence_i225(struct e1000_hw *hw)
+{
+	u32 eec = 0;
+	bool ret_val = false;
+
+	DEBUGFUNC("e1000_get_flash_presence_i225");
+
+	eec = E1000_READ_REG(hw, E1000_EECD);
+
+	if (eec & E1000_EECD_FLASH_DETECTED_I225)
+		ret_val = true;
+
+	return ret_val;
+}
+
+/* e1000_update_flash_i225 - Commit EEPROM to the flash
+ * @hw: pointer to the HW structure
+ */
+s32 e1000_update_flash_i225(struct e1000_hw *hw)
+{
+	s32 ret_val;
+	u32 flup;
+
+	DEBUGFUNC("e1000_update_flash_i225");
+
+	ret_val = e1000_pool_flash_update_done_i225(hw);
+	if (ret_val == -E1000_ERR_NVM) {
+		DEBUGOUT("Flash update time out\n");
+		goto out;
+	}
+
+	flup = E1000_READ_REG(hw, E1000_EECD) | E1000_EECD_FLUPD_I225;
+	E1000_WRITE_REG(hw, E1000_EECD, flup);
+
+	ret_val = e1000_pool_flash_update_done_i225(hw);
+	if (ret_val == E1000_SUCCESS)
+		DEBUGOUT("Flash update complete\n");
+	else
+		DEBUGOUT("Flash update time out\n");
+
+out:
+	return ret_val;
+}
+
+/* e1000_pool_flash_update_done_i225 - Pool FLUDONE status.
+ * @hw: pointer to the HW structure
+ */
+s32 e1000_pool_flash_update_done_i225(struct e1000_hw *hw)
+{
+	s32 ret_val = -E1000_ERR_NVM;
+	u32 i, reg;
+
+	DEBUGFUNC("e1000_pool_flash_update_done_i225");
+
+	for (i = 0; i < E1000_FLUDONE_ATTEMPTS; i++) {
+		reg = E1000_READ_REG(hw, E1000_EECD);
+		if (reg & E1000_EECD_FLUDONE_I225) {
+			ret_val = E1000_SUCCESS;
+			break;
+		}
+		usec_delay(5);
+	}
+
+	return ret_val;
+}
+
+/* e1000_init_nvm_params_i225 - Initialize i225 NVM function pointers
+ * @hw: pointer to the HW structure
+ *
+ * Initialize the i225/i211 NVM parameters and function pointers.
+ */
+STATIC s32 e1000_init_nvm_params_i225(struct e1000_hw *hw)
+{
+	s32 ret_val;
+	struct e1000_nvm_info *nvm = &hw->nvm;
+
+	DEBUGFUNC("e1000_init_nvm_params_i225");
+
+	ret_val = e1000_init_nvm_params_82575(hw);
+	nvm->ops.acquire = e1000_acquire_nvm_i225;
+	nvm->ops.release = e1000_release_nvm_i225;
+	nvm->ops.valid_led_default = e1000_valid_led_default_i225;
+	if (e1000_get_flash_presence_i225(hw)) {
+		hw->nvm.type = e1000_nvm_flash_hw;
+		nvm->ops.read    = e1000_read_nvm_srrd_i225;
+		nvm->ops.write   = e1000_write_nvm_srwr_i225;
+		nvm->ops.validate = e1000_validate_nvm_checksum_i225;
+		nvm->ops.update   = e1000_update_nvm_checksum_i225;
+	} else {
+		hw->nvm.type = e1000_nvm_invm;
+		nvm->ops.read     = e1000_read_invm_i225;
+#ifndef NO_NULL_OPS_SUPPORT
+		nvm->ops.write    = e1000_null_write_nvm;
+		nvm->ops.validate = e1000_null_ops_generic;
+		nvm->ops.update   = e1000_null_ops_generic;
+#else
+		nvm->ops.write    = NULL;
+		nvm->ops.validate = NULL;
+		nvm->ops.update   = NULL;
+#endif /* NO_NULL_OPS_SUPPORT */
+	}
+	return ret_val;
+}
+
+#ifdef I225_LTR_SUPPORT
+/* e1000_set_ltr_i225 - Set Latency Tolerance Reporting thresholds.
+ * @hw: pointer to the HW structure
+ * @link: bool indicating link status
+ *
+ * Set the LTR thresholds based on the link speed (Mbps), EEE, and DMAC
+ * settings, otherwise specify that there is no LTR requirement.
+ */
+STATIC s32 e1000_set_ltr_i225(struct e1000_hw *hw, bool link)
+{
+	u16 speed, duplex;
+	u32 tw_system, ltrc, ltrv, ltr_min, ltr_max, scale_min, scale_max;
+	s32 size;
+
+	DEBUGFUNC("e1000_set_ltr_i225");
+
+	/* If we do not have link, LTR thresholds are zero. */
+	if (link) {
+		hw->mac.ops.get_link_up_info(hw, &speed, &duplex);
+
+		/* Check if using copper interface with EEE enabled or if the
+		 * link speed is 10 Mbps.
+		 */
+		if ((hw->phy.media_type == e1000_media_type_copper) &&
+		    !(hw->dev_spec._82575.eee_disable) &&
+		     (speed != SPEED_10)) {
+			/* EEE enabled, so send LTRMAX threshold. */
+			ltrc = E1000_READ_REG(hw, E1000_LTRC) |
+				E1000_LTRC_EEEMS_EN;
+			E1000_WRITE_REG(hw, E1000_LTRC, ltrc);
+
+			/* Calculate tw_system (nsec). */
+			if (speed == SPEED_100) {
+				tw_system = ((E1000_READ_REG(hw, E1000_EEE_SU) &
+					     E1000_TW_SYSTEM_100_MASK) >>
+					     E1000_TW_SYSTEM_100_SHIFT) * 500;
+			} else {
+				tw_system = (E1000_READ_REG(hw, E1000_EEE_SU) &
+					     E1000_TW_SYSTEM_1000_MASK) * 500;
+				}
+		} else {
+			tw_system = 0;
+			}
+
+		/* Get the Rx packet buffer size. */
+		size = E1000_READ_REG(hw, E1000_RXPBS) &
+			E1000_RXPBS_SIZE_I225_MASK;
+
+		/* Calculations vary based on DMAC settings. */
+		if (E1000_READ_REG(hw, E1000_DMACR) & E1000_DMACR_DMAC_EN) {
+			size -= (E1000_READ_REG(hw, E1000_DMACR) &
+				 E1000_DMACR_DMACTHR_MASK) >>
+				 E1000_DMACR_DMACTHR_SHIFT;
+			/* Convert size to bits. */
+			size *= 1024 * 8;
+		} else {
+			/* Convert size to bytes, subtract the MTU, and then
+			 * convert the size to bits.
+			 */
+			size *= 1024;
+			size -= hw->dev_spec._82575.mtu;
+			size *= 8;
+		}
+
+		if (size < 0) {
+			DEBUGOUT1("Invalid effective Rx buffer size %d\n",
+				  size);
+			return -E1000_ERR_CONFIG;
+		}
+
+		/* Calculate the thresholds. Since speed is in Mbps, simplify
+		 * the calculation by multiplying size/speed by 1000 for result
+		 * to be in nsec before dividing by the scale in nsec. Set the
+		 * scale such that the LTR threshold fits in the register.
+		 */
+		ltr_min = (1000 * size) / speed;
+		ltr_max = ltr_min + tw_system;
+		scale_min = (ltr_min / 1024) < 1024 ? E1000_LTRMINV_SCALE_1024 :
+			    E1000_LTRMINV_SCALE_32768;
+		scale_max = (ltr_max / 1024) < 1024 ? E1000_LTRMAXV_SCALE_1024 :
+			    E1000_LTRMAXV_SCALE_32768;
+		ltr_min /= scale_min == E1000_LTRMINV_SCALE_1024 ? 1024 : 32768;
+		ltr_max /= scale_max == E1000_LTRMAXV_SCALE_1024 ? 1024 : 32768;
+
+		/* Only write the LTR thresholds if they differ from before. */
+		ltrv = E1000_READ_REG(hw, E1000_LTRMINV);
+		if (ltr_min != (ltrv & E1000_LTRMINV_LTRV_MASK)) {
+			ltrv = E1000_LTRMINV_LSNP_REQ | ltr_min |
+			      (scale_min << E1000_LTRMINV_SCALE_SHIFT);
+			E1000_WRITE_REG(hw, E1000_LTRMINV, ltrv);
+		}
+
+		ltrv = E1000_READ_REG(hw, E1000_LTRMAXV);
+		if (ltr_max != (ltrv & E1000_LTRMAXV_LTRV_MASK)) {
+			ltrv = E1000_LTRMAXV_LSNP_REQ | ltr_max |
+			      (scale_min << E1000_LTRMAXV_SCALE_SHIFT);
+			E1000_WRITE_REG(hw, E1000_LTRMAXV, ltrv);
+		}
+	}
+
+	return E1000_SUCCESS;
+}
+
+/* e1000_check_for_link_i225 - Check for link
+ * @hw: pointer to the HW structure
+ *
+ * Checks to see of the link status of the hardware has changed.  If a
+ * change in link status has been detected, then we read the PHY registers
+ * to get the current speed/duplex if link exists.
+ */
+s32 e1000_check_for_link_i225(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	bool link = false;
+
+	DEBUGFUNC("e1000_check_for_link_i225");
+
+	if (hw->phy.media_type != e1000_media_type_copper) {
+		u16 speed, duplex;
+
+		ret_val = e1000_get_pcs_speed_and_duplex_82575(hw, &speed,
+							       &duplex);
+		/* Use this flag to determine if link needs to be checked or
+		 * not.  If we have link clear the flag so that we do not
+		 * continue to check for link.
+		 */
+		hw->mac.get_link_status = !hw->mac.serdes_has_link;
+
+		link = hw->mac.serdes_has_link;
+	} else {
+		/* We only want to go out to the PHY registers to see if
+		 * Auto-Neg has completed and/or if our link status has
+		 * changed.  The get_link_status flag is set upon receiving
+		 * a Link Status Change or Rx Sequence Error interrupt.
+		 */
+		if (!mac->get_link_status) {
+			ret_val = E1000_SUCCESS;
+			goto out;
+		}
+
+		/* First we want to see if the MII Status Register reports
+		 * link.  If so, then we want to get the current speed/duplex
+		 * of the PHY.
+		 */
+		ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
+		if (ret_val)
+			goto out;
+
+		if (!link)
+			goto out; /* No link detected */
+
+		mac->get_link_status = false;
+
+		/* Check if there was DownShift, must be checked
+		 * immediately after link-up
+		 */
+		e1000_check_downshift_generic(hw);
+
+		/* If we are forcing speed/duplex, then we simply return since
+		 * we have already determined whether we have link or not.
+		 */
+		if (!mac->autoneg) {
+			ret_val = -E1000_ERR_CONFIG;
+			goto out;
+		}
+
+		/* Auto-Neg is enabled.  Auto Speed Detection takes care
+		 * of MAC speed/duplex configuration.  So we only need to
+		 * configure Collision Distance in the MAC.
+		 */
+		mac->ops.config_collision_dist(hw);
+
+		/* Configure Flow Control now that Auto-Neg has completed.
+		 * First, we need to restore the desired flow control
+		 * settings because we may have had to re-autoneg with a
+		 * different link partner.
+		 */
+		ret_val = e1000_config_fc_after_link_up_generic(hw);
+		if (ret_val)
+			DEBUGOUT("Error configuring flow control\n");
+	}
+
+out:
+	/* Now that we are aware of our link settings, we can set the LTR
+	 * thresholds.
+	 */
+	ret_val = e1000_set_ltr_i225(hw, link);
+
+	return ret_val;
+}
+
+#endif /* I225_LTR_SUPPORT */
+/* e1000_init_function_pointers_i225 - Init func ptrs.
+ * @hw: pointer to the HW structure
+ *
+ * Called to initialize all function pointers and parameters.
+ */
+void e1000_init_function_pointers_i225(struct e1000_hw *hw)
+{
+	e1000_init_function_pointers_82575(hw);
+	hw->nvm.ops.init_params = e1000_init_nvm_params_i225;
+}
+
+/* e1000_valid_led_default_i225 - Verify a valid default LED config
+ * @hw: pointer to the HW structure
+ * @data: pointer to the NVM (EEPROM)
+ *
+ * Read the EEPROM for the current default LED configuration.  If the
+ * LED configuration is not valid, set to a valid LED configuration.
+ */
+STATIC s32 e1000_valid_led_default_i225(struct e1000_hw *hw, u16 *data)
+{
+	s32 ret_val;
+
+	DEBUGFUNC("e1000_valid_led_default_i225");
+
+	ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
+	if (ret_val) {
+		DEBUGOUT("NVM Read Error\n");
+		goto out;
+	}
+
+	if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF) {
+		switch (hw->phy.media_type) {
+		case e1000_media_type_internal_serdes:
+			*data = ID_LED_DEFAULT_I225_SERDES;
+			break;
+		case e1000_media_type_copper:
+		default:
+			*data = ID_LED_DEFAULT_I225;
+			break;
+		}
+	}
+#ifndef QV_RELEASE
+out:
+#endif /* QV_RELEASE */
+	return ret_val;
+}
+
+/* e1000_pll_workaround_i225
+ * @hw: pointer to the HW structure
+ *
+ * Works around an errata in the PLL circuit where it occasionally
+ * provides the wrong clock frequency after power up.
+ */
+STATIC s32 e1000_pll_workaround_i225(struct e1000_hw *hw)
+{
+	s32 ret_val;
+	u32 wuc, mdicnfg, ctrl, ctrl_ext, reg_val;
+	u16 nvm_word, phy_word, pci_word, tmp_nvm;
+	int i;
+
+	/* Get PHY semaphore */
+	hw->phy.ops.acquire(hw);
+	/* Get and set needed register values */
+	wuc = E1000_READ_REG(hw, E1000_WUC);
+	mdicnfg = E1000_READ_REG(hw, E1000_MDICNFG);
+	reg_val = mdicnfg & ~E1000_MDICNFG_EXT_MDIO;
+	E1000_WRITE_REG(hw, E1000_MDICNFG, reg_val);
+
+	/* Get data from NVM, or set default */
+	ret_val = e1000_read_invm_word_i225(hw, E1000_INVM_AUTOLOAD,
+					    &nvm_word);
+	if (ret_val != E1000_SUCCESS)
+		nvm_word = E1000_INVM_DEFAULT_AL;
+	tmp_nvm = nvm_word | E1000_INVM_PLL_WO_VAL;
+	for (i = 0; i < E1000_MAX_PLL_TRIES; i++) {
+		/* check current state directly from internal PHY */
+		e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0xFC);
+		usec_delay(20);
+		e1000_read_phy_reg_mdic(hw, E1000_PHY_PLL_FREQ_REG, &phy_word);
+		usec_delay(20);
+		e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0);
+		if ((phy_word & E1000_PHY_PLL_UNCONF)
+		    != E1000_PHY_PLL_UNCONF) {
+			ret_val = E1000_SUCCESS;
+		} else {
+			ret_val = -E1000_ERR_PHY;
+		}
+		/* directly reset the internal PHY */
+		ctrl = E1000_READ_REG(hw, E1000_CTRL);
+		E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PHY_RST);
+
+		ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
+		ctrl_ext |= (E1000_CTRL_EXT_PHYPDEN | E1000_CTRL_EXT_SDLPE);
+		E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
+
+		E1000_WRITE_REG(hw, E1000_WUC, 0);
+		reg_val = (E1000_INVM_AUTOLOAD << 4) | (tmp_nvm << 16);
+		E1000_WRITE_REG(hw, E1000_EEARBC_I225, reg_val);
+
+		e1000_read_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);
+		pci_word |= E1000_PCI_PMCSR_D3;
+		e1000_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);
+		msec_delay(1);
+		pci_word &= ~E1000_PCI_PMCSR_D3;
+		e1000_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);
+		reg_val = (E1000_INVM_AUTOLOAD << 4) | (nvm_word << 16);
+		E1000_WRITE_REG(hw, E1000_EEARBC_I225, reg_val);
+
+		/* restore WUC register */
+		E1000_WRITE_REG(hw, E1000_WUC, wuc);
+	}
+	/* restore MDICNFG setting */
+	E1000_WRITE_REG(hw, E1000_MDICNFG, mdicnfg);
+	/* Release PHY semaphore */
+	hw->phy.ops.release(hw);
+	return ret_val;
+}
+
+/* e1000_get_cfg_done_i225 - Read config done bit
+ * @hw: pointer to the HW structure
+ *
+ * Read the management control register for the config done bit for
+ * completion status.  NOTE: silicon which is EEPROM-less will fail trying
+ * to read the config done bit, so an error is *ONLY* logged and returns
+ * E1000_SUCCESS.  If we were to return with error, EEPROM-less silicon
+ * would not be able to be reset or change link.
+ */
+STATIC s32 e1000_get_cfg_done_i225(struct e1000_hw *hw)
+{
+	s32 timeout = PHY_CFG_TIMEOUT;
+	u32 mask = E1000_NVM_CFG_DONE_PORT_0;
+
+	DEBUGFUNC("e1000_get_cfg_done_i225");
+
+	while (timeout) {
+		if (E1000_READ_REG(hw, E1000_EEMNGCTL_I225) & mask)
+			break;
+		msec_delay(1);
+		timeout--;
+	}
+	if (!timeout)
+		DEBUGOUT("MNG configuration cycle has not completed.\n");
+
+	return E1000_SUCCESS;
+}
+
+/* e1000_init_hw_i225 - Init hw for I225
+ * @hw: pointer to the HW structure
+ *
+ * Called to initialize hw for i225 hw family.
+ */
+s32 e1000_init_hw_i225(struct e1000_hw *hw)
+{
+	s32 ret_val;
+
+	DEBUGFUNC("e1000_init_hw_i225");
+	if ((hw->mac.type >= e1000_i225) &&
+	    !(e1000_get_flash_presence_i225(hw))) {
+		ret_val = e1000_pll_workaround_i225(hw);
+		if (ret_val != E1000_SUCCESS)
+			return ret_val;
+	}
+	hw->phy.ops.get_cfg_done = e1000_get_cfg_done_i225;
+	ret_val = e1000_init_hw_82575(hw);
+	return ret_val;
+}
diff --git a/drivers/net/e1000/base/e1000_i225.h b/drivers/net/e1000/base/e1000_i225.h
new file mode 100644
index 000000000..f13a7bbde
--- /dev/null
+++ b/drivers/net/e1000/base/e1000_i225.h
@@ -0,0 +1,105 @@
+#ifndef _E1000_I225_H_
+#define _E1000_I225_H_
+
+bool e1000_get_flash_presence_i225(struct e1000_hw *hw);
+s32 e1000_update_flash_i225(struct e1000_hw *hw);
+s32 e1000_update_nvm_checksum_i225(struct e1000_hw *hw);
+s32 e1000_validate_nvm_checksum_i225(struct e1000_hw *hw);
+s32 e1000_write_nvm_srwr_i225(struct e1000_hw *hw, u16 offset,
+			      u16 words, u16 *data);
+s32 e1000_read_nvm_srrd_i225(struct e1000_hw *hw, u16 offset,
+			     u16 words, u16 *data);
+s32 e1000_read_invm_version_i225(struct e1000_hw *hw,
+				 struct e1000_fw_version *invm_ver);
+s32 e1000_set_flsw_flash_burst_counter_i225(struct e1000_hw *hw,
+					    u32 burst_counter);
+s32 e1000_write_erase_flash_command_i225(struct e1000_hw *hw, u32 opcode,
+					 u32 address);
+s32 e1000_acquire_swfw_sync_i225(struct e1000_hw *hw, u16 mask);
+void e1000_release_swfw_sync_i225(struct e1000_hw *hw, u16 mask);
+s32 e1000_init_hw_i225(struct e1000_hw *hw);
+s32 e1000_setup_copper_link_i225(struct e1000_hw *hw);
+s32 e1000_set_d0_lplu_state_i225(struct e1000_hw *hw, bool active);
+s32 e1000_set_d3_lplu_state_i225(struct e1000_hw *hw, bool active);
+s32 e1000_set_eee_i225(struct e1000_hw *hw, bool adv2p5G, bool adv1G,
+		       bool adv100M);
+
+#define ID_LED_DEFAULT_I225		((ID_LED_OFF1_ON2  << 8) | \
+					 (ID_LED_DEF1_DEF2 <<  4) | \
+					 (ID_LED_OFF1_OFF2))
+#define ID_LED_DEFAULT_I225_SERDES	((ID_LED_DEF1_DEF2 << 8) | \
+					 (ID_LED_DEF1_DEF2 <<  4) | \
+					 (ID_LED_OFF1_ON2))
+
+/* NVM offset defaults for I225 devices */
+#define NVM_INIT_CTRL_2_DEFAULT_I225	0X7243
+#define NVM_INIT_CTRL_4_DEFAULT_I225	0x00C1
+#define NVM_LED_1_CFG_DEFAULT_I225	0x0184
+#define NVM_LED_0_2_CFG_DEFAULT_I225	0x200C
+
+#define E1000_MRQC_ENABLE_RSS_4Q		0x00000002
+#define E1000_MRQC_ENABLE_VMDQ			0x00000003
+#define E1000_MRQC_ENABLE_VMDQ_RSS_2Q		0x00000005
+#define E1000_MRQC_RSS_FIELD_IPV4_UDP		0x00400000
+#define E1000_MRQC_RSS_FIELD_IPV6_UDP		0x00800000
+#define E1000_MRQC_RSS_FIELD_IPV6_UDP_EX	0x01000000
+#define E1000_I225_SHADOW_RAM_SIZE		4096
+#define E1000_I225_ERASE_CMD_OPCODE		0x02000000
+#define E1000_I225_WRITE_CMD_OPCODE		0x01000000
+#define E1000_FLSWCTL_DONE			0x40000000
+#define E1000_FLSWCTL_CMDV			0x10000000
+
+/* SRRCTL bit definitions */
+#define E1000_SRRCTL_BSIZEHDRSIZE_MASK		0x00000F00
+#define E1000_SRRCTL_DESCTYPE_LEGACY		0x00000000
+#define E1000_SRRCTL_DESCTYPE_HDR_SPLIT		0x04000000
+#define E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS	0x0A000000
+#define E1000_SRRCTL_DESCTYPE_HDR_REPLICATION	0x06000000
+#define E1000_SRRCTL_DESCTYPE_HDR_REPLICATION_LARGE_PKT 0x08000000
+#define E1000_SRRCTL_DESCTYPE_MASK		0x0E000000
+#define E1000_SRRCTL_DROP_EN			0x80000000
+#define E1000_SRRCTL_BSIZEPKT_MASK		0x0000007F
+#define E1000_SRRCTL_BSIZEHDR_MASK		0x00003F00
+
+#define E1000_RXDADV_RSSTYPE_MASK	0x0000000F
+#define E1000_RXDADV_RSSTYPE_SHIFT	12
+#define E1000_RXDADV_HDRBUFLEN_MASK	0x7FE0
+#define E1000_RXDADV_HDRBUFLEN_SHIFT	5
+#define E1000_RXDADV_SPLITHEADER_EN	0x00001000
+#define E1000_RXDADV_SPH		0x8000
+#define E1000_RXDADV_STAT_TS		0x10000 /* Pkt was time stamped */
+#define E1000_RXDADV_ERR_HBO		0x00800000
+
+/* RSS Hash results */
+#define E1000_RXDADV_RSSTYPE_NONE	0x00000000
+#define E1000_RXDADV_RSSTYPE_IPV4_TCP	0x00000001
+#define E1000_RXDADV_RSSTYPE_IPV4	0x00000002
+#define E1000_RXDADV_RSSTYPE_IPV6_TCP	0x00000003
+#define E1000_RXDADV_RSSTYPE_IPV6_EX	0x00000004
+#define E1000_RXDADV_RSSTYPE_IPV6	0x00000005
+#define E1000_RXDADV_RSSTYPE_IPV6_TCP_EX 0x00000006
+#define E1000_RXDADV_RSSTYPE_IPV4_UDP	0x00000007
+#define E1000_RXDADV_RSSTYPE_IPV6_UDP	0x00000008
+#define E1000_RXDADV_RSSTYPE_IPV6_UDP_EX 0x00000009
+
+/* RSS Packet Types as indicated in the receive descriptor */
+#define E1000_RXDADV_PKTTYPE_ILMASK	0x000000F0
+#define E1000_RXDADV_PKTTYPE_TLMASK	0x00000F00
+#define E1000_RXDADV_PKTTYPE_NONE	0x00000000
+#define E1000_RXDADV_PKTTYPE_IPV4	0x00000010 /* IPV4 hdr present */
+#define E1000_RXDADV_PKTTYPE_IPV4_EX	0x00000020 /* IPV4 hdr + extensions */
+#define E1000_RXDADV_PKTTYPE_IPV6	0x00000040 /* IPV6 hdr present */
+#define E1000_RXDADV_PKTTYPE_IPV6_EX	0x00000080 /* IPV6 hdr + extensions */
+#define E1000_RXDADV_PKTTYPE_TCP	0x00000100 /* TCP hdr present */
+#define E1000_RXDADV_PKTTYPE_UDP	0x00000200 /* UDP hdr present */
+#define E1000_RXDADV_PKTTYPE_SCTP	0x00000400 /* SCTP hdr present */
+#define E1000_RXDADV_PKTTYPE_NFS	0x00000800 /* NFS hdr present */
+
+#define E1000_RXDADV_PKTTYPE_IPSEC_ESP	0x00001000 /* IPSec ESP */
+#define E1000_RXDADV_PKTTYPE_IPSEC_AH	0x00002000 /* IPSec AH */
+#define E1000_RXDADV_PKTTYPE_LINKSEC	0x00004000 /* LinkSec Encap */
+#define E1000_RXDADV_PKTTYPE_ETQF	0x00008000 /* PKTTYPE is ETQF index */
+#define E1000_RXDADV_PKTTYPE_ETQF_MASK	0x00000070 /* ETQF has 8 indices */
+#define E1000_RXDADV_PKTTYPE_ETQF_SHIFT	4 /* Right-shift 4 bits */
+
+#endif
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index b072c5c1d..1f8736f35 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -85,8 +85,14 @@
 #define E1000_IOSFPC	0x00F28  /* TX corrupted data  */
 #define E1000_EEMNGCTL	0x01010  /* MNG EEprom Control */
 #define E1000_EEMNGCTL_I210	0x01010  /* i210 MNG EEprom Mode Control */
+#ifndef NO_I225_SUPPORT
+#define E1000_EEMNGCTL_I225	0x01010  /* i225 MNG EEprom Mode Control */
+#endif /* NO_I225_SUPPORT */
 #define E1000_EEARBC	0x01024  /* EEPROM Auto Read Bus Control */
 #define E1000_EEARBC_I210	0x12024 /* EEPROM Auto Read Bus Control */
+#ifndef NO_I225_SUPPORT
+#define E1000_EEARBC_I225	0x12024 /* EEPROM Auto Read Bus Control */
+#endif /* NO_I225_SUPPORT */
 #define E1000_FLASHT	0x01028  /* FLASH Timer Register */
 #define E1000_EEWR	0x0102C  /* EEPROM Write Register - RW */
 #define E1000_FLSWCTL	0x01030  /* FLASH control register */
diff --git a/drivers/net/e1000/base/meson.build b/drivers/net/e1000/base/meson.build
index 5e1716def..d13c32033 100644
--- a/drivers/net/e1000/base/meson.build
+++ b/drivers/net/e1000/base/meson.build
@@ -11,6 +11,7 @@ sources = [
 	'e1000_82575.c',
 	'e1000_api.c',
 	'e1000_i210.c',
+	'e1000_i225.c',
 	'e1000_ich8lan.c',
 	'e1000_mac.c',
 	'e1000_manage.c',
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 03/70] net/e1000/base: add ICL device id's
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 01/70] net/e1000/base: i210 slow system clock update Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 02/70] net/e1000/base: add initial support for Foxville Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 04/70] net/e1000/base: remove shadowing variable declarations Guinan Sun
                   ` (68 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Lotem Leder

This patch contains a preliminary support for new LAN device ID's.

Signed-off-by: Lotem Leder <lotem.leder@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.c | 4 ++++
 drivers/net/e1000/base/e1000_hw.h  | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index 90845d477..ae6f125a6 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -284,6 +284,10 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 	case E1000_DEV_ID_PCH_CNP_I219_V6:
 	case E1000_DEV_ID_PCH_CNP_I219_LM7:
 	case E1000_DEV_ID_PCH_CNP_I219_V7:
+	case E1000_DEV_ID_PCH_ICP_I219_LM8:
+	case E1000_DEV_ID_PCH_ICP_I219_V8:
+	case E1000_DEV_ID_PCH_ICP_I219_LM9:
+	case E1000_DEV_ID_PCH_ICP_I219_V9:
 		mac->type = e1000_pch_cnp;
 		break;
 	case E1000_DEV_ID_82575EB_COPPER:
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index a47fa9822..b6822991f 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -120,6 +120,10 @@ struct e1000_hw;
 #define E1000_DEV_ID_PCH_CNP_I219_V6		0x15BE
 #define E1000_DEV_ID_PCH_CNP_I219_LM7		0x15BB
 #define E1000_DEV_ID_PCH_CNP_I219_V7		0x15BC
+#define E1000_DEV_ID_PCH_ICP_I219_LM8		0x15DF
+#define E1000_DEV_ID_PCH_ICP_I219_V8		0x15E0
+#define E1000_DEV_ID_PCH_ICP_I219_LM9		0x15E1
+#define E1000_DEV_ID_PCH_ICP_I219_V9		0x15E2
 #define E1000_DEV_ID_82576			0x10C9
 #define E1000_DEV_ID_82576_FIBER		0x10E6
 #define E1000_DEV_ID_82576_SERDES		0x10E7
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 04/70] net/e1000/base: remove shadowing variable declarations
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (2 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 03/70] net/e1000/base: add ICL device id's Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 05/70] net/e1000/base: introduce flag Guinan Sun
                   ` (67 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jacob Keller

The variable phy_reg is already declared at the top of
e1000_check_for_copper_link_ich8lan() and we don't need to re-declare it
in the inner if{} scope. Remove the unnecessary extra declarations which
fixes the sparse warning generated by shadowed variable names.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 5241cf698..1666826cc 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -1546,8 +1546,6 @@ STATIC s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
 
 
 		if (hw->mac.type >= e1000_pch_lpt) {
-			u16 phy_reg;
-
 			hw->phy.ops.read_reg_locked(hw, I217_PLL_CLOCK_GATE_REG,
 						    &phy_reg);
 			phy_reg &= ~I217_PLL_CLOCK_GATE_MASK;
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 05/70] net/e1000/base: introduce flag
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (3 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 04/70] net/e1000/base: remove shadowing variable declarations Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 06/70] net/e1000/base: modify MAC initialization Guinan Sun
                   ` (66 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Introduce E1000_TARC0_CB_MULTIQ_2_REQ flag to make flexible adjusting
number of outstanding requests.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/base/e1000_ich8lan.h
index 699a92c4b..9c21396c3 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.h
+++ b/drivers/net/e1000/base/e1000_ich8lan.h
@@ -103,8 +103,8 @@
 #define NVM_SIZE_MULTIPLIER 4096  /*multiplier for NVMS field*/
 #define E1000_FLASH_BASE_ADDR 0xE000 /*offset of NVM access regs*/
 #define E1000_CTRL_EXT_NVMVS 0x3 /*NVM valid sector */
-#define E1000_TARC0_CB_MULTIQ_3_REQ	(1 << 28 | 1 << 29)
-#define E1000_TARC0_CB_MULTIQ_2_REQ	(1 << 29)
+#define E1000_TARC0_CB_MULTIQ_3_REQ	0x30000000
+#define E1000_TARC0_CB_MULTIQ_2_REQ	0x20000000
 #define PCIE_ICH8_SNOOP_ALL	PCIE_NO_SNOOP_ALL
 
 #define E1000_ICH_RAR_ENTRIES	7
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 06/70] net/e1000/base: modify MAC initialization
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (4 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 05/70] net/e1000/base: introduce flag Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 07/70] net/e1000/base: modify flash presence for i225 devices Guinan Sun
                   ` (65 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Todd Fujinaka, Sasha Neftin

Fix mac initialization for i225 and i211 devices.
Fix parens to match the rest of the MAC checks.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 35a6ba502..4d7ef0ea2 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -433,7 +433,7 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	else
 		mac->ops.reset_hw = e1000_reset_hw_82575;
 	/* hw initialization */
-	if ((mac->type == e1000_i210) || (mac->type == e1000_i211))
+	if (mac->type == e1000_i210 || mac->type == e1000_i211)
 		mac->ops.init_hw = e1000_init_hw_i210;
 	else
 #ifndef NO_I225_SUPPORT
@@ -441,7 +441,7 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 		mac->ops.init_hw = e1000_init_hw_i225;
 	else
 #endif /* NO_I225_SUPPORT */
-		mac->ops.init_hw = e1000_init_hw_82575;
+	mac->ops.init_hw = e1000_init_hw_82575;
 	/* link setup */
 	mac->ops.setup_link = e1000_setup_link_generic;
 	/* physical interface link setup */
@@ -492,11 +492,17 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	/* acquire SW_FW sync */
 	mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_82575;
 	mac->ops.release_swfw_sync = e1000_release_swfw_sync_82575;
-	if (mac->type >= e1000_i210) {
+	if (mac->type == e1000_i210 || mac->type == e1000_i211) {
 		mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_i210;
 		mac->ops.release_swfw_sync = e1000_release_swfw_sync_i210;
 	}
+#ifndef NO_I225_SUPPORT
+	if (mac->type >= e1000_i225) {
+		mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_i225;
+		mac->ops.release_swfw_sync = e1000_release_swfw_sync_i225;
+	}
 
+#endif /* NO_I225_SUPPORT */
 	/* set lan id for port to determine which phy lock to use */
 	hw->mac.ops.set_lan_id(hw);
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 07/70] net/e1000/base: modify flash presence for i225 devices
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (5 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 06/70] net/e1000/base: modify MAC initialization Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 08/70] net/e1000/base: add i225 devices PHY type Guinan Sun
                   ` (64 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

ntroduce flash presence method for i225 devices.
Resolve conflict with legacy i210.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_nvm.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_nvm.c b/drivers/net/e1000/base/e1000_nvm.c
index 56e2db122..86dd26015 100644
--- a/drivers/net/e1000/base/e1000_nvm.c
+++ b/drivers/net/e1000/base/e1000_nvm.c
@@ -749,8 +749,9 @@ s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
 
 	DEBUGFUNC("e1000_read_pba_string_generic");
 
-	if ((hw->mac.type >= e1000_i210) &&
-	    !e1000_get_flash_presence_i210(hw)) {
+	if ((hw->mac.type == e1000_i210 ||
+	     hw->mac.type == e1000_i211) &&
+	     !e1000_get_flash_presence_i210(hw)) {
 		DEBUGOUT("Flashless no PBA string\n");
 		return -E1000_ERR_NVM_PBA_SECTION;
 	}
@@ -1287,6 +1288,9 @@ void e1000_get_fw_version(struct e1000_hw *hw, struct e1000_fw_version *fw_vers)
 			return;
 		}
 		/* fall through */
+#ifndef NO_I225_SUPPORT
+	case e1000_i225:
+#endif /* NO_I225_SUPPORT */
 	case e1000_i350:
 		hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
 		/* find combo image version */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 08/70] net/e1000/base: add i225 devices PHY type
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (6 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 07/70] net/e1000/base: modify flash presence for i225 devices Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 09/70] net/e1000/base: expose xmdio methods Guinan Sun
                   ` (63 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

add i225 devices PHY type. Initialization phy's
ops.read and ops.write pointers.
Add relevant MMD registers and masks for i225 devices.
Implemented GPY methods for read and write PHY registers.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h |  5 ++
 drivers/net/e1000/base/e1000_hw.h      |  1 +
 drivers/net/e1000/base/e1000_phy.c     | 82 +++++++++++++++++++++++++-
 drivers/net/e1000/base/e1000_phy.h     |  6 ++
 4 files changed, 93 insertions(+), 1 deletion(-)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index ee2ecceee..3ef1e4d32 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -986,6 +986,11 @@
 #define PHY_1000T_STATUS	0x0A /* 1000Base-T Status Reg */
 #define PHY_EXT_STATUS		0x0F /* Extended Status Reg */
 
+/* PHY GPY 211 registers */
+#define STANDARD_AN_REG_MASK	0x0007 /* MMD */
+#define ANEG_MULTIGBT_AN_CTRL	0x0020 /* MULTI GBT AN Control Register */
+#define MMD_DEVADDR_SHIFT	16     /* Shift MMD to higher bits */
+#define CR_2500T_FD_CAPS	0x0080 /* Advertise 2500T FD capability */
 #define PHY_CONTROL_LB		0x4000 /* PHY Loopback bit */
 
 /* NVM Control */
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index b6822991f..76b4dd5c1 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -273,6 +273,7 @@ enum e1000_phy_type {
 	e1000_phy_82580,
 	e1000_phy_vf,
 	e1000_phy_i210,
+	e1000_phy_i225,
 };
 
 enum e1000_bus_type {
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index 956c06747..23805ba7d 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -1841,6 +1841,9 @@ s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw)
 			case M88E1543_E_PHY_ID:
 			case M88E1512_E_PHY_ID:
 			case I210_I_PHY_ID:
+			/* fall-through */
+			case I225_I_PHY_ID:
+			/* fall-through */
 				reset_dsp = false;
 				break;
 			default:
@@ -1882,6 +1885,8 @@ s32 e1000_phy_force_speed_duplex_m88(struct e1000_hw *hw)
 		return E1000_SUCCESS;
 	if (hw->phy.id == I210_I_PHY_ID)
 		return E1000_SUCCESS;
+	if (hw->phy.id == I225_I_PHY_ID)
+		return E1000_SUCCESS;
 	if ((hw->phy.id == M88E1543_E_PHY_ID) ||
 	    (hw->phy.id == M88E1512_E_PHY_ID))
 		return E1000_SUCCESS;
@@ -2409,7 +2414,7 @@ s32 e1000_get_cable_length_m88(struct e1000_hw *hw)
 s32 e1000_get_cable_length_m88_gen2(struct e1000_hw *hw)
 {
 	struct e1000_phy_info *phy = &hw->phy;
-	s32 ret_val;
+	s32 ret_val  = 0;
 	u16 phy_data, phy_data2, is_cm;
 	u16 index, default_page;
 
@@ -2437,6 +2442,11 @@ s32 e1000_get_cable_length_m88_gen2(struct e1000_hw *hw)
 		phy->max_cable_length = phy_data / (is_cm ? 100 : 1);
 		phy->cable_length = phy_data / (is_cm ? 100 : 1);
 		break;
+	case I225_I_PHY_ID:
+		if (ret_val)
+			return ret_val;
+		/* TODO - complete with Foxville data */
+		break;
 	case M88E1543_E_PHY_ID:
 	case M88E1512_E_PHY_ID:
 	case M88E1340M_E_PHY_ID:
@@ -3016,6 +3026,9 @@ enum e1000_phy_type e1000_get_phy_type_from_id(u32 phy_id)
 	case I210_I_PHY_ID:
 		phy_type = e1000_phy_i210;
 		break;
+	case I225_I_PHY_ID:
+		phy_type = e1000_phy_i225;
+		break;
 	default:
 		phy_type = e1000_phy_unknown;
 		break;
@@ -4073,6 +4086,73 @@ s32 e1000_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data)
 	return ret_val;
 }
 
+/**
+ *  e1000_write_phy_reg_gpy - Write GPY PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: register offset to write to
+ *  @data: data to write at register offset
+ *
+ *  Acquires semaphore, if necessary, then writes the data to PHY register
+ *  at the offset.  Release any acquired semaphores before exiting.
+ **/
+s32 e1000_write_phy_reg_gpy(struct e1000_hw *hw, u32 offset, u16 data)
+{
+	s32 ret_val;
+	u8 dev_addr = (offset & GPY_MMD_MASK) >> GPY_MMD_SHIFT;
+
+	DEBUGFUNC("e1000_write_phy_reg_gpy");
+
+	offset = offset & GPY_REG_MASK;
+
+	if (!dev_addr) {
+		ret_val = hw->phy.ops.acquire(hw);
+		if (ret_val)
+			return ret_val;
+		ret_val = e1000_write_phy_reg_mdic(hw, offset, data);
+		if (ret_val)
+			return ret_val;
+		hw->phy.ops.release(hw);
+	} else {
+		ret_val = e1000_write_xmdio_reg(hw, (u16)offset, dev_addr,
+						data);
+	}
+	return ret_val;
+}
+
+/**
+ *  e1000_read_phy_reg_gpy - Read GPY PHY register
+ *  @hw: pointer to the HW structure
+ *  @offset: lower half is register offset to read to
+ *     upper half is MMD to use.
+ *  @data: data to read at register offset
+ *
+ *  Acquires semaphore, if necessary, then reads the data in the PHY register
+ *  at the offset.  Release any acquired semaphores before exiting.
+ **/
+s32 e1000_read_phy_reg_gpy(struct e1000_hw *hw, u32 offset, u16 *data)
+{
+	s32 ret_val;
+	u8 dev_addr = (offset & GPY_MMD_MASK) >> GPY_MMD_SHIFT;
+
+	DEBUGFUNC("e1000_read_phy_reg_gpy");
+
+	offset = offset & GPY_REG_MASK;
+
+	if (!dev_addr) {
+		ret_val = hw->phy.ops.acquire(hw);
+		if (ret_val)
+			return ret_val;
+		ret_val = e1000_read_phy_reg_mdic(hw, offset, data);
+		if (ret_val)
+			return ret_val;
+		hw->phy.ops.release(hw);
+	} else {
+		ret_val = e1000_read_xmdio_reg(hw, (u16)offset, dev_addr,
+					       data);
+	}
+	return ret_val;
+}
+
 /**
  *  e1000_read_phy_reg_mphy - Read mPHY control register
  *  @hw: pointer to the HW structure
diff --git a/drivers/net/e1000/base/e1000_phy.h b/drivers/net/e1000/base/e1000_phy.h
index 2c71e64c8..05a1d27ff 100644
--- a/drivers/net/e1000/base/e1000_phy.h
+++ b/drivers/net/e1000/base/e1000_phy.h
@@ -86,6 +86,8 @@ s32  e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);
 s32  e1000_get_cable_length_82577(struct e1000_hw *hw);
 s32  e1000_write_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 data);
 s32  e1000_read_phy_reg_gs40g(struct e1000_hw *hw, u32 offset, u16 *data);
+s32  e1000_write_phy_reg_gpy(struct e1000_hw *hw, u32 offset, u16 data);
+s32  e1000_read_phy_reg_gpy(struct e1000_hw *hw, u32 offset, u16 *data);
 s32 e1000_read_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 *data);
 s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,
 			     bool line_override);
@@ -115,6 +117,10 @@ bool e1000_is_mphy_ready(struct e1000_hw *hw);
 #define GS40G_MAC_SPEED_1G		0X0006
 #define GS40G_COPPER_SPEC		0x0010
 
+/* GPY211 - I225 defines */
+#define GPY_MMD_MASK			0xFFFF0000
+#define GPY_MMD_SHIFT			16
+#define GPY_REG_MASK			0x0000FFFF
 /* BM/HV Specific Registers */
 #define BM_PORT_CTRL_PAGE		769
 #define BM_WUC_PAGE			800
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 09/70] net/e1000/base: expose xmdio methods
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (7 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 08/70] net/e1000/base: add i225 devices PHY type Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 10/70] net/e1000/base: modify negotiation advertisement Guinan Sun
                   ` (62 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

move read and write xmdio methods
to e1000_phy.* These methods implement PHY clause 45 access
via clause 22 MMD registers (13 and 14). We now need it
for i225 devices access to GPY, but the approach is actually
IEEE-standardized and can be used by various PHY's.
Make these methods common accessible.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i210.c | 71 ----------------------------
 drivers/net/e1000/base/e1000_i210.h |  4 --
 drivers/net/e1000/base/e1000_phy.c  | 72 +++++++++++++++++++++++++++++
 drivers/net/e1000/base/e1000_phy.h  |  5 ++
 4 files changed, 77 insertions(+), 75 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index d9cd1a084..5c2fe8a3e 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -815,77 +815,6 @@ STATIC s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data)
 	return ret_val;
 }
 
-/**
- *  __e1000_access_xmdio_reg - Read/write XMDIO register
- *  @hw: pointer to the HW structure
- *  @address: XMDIO address to program
- *  @dev_addr: device address to program
- *  @data: pointer to value to read/write from/to the XMDIO address
- *  @read: boolean flag to indicate read or write
- **/
-STATIC s32 __e1000_access_xmdio_reg(struct e1000_hw *hw, u16 address,
-				    u8 dev_addr, u16 *data, bool read)
-{
-	s32 ret_val;
-
-	DEBUGFUNC("__e1000_access_xmdio_reg");
-
-	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr);
-	if (ret_val)
-		return ret_val;
-
-	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address);
-	if (ret_val)
-		return ret_val;
-
-	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA |
-							 dev_addr);
-	if (ret_val)
-		return ret_val;
-
-	if (read)
-		ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data);
-	else
-		ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data);
-	if (ret_val)
-		return ret_val;
-
-	/* Recalibrate the device back to 0 */
-	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0);
-	if (ret_val)
-		return ret_val;
-
-	return ret_val;
-}
-
-/**
- *  e1000_read_xmdio_reg - Read XMDIO register
- *  @hw: pointer to the HW structure
- *  @addr: XMDIO address to program
- *  @dev_addr: device address to program
- *  @data: value to be read from the EMI address
- **/
-s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data)
-{
-	DEBUGFUNC("e1000_read_xmdio_reg");
-
-	return __e1000_access_xmdio_reg(hw, addr, dev_addr, data, true);
-}
-
-/**
- *  e1000_write_xmdio_reg - Write XMDIO register
- *  @hw: pointer to the HW structure
- *  @addr: XMDIO address to program
- *  @dev_addr: device address to program
- *  @data: value to be written to the XMDIO address
- **/
-s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)
-{
-	DEBUGFUNC("e1000_read_xmdio_reg");
-
-	return __e1000_access_xmdio_reg(hw, addr, dev_addr, &data, false);
-}
-
 /**
  * e1000_pll_workaround_i210
  * @hw: pointer to the HW structure
diff --git a/drivers/net/e1000/base/e1000_i210.h b/drivers/net/e1000/base/e1000_i210.h
index c6aa2a17b..940eee21a 100644
--- a/drivers/net/e1000/base/e1000_i210.h
+++ b/drivers/net/e1000/base/e1000_i210.h
@@ -17,10 +17,6 @@ s32 e1000_read_invm_version(struct e1000_hw *hw,
 			    struct e1000_fw_version *invm_ver);
 s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
 void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
-s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
-			 u16 *data);
-s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
-			  u16 data);
 s32 e1000_init_hw_i210(struct e1000_hw *hw);
 
 #define E1000_STM_OPCODE		0xDB00
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index 23805ba7d..f6ee570ac 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -4309,3 +4309,75 @@ bool e1000_is_mphy_ready(struct e1000_hw *hw)
 
 	return ready;
 }
+
+/**
+ *  __e1000_access_xmdio_reg - Read/write XMDIO register
+ *  @hw: pointer to the HW structure
+ *  @address: XMDIO address to program
+ *  @dev_addr: device address to program
+ *  @data: pointer to value to read/write from/to the XMDIO address
+ *  @read: boolean flag to indicate read or write
+ **/
+STATIC s32 __e1000_access_xmdio_reg(struct e1000_hw *hw, u16 address,
+				    u8 dev_addr, u16 *data, bool read)
+{
+	s32 ret_val;
+
+	DEBUGFUNC("__e1000_access_xmdio_reg");
+
+	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr);
+	if (ret_val)
+		return ret_val;
+
+	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address);
+	if (ret_val)
+		return ret_val;
+
+	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA |
+					dev_addr);
+	if (ret_val)
+		return ret_val;
+
+	if (read)
+		ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data);
+	else
+		ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data);
+	if (ret_val)
+		return ret_val;
+
+	/* Recalibrate the device back to 0 */
+	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0);
+	if (ret_val)
+		return ret_val;
+
+	return ret_val;
+}
+
+/**
+ *  e1000_read_xmdio_reg - Read XMDIO register
+ *  @hw: pointer to the HW structure
+ *  @addr: XMDIO address to program
+ *  @dev_addr: device address to program
+ *  @data: value to be read from the EMI address
+ **/
+s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data)
+{
+	DEBUGFUNC("e1000_read_xmdio_reg");
+
+		return __e1000_access_xmdio_reg(hw, addr, dev_addr, data, true);
+}
+
+/**
+ *  e1000_write_xmdio_reg - Write XMDIO register
+ *  @hw: pointer to the HW structure
+ *  @addr: XMDIO address to program
+ *  @dev_addr: device address to program
+ *  @data: value to be written to the XMDIO address
+ **/
+s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)
+{
+	DEBUGFUNC("e1000_write_xmdio_reg");
+
+		return __e1000_access_xmdio_reg(hw, addr, dev_addr, &data,
+						false);
+}
diff --git a/drivers/net/e1000/base/e1000_phy.h b/drivers/net/e1000/base/e1000_phy.h
index 05a1d27ff..32e9d2620 100644
--- a/drivers/net/e1000/base/e1000_phy.h
+++ b/drivers/net/e1000/base/e1000_phy.h
@@ -93,6 +93,11 @@ s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,
 			     bool line_override);
 bool e1000_is_mphy_ready(struct e1000_hw *hw);
 
+s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
+			 u16 *data);
+s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
+			  u16 data);
+
 #define E1000_MAX_PHY_ADDR		8
 
 /* IGP01E1000 Specific Registers */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 10/70] net/e1000/base: modify negotiation advertisement
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (8 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 09/70] net/e1000/base: expose xmdio methods Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 11/70] net/e1000/base: fall through explicitly Guinan Sun
                   ` (61 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Add 2.5G auto negotiation advertisement.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h |  2 ++
 drivers/net/e1000/base/e1000_phy.c     | 33 ++++++++++++++++++++++++++
 2 files changed, 35 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 3ef1e4d32..dbc515aef 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -331,6 +331,8 @@
 #define ADVERTISE_100_FULL		0x0008
 #define ADVERTISE_1000_HALF		0x0010 /* Not used, just FYI */
 #define ADVERTISE_1000_FULL		0x0020
+#define ADVERTISE_2500_HALF		0x0040 /* NOT used, just FYI */
+#define ADVERTISE_2500_FULL		0x0080
 
 /* 1000/H is not supported, nor spec-compliant. */
 #define E1000_ALL_SPEED_DUPLEX	( \
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index f6ee570ac..4e829eaa8 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -1450,6 +1450,7 @@ s32 e1000_phy_setup_autoneg(struct e1000_hw *hw)
 	s32 ret_val;
 	u16 mii_autoneg_adv_reg;
 	u16 mii_1000t_ctrl_reg = 0;
+	u16 aneg_multigbt_an_ctrl = 0;
 
 	DEBUGFUNC("e1000_phy_setup_autoneg");
 
@@ -1468,6 +1469,18 @@ s32 e1000_phy_setup_autoneg(struct e1000_hw *hw)
 			return ret_val;
 	}
 
+	if ((phy->autoneg_mask & ADVERTISE_2500_FULL) &&
+	    hw->phy.id == I225_I_PHY_ID) {
+	/* Read the MULTI GBT AN Control Register - reg 7.32 */
+		ret_val = phy->ops.read_reg(hw, (STANDARD_AN_REG_MASK <<
+					    MMD_DEVADDR_SHIFT) |
+					    ANEG_MULTIGBT_AN_CTRL,
+					    &aneg_multigbt_an_ctrl);
+
+		if (ret_val)
+			return ret_val;
+	}
+
 	/* Need to parse both autoneg_advertised and fc and set up
 	 * the appropriate PHY registers.  First we will parse for
 	 * autoneg_advertised software override.  Since we can advertise
@@ -1521,6 +1534,18 @@ s32 e1000_phy_setup_autoneg(struct e1000_hw *hw)
 		mii_1000t_ctrl_reg |= CR_1000T_FD_CAPS;
 	}
 
+	/* We do not allow the Phy to advertise 2500 Mb Half Duplex */
+	if (phy->autoneg_advertised & ADVERTISE_2500_HALF)
+		DEBUGOUT("Advertise 2500mb Half duplex request denied!\n");
+
+	/* Do we want to advertise 2500 Mb Full Duplex? */
+	if (phy->autoneg_advertised & ADVERTISE_2500_FULL) {
+		DEBUGOUT("Advertise 2500mb Full duplex\n");
+		aneg_multigbt_an_ctrl |= CR_2500T_FD_CAPS;
+	} else {
+		aneg_multigbt_an_ctrl &= ~CR_2500T_FD_CAPS;
+	}
+
 	/* Check for a software override of the flow control settings, and
 	 * setup the PHY advertisement registers accordingly.  If
 	 * auto-negotiation is enabled, then software will have to set the
@@ -1585,6 +1610,14 @@ s32 e1000_phy_setup_autoneg(struct e1000_hw *hw)
 		ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL,
 					     mii_1000t_ctrl_reg);
 
+	if ((phy->autoneg_mask & ADVERTISE_2500_FULL) &&
+	    hw->phy.id == I225_I_PHY_ID)
+		ret_val = phy->ops.write_reg(hw,
+					     (STANDARD_AN_REG_MASK <<
+					     MMD_DEVADDR_SHIFT) |
+					     ANEG_MULTIGBT_AN_CTRL,
+					     aneg_multigbt_an_ctrl);
+
 	return ret_val;
 }
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 11/70] net/e1000/base: fall through explicitly
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (9 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 10/70] net/e1000/base: modify negotiation advertisement Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 12/70] net/e1000/base: add function parameter descriptions Guinan Sun
                   ` (60 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Todd Fujinaka

This patch adds/changes fall through comments to address new warnings
produced by gcc 7.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 4 ++--
 drivers/net/e1000/base/e1000_mbx.c   | 1 +
 drivers/net/e1000/base/e1000_phy.c   | 1 +
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 4d7ef0ea2..e4de82d34 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -1665,7 +1665,7 @@ STATIC s32 e1000_setup_serdes_link_82575(struct e1000_hw *hw)
 	case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX:
 		/* disable PCS autoneg and support parallel detect only */
 		pcs_autoneg = false;
-		/* fall through to default case */
+		/* Fall through */
 	default:
 		if (hw->mac.type == e1000_82575 ||
 		    hw->mac.type == e1000_82576) {
@@ -1791,7 +1791,7 @@ STATIC s32 e1000_get_media_type_82575(struct e1000_hw *hw)
 			dev_spec->sgmii_active = true;
 			break;
 		}
-		/* fall through for I2C based SGMII */
+		/* Fall through for I2C based SGMII */
 	case E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES:
 		/* read media type from SFP EEPROM */
 		ret_val = e1000_set_sfp_media_type_82575(hw);
diff --git a/drivers/net/e1000/base/e1000_mbx.c b/drivers/net/e1000/base/e1000_mbx.c
index 6fae6767f..4cac3642e 100644
--- a/drivers/net/e1000/base/e1000_mbx.c
+++ b/drivers/net/e1000/base/e1000_mbx.c
@@ -755,6 +755,7 @@ s32 e1000_init_mbx_params_pf(struct e1000_hw *hw)
 		mbx->stats.reqs = 0;
 		mbx->stats.acks = 0;
 		mbx->stats.rsts = 0;
+		/* Fall through */
 	default:
 		return E1000_SUCCESS;
 	}
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index 4e829eaa8..c4a9fc04d 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -1274,6 +1274,7 @@ s32 e1000_copper_link_setup_m88_gen2(struct e1000_hw *hw)
 			phy_data |= M88E1000_PSCR_AUTO_X_1000T;
 			break;
 		}
+		/* Fall through */
 	case 0:
 	default:
 		phy_data |= M88E1000_PSCR_AUTO_X_MODE;
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 12/70] net/e1000/base: add function parameter descriptions
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (10 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 11/70] net/e1000/base: fall through explicitly Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 13/70] net/e1000/base: modify klocwork errors Guinan Sun
                   ` (59 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Todd Fujinaka

Add function parameter descriptions to address gcc 7
warnings.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 11 +++++------
 drivers/net/e1000/base/e1000_mac.c   |  8 ++++++++
 drivers/net/e1000/base/e1000_mbx.c   |  4 ++++
 drivers/net/e1000/base/e1000_nvm.c   |  7 +++++++
 drivers/net/e1000/base/e1000_phy.c   |  6 ++++++
 5 files changed, 30 insertions(+), 6 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index e4de82d34..9264a88ba 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -2769,7 +2769,7 @@ STATIC s32 e1000_update_nvm_checksum_i350(struct e1000_hw *hw)
 /**
  *  __e1000_access_emi_reg - Read/write EMI register
  *  @hw: pointer to the HW structure
- *  @addr: EMI address to program
+ *  @address: EMI address to program
  *  @data: pointer to value to read/write from/to the EMI address
  *  @read: boolean flag to indicate read or write
  **/
@@ -2996,8 +2996,8 @@ s32 e1000_initialize_M88E1543_phy(struct e1000_hw *hw)
 /**
  *  e1000_set_eee_i350 - Enable/disable EEE support
  *  @hw: pointer to the HW structure
- *  @adv1g: boolean flag enabling 1G EEE advertisement
- *  @adv100m: boolean flag enabling 100M EEE advertisement
+ *  @adv1G: boolean flag enabling 1G EEE advertisement
+ *  @adv100M: boolean flag enabling 100M EEE advertisement
  *
  *  Enable/disable EEE based on setting in dev_spec structure.
  *
@@ -3051,8 +3051,8 @@ s32 e1000_set_eee_i350(struct e1000_hw *hw, bool adv1G, bool adv100M)
 /**
  *  e1000_set_eee_i354 - Enable/disable EEE support
  *  @hw: pointer to the HW structure
- *  @adv1g: boolean flag enabling 1G EEE advertisement
- *  @adv100m: boolean flag enabling 100M EEE advertisement
+ *  @adv1G: boolean flag enabling 1G EEE advertisement
+ *  @adv100M: boolean flag enabling 100M EEE advertisement
  *
  *  Enable/disable EEE legacy mode based on setting in dev_spec structure.
  *
@@ -3708,7 +3708,6 @@ STATIC s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data)
 
 /**
  *  e1000_get_i2c_data - Reads the I2C SDA data bit
- *  @hw: pointer to hardware structure
  *  @i2cctl: Current value of I2CCTL register
  *
  *  Returns the I2C data bit value
diff --git a/drivers/net/e1000/base/e1000_mac.c b/drivers/net/e1000/base/e1000_mac.c
index d0e1fa58b..48384b284 100644
--- a/drivers/net/e1000/base/e1000_mac.c
+++ b/drivers/net/e1000/base/e1000_mac.c
@@ -75,6 +75,8 @@ void e1000_null_mac_generic(struct e1000_hw E1000_UNUSEDARG *hw)
 /**
  *  e1000_null_link_info - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @s: dummy variable
+ *  @d: dummy variable
  **/
 s32 e1000_null_link_info(struct e1000_hw E1000_UNUSEDARG *hw,
 			 u16 E1000_UNUSEDARG *s, u16 E1000_UNUSEDARG *d)
@@ -98,6 +100,8 @@ bool e1000_null_mng_mode(struct e1000_hw E1000_UNUSEDARG *hw)
 /**
  *  e1000_null_update_mc - No-op function, return void
  *  @hw: pointer to the HW structure
+ *  @h: dummy variable
+ *  @a: dummy variable
  **/
 void e1000_null_update_mc(struct e1000_hw E1000_UNUSEDARG *hw,
 			  u8 E1000_UNUSEDARG *h, u32 E1000_UNUSEDARG a)
@@ -110,6 +114,8 @@ void e1000_null_update_mc(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_write_vfta - No-op function, return void
  *  @hw: pointer to the HW structure
+ *  @a: dummy variable
+ *  @b: dummy variable
  **/
 void e1000_null_write_vfta(struct e1000_hw E1000_UNUSEDARG *hw,
 			   u32 E1000_UNUSEDARG a, u32 E1000_UNUSEDARG b)
@@ -122,6 +128,8 @@ void e1000_null_write_vfta(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_rar_set - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @h: dummy variable
+ *  @a: dummy variable
  **/
 int e1000_null_rar_set(struct e1000_hw E1000_UNUSEDARG *hw,
 			u8 E1000_UNUSEDARG *h, u32 E1000_UNUSEDARG a)
diff --git a/drivers/net/e1000/base/e1000_mbx.c b/drivers/net/e1000/base/e1000_mbx.c
index 4cac3642e..3f3b326c6 100644
--- a/drivers/net/e1000/base/e1000_mbx.c
+++ b/drivers/net/e1000/base/e1000_mbx.c
@@ -7,6 +7,7 @@
 /**
  *  e1000_null_mbx_check_for_flag - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @mbx_id: id of mailbox to read
  **/
 STATIC s32 e1000_null_mbx_check_for_flag(struct e1000_hw E1000_UNUSEDARG *hw,
 					 u16 E1000_UNUSEDARG mbx_id)
@@ -20,6 +21,9 @@ STATIC s32 e1000_null_mbx_check_for_flag(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_mbx_transact - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @msg: The message buffer
+ *  @size: Length of buffer
+ *  @mbx_id: id of mailbox to read
  **/
 STATIC s32 e1000_null_mbx_transact(struct e1000_hw E1000_UNUSEDARG *hw,
 				   u32 E1000_UNUSEDARG *msg,
diff --git a/drivers/net/e1000/base/e1000_nvm.c b/drivers/net/e1000/base/e1000_nvm.c
index 86dd26015..d1ea071bb 100644
--- a/drivers/net/e1000/base/e1000_nvm.c
+++ b/drivers/net/e1000/base/e1000_nvm.c
@@ -32,6 +32,9 @@ void e1000_init_nvm_ops_generic(struct e1000_hw *hw)
 /**
  *  e1000_null_nvm_read - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @a: dummy variable
+ *  @b: dummy variable
+ *  @c: dummy variable
  **/
 s32 e1000_null_read_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
 			u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
@@ -56,6 +59,7 @@ void e1000_null_nvm_generic(struct e1000_hw E1000_UNUSEDARG *hw)
 /**
  *  e1000_null_led_default - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @data: dummy variable
  **/
 s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw,
 			   u16 E1000_UNUSEDARG *data)
@@ -68,6 +72,9 @@ s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_write_nvm - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @a: dummy variable
+ *  @b: dummy variable
+ *  @c: dummy variable
  **/
 s32 e1000_null_write_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
 			 u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index c4a9fc04d..3b563edfe 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -73,6 +73,7 @@ void e1000_init_phy_ops_generic(struct e1000_hw *hw)
 /**
  *  e1000_null_set_page - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @data: dummy variable
  **/
 s32 e1000_null_set_page(struct e1000_hw E1000_UNUSEDARG *hw,
 			u16 E1000_UNUSEDARG data)
@@ -85,6 +86,8 @@ s32 e1000_null_set_page(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_read_reg - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @offset: dummy variable
+ *  @data: dummy variable
  **/
 s32 e1000_null_read_reg(struct e1000_hw E1000_UNUSEDARG *hw,
 			u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG *data)
@@ -108,6 +111,7 @@ void e1000_null_phy_generic(struct e1000_hw E1000_UNUSEDARG *hw)
 /**
  *  e1000_null_lplu_state - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @active: dummy variable
  **/
 s32 e1000_null_lplu_state(struct e1000_hw E1000_UNUSEDARG *hw,
 			  bool E1000_UNUSEDARG active)
@@ -120,6 +124,8 @@ s32 e1000_null_lplu_state(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_write_reg - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @offset: dummy variable
+ *  @data: dummy variable
  **/
 s32 e1000_null_write_reg(struct e1000_hw E1000_UNUSEDARG *hw,
 			 u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG data)
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 13/70] net/e1000/base: modify klocwork errors
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (11 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 12/70] net/e1000/base: add function parameter descriptions Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 14/70] net/e1000/base: add 2.5G speed advertisement Guinan Sun
                   ` (58 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Robert Konklewski

This patch fixes klocwork scans errors relating to operands in bitwise
operations having different sizes.

Signed-off-by: Robert Konklewski <robertx.konklewski@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 2 +-
 drivers/net/e1000/base/e1000_i210.c  | 2 +-
 drivers/net/e1000/base/e1000_phy.c   | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 9264a88ba..627349de8 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -1096,7 +1096,7 @@ STATIC void e1000_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask)
 		; /* Empty */
 
 	swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
-	swfw_sync &= ~mask;
+	swfw_sync &= (u32)~mask;
 	E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
 
 	e1000_put_hw_semaphore_generic(hw);
diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index 5c2fe8a3e..b13730d84 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -117,7 +117,7 @@ void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask)
 		; /* Empty */
 
 	swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
-	swfw_sync &= ~mask;
+	swfw_sync &= (u32)~mask;
 	E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
 
 	e1000_put_hw_semaphore_generic(hw);
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index 3b563edfe..c9bb0d4a9 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -597,7 +597,7 @@ s32 e1000_write_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 data)
 				 * lane and update whole word
 				 */
 				data_local = i2ccmd & 0xFF00;
-				data_local |= data;
+				data_local |= (u32)data;
 				i2ccmd = ((offset <<
 					E1000_I2CCMD_REG_ADDR_SHIFT) |
 					E1000_I2CCMD_OPCODE_WRITE | data_local);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 14/70] net/e1000/base: add 2.5G speed advertisement
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (12 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 13/70] net/e1000/base: modify klocwork errors Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 15/70] net/e1000/base: setup copper link function for i225 Guinan Sun
                   ` (57 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Dima Ruinskiy

This patch defines the flags for 2.5G speed advertisement.
Currently this speed is supported only on i225 (Foxville) devices.
In this mode, the speed selection
bits in the status register will be the same as in 1 Gbps mode, and,
additionally, bit 22 in the status register will be turned on.

Signed-off-by: Dima Ruinskiy <dima.ruinskiy@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h |  5 +++++
 drivers/net/e1000/base/e1000_mac.c     | 14 ++++++++++++--
 2 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index dbc515aef..d9ed3a52f 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -301,6 +301,7 @@
 #define E1000_STATUS_SPEED_10		0x00000000 /* Speed 10Mb/s */
 #define E1000_STATUS_SPEED_100		0x00000040 /* Speed 100Mb/s */
 #define E1000_STATUS_SPEED_1000		0x00000080 /* Speed 1000Mb/s */
+#define E1000_STATUS_SPEED_2500		0x00400000 /* Speed 2.5Gb/s indication for I225 */
 #define E1000_STATUS_LAN_INIT_DONE	0x00000200 /* Lan Init Compltn by NVM */
 #define E1000_STATUS_PHYRA		0x00000400 /* PHY Reset Asserted */
 #define E1000_STATUS_GIO_MASTER_ENABLE	0x00080000 /* Master request status */
@@ -338,6 +339,9 @@
 #define E1000_ALL_SPEED_DUPLEX	( \
 	ADVERTISE_10_HALF | ADVERTISE_10_FULL | ADVERTISE_100_HALF | \
 	ADVERTISE_100_FULL | ADVERTISE_1000_FULL)
+#define E1000_ALL_SPEED_DUPLEX_2500 ( \
+	ADVERTISE_10_HALF | ADVERTISE_10_FULL | ADVERTISE_100_HALF | \
+	ADVERTISE_100_FULL | ADVERTISE_1000_FULL | ADVERTISE_2500_FULL)
 #define E1000_ALL_NOT_GIG	( \
 	ADVERTISE_10_HALF | ADVERTISE_10_FULL | ADVERTISE_100_HALF | \
 	ADVERTISE_100_FULL)
@@ -346,6 +350,7 @@
 #define E1000_ALL_HALF_DUPLEX	(ADVERTISE_10_HALF | ADVERTISE_100_HALF)
 
 #define AUTONEG_ADVERTISE_SPEED_DEFAULT		E1000_ALL_SPEED_DUPLEX
+#define AUTONEG_ADVERTISE_SPEED_DEFAULT_2500	E1000_ALL_SPEED_DUPLEX_2500
 
 /* LED Control */
 #define E1000_PHY_LED0_MODE_MASK	0x00000007
diff --git a/drivers/net/e1000/base/e1000_mac.c b/drivers/net/e1000/base/e1000_mac.c
index 48384b284..92ee33745 100644
--- a/drivers/net/e1000/base/e1000_mac.c
+++ b/drivers/net/e1000/base/e1000_mac.c
@@ -1638,8 +1638,18 @@ s32 e1000_get_speed_and_duplex_copper_generic(struct e1000_hw *hw, u16 *speed,
 
 	status = E1000_READ_REG(hw, E1000_STATUS);
 	if (status & E1000_STATUS_SPEED_1000) {
-		*speed = SPEED_1000;
-		DEBUGOUT("1000 Mbs, ");
+		/* For I225, STATUS will indicate 1G speed in both 1 Gbps
+		 * and 2.5 Gbps link modes. An additional bit is used
+		 * to differentiate between 1 Gbps and 2.5 Gbps.
+		 */
+		if ((hw->mac.type == e1000_i225) &&
+		    (status & E1000_STATUS_SPEED_2500)) {
+			*speed = SPEED_2500;
+			DEBUGOUT("2500 Mbs, ");
+		} else {
+			*speed = SPEED_1000;
+			DEBUGOUT("1000 Mbs, ");
+		}
 	} else if (status & E1000_STATUS_SPEED_100) {
 		*speed = SPEED_100;
 		DEBUGOUT("100 Mbs, ");
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 15/70] net/e1000/base: setup copper link function for i225
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (13 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 14/70] net/e1000/base: add 2.5G speed advertisement Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-23  2:22   ` Zhao1, Wei
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 16/70] net/e1000/base: implement Low-Power-Link-Up (LPLU) " Guinan Sun
                   ` (56 subsequent siblings)
  71 siblings, 1 reply; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Dany Trakhtenberg

A dedicated function for i225 that Configures the link for auto-neg
or forced speed and duplex. It was taken from the
e1000_setup_copper_link_82575 function in e1000_82575 file and was
refactored for i225 only.

Signed-off-by: Dany Trakhtenberg <Dany.Trakhtenberg@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i225.c | 30 +++++++++++++++++++++++++++++
 drivers/net/e1000/base/e1000_phy.h  | 13 +++++++++++++
 2 files changed, 43 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_i225.c b/drivers/net/e1000/base/e1000_i225.c
index 4ba6c45be..621dc6863 100644
--- a/drivers/net/e1000/base/e1000_i225.c
+++ b/drivers/net/e1000/base/e1000_i225.c
@@ -124,6 +124,36 @@ void e1000_release_swfw_sync_i225(struct e1000_hw *hw, u16 mask)
 	e1000_put_hw_semaphore_generic(hw);
 }
 
+/*
+ * e1000_setup_copper_link_i225 - Configure copper link settings
+ * @hw: pointer to the HW structure
+ *
+ * Configures the link for auto-neg or forced speed and duplex.  Then we check
+ * for link, once link is established calls to configure collision distance
+ * and flow control are called.
+ */
+s32 e1000_setup_copper_link_i225(struct e1000_hw *hw)
+{
+	u32 phpm_reg;
+	s32 ret_val;
+	u32 ctrl;
+
+	DEBUGFUNC("e1000_setup_copper_link_i225");
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+	ctrl |= E1000_CTRL_SLU;
+	ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX);
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
+
+	phpm_reg = E1000_READ_REG(hw, E1000_I225_PHPM);
+	phpm_reg &= ~E1000_I225_PHPM_GO_LINKD;
+	E1000_WRITE_REG(hw, E1000_I225_PHPM, phpm_reg);
+
+	ret_val = e1000_setup_copper_link_generic(hw);
+
+	return ret_val;
+}
+
 /* e1000_get_hw_semaphore_i225 - Acquire hardware semaphore
  * @hw: pointer to the HW structure
  *
diff --git a/drivers/net/e1000/base/e1000_phy.h b/drivers/net/e1000/base/e1000_phy.h
index 32e9d2620..3321bc0ba 100644
--- a/drivers/net/e1000/base/e1000_phy.h
+++ b/drivers/net/e1000/base/e1000_phy.h
@@ -122,6 +122,19 @@ s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
 #define GS40G_MAC_SPEED_1G		0X0006
 #define GS40G_COPPER_SPEC		0x0010
 
+#endif /* NO_I210_SUPPORT */
+#ifndef NO_I225_SUPPORT
+#define E1000_I225_PHPM			0x0E14 /* I225 PHY Power Management */
+#define E1000_I225_PHPM_DIS_1000_D3	0x0008 /* Disable 1G in D3 */
+#define E1000_I225_PHPM_LINK_ENERGY	0x0010 /* Link Energy Detect */
+#define E1000_I225_PHPM_GO_LINKD	0x0020 /* Go Link Disconnect */
+#define E1000_I225_PHPM_DIS_1000	0x0040 /* Disable 1G globally */
+#define E1000_I225_PHPM_SPD_B2B_EN	0x0080 /* Smart Power Down Back2Back */
+#define E1000_I225_PHPM_RST_COMPL	0x0100 /* PHY Reset Completed */
+#define E1000_I225_PHPM_DIS_100_D3	0x0200 /* Disable 100M in D3 */
+#define E1000_I225_PHPM_ULP		0x0400 /* Ultra Low-Power Mode */
+#define E1000_I225_PHPM_DIS_2500	0x0800 /* Disable 2.5G globally */
+#define E1000_I225_PHPM_DIS_2500_D3	0x1000 /* Disable 2.5G in D3 */
 /* GPY211 - I225 defines */
 #define GPY_MMD_MASK			0xFFFF0000
 #define GPY_MMD_SHIFT			16
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 16/70] net/e1000/base: implement Low-Power-Link-Up (LPLU) for i225
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (14 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 15/70] net/e1000/base: setup copper link function for i225 Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-23  2:23   ` Zhao1, Wei
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 17/70] net/e1000/base: add new wakeup/proxy registers " Guinan Sun
                   ` (55 subsequent siblings)
  71 siblings, 1 reply; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Dima Ruinskiy

I225 introduces a new mechanism for Low-Power-Link-Up (LPLU) control.
This patch implements the new functions and sets the PHY OPS pointers.

Signed-off-by: Dima Ruinskiy <dima.ruinskiy@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i225.c | 58 +++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_i225.c b/drivers/net/e1000/base/e1000_i225.c
index 621dc6863..dbebb6fa3 100644
--- a/drivers/net/e1000/base/e1000_i225.c
+++ b/drivers/net/e1000/base/e1000_i225.c
@@ -1147,3 +1147,61 @@ s32 e1000_init_hw_i225(struct e1000_hw *hw)
 	ret_val = e1000_init_hw_82575(hw);
 	return ret_val;
 }
+
+/*
+ * e1000_set_d0_lplu_state_i225 - Set Low-Power-Link-Up (LPLU) D0 state
+ * @hw: pointer to the HW structure
+ * @active: true to enable LPLU, false to disable
+ *
+ * Note: since I225 does not actually support LPLU, this function
+ * simply enables/disables 1G and 2.5G speeds in D0.
+ */
+s32 e1000_set_d0_lplu_state_i225(struct e1000_hw *hw, bool active)
+{
+	u32 data;
+
+	DEBUGFUNC("e1000_set_d0_lplu_state_i225");
+
+	data = E1000_READ_REG(hw, E1000_I225_PHPM);
+
+	if (active) {
+		data |= E1000_I225_PHPM_DIS_1000;
+		data |= E1000_I225_PHPM_DIS_2500;
+	} else {
+		data &= ~E1000_I225_PHPM_DIS_1000;
+		data &= ~E1000_I225_PHPM_DIS_2500;
+	}
+
+	E1000_WRITE_REG(hw, E1000_I225_PHPM, data);
+	return E1000_SUCCESS;
+}
+
+/*
+ * e1000_set_d3_lplu_state_i225 - Set Low-Power-Link-Up (LPLU) D3 state
+ * @hw: pointer to the HW structure
+ * @active: true to enable LPLU, false to disable
+ *
+ * Note: since I225 does not actually support LPLU, this function
+ * simply enables/disables 100M, 1G and 2.5G speeds in D3.
+ */
+s32 e1000_set_d3_lplu_state_i225(struct e1000_hw *hw, bool active)
+{
+	u32 data;
+
+	DEBUGFUNC("e1000_set_d3_lplu_state_i225");
+
+	data = E1000_READ_REG(hw, E1000_I225_PHPM);
+
+	if (active) {
+		data |= E1000_I225_PHPM_DIS_100_D3;
+		data |= E1000_I225_PHPM_DIS_1000_D3;
+		data |= E1000_I225_PHPM_DIS_2500_D3;
+	} else {
+		data &= ~E1000_I225_PHPM_DIS_100_D3;
+		data &= ~E1000_I225_PHPM_DIS_1000_D3;
+		data &= ~E1000_I225_PHPM_DIS_2500_D3;
+	}
+
+	E1000_WRITE_REG(hw, E1000_I225_PHPM, data);
+	return E1000_SUCCESS;
+}
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 17/70] net/e1000/base: add new wakeup/proxy registers for i225
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (15 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 16/70] net/e1000/base: implement Low-Power-Link-Up (LPLU) " Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 18/70] net/e1000/base: modify klockwork about unused return values Guinan Sun
                   ` (54 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Dima Ruinskiy

I225 expands wakeup and proxy capabilities compared to previous
generations. The new capabilities are exposed via additional registers.

Signed-off-by: Dima Ruinskiy <dima.ruinskiy@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 18 +++++++++++++++++-
 drivers/net/e1000/base/e1000_regs.h    | 11 +++++++++++
 2 files changed, 28 insertions(+), 1 deletion(-)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index d9ed3a52f..141cdcc60 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -1515,8 +1515,23 @@
 #define E1000_INVM_DEFAULT_AL		0x202F
 #define E1000_INVM_AUTOLOAD		0x0A
 #define E1000_INVM_PLL_WO_VAL		0x0010
-
 #endif /* NO_I225_SUPPORT */
+/* Proxy Filter Control Extended */
+#define E1000_PROXYFCEX_MDNS		0x00000001 /* mDNS */
+#define E1000_PROXYFCEX_MDNS_M		0x00000002 /* mDNS Multicast */
+#define E1000_PROXYFCEX_MDNS_U		0x00000004 /* mDNS Unicast */
+#define E1000_PROXYFCEX_IPV4_M		0x00000008 /* IPv4 Multicast */
+#define E1000_PROXYFCEX_IPV6_M		0x00000010 /* IPv6 Multicast */
+#define E1000_PROXYFCEX_IGMP		0x00000020 /* IGMP */
+#define E1000_PROXYFCEX_IGMP_M		0x00000040 /* IGMP Multicast */
+#define E1000_PROXYFCEX_ARPRES		0x00000080 /* ARP Response */
+#define E1000_PROXYFCEX_ARPRES_D	0x00000100 /* ARP Response Directed */
+#define E1000_PROXYFCEX_ICMPV4		0x00000200 /* ICMPv4 */
+#define E1000_PROXYFCEX_ICMPV4_D	0x00000400 /* ICMPv4 Directed */
+#define E1000_PROXYFCEX_ICMPV6		0x00000800 /* ICMPv6 */
+#define E1000_PROXYFCEX_ICMPV6_D	0x00001000 /* ICMPv6 Directed */
+#define E1000_PROXYFCEX_DNS			0x00002000 /* DNS */
+
 /* Proxy Filter Control */
 #define E1000_PROXYFC_D0		0x00000001 /* Enable offload in D0 */
 #define E1000_PROXYFC_EX		0x00000004 /* Directed exact proxy */
@@ -1526,6 +1541,7 @@
 #define E1000_PROXYFC_IPV4		0x00000040 /* Directed IPv4 Enable */
 #define E1000_PROXYFC_IPV6		0x00000080 /* Directed IPv6 Enable */
 #define E1000_PROXYFC_NS		0x00000200 /* IPv6 Neighbor Solicitation */
+#define E1000_PROXYFC_NS_DIRECTED	0x00000400 /* Directed NS Proxy Ena */
 #define E1000_PROXYFC_ARP		0x00000800 /* ARP Request Proxy Ena */
 /* Proxy Status */
 #define E1000_PROXYS_CLEAR		0xFFFFFFFF /* Clear */
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 1f8736f35..ef131af18 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -476,6 +476,17 @@
 #define E1000_IP6AT	0x05880  /* IPv6 Address Table - RW Array */
 #define E1000_WUPL	0x05900  /* Wakeup Packet Length - RW */
 #define E1000_WUPM	0x05A00  /* Wakeup Packet Memory - RO A */
+#define E1000_WUPM_EXT	0x0B800  /* Wakeup Packet Memory Extended - RO Array */
+#define E1000_WUFC_EXT	0x0580C  /* Wakeup Filter Control Extended - RW */
+#define E1000_WUS_EXT	0x05814  /* Wakeup Status Extended - RW1C */
+#define E1000_FHFTSL	0x05804  /* Flex Filter Indirect Table Select - RW */
+#define E1000_PROXYFCEX	0x05590  /* Proxy Filter Control Extended - RW1C */
+#define E1000_PROXYEXS	0x05594  /* Proxy Extended Status - RO */
+#define E1000_WFUTPF	0x05500  /* Wake Flex UDP TCP Port Filter - RW Array */
+#define E1000_RFUTPF	0x05580  /* Range Flex UDP TCP Port Filter - RW */
+#define E1000_RWPFC	0x05584  /* Range Wake Port Filter Control - RW */
+#define E1000_WFUTPS	0x05588  /* Wake Filter UDP TCP Status - RW1C */
+#define E1000_WCS	0x0558C  /* Wake Control Status - RW1C */
 #define E1000_PBACL	0x05B68  /* MSIx PBA Clear - Read/Write 1's to clear */
 #define E1000_FFLT	0x05F00  /* Flexible Filter Length Table - RW Array */
 #define E1000_HOST_IF	0x08800  /* Host Interface */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 18/70] net/e1000/base: modify klockwork about unused return values
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (16 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 17/70] net/e1000/base: add new wakeup/proxy registers " Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 19/70] net/e1000/base: improve coding style Guinan Sun
                   ` (53 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Todd Fujinaka

Klockwork found unreachable code since *clock_in_i2c_* always return
success. Don't return unused s32 and don't check for constants.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 627349de8..49c065014 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -76,10 +76,10 @@ STATIC void e1000_clear_vfta_i350(struct e1000_hw *hw);
 
 STATIC void e1000_i2c_start(struct e1000_hw *hw);
 STATIC void e1000_i2c_stop(struct e1000_hw *hw);
-STATIC s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);
+STATIC void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);
 STATIC s32 e1000_clock_out_i2c_byte(struct e1000_hw *hw, u8 data);
 STATIC s32 e1000_get_i2c_ack(struct e1000_hw *hw);
-STATIC s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);
+STATIC void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);
 STATIC s32 e1000_clock_out_i2c_bit(struct e1000_hw *hw, bool data);
 STATIC void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
 STATIC void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
@@ -3305,9 +3305,7 @@ s32 e1000_read_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset,
 		if (status != E1000_SUCCESS)
 			goto fail;
 
-		status = e1000_clock_in_i2c_byte(hw, data);
-		if (status != E1000_SUCCESS)
-			goto fail;
+		e1000_clock_in_i2c_byte(hw, data);
 
 		status = e1000_clock_out_i2c_bit(hw, nack);
 		if (status != E1000_SUCCESS)
@@ -3471,7 +3469,7 @@ STATIC void e1000_i2c_stop(struct e1000_hw *hw)
  *
  *  Clocks in one byte data via I2C data/clock
  **/
-STATIC s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
+STATIC void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
 {
 	s32 i;
 	bool bit = 0;
@@ -3483,8 +3481,6 @@ STATIC s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
 		e1000_clock_in_i2c_bit(hw, &bit);
 		*data |= bit << i;
 	}
-
-	return E1000_SUCCESS;
 }
 
 /**
@@ -3573,7 +3569,7 @@ STATIC s32 e1000_get_i2c_ack(struct e1000_hw *hw)
  *
  *  Clocks in one bit via I2C data/clock
  **/
-STATIC s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
+STATIC void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
 {
 	u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
 
@@ -3591,8 +3587,6 @@ STATIC s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
 
 	/* Minimum low period of clock is 4.7 us */
 	usec_delay(E1000_I2C_T_LOW);
-
-	return E1000_SUCCESS;
 }
 
 /**
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 19/70] net/e1000/base: improve coding style
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (17 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 18/70] net/e1000/base: modify klockwork about unused return values Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 20/70] net/e1000/base: modify HW level time sync mechanisms Guinan Sun
                   ` (52 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun

fix typo in piece of code of NVM access for SPT.
And cleans up the remaining instances in the shared code where it was
not adhering to the Linux code standard.

Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i210.c    |  4 ++--
 drivers/net/e1000/base/e1000_ich8lan.c | 32 ++++++++++++++------------
 drivers/net/e1000/base/e1000_nvm.c     |  2 +-
 3 files changed, 20 insertions(+), 18 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index b13730d84..c00161456 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -397,9 +397,9 @@ STATIC s32 e1000_read_invm_i210(struct e1000_hw *hw, u16 offset,
 	switch (offset) {
 	case NVM_MAC_ADDR:
 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, &data[0]);
-		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+1,
+		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 1,
 						     &data[1]);
-		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+2,
+		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 2,
 						     &data[2]);
 		if (ret_val != E1000_SUCCESS)
 			DEBUGOUT("MAC Addr not found in iNVM\n");
diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 1666826cc..0dba29fce 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -3477,8 +3477,9 @@ STATIC s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
 
 	for (i = 0; i < words; i += 2) {
 		if (words - i == 1) {
-			if (dev_spec->shadow_ram[offset+i].modified) {
-				data[i] = dev_spec->shadow_ram[offset+i].value;
+			if (dev_spec->shadow_ram[offset + i].modified) {
+				data[i] =
+				    dev_spec->shadow_ram[offset + i].value;
 			} else {
 				offset_to_read = act_offset + i -
 						 ((act_offset + i) % 2);
@@ -3495,8 +3496,8 @@ STATIC s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
 			}
 		} else {
 			offset_to_read = act_offset + i;
-			if (!(dev_spec->shadow_ram[offset+i].modified) ||
-			    !(dev_spec->shadow_ram[offset+i+1].modified)) {
+			if (!(dev_spec->shadow_ram[offset + i].modified) ||
+			    !(dev_spec->shadow_ram[offset + i + 1].modified)) {
 				ret_val =
 				   e1000_read_flash_dword_ich8lan(hw,
 								 offset_to_read,
@@ -3504,15 +3505,16 @@ STATIC s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
 				if (ret_val)
 					break;
 			}
-			if (dev_spec->shadow_ram[offset+i].modified)
-				data[i] = dev_spec->shadow_ram[offset+i].value;
+			if (dev_spec->shadow_ram[offset + i].modified)
+				data[i] =
+				    dev_spec->shadow_ram[offset + i].value;
 			else
-				data[i] = (u16) (dword & 0xFFFF);
-			if (dev_spec->shadow_ram[offset+i].modified)
-				data[i+1] =
-				   dev_spec->shadow_ram[offset+i+1].value;
+				data[i] = (u16)(dword & 0xFFFF);
+			if (dev_spec->shadow_ram[offset + i + 1].modified)
+				data[i + 1] =
+				   dev_spec->shadow_ram[offset + i + 1].value;
 			else
-				data[i+1] = (u16) (dword >> 16 & 0xFFFF);
+				data[i + 1] = (u16)(dword >> 16 & 0xFFFF);
 		}
 	}
 
@@ -3566,8 +3568,8 @@ STATIC s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
 
 	ret_val = E1000_SUCCESS;
 	for (i = 0; i < words; i++) {
-		if (dev_spec->shadow_ram[offset+i].modified) {
-			data[i] = dev_spec->shadow_ram[offset+i].value;
+		if (dev_spec->shadow_ram[offset + i].modified) {
+			data[i] = dev_spec->shadow_ram[offset + i].value;
 		} else {
 			ret_val = e1000_read_flash_word_ich8lan(hw,
 								act_offset + i,
@@ -3972,8 +3974,8 @@ STATIC s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
 	nvm->ops.acquire(hw);
 
 	for (i = 0; i < words; i++) {
-		dev_spec->shadow_ram[offset+i].modified = true;
-		dev_spec->shadow_ram[offset+i].value = data[i];
+		dev_spec->shadow_ram[offset + i].modified = true;
+		dev_spec->shadow_ram[offset + i].value = data[i];
 	}
 
 	nvm->ops.release(hw);
diff --git a/drivers/net/e1000/base/e1000_nvm.c b/drivers/net/e1000/base/e1000_nvm.c
index d1ea071bb..93d10ebb3 100644
--- a/drivers/net/e1000/base/e1000_nvm.c
+++ b/drivers/net/e1000/base/e1000_nvm.c
@@ -551,7 +551,7 @@ s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 	}
 
 	for (i = 0; i < words; i++) {
-		eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
+		eerd = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) +
 		       E1000_NVM_RW_REG_START;
 
 		E1000_WRITE_REG(hw, E1000_EERD, eerd);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 20/70] net/e1000/base: modify HW level time sync mechanisms
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (18 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 19/70] net/e1000/base: improve coding style Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 21/70] net/e1000/base: modify description Guinan Sun
                   ` (51 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Efimov Evgeny

Add additinal configuration space access to allow HW
level time sync mechanism.

Signed-off-by: Efimov Evgeny <evgeny.efimov@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.c | 18 ++++++++++++++++++
 drivers/net/e1000/base/e1000_ich8lan.h |  2 +-
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 0dba29fce..2e2cf0d25 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -4894,6 +4894,7 @@ STATIC s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
 	u16 kum_cfg;
 	u32 ctrl, reg;
 	s32 ret_val;
+	u16 pci_cfg;
 
 	DEBUGFUNC("e1000_reset_hw_ich8lan");
 
@@ -4954,11 +4955,28 @@ STATIC s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
 			e1000_gate_hw_phy_config_ich8lan(hw, true);
 	}
 	ret_val = e1000_acquire_swflag_ich8lan(hw);
+
+	/* Read from EXTCNF_CTRL in e1000_acquire_swflag_ich8lan function
+	 * may occur during global reset and cause system hang.
+	 * Configuration space access creates the needed delay.
+	 * Write to E1000_STRAP RO register E1000_PCI_VENDOR_ID_REGISTER value
+	 * insures configuration space read is done before global reset.
+	 */
+	e1000_read_pci_cfg(hw, E1000_PCI_VENDOR_ID_REGISTER, &pci_cfg);
+	E1000_WRITE_REG(hw, E1000_STRAP, pci_cfg);
 	DEBUGOUT("Issuing a global reset to ich8lan\n");
 	E1000_WRITE_REG(hw, E1000_CTRL, (ctrl | E1000_CTRL_RST));
 	/* cannot issue a flush here because it hangs the hardware */
 	msec_delay(20);
 
+	/* Configuration space access improve HW level time sync mechanism.
+	 * Write to E1000_STRAP RO register E1000_PCI_VENDOR_ID_REGISTER
+	 * value to insure configuration space read is done
+	 * before any access to mac register.
+	 */
+	e1000_read_pci_cfg(hw, E1000_PCI_VENDOR_ID_REGISTER, &pci_cfg);
+	E1000_WRITE_REG(hw, E1000_STRAP, pci_cfg);
+
 	/* Set Phy Config Counter to 50msec */
 	if (hw->mac.type == e1000_pch2lan) {
 		reg = E1000_READ_REG(hw, E1000_FEXTNVM3);
diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/base/e1000_ich8lan.h
index 9c21396c3..7f6cbdc0e 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.h
+++ b/drivers/net/e1000/base/e1000_ich8lan.h
@@ -286,7 +286,7 @@
 
 /* Receive Address Initial CRC Calculation */
 #define E1000_PCH_RAICC(_n)	(0x05F50 + ((_n) * 4))
-
+#define E1000_PCI_VENDOR_ID_REGISTER	0x00
 #if defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT)
 #define E1000_PCI_REVISION_ID_REG	0x08
 #endif /* defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT) */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 21/70] net/e1000/base: modify description
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (19 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 20/70] net/e1000/base: modify HW level time sync mechanisms Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 22/70] net/e1000/base: add EEE support for i225 Guinan Sun
                   ` (50 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Lifshits Vitaly

Wrong description was found in the mentioned file,
so fix them.

Signed-off-by: Lifshits Vitaly <vitaly.lifshits@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_80003es2lan.c | 1 -
 drivers/net/e1000/base/e1000_ich8lan.c     | 6 ++++--
 drivers/net/e1000/base/e1000_phy.c         | 3 +++
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_80003es2lan.c b/drivers/net/e1000/base/e1000_80003es2lan.c
index bcfda9415..b795491c0 100644
--- a/drivers/net/e1000/base/e1000_80003es2lan.c
+++ b/drivers/net/e1000/base/e1000_80003es2lan.c
@@ -1210,7 +1210,6 @@ STATIC s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw)
 /**
  *  e1000_cfg_on_link_up_80003es2lan - es2 link configuration after link-up
  *  @hw: pointer to the HW structure
- *  @duplex: current duplex setting
  *
  *  Configure the KMRN interface by applying last minute quirks for
  *  10/100 operation.
diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 2e2cf0d25..1dc29553e 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -822,7 +822,7 @@ STATIC s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 /**
  *  __e1000_access_emi_reg_locked - Read/write EMI register
  *  @hw: pointer to the HW structure
- *  @addr: EMI address to program
+ *  @address: EMI address to program
  *  @data: pointer to value to read/write from/to the EMI address
  *  @read: boolean flag to indicate read or write
  *
@@ -2399,7 +2399,7 @@ STATIC s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)
 /**
  *  e1000_configure_k1_ich8lan - Configure K1 power state
  *  @hw: pointer to the HW structure
- *  @enable: K1 state to configure
+ *  @k1_enable: K1 state to configure
  *
  *  Configure the K1 power state based on the provided parameter.
  *  Assumes semaphore already acquired.
@@ -2547,6 +2547,7 @@ STATIC s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw)
 /**
  *  e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be
  *  done after every PHY reset.
+ *  @hw: pointer to the HW structure
  **/
 STATIC s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
 {
@@ -2873,6 +2874,7 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable)
 /**
  *  e1000_lv_phy_workarounds_ich8lan - A series of Phy workarounds to be
  *  done after every PHY reset.
+ *  @hw: pointer to the HW structure
  **/
 STATIC s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw)
 {
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index c9bb0d4a9..73e2ecda8 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -3117,6 +3117,7 @@ s32 e1000_determine_phy_address(struct e1000_hw *hw)
 /**
  *  e1000_get_phy_addr_for_bm_page - Retrieve PHY page address
  *  @page: page to access
+ *  @reg: register to access
  *
  *  Returns the phy address for the page requested.
  **/
@@ -3554,6 +3555,7 @@ void e1000_power_down_phy_copper(struct e1000_hw *hw)
  *  @offset: register offset to be read
  *  @data: pointer to the read data
  *  @locked: semaphore has already been acquired or not
+ *  @page_set: BM_WUC_PAGE already set and access enabled
  *
  *  Acquires semaphore, if necessary, then reads the PHY register at offset
  *  and stores the retrieved information in data.  Release any acquired
@@ -3664,6 +3666,7 @@ s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data)
  *  @offset: register offset to write to
  *  @data: data to write at register offset
  *  @locked: semaphore has already been acquired or not
+ *  @page_set: BM_WUC_PAGE already set and access enabled
  *
  *  Acquires semaphore, if necessary, then writes the data to PHY register
  *  at the offset.  Release any acquired semaphores before exiting.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 22/70] net/e1000/base: add EEE support for i225
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (20 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 21/70] net/e1000/base: modify description Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 23/70] net/e1000/base: remove duplicated codes from 82575 Guinan Sun
                   ` (49 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Lotem Leder

This patch adds function e1000_set_eee_i225 which
support EEE advertisement for 2.5G.

Signed-off-by: Lotem Leder <lotem.leder@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h |  1 +
 drivers/net/e1000/base/e1000_i225.c    | 70 ++++++++++++++++++++++++++
 2 files changed, 71 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 141cdcc60..03006cd6e 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -821,6 +821,7 @@
 #define E1000_THSTAT_LINK_THROTTLE	0x00000002 /* Link Spd Throttle Event */
 
 /* I350 EEE defines */
+#define E1000_IPCNFG_EEE_2_5G_AN	0x00000010 /* IPCNFG EEE Ena 2.5G AN */
 #define E1000_IPCNFG_EEE_1G_AN		0x00000008 /* IPCNFG EEE Ena 1G AN */
 #define E1000_IPCNFG_EEE_100M_AN	0x00000004 /* IPCNFG EEE Ena 100M AN */
 #define E1000_EEER_TX_LPI_EN		0x00010000 /* EEER Tx LPI Enable */
diff --git a/drivers/net/e1000/base/e1000_i225.c b/drivers/net/e1000/base/e1000_i225.c
index dbebb6fa3..87ccf6d9c 100644
--- a/drivers/net/e1000/base/e1000_i225.c
+++ b/drivers/net/e1000/base/e1000_i225.c
@@ -1205,3 +1205,73 @@ s32 e1000_set_d3_lplu_state_i225(struct e1000_hw *hw, bool active)
 	E1000_WRITE_REG(hw, E1000_I225_PHPM, data);
 	return E1000_SUCCESS;
 }
+
+
+/**
+ *  e1000_set_eee_i225 - Enable/disable EEE support
+ *  @hw: pointer to the HW structure
+ *  @adv2p5G: boolean flag enabling 2.5G EEE advertisement
+ *  @adv1G: boolean flag enabling 1G EEE advertisement
+ *  @adv100M: boolean flag enabling 100M EEE advertisement
+ *
+ *  Enable/disable EEE based on setting in dev_spec structure.
+ *
+ **/
+s32 e1000_set_eee_i225(struct e1000_hw *hw, bool adv2p5G, bool adv1G,
+		       bool adv100M)
+{
+	u32 ipcnfg, eeer;
+
+	DEBUGFUNC("e1000_set_eee_i225");
+
+	if (hw->mac.type != e1000_i225 ||
+	    hw->phy.media_type != e1000_media_type_copper)
+		goto out;
+	ipcnfg = E1000_READ_REG(hw, E1000_IPCNFG);
+	eeer = E1000_READ_REG(hw, E1000_EEER);
+
+	/* enable or disable per user setting */
+	if (!(hw->dev_spec._82575.eee_disable)) {
+		u32 eee_su = E1000_READ_REG(hw, E1000_EEE_SU);
+
+		if (adv100M)
+			ipcnfg |= E1000_IPCNFG_EEE_100M_AN;
+		else
+			ipcnfg &= ~E1000_IPCNFG_EEE_100M_AN;
+
+		if (adv1G)
+			ipcnfg |= E1000_IPCNFG_EEE_1G_AN;
+		else
+			ipcnfg &= ~E1000_IPCNFG_EEE_1G_AN;
+
+		if (adv2p5G)
+			ipcnfg |= E1000_IPCNFG_EEE_2_5G_AN;
+		else
+			ipcnfg &= ~E1000_IPCNFG_EEE_2_5G_AN;
+
+		eeer |= (E1000_EEER_TX_LPI_EN | E1000_EEER_RX_LPI_EN |
+			E1000_EEER_LPI_FC);
+
+#ifndef EXTERNAL_RELEASE
+		/*
+		 * This bit is supposed to be cleared by the NVM. However, older
+		 * NVMs may not have done this (Springville HW HSD #359296).
+		 */
+#endif /* EXTERNAL_RELEASE */
+		/* This bit should not be set in normal operation. */
+		if (eee_su & E1000_EEE_SU_LPI_CLK_STP)
+			DEBUGOUT("LPI Clock Stop Bit should not be set!\n");
+	} else {
+		ipcnfg &= ~(E1000_IPCNFG_EEE_2_5G_AN | E1000_IPCNFG_EEE_1G_AN |
+			E1000_IPCNFG_EEE_100M_AN);
+		eeer &= ~(E1000_EEER_TX_LPI_EN | E1000_EEER_RX_LPI_EN |
+			E1000_EEER_LPI_FC);
+	}
+	E1000_WRITE_REG(hw, E1000_IPCNFG, ipcnfg);
+	E1000_WRITE_REG(hw, E1000_EEER, eeer);
+	E1000_READ_REG(hw, E1000_IPCNFG);
+	E1000_READ_REG(hw, E1000_EEER);
+out:
+
+	return E1000_SUCCESS;
+}
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 23/70] net/e1000/base: remove duplicated codes from 82575
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (21 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 22/70] net/e1000/base: add EEE support for i225 Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 24/70] net/e1000/base: add info structure Guinan Sun
                   ` (48 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher, Sasha Neftin

These files will improve e1000_82575 codes.
Remove the code duplication from e1000_82575 files.
Remove the licenses.
Clean family specific functions from base.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/Makefile           |   1 +
 drivers/net/e1000/base/e1000_82575.c | 493 +++++++++------------------
 drivers/net/e1000/base/e1000_82575.h | 107 +-----
 drivers/net/e1000/base/e1000_base.c  | 191 +++++++++++
 drivers/net/e1000/base/e1000_base.h  | 127 +++++++
 drivers/net/e1000/base/e1000_hw.h    |   1 +
 drivers/net/e1000/base/e1000_i210.c  |   2 +-
 drivers/net/e1000/base/e1000_i225.c  |   2 +-
 drivers/net/e1000/base/meson.build   |   1 +
 drivers/net/e1000/igb_rxtx.c         |   2 +-
 10 files changed, 489 insertions(+), 438 deletions(-)
 create mode 100644 drivers/net/e1000/base/e1000_base.c
 create mode 100644 drivers/net/e1000/base/e1000_base.h

diff --git a/drivers/net/e1000/Makefile b/drivers/net/e1000/Makefile
index 82e156ecb..b7f749454 100644
--- a/drivers/net/e1000/Makefile
+++ b/drivers/net/e1000/Makefile
@@ -60,6 +60,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_82575.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_i210.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_i225.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_api.c
+SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_base.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_ich8lan.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_logs.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_mac.c
diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 49c065014..b392d1f2a 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -18,8 +18,6 @@
 
 STATIC s32  e1000_init_phy_params_82575(struct e1000_hw *hw);
 STATIC s32  e1000_init_mac_params_82575(struct e1000_hw *hw);
-STATIC s32  e1000_acquire_phy_82575(struct e1000_hw *hw);
-STATIC void e1000_release_phy_82575(struct e1000_hw *hw);
 STATIC s32  e1000_acquire_nvm_82575(struct e1000_hw *hw);
 STATIC void e1000_release_nvm_82575(struct e1000_hw *hw);
 STATIC s32  e1000_check_for_link_82575(struct e1000_hw *hw);
@@ -31,6 +29,7 @@ STATIC s32  e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw);
 STATIC s32  e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
 					   u16 *data);
 STATIC s32  e1000_reset_hw_82575(struct e1000_hw *hw);
+STATIC s32 e1000_init_hw_82575(struct e1000_hw *hw);
 STATIC s32  e1000_reset_hw_82580(struct e1000_hw *hw);
 STATIC s32  e1000_read_phy_reg_82580(struct e1000_hw *hw,
 				     u32 offset, u16 *data);
@@ -56,10 +55,8 @@ STATIC s32  e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw,
 STATIC s32  e1000_get_phy_id_82575(struct e1000_hw *hw);
 STATIC void e1000_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask);
 STATIC bool e1000_sgmii_active_82575(struct e1000_hw *hw);
-STATIC s32  e1000_reset_init_script_82575(struct e1000_hw *hw);
 STATIC s32  e1000_read_mac_addr_82575(struct e1000_hw *hw);
 STATIC void e1000_config_collision_dist_82575(struct e1000_hw *hw);
-STATIC void e1000_power_down_phy_copper_82575(struct e1000_hw *hw);
 STATIC void e1000_shutdown_serdes_link_82575(struct e1000_hw *hw);
 STATIC void e1000_power_up_serdes_link_82575(struct e1000_hw *hw);
 STATIC s32 e1000_set_pcie_completion_timeout(struct e1000_hw *hw);
@@ -128,8 +125,8 @@ STATIC bool e1000_sgmii_uses_mdio_82575(struct e1000_hw *hw)
 }
 
 /**
- *  e1000_init_phy_params_82575 - Init PHY func ptrs.
- *  @hw: pointer to the HW structure
+ * e1000_init_phy_params_82575 - Initialize PHY function ptrs
+ * @hw: pointer to the HW structure
  **/
 STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
 {
@@ -147,17 +144,17 @@ STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
 		goto out;
 	}
 
-	phy->ops.power_up   = e1000_power_up_phy_copper;
-	phy->ops.power_down = e1000_power_down_phy_copper_82575;
+	phy->ops.power_up	= e1000_power_up_phy_copper;
+	phy->ops.power_down	= e1000_power_down_phy_copper_base;
 
 	phy->autoneg_mask	= AUTONEG_ADVERTISE_SPEED_DEFAULT;
 	phy->reset_delay_us	= 100;
 
-	phy->ops.acquire	= e1000_acquire_phy_82575;
+	phy->ops.acquire	= e1000_acquire_phy_base;
 	phy->ops.check_reset_block = e1000_check_reset_block_generic;
 	phy->ops.commit		= e1000_phy_sw_reset_generic;
 	phy->ops.get_cfg_done	= e1000_get_cfg_done_82575;
-	phy->ops.release	= e1000_release_phy_82575;
+	phy->ops.release	= e1000_release_phy_base;
 
 	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
 
@@ -204,76 +201,38 @@ STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
 	case I347AT4_E_PHY_ID:
 	case M88E1112_E_PHY_ID:
 	case M88E1340M_E_PHY_ID:
+		phy->type		= e1000_phy_m88;
+		phy->ops.check_polarity	= e1000_check_polarity_m88;
+		phy->ops.get_info	= e1000_get_phy_info_m88;
+		phy->ops.get_cable_length = e1000_get_cable_length_m88_gen2;
+		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
+		break;
 	case M88E1111_I_PHY_ID:
 		phy->type		= e1000_phy_m88;
 		phy->ops.check_polarity	= e1000_check_polarity_m88;
 		phy->ops.get_info	= e1000_get_phy_info_m88;
-		if (phy->id == I347AT4_E_PHY_ID ||
-		    phy->id == M88E1112_E_PHY_ID ||
-		    phy->id == M88E1340M_E_PHY_ID)
-			phy->ops.get_cable_length =
-					 e1000_get_cable_length_m88_gen2;
-		else if (phy->id == M88E1543_E_PHY_ID ||
-			 phy->id == M88E1512_E_PHY_ID)
-			phy->ops.get_cable_length =
-					 e1000_get_cable_length_m88_gen2;
-		else
-			phy->ops.get_cable_length = e1000_get_cable_length_m88;
+		phy->ops.get_cable_length = e1000_get_cable_length_m88;
 		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
-		/* Check if this PHY is confgured for media swap. */
-		if (phy->id == M88E1112_E_PHY_ID) {
-			u16 data;
-
-			ret_val = phy->ops.write_reg(hw,
-						     E1000_M88E1112_PAGE_ADDR,
-						     2);
-			if (ret_val)
-				goto out;
-
-			ret_val = phy->ops.read_reg(hw,
-						    E1000_M88E1112_MAC_CTRL_1,
-						    &data);
-			if (ret_val)
-				goto out;
-
-			data = (data & E1000_M88E1112_MAC_CTRL_1_MODE_MASK) >>
-			       E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT;
-			if (data == E1000_M88E1112_AUTO_COPPER_SGMII ||
-			    data == E1000_M88E1112_AUTO_COPPER_BASEX)
-				hw->mac.ops.check_for_link =
-						e1000_check_for_link_media_swap;
-		}
-		if (phy->id == M88E1512_E_PHY_ID) {
-			ret_val = e1000_initialize_M88E1512_phy(hw);
-			if (ret_val)
-				goto out;
-		}
-		if (phy->id == M88E1543_E_PHY_ID) {
-			ret_val = e1000_initialize_M88E1543_phy(hw);
-			if (ret_val)
-				goto out;
-		}
 		break;
 	case IGP03E1000_E_PHY_ID:
 	case IGP04E1000_E_PHY_ID:
-		phy->type = e1000_phy_igp_3;
-		phy->ops.check_polarity = e1000_check_polarity_igp;
-		phy->ops.get_info = e1000_get_phy_info_igp;
+		phy->type		= e1000_phy_igp_3;
+		phy->ops.check_polarity	= e1000_check_polarity_igp;
+		phy->ops.get_info	= e1000_get_phy_info_igp;
 		phy->ops.get_cable_length = e1000_get_cable_length_igp_2;
-		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp;
 		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82575;
 		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
+		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp;
 		break;
 	case I82580_I_PHY_ID:
 	case I350_I_PHY_ID:
-		phy->type = e1000_phy_82580;
-		phy->ops.check_polarity = e1000_check_polarity_82577;
-		phy->ops.force_speed_duplex =
-					 e1000_phy_force_speed_duplex_82577;
+		phy->type		= e1000_phy_82580;
+		phy->ops.check_polarity	= e1000_check_polarity_82577;
+		phy->ops.get_info	= e1000_get_phy_info_82577;
 		phy->ops.get_cable_length = e1000_get_cable_length_82577;
-		phy->ops.get_info = e1000_get_phy_info_82577;
 		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82580;
 		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82580;
+		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_82577;
 		break;
 	case I210_I_PHY_ID:
 		phy->type		= e1000_phy_i210;
@@ -292,98 +251,50 @@ STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
 		goto out;
 	}
 
-out:
-	return ret_val;
-}
-
-/**
- *  e1000_init_nvm_params_82575 - Init NVM func ptrs.
- *  @hw: pointer to the HW structure
- **/
-s32 e1000_init_nvm_params_82575(struct e1000_hw *hw)
-{
-	struct e1000_nvm_info *nvm = &hw->nvm;
-	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
-	u16 size;
-
-	DEBUGFUNC("e1000_init_nvm_params_82575");
-
-	size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
-		     E1000_EECD_SIZE_EX_SHIFT);
-	/*
-	 * Added to a constant, "size" becomes the left-shift value
-	 * for setting word_size.
-	 */
-	size += NVM_WORD_SIZE_BASE_SHIFT;
-
-	/* Just in case size is out of range, cap it to the largest
-	 * EEPROM size supported
-	 */
-	if (size > 15)
-		size = 15;
-
-	nvm->word_size = 1 << size;
-	if (hw->mac.type < e1000_i210) {
-		nvm->opcode_bits = 8;
-		nvm->delay_usec = 1;
+	/* Check if this PHY is configured for media swap. */
+	switch (phy->id) {
+	case M88E1112_E_PHY_ID:
+	{
+		u16 data;
 
-		switch (nvm->override) {
-		case e1000_nvm_override_spi_large:
-			nvm->page_size = 32;
-			nvm->address_bits = 16;
-			break;
-		case e1000_nvm_override_spi_small:
-			nvm->page_size = 8;
-			nvm->address_bits = 8;
-			break;
-		default:
-			nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
-			nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
-					    16 : 8;
-			break;
-		}
-		if (nvm->word_size == (1 << 15))
-			nvm->page_size = 128;
+		ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 2);
+		if (ret_val)
+			goto out;
+		ret_val = phy->ops.read_reg(hw, E1000_M88E1112_MAC_CTRL_1,
+					    &data);
+		if (ret_val)
+			goto out;
 
-		nvm->type = e1000_nvm_eeprom_spi;
-	} else {
-		nvm->type = e1000_nvm_flash_hw;
+		data = (data & E1000_M88E1112_MAC_CTRL_1_MODE_MASK) >>
+			E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT;
+		if (data == E1000_M88E1112_AUTO_COPPER_SGMII ||
+		    data == E1000_M88E1112_AUTO_COPPER_BASEX)
+			hw->mac.ops.check_for_link =
+						e1000_check_for_link_media_swap;
+		break;
 	}
-
-	/* Function Pointers */
-	nvm->ops.acquire = e1000_acquire_nvm_82575;
-	nvm->ops.release = e1000_release_nvm_82575;
-	if (nvm->word_size < (1 << 15))
-		nvm->ops.read = e1000_read_nvm_eerd;
-	else
-		nvm->ops.read = e1000_read_nvm_spi;
-
-	nvm->ops.write = e1000_write_nvm_spi;
-	nvm->ops.validate = e1000_validate_nvm_checksum_generic;
-	nvm->ops.update = e1000_update_nvm_checksum_generic;
-	nvm->ops.valid_led_default = e1000_valid_led_default_82575;
-
-	/* override generic family function pointers for specific descendants */
-	switch (hw->mac.type) {
-	case e1000_82580:
-		nvm->ops.validate = e1000_validate_nvm_checksum_82580;
-		nvm->ops.update = e1000_update_nvm_checksum_82580;
+	case M88E1512_E_PHY_ID:
+	{
+		ret_val = e1000_initialize_M88E1512_phy(hw);
 		break;
-	case e1000_i350:
-	case e1000_i354:
-		nvm->ops.validate = e1000_validate_nvm_checksum_i350;
-		nvm->ops.update = e1000_update_nvm_checksum_i350;
+	}
+	case M88E1543_E_PHY_ID:
+	{
+		ret_val = e1000_initialize_M88E1543_phy(hw);
 		break;
+	}
 	default:
-		break;
+		goto out;
 	}
 
-	return E1000_SUCCESS;
+out:
+	return ret_val;
 }
 
+
 /**
- *  e1000_init_mac_params_82575 - Init MAC func ptrs.
- *  @hw: pointer to the HW structure
+ * e1000_init_mac_params_82575 - Initialize MAC function ptrs
+ * @hw: pointer to the HW structure
  **/
 STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 {
@@ -392,13 +303,16 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 
 	DEBUGFUNC("e1000_init_mac_params_82575");
 
+	/* Initialize function pointer */
+	e1000_init_mac_ops_generic(hw);
+
 	/* Derives media type */
 	e1000_get_media_type_82575(hw);
-	/* Set mta register count */
+	/* Set MTA register count */
 	mac->mta_reg_count = 128;
-	/* Set uta register count */
+	/* Set UTA register count */
 	mac->uta_reg_count = (hw->mac.type == e1000_82575) ? 0 : 128;
-	/* Set rar entry count */
+	/* Set RAR entry count */
 	mac->rar_entry_count = E1000_RAR_ENTRIES_82575;
 	if (mac->type == e1000_82576)
 		mac->rar_entry_count = E1000_RAR_ENTRIES_82576;
@@ -432,16 +346,11 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 		mac->ops.reset_hw = e1000_reset_hw_82580;
 	else
 		mac->ops.reset_hw = e1000_reset_hw_82575;
-	/* hw initialization */
+	/* HW initialization */
 	if (mac->type == e1000_i210 || mac->type == e1000_i211)
 		mac->ops.init_hw = e1000_init_hw_i210;
 	else
-#ifndef NO_I225_SUPPORT
-	if (mac->type == e1000_i225)
-		mac->ops.init_hw = e1000_init_hw_i225;
-	else
-#endif /* NO_I225_SUPPORT */
-	mac->ops.init_hw = e1000_init_hw_82575;
+		mac->ops.init_hw = e1000_init_hw_82575;
 	/* link setup */
 	mac->ops.setup_link = e1000_setup_link_generic;
 	/* physical interface link setup */
@@ -473,7 +382,7 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	}
 	if (hw->mac.type >= e1000_82580)
 		mac->ops.validate_mdi_setting =
-				e1000_validate_mdi_setting_crossover_generic;
+			e1000_validate_mdi_setting_crossover_generic;
 	/* ID LED init */
 	mac->ops.id_led_init = e1000_id_led_init_generic;
 	/* blink LED */
@@ -491,18 +400,13 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	mac->ops.get_link_up_info = e1000_get_link_up_info_82575;
 	/* acquire SW_FW sync */
 	mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_82575;
+	/* release SW_FW sync */
 	mac->ops.release_swfw_sync = e1000_release_swfw_sync_82575;
 	if (mac->type == e1000_i210 || mac->type == e1000_i211) {
 		mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_i210;
 		mac->ops.release_swfw_sync = e1000_release_swfw_sync_i210;
 	}
-#ifndef NO_I225_SUPPORT
-	if (mac->type >= e1000_i225) {
-		mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_i225;
-		mac->ops.release_swfw_sync = e1000_release_swfw_sync_i225;
-	}
 
-#endif /* NO_I225_SUPPORT */
 	/* set lan id for port to determine which phy lock to use */
 	hw->mac.ops.set_lan_id(hw);
 
@@ -510,63 +414,102 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 }
 
 /**
- *  e1000_init_function_pointers_82575 - Init func ptrs.
- *  @hw: pointer to the HW structure
- *
- *  Called to initialize all function pointers and parameters.
+ * e1000_init_nvm_params_82575 - Initialize NVM function ptrs
+ * @hw: pointer to the HW structure
  **/
-void e1000_init_function_pointers_82575(struct e1000_hw *hw)
+s32 e1000_init_nvm_params_82575(struct e1000_hw *hw)
 {
-	DEBUGFUNC("e1000_init_function_pointers_82575");
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+	u16 size;
 
-	hw->mac.ops.init_params = e1000_init_mac_params_82575;
-	hw->nvm.ops.init_params = e1000_init_nvm_params_82575;
-	hw->phy.ops.init_params = e1000_init_phy_params_82575;
-	hw->mbx.ops.init_params = e1000_init_mbx_params_pf;
-}
+	DEBUGFUNC("e1000_init_nvm_params_82575");
 
-/**
- *  e1000_acquire_phy_82575 - Acquire rights to access PHY
- *  @hw: pointer to the HW structure
- *
- *  Acquire access rights to the correct PHY.
- **/
-STATIC s32 e1000_acquire_phy_82575(struct e1000_hw *hw)
-{
-	u16 mask = E1000_SWFW_PHY0_SM;
+	size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
+		     E1000_EECD_SIZE_EX_SHIFT);
+	/* Added to a constant, "size" becomes the left-shift value
+	 * for setting word_size.
+	 */
+	size += NVM_WORD_SIZE_BASE_SHIFT;
+
+	/* Just in case size is out of range, cap it to the largest
+	 * EEPROM size supported
+	 */
+	if (size > 15)
+		size = 15;
 
-	DEBUGFUNC("e1000_acquire_phy_82575");
+	nvm->word_size = 1 << size;
+	if (hw->mac.type < e1000_i210) {
+		nvm->opcode_bits = 8;
+		nvm->delay_usec = 1;
 
-	if (hw->bus.func == E1000_FUNC_1)
-		mask = E1000_SWFW_PHY1_SM;
-	else if (hw->bus.func == E1000_FUNC_2)
-		mask = E1000_SWFW_PHY2_SM;
-	else if (hw->bus.func == E1000_FUNC_3)
-		mask = E1000_SWFW_PHY3_SM;
+		switch (nvm->override) {
+		case e1000_nvm_override_spi_large:
+			nvm->page_size = 32;
+			nvm->address_bits = 16;
+			break;
+		case e1000_nvm_override_spi_small:
+			nvm->page_size = 8;
+			nvm->address_bits = 8;
+			break;
+		default:
+			nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
+			nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
+					    16 : 8;
+			break;
+		}
+		if (nvm->word_size == (1 << 15))
+			nvm->page_size = 128;
+
+		nvm->type = e1000_nvm_eeprom_spi;
+	} else {
+		nvm->type = e1000_nvm_flash_hw;
+	}
+
+	/* Function Pointers */
+	nvm->ops.acquire = e1000_acquire_nvm_82575;
+	nvm->ops.release = e1000_release_nvm_82575;
+	if (nvm->word_size < (1 << 15))
+		nvm->ops.read = e1000_read_nvm_eerd;
+	else
+		nvm->ops.read = e1000_read_nvm_spi;
+
+	nvm->ops.write = e1000_write_nvm_spi;
+	nvm->ops.validate = e1000_validate_nvm_checksum_generic;
+	nvm->ops.update = e1000_update_nvm_checksum_generic;
+	nvm->ops.valid_led_default = e1000_valid_led_default_82575;
+
+	/* override generic family function pointers for specific descendants */
+	switch (hw->mac.type) {
+	case e1000_82580:
+		nvm->ops.validate = e1000_validate_nvm_checksum_82580;
+		nvm->ops.update = e1000_update_nvm_checksum_82580;
+		break;
+	case e1000_i350:
+		nvm->ops.validate = e1000_validate_nvm_checksum_i350;
+		nvm->ops.update = e1000_update_nvm_checksum_i350;
+		break;
+	default:
+		break;
+	}
 
-	return hw->mac.ops.acquire_swfw_sync(hw, mask);
+	return E1000_SUCCESS;
 }
 
 /**
- *  e1000_release_phy_82575 - Release rights to access PHY
+ *  e1000_init_function_pointers_82575 - Init func ptrs.
  *  @hw: pointer to the HW structure
  *
- *  A wrapper to release access rights to the correct PHY.
+ *  Called to initialize all function pointers and parameters.
  **/
-STATIC void e1000_release_phy_82575(struct e1000_hw *hw)
+void e1000_init_function_pointers_82575(struct e1000_hw *hw)
 {
-	u16 mask = E1000_SWFW_PHY0_SM;
-
-	DEBUGFUNC("e1000_release_phy_82575");
-
-	if (hw->bus.func == E1000_FUNC_1)
-		mask = E1000_SWFW_PHY1_SM;
-	else if (hw->bus.func == E1000_FUNC_2)
-		mask = E1000_SWFW_PHY2_SM;
-	else if (hw->bus.func == E1000_FUNC_3)
-		mask = E1000_SWFW_PHY3_SM;
+	DEBUGFUNC("e1000_init_function_pointers_82575");
 
-	hw->mac.ops.release_swfw_sync(hw, mask);
+	hw->mac.ops.init_params = e1000_init_mac_params_82575;
+	hw->nvm.ops.init_params = e1000_init_nvm_params_82575;
+	hw->phy.ops.init_params = e1000_init_phy_params_82575;
+	hw->mbx.ops.init_params = e1000_init_mbx_params_pf;
 }
 
 /**
@@ -1467,16 +1410,15 @@ STATIC s32 e1000_reset_hw_82575(struct e1000_hw *hw)
 }
 
 /**
- *  e1000_init_hw_82575 - Initialize hardware
- *  @hw: pointer to the HW structure
+ * e1000_init_hw_82575 - Initialize hardware
+ * @hw: pointer to the HW structure
  *
- *  This inits the hardware readying it for operation.
+ * This inits the hardware readying it for operation.
  **/
-s32 e1000_init_hw_82575(struct e1000_hw *hw)
+STATIC s32 e1000_init_hw_82575(struct e1000_hw *hw)
 {
 	struct e1000_mac_info *mac = &hw->mac;
 	s32 ret_val;
-	u16 i, rar_count = mac->rar_entry_count;
 
 	DEBUGFUNC("e1000_init_hw_82575");
 
@@ -1491,27 +1433,12 @@ s32 e1000_init_hw_82575(struct e1000_hw *hw)
 	DEBUGOUT("Initializing the IEEE VLAN\n");
 	mac->ops.clear_vfta(hw);
 
-	/* Setup the receive address */
-	e1000_init_rx_addrs_generic(hw, rar_count);
-
-	/* Zero out the Multicast HASH table */
-	DEBUGOUT("Zeroing the MTA\n");
-	for (i = 0; i < mac->mta_reg_count; i++)
-		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
-
-	/* Zero out the Unicast HASH table */
-	DEBUGOUT("Zeroing the UTA\n");
-	for (i = 0; i < mac->uta_reg_count; i++)
-		E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, 0);
-
-	/* Setup link and flow control */
-	ret_val = mac->ops.setup_link(hw);
+	ret_val = e1000_init_hw_base(hw);
 
 	/* Set the default MTU size */
 	hw->dev_spec._82575.mtu = 1500;
 
-	/*
-	 * Clear all of the statistics registers (clear on read).  It is
+	/* Clear all of the statistics registers (clear on read).  It is
 	 * important that we do this after we have tried to establish link
 	 * because the symbol error count will increment wildly if there
 	 * is no link.
@@ -1520,7 +1447,6 @@ s32 e1000_init_hw_82575(struct e1000_hw *hw)
 
 	return ret_val;
 }
-
 /**
  *  e1000_setup_copper_link_82575 - Configure copper link settings
  *  @hw: pointer to the HW structure
@@ -1531,9 +1457,9 @@ s32 e1000_init_hw_82575(struct e1000_hw *hw)
  **/
 STATIC s32 e1000_setup_copper_link_82575(struct e1000_hw *hw)
 {
-	u32 ctrl;
-	s32 ret_val;
 	u32 phpm_reg;
+	s32 ret_val;
+	u32 ctrl;
 
 	DEBUGFUNC("e1000_setup_copper_link_82575");
 
@@ -1572,14 +1498,21 @@ STATIC s32 e1000_setup_copper_link_82575(struct e1000_hw *hw)
 	}
 	switch (hw->phy.type) {
 	case e1000_phy_i210:
+	/* fall through */
 	case e1000_phy_m88:
 		switch (hw->phy.id) {
 		case I347AT4_E_PHY_ID:
+		/* fall through */
 		case M88E1112_E_PHY_ID:
+		/* fall through */
 		case M88E1340M_E_PHY_ID:
+		/* fall through */
 		case M88E1543_E_PHY_ID:
+		/* fall through */
 		case M88E1512_E_PHY_ID:
+		/* fall through */
 		case I210_I_PHY_ID:
+		/* fall through */
 			ret_val = e1000_copper_link_setup_m88_gen2(hw);
 			break;
 		default:
@@ -1593,8 +1526,6 @@ STATIC s32 e1000_setup_copper_link_82575(struct e1000_hw *hw)
 	case e1000_phy_82580:
 		ret_val = e1000_copper_link_setup_82577(hw);
 		break;
-	case e1000_phy_none:
-		break;
 	default:
 		ret_val = -E1000_ERR_PHY;
 		break;
@@ -1956,7 +1887,7 @@ STATIC bool e1000_sgmii_active_82575(struct e1000_hw *hw)
  *  Inits recommended HW defaults after a reset when there is no EEPROM
  *  detected. This is only for the 82575.
  **/
-STATIC s32 e1000_reset_init_script_82575(struct e1000_hw *hw)
+s32 e1000_reset_init_script_82575(struct e1000_hw *hw)
 {
 	DEBUGFUNC("e1000_reset_init_script_82575");
 
@@ -2034,27 +1965,6 @@ STATIC void e1000_config_collision_dist_82575(struct e1000_hw *hw)
 	E1000_WRITE_FLUSH(hw);
 }
 
-/**
- * e1000_power_down_phy_copper_82575 - Remove link during PHY power down
- * @hw: pointer to the HW structure
- *
- * In the case of a PHY power down to save power, or to turn off link during a
- * driver unload, or wake on lan is not enabled, remove the link.
- **/
-STATIC void e1000_power_down_phy_copper_82575(struct e1000_hw *hw)
-{
-	struct e1000_phy_info *phy = &hw->phy;
-
-	if (!(phy->ops.check_reset_block))
-		return;
-
-	/* If the management interface is not enabled, then power down */
-	if (!(e1000_enable_mng_pass_thru(hw) || phy->ops.check_reset_block(hw)))
-		e1000_power_down_phy_copper(hw);
-
-	return;
-}
-
 /**
  *  e1000_clear_hw_cntrs_82575 - Clear device specific hardware counters
  *  @hw: pointer to the HW structure
@@ -2120,85 +2030,6 @@ STATIC void e1000_clear_hw_cntrs_82575(struct e1000_hw *hw)
 		E1000_READ_REG(hw, E1000_SCVPC);
 }
 
-/**
- *  e1000_rx_fifo_flush_82575 - Clean rx fifo after Rx enable
- *  @hw: pointer to the HW structure
- *
- *  After Rx enable, if manageability is enabled then there is likely some
- *  bad data at the start of the fifo and possibly in the DMA fifo.  This
- *  function clears the fifos and flushes any packets that came in as rx was
- *  being enabled.
- **/
-void e1000_rx_fifo_flush_82575(struct e1000_hw *hw)
-{
-	u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled;
-	int i, ms_wait;
-
-	DEBUGFUNC("e1000_rx_fifo_flush_82575");
-
-	/* disable IPv6 options as per hardware errata */
-	rfctl = E1000_READ_REG(hw, E1000_RFCTL);
-	rfctl |= E1000_RFCTL_IPV6_EX_DIS;
-	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
-
-	if (hw->mac.type != e1000_82575 ||
-	    !(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_RCV_TCO_EN))
-		return;
-
-	/* Disable all Rx queues */
-	for (i = 0; i < 4; i++) {
-		rxdctl[i] = E1000_READ_REG(hw, E1000_RXDCTL(i));
-		E1000_WRITE_REG(hw, E1000_RXDCTL(i),
-				rxdctl[i] & ~E1000_RXDCTL_QUEUE_ENABLE);
-	}
-	/* Poll all queues to verify they have shut down */
-	for (ms_wait = 0; ms_wait < 10; ms_wait++) {
-		msec_delay(1);
-		rx_enabled = 0;
-		for (i = 0; i < 4; i++)
-			rx_enabled |= E1000_READ_REG(hw, E1000_RXDCTL(i));
-		if (!(rx_enabled & E1000_RXDCTL_QUEUE_ENABLE))
-			break;
-	}
-
-	if (ms_wait == 10)
-		DEBUGOUT("Queue disable timed out after 10ms\n");
-
-	/* Clear RLPML, RCTL.SBP, RFCTL.LEF, and set RCTL.LPE so that all
-	 * incoming packets are rejected.  Set enable and wait 2ms so that
-	 * any packet that was coming in as RCTL.EN was set is flushed
-	 */
-	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl & ~E1000_RFCTL_LEF);
-
-	rlpml = E1000_READ_REG(hw, E1000_RLPML);
-	E1000_WRITE_REG(hw, E1000_RLPML, 0);
-
-	rctl = E1000_READ_REG(hw, E1000_RCTL);
-	temp_rctl = rctl & ~(E1000_RCTL_EN | E1000_RCTL_SBP);
-	temp_rctl |= E1000_RCTL_LPE;
-
-	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl);
-	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl | E1000_RCTL_EN);
-	E1000_WRITE_FLUSH(hw);
-	msec_delay(2);
-
-	/* Enable Rx queues that were previously enabled and restore our
-	 * previous state
-	 */
-	for (i = 0; i < 4; i++)
-		E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl[i]);
-	E1000_WRITE_REG(hw, E1000_RCTL, rctl);
-	E1000_WRITE_FLUSH(hw);
-
-	E1000_WRITE_REG(hw, E1000_RLPML, rlpml);
-	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
-
-	/* Flush receive errors generated by workaround */
-	E1000_READ_REG(hw, E1000_ROC);
-	E1000_READ_REG(hw, E1000_RNBC);
-	E1000_READ_REG(hw, E1000_MPC);
-}
-
 /**
  *  e1000_set_pcie_completion_timeout - set pci-e completion timeout
  *  @hw: pointer to the HW structure
diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index 52dd7a9a1..25fc20ba8 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -93,11 +93,8 @@ struct e1000_adv_context_desc {
 #endif
 
 /* SRRCTL bit definitions */
-#define E1000_SRRCTL_BSIZEPKT_SHIFT		10 /* Shift _right_ */
 #define E1000_SRRCTL_BSIZEHDRSIZE_MASK		0x00000F00
-#define E1000_SRRCTL_BSIZEHDRSIZE_SHIFT		2  /* Shift _left_ */
 #define E1000_SRRCTL_DESCTYPE_LEGACY		0x00000000
-#define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF	0x02000000
 #define E1000_SRRCTL_DESCTYPE_HDR_SPLIT		0x04000000
 #define E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS	0x0A000000
 #define E1000_SRRCTL_DESCTYPE_HDR_REPLICATION	0x06000000
@@ -160,38 +157,6 @@ struct e1000_adv_context_desc {
 #define E1000_IMIREXT_CTRL_FIN	0x00040000  /* Check FIN bit in header */
 #define E1000_IMIREXT_CTRL_BP	0x00080000  /* Bypass check of ctrl bits */
 
-/* Receive Descriptor - Advanced */
-union e1000_adv_rx_desc {
-	struct {
-		__le64 pkt_addr; /* Packet buffer address */
-		__le64 hdr_addr; /* Header buffer address */
-	} read;
-	struct {
-		struct {
-			union {
-				__le32 data;
-				struct {
-					__le16 pkt_info; /*RSS type, Pkt type*/
-					/* Split Header, header buffer len */
-					__le16 hdr_info;
-				} hs_rss;
-			} lo_dword;
-			union {
-				__le32 rss; /* RSS Hash */
-				struct {
-					__le16 ip_id; /* IP id */
-					__le16 csum; /* Packet Checksum */
-				} csum_ip;
-			} hi_dword;
-		} lower;
-		struct {
-			__le32 status_error; /* ext status/error */
-			__le16 length; /* Packet length */
-			__le16 vlan; /* VLAN tag */
-		} upper;
-	} wb;  /* writeback */
-};
-
 #define E1000_RXDADV_RSSTYPE_MASK	0x0000000F
 #define E1000_RXDADV_RSSTYPE_SHIFT	12
 #define E1000_RXDADV_HDRBUFLEN_MASK	0x7FE0
@@ -248,77 +213,10 @@ union e1000_adv_rx_desc {
 #define E1000_RXDADV_IPSEC_ERROR_INVALID_LENGTH		0x10000000
 #define E1000_RXDADV_IPSEC_ERROR_AUTHENTICATION_FAILED	0x18000000
 
-/* Transmit Descriptor - Advanced */
-union e1000_adv_tx_desc {
-	struct {
-		__le64 buffer_addr;    /* Address of descriptor's data buf */
-		__le32 cmd_type_len;
-		__le32 olinfo_status;
-	} read;
-	struct {
-		__le64 rsvd;       /* Reserved */
-		__le32 nxtseq_seed;
-		__le32 status;
-	} wb;
-};
-
-/* Adv Transmit Descriptor Config Masks */
-#define E1000_ADVTXD_DTYP_CTXT	0x00200000 /* Advanced Context Descriptor */
-#define E1000_ADVTXD_DTYP_DATA	0x00300000 /* Advanced Data Descriptor */
-#define E1000_ADVTXD_DCMD_EOP	0x01000000 /* End of Packet */
-#define E1000_ADVTXD_DCMD_IFCS	0x02000000 /* Insert FCS (Ethernet CRC) */
-#define E1000_ADVTXD_DCMD_RS	0x08000000 /* Report Status */
-#define E1000_ADVTXD_DCMD_DDTYP_ISCSI	0x10000000 /* DDP hdr type or iSCSI */
-#define E1000_ADVTXD_DCMD_DEXT	0x20000000 /* Descriptor extension (1=Adv) */
-#define E1000_ADVTXD_DCMD_VLE	0x40000000 /* VLAN pkt enable */
-#define E1000_ADVTXD_DCMD_TSE	0x80000000 /* TCP Seg enable */
-#define E1000_ADVTXD_MAC_LINKSEC	0x00040000 /* Apply LinkSec on pkt */
-#define E1000_ADVTXD_MAC_TSTAMP		0x00080000 /* IEEE1588 Timestamp pkt */
-#define E1000_ADVTXD_STAT_SN_CRC	0x00000002 /* NXTSEQ/SEED prsnt in WB */
-#define E1000_ADVTXD_IDX_SHIFT		4  /* Adv desc Index shift */
-#define E1000_ADVTXD_POPTS_ISCO_1ST	0x00000000 /* 1st TSO of iSCSI PDU */
-#define E1000_ADVTXD_POPTS_ISCO_MDL	0x00000800 /* Middle TSO of iSCSI PDU */
-#define E1000_ADVTXD_POPTS_ISCO_LAST	0x00001000 /* Last TSO of iSCSI PDU */
-/* 1st & Last TSO-full iSCSI PDU*/
-#define E1000_ADVTXD_POPTS_ISCO_FULL	0x00001800
-#define E1000_ADVTXD_POPTS_IPSEC	0x00000400 /* IPSec offload request */
-#define E1000_ADVTXD_PAYLEN_SHIFT	14 /* Adv desc PAYLEN shift */
-
-/* Context descriptors */
-struct e1000_adv_tx_context_desc {
-	__le32 vlan_macip_lens;
-	__le32 seqnum_seed;
-	__le32 type_tucmd_mlhl;
-	__le32 mss_l4len_idx;
-};
-
-#define E1000_ADVTXD_MACLEN_SHIFT	9  /* Adv ctxt desc mac len shift */
-#define E1000_ADVTXD_VLAN_SHIFT		16  /* Adv ctxt vlan tag shift */
-#define E1000_ADVTXD_TUCMD_IPV4		0x00000400  /* IP Packet Type: 1=IPv4 */
-#define E1000_ADVTXD_TUCMD_IPV6		0x00000000  /* IP Packet Type: 0=IPv6 */
-#define E1000_ADVTXD_TUCMD_L4T_UDP	0x00000000  /* L4 Packet TYPE of UDP */
-#define E1000_ADVTXD_TUCMD_L4T_TCP	0x00000800  /* L4 Packet TYPE of TCP */
-#define E1000_ADVTXD_TUCMD_L4T_SCTP	0x00001000  /* L4 Packet TYPE of SCTP */
-#define E1000_ADVTXD_TUCMD_IPSEC_TYPE_ESP	0x00002000 /* IPSec Type ESP */
-/* IPSec Encrypt Enable for ESP */
-#define E1000_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN	0x00004000
-/* Req requires Markers and CRC */
-#define E1000_ADVTXD_TUCMD_MKRREQ	0x00002000
-#define E1000_ADVTXD_L4LEN_SHIFT	8  /* Adv ctxt L4LEN shift */
-#define E1000_ADVTXD_MSS_SHIFT		16  /* Adv ctxt MSS shift */
-/* Adv ctxt IPSec SA IDX mask */
-#define E1000_ADVTXD_IPSEC_SA_INDEX_MASK	0x000000FF
-/* Adv ctxt IPSec ESP len mask */
-#define E1000_ADVTXD_IPSEC_ESP_LEN_MASK		0x000000FF
-
-/* Additional Transmit Descriptor Control definitions */
-#define E1000_TXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Tx Queue */
 #define E1000_TXDCTL_SWFLSH		0x04000000 /* Tx Desc. wbk flushing */
 /* Tx Queue Arbitration Priority 0=low, 1=high */
 #define E1000_TXDCTL_PRIORITY		0x08000000
 
-/* Additional Receive Descriptor Control definitions */
-#define E1000_RXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Rx Queue */
 #define E1000_RXDCTL_SWFLSH		0x04000000 /* Rx Desc. wbk flushing */
 
 /* Direct Cache Access (DCA) definitions */
@@ -444,13 +342,14 @@ struct e1000_adv_tx_context_desc {
 
 #define ALL_QUEUES		0xFFFF
 
+s32 e1000_reset_init_script_82575(struct e1000_hw *hw);
+s32 e1000_init_nvm_params_82575(struct e1000_hw *hw);
+
 /* Rx packet buffer size defines */
 #define E1000_RXPBS_SIZE_MASK_82576	0x0000007F
 void e1000_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable);
 void e1000_vmdq_set_anti_spoofing_pf(struct e1000_hw *hw, bool enable, int pf);
 void e1000_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable);
-s32 e1000_init_nvm_params_82575(struct e1000_hw *hw);
-s32  e1000_init_hw_82575(struct e1000_hw *hw);
 
 enum e1000_promisc_type {
 	e1000_promisc_disabled = 0,   /* all promisc modes disabled */
diff --git a/drivers/net/e1000/base/e1000_base.c b/drivers/net/e1000/base/e1000_base.c
new file mode 100644
index 000000000..342735693
--- /dev/null
+++ b/drivers/net/e1000/base/e1000_base.c
@@ -0,0 +1,191 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2020 Intel Corporation
+ */
+
+#include "e1000_hw.h"
+#include "e1000_82575.h"
+#include "e1000_i225.h"
+#include "e1000_mac.h"
+#include "e1000_base.h"
+#include "e1000_manage.h"
+
+/**
+ *  e1000_acquire_phy_base - Acquire rights to access PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Acquire access rights to the correct PHY.
+ **/
+s32 e1000_acquire_phy_base(struct e1000_hw *hw)
+{
+	u16 mask = E1000_SWFW_PHY0_SM;
+
+	DEBUGFUNC("e1000_acquire_phy_base");
+
+	if (hw->bus.func == E1000_FUNC_1)
+		mask = E1000_SWFW_PHY1_SM;
+	else if (hw->bus.func == E1000_FUNC_2)
+		mask = E1000_SWFW_PHY2_SM;
+	else if (hw->bus.func == E1000_FUNC_3)
+		mask = E1000_SWFW_PHY3_SM;
+
+	return hw->mac.ops.acquire_swfw_sync(hw, mask);
+}
+
+/**
+ *  e1000_release_phy_base - Release rights to access PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  A wrapper to release access rights to the correct PHY.
+ **/
+void e1000_release_phy_base(struct e1000_hw *hw)
+{
+	u16 mask = E1000_SWFW_PHY0_SM;
+
+	DEBUGFUNC("e1000_release_phy_base");
+
+	if (hw->bus.func == E1000_FUNC_1)
+		mask = E1000_SWFW_PHY1_SM;
+	else if (hw->bus.func == E1000_FUNC_2)
+		mask = E1000_SWFW_PHY2_SM;
+	else if (hw->bus.func == E1000_FUNC_3)
+		mask = E1000_SWFW_PHY3_SM;
+
+	hw->mac.ops.release_swfw_sync(hw, mask);
+}
+
+/**
+ *  e1000_init_hw_base - Initialize hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This inits the hardware readying it for operation.
+ **/
+s32 e1000_init_hw_base(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	u16 i, rar_count = mac->rar_entry_count;
+
+	DEBUGFUNC("e1000_init_hw_base");
+
+	/* Setup the receive address */
+	e1000_init_rx_addrs_generic(hw, rar_count);
+
+	/* Zero out the Multicast HASH table */
+	DEBUGOUT("Zeroing the MTA\n");
+	for (i = 0; i < mac->mta_reg_count; i++)
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
+
+	/* Zero out the Unicast HASH table */
+	DEBUGOUT("Zeroing the UTA\n");
+	for (i = 0; i < mac->uta_reg_count; i++)
+		E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, 0);
+
+	/* Setup link and flow control */
+	ret_val = mac->ops.setup_link(hw);
+	/*
+	 * Clear all of the statistics registers (clear on read).  It is
+	 * important that we do this after we have tried to establish link
+	 * because the symbol error count will increment wildly if there
+	 * is no link.
+	 */
+	e1000_clear_hw_cntrs_base_generic(hw);
+
+	return ret_val;
+}
+
+/**
+ * e1000_power_down_phy_copper_base - Remove link during PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, remove the link.
+ **/
+void e1000_power_down_phy_copper_base(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+
+	if (!(phy->ops.check_reset_block))
+		return;
+
+	/* If the management interface is not enabled, then power down */
+	if (phy->ops.check_reset_block(hw))
+		e1000_power_down_phy_copper(hw);
+}
+
+/**
+ *  e1000_rx_fifo_flush_base - Clean Rx FIFO after Rx enable
+ *  @hw: pointer to the HW structure
+ *
+ *  After Rx enable, if manageability is enabled then there is likely some
+ *  bad data at the start of the FIFO and possibly in the DMA FIFO.  This
+ *  function clears the FIFOs and flushes any packets that came in as Rx was
+ *  being enabled.
+ **/
+void e1000_rx_fifo_flush_base(struct e1000_hw *hw)
+{
+	u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled;
+	int i, ms_wait;
+
+	DEBUGFUNC("e1000_rx_fifo_flush_base");
+
+	/* disable IPv6 options as per hardware errata */
+	rfctl = E1000_READ_REG(hw, E1000_RFCTL);
+	rfctl |= E1000_RFCTL_IPV6_EX_DIS;
+	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
+
+	if (!(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_RCV_TCO_EN))
+		return;
+
+	/* Disable all Rx queues */
+	for (i = 0; i < 4; i++) {
+		rxdctl[i] = E1000_READ_REG(hw, E1000_RXDCTL(i));
+		E1000_WRITE_REG(hw, E1000_RXDCTL(i),
+				rxdctl[i] & ~E1000_RXDCTL_QUEUE_ENABLE);
+	}
+	/* Poll all queues to verify they have shut down */
+	for (ms_wait = 0; ms_wait < 10; ms_wait++) {
+		msec_delay(1);
+		rx_enabled = 0;
+		for (i = 0; i < 4; i++)
+			rx_enabled |= E1000_READ_REG(hw, E1000_RXDCTL(i));
+		if (!(rx_enabled & E1000_RXDCTL_QUEUE_ENABLE))
+			break;
+	}
+
+	if (ms_wait == 10)
+		DEBUGOUT("Queue disable timed out after 10ms\n");
+
+	/* Clear RLPML, RCTL.SBP, RFCTL.LEF, and set RCTL.LPE so that all
+	 * incoming packets are rejected.  Set enable and wait 2ms so that
+	 * any packet that was coming in as RCTL.EN was set is flushed
+	 */
+	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl & ~E1000_RFCTL_LEF);
+
+	rlpml = E1000_READ_REG(hw, E1000_RLPML);
+	E1000_WRITE_REG(hw, E1000_RLPML, 0);
+
+	rctl = E1000_READ_REG(hw, E1000_RCTL);
+	temp_rctl = rctl & ~(E1000_RCTL_EN | E1000_RCTL_SBP);
+	temp_rctl |= E1000_RCTL_LPE;
+
+	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl);
+	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl | E1000_RCTL_EN);
+	E1000_WRITE_FLUSH(hw);
+	msec_delay(2);
+
+	/* Enable Rx queues that were previously enabled and restore our
+	 * previous state
+	 */
+	for (i = 0; i < 4; i++)
+		E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl[i]);
+	E1000_WRITE_REG(hw, E1000_RCTL, rctl);
+	E1000_WRITE_FLUSH(hw);
+
+	E1000_WRITE_REG(hw, E1000_RLPML, rlpml);
+	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
+
+	/* Flush receive errors generated by workaround */
+	E1000_READ_REG(hw, E1000_ROC);
+	E1000_READ_REG(hw, E1000_RNBC);
+	E1000_READ_REG(hw, E1000_MPC);
+}
diff --git a/drivers/net/e1000/base/e1000_base.h b/drivers/net/e1000/base/e1000_base.h
new file mode 100644
index 000000000..0d6172b6d
--- /dev/null
+++ b/drivers/net/e1000/base/e1000_base.h
@@ -0,0 +1,127 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2020 Intel Corporation
+ */
+
+#ifndef _E1000_BASE_H_
+#define _E1000_BASE_H_
+
+/* forward declaration */
+s32 e1000_init_hw_base(struct e1000_hw *hw);
+void e1000_power_down_phy_copper_base(struct e1000_hw *hw);
+extern void e1000_rx_fifo_flush_base(struct e1000_hw *hw);
+s32 e1000_acquire_phy_base(struct e1000_hw *hw);
+void e1000_release_phy_base(struct e1000_hw *hw);
+
+/* Transmit Descriptor - Advanced */
+union e1000_adv_tx_desc {
+	struct {
+		__le64 buffer_addr;    /* Address of descriptor's data buf */
+		__le32 cmd_type_len;
+		__le32 olinfo_status;
+	} read;
+	struct {
+		__le64 rsvd;       /* Reserved */
+		__le32 nxtseq_seed;
+		__le32 status;
+	} wb;
+};
+
+/* Context descriptors */
+struct e1000_adv_tx_context_desc {
+	__le32 vlan_macip_lens;
+	union {
+		__le32 launch_time;
+		__le32 seqnum_seed;
+	} u;
+	__le32 type_tucmd_mlhl;
+	__le32 mss_l4len_idx;
+};
+
+/* Adv Transmit Descriptor Config Masks */
+#define E1000_ADVTXD_DTYP_CTXT	0x00200000 /* Advanced Context Descriptor */
+#define E1000_ADVTXD_DTYP_DATA	0x00300000 /* Advanced Data Descriptor */
+#define E1000_ADVTXD_DCMD_EOP	0x01000000 /* End of Packet */
+#define E1000_ADVTXD_DCMD_IFCS	0x02000000 /* Insert FCS (Ethernet CRC) */
+#define E1000_ADVTXD_DCMD_RS	0x08000000 /* Report Status */
+#define E1000_ADVTXD_DCMD_DDTYP_ISCSI	0x10000000 /* DDP hdr type or iSCSI */
+#define E1000_ADVTXD_DCMD_DEXT	0x20000000 /* Descriptor extension (1=Adv) */
+#define E1000_ADVTXD_DCMD_VLE	0x40000000 /* VLAN pkt enable */
+#define E1000_ADVTXD_DCMD_TSE	0x80000000 /* TCP Seg enable */
+#define E1000_ADVTXD_MAC_LINKSEC	0x00040000 /* Apply LinkSec on pkt */
+#define E1000_ADVTXD_MAC_TSTAMP		0x00080000 /* IEEE1588 Timestamp pkt */
+#define E1000_ADVTXD_STAT_SN_CRC	0x00000002 /* NXTSEQ/SEED prsnt in WB */
+#define E1000_ADVTXD_IDX_SHIFT		4  /* Adv desc Index shift */
+#define E1000_ADVTXD_POPTS_ISCO_1ST	0x00000000 /* 1st TSO of iSCSI PDU */
+#define E1000_ADVTXD_POPTS_ISCO_MDL	0x00000800 /* Middle TSO of iSCSI PDU */
+#define E1000_ADVTXD_POPTS_ISCO_LAST	0x00001000 /* Last TSO of iSCSI PDU */
+/* 1st & Last TSO-full iSCSI PDU*/
+#define E1000_ADVTXD_POPTS_ISCO_FULL	0x00001800
+#define E1000_ADVTXD_POPTS_IPSEC	0x00000400 /* IPSec offload request */
+#define E1000_ADVTXD_PAYLEN_SHIFT	14 /* Adv desc PAYLEN shift */
+
+/* Advanced Transmit Context Descriptor Config */
+#define E1000_ADVTXD_MACLEN_SHIFT	9  /* Adv ctxt desc mac len shift */
+#define E1000_ADVTXD_VLAN_SHIFT		16  /* Adv ctxt vlan tag shift */
+#define E1000_ADVTXD_TUCMD_IPV4		0x00000400  /* IP Packet Type: 1=IPv4 */
+#define E1000_ADVTXD_TUCMD_IPV6		0x00000000  /* IP Packet Type: 0=IPv6 */
+#define E1000_ADVTXD_TUCMD_L4T_UDP	0x00000000  /* L4 Packet TYPE of UDP */
+#define E1000_ADVTXD_TUCMD_L4T_TCP	0x00000800  /* L4 Packet TYPE of TCP */
+#define E1000_ADVTXD_TUCMD_L4T_SCTP	0x00001000  /* L4 Packet TYPE of SCTP */
+#define E1000_ADVTXD_TUCMD_IPSEC_TYPE_ESP	0x00002000 /* IPSec Type ESP */
+/* IPSec Encrypt Enable for ESP */
+#define E1000_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN	0x00004000
+/* Req requires Markers and CRC */
+#define E1000_ADVTXD_TUCMD_MKRREQ	0x00002000
+#define E1000_ADVTXD_L4LEN_SHIFT	8  /* Adv ctxt L4LEN shift */
+#define E1000_ADVTXD_MSS_SHIFT		16  /* Adv ctxt MSS shift */
+/* Adv ctxt IPSec SA IDX mask */
+#define E1000_ADVTXD_IPSEC_SA_INDEX_MASK	0x000000FF
+/* Adv ctxt IPSec ESP len mask */
+#define E1000_ADVTXD_IPSEC_ESP_LEN_MASK		0x000000FF
+
+#define E1000_RAR_ENTRIES_BASE		16
+
+/* Receive Descriptor - Advanced */
+union e1000_adv_rx_desc {
+	struct {
+		__le64 pkt_addr; /* Packet buffer address */
+		__le64 hdr_addr; /* Header buffer address */
+	} read;
+	struct {
+		struct {
+			union {
+				__le32 data;
+				struct {
+					__le16 pkt_info; /*RSS type, Pkt type*/
+					/* Split Header, header buffer len */
+					__le16 hdr_info;
+				} hs_rss;
+			} lo_dword;
+			union {
+				__le32 rss; /* RSS Hash */
+				struct {
+					__le16 ip_id; /* IP id */
+					__le16 csum; /* Packet Checksum */
+				} csum_ip;
+			} hi_dword;
+		} lower;
+		struct {
+			__le32 status_error; /* ext status/error */
+			__le16 length; /* Packet length */
+			__le16 vlan; /* VLAN tag */
+		} upper;
+	} wb;  /* writeback */
+};
+
+/* Additional Transmit Descriptor Control definitions */
+#define E1000_TXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Tx Queue */
+
+/* Additional Receive Descriptor Control definitions */
+#define E1000_RXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Rx Queue */
+
+/* SRRCTL bit definitions */
+#define E1000_SRRCTL_BSIZEPKT_SHIFT		10 /* Shift _right_ */
+#define E1000_SRRCTL_BSIZEHDRSIZE_SHIFT		2  /* Shift _left_ */
+#define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF	0x02000000
+
+#endif /* _E1000_BASE_H_ */
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 76b4dd5c1..848d21645 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -1032,6 +1032,7 @@ struct e1000_hw {
 #include "e1000_82575.h"
 #include "e1000_i210.h"
 #include "e1000_i225.h"
+#include "e1000_base.h"
 
 /* These functions must be implemented by drivers */
 void e1000_pci_clear_mwi(struct e1000_hw *hw);
diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index c00161456..d4e4b527a 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -936,6 +936,6 @@ s32 e1000_init_hw_i210(struct e1000_hw *hw)
 			return ret_val;
 	}
 	hw->phy.ops.get_cfg_done = e1000_get_cfg_done_i210;
-	ret_val = e1000_init_hw_82575(hw);
+	ret_val = e1000_init_hw_base(hw);
 	return ret_val;
 }
diff --git a/drivers/net/e1000/base/e1000_i225.c b/drivers/net/e1000/base/e1000_i225.c
index 87ccf6d9c..505eff8f9 100644
--- a/drivers/net/e1000/base/e1000_i225.c
+++ b/drivers/net/e1000/base/e1000_i225.c
@@ -1144,7 +1144,7 @@ s32 e1000_init_hw_i225(struct e1000_hw *hw)
 			return ret_val;
 	}
 	hw->phy.ops.get_cfg_done = e1000_get_cfg_done_i225;
-	ret_val = e1000_init_hw_82575(hw);
+	ret_val = e1000_init_hw_base(hw);
 	return ret_val;
 }
 
diff --git a/drivers/net/e1000/base/meson.build b/drivers/net/e1000/base/meson.build
index d13c32033..f1ff51a04 100644
--- a/drivers/net/e1000/base/meson.build
+++ b/drivers/net/e1000/base/meson.build
@@ -10,6 +10,7 @@ sources = [
 	'e1000_82571.c',
 	'e1000_82575.c',
 	'e1000_api.c',
+	'e1000_base.c',
 	'e1000_i210.c',
 	'e1000_i225.c',
 	'e1000_ich8lan.c',
diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c
index 684fa4ad8..688320284 100644
--- a/drivers/net/e1000/igb_rxtx.c
+++ b/drivers/net/e1000/igb_rxtx.c
@@ -320,7 +320,7 @@ igbe_set_xmit_ctx(struct igb_tx_queue* txq,
 	vlan_macip_lens = (uint32_t)tx_offload.data;
 	ctx_txd->vlan_macip_lens = rte_cpu_to_le_32(vlan_macip_lens);
 	ctx_txd->mss_l4len_idx = rte_cpu_to_le_32(mss_l4len_idx);
-	ctx_txd->seqnum_seed = 0;
+	ctx_txd->u.seqnum_seed = 0;
 }
 
 /*
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 24/70] net/e1000/base: add info structure
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (22 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 23/70] net/e1000/base: remove duplicated codes from 82575 Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 25/70] net/e1000/base: wrap the e1000 defines.h Guinan Sun
                   ` (47 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher

Add the info structure which will contain structure pointers for MAC,
PHY and NVM structures for i225 devices.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_hw.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 848d21645..5042740f4 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -770,6 +770,15 @@ struct e1000_nvm_operations {
 	s32  (*write)(struct e1000_hw *, u16, u16, u16 *);
 };
 
+struct e1000_info {
+	s32 (*get_invariants)(struct e1000_hw *hw);
+	struct e1000_mac_operations *mac_ops;
+	const struct e1000_phy_operations *phy_ops;
+	struct e1000_nvm_operations *nvm_ops;
+};
+
+extern const struct e1000_info e1000_i225_info;
+
 struct e1000_mac_info {
 	struct e1000_mac_operations ops;
 	u8 addr[ETH_ADDR_LEN];
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 25/70] net/e1000/base: wrap the e1000 defines.h
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (23 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 24/70] net/e1000/base: add info structure Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 26/70] net/e1000/base: wrap the e1000 regs.h file Guinan Sun
                   ` (46 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Allow the e1000_defines.h to be processed by build.mk and be
closest as possible to the upstream igc_defines.h file

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 03006cd6e..341d66daf 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -411,6 +411,10 @@
 #define E1000_RXCSUM_IPPCSE	0x00001000 /* IP payload checksum enable */
 #define E1000_RXCSUM_PCSD	0x00002000 /* packet checksum disabled */
 
+/* GPY211 - I225 defines */
+#define GPY_MMD_MASK		0xFFFF0000
+#define GPY_MMD_SHIFT		16
+#define GPY_REG_MASK		0x0000FFFF
 /* Header split receive */
 #define E1000_RFCTL_NFSW_DIS		0x00000040
 #define E1000_RFCTL_NFSR_DIS		0x00000080
@@ -421,8 +425,8 @@
 #define E1000_RFCTL_LEF			0x00040000
 
 /* Collision related configuration parameters */
-#define E1000_COLLISION_THRESHOLD	15
 #define E1000_CT_SHIFT			4
+#define E1000_COLLISION_THRESHOLD	15
 #define E1000_COLLISION_DISTANCE	63
 #define E1000_COLD_SHIFT		12
 
@@ -593,6 +597,8 @@
 #define E1000_IMS_VMMB		E1000_ICR_VMMB    /* Mail box activity */
 #define E1000_IMS_RXSEQ		E1000_ICR_RXSEQ   /* Rx sequence error */
 #define E1000_IMS_RXDMT0	E1000_ICR_RXDMT0  /* Rx desc min. threshold */
+#define E1000_QVECTOR_MASK	0x7FFC		/* Q-vector mask */
+#define E1000_ITR_VAL_MASK	0x04		/* ITR value mask */
 #define E1000_IMS_RXO		E1000_ICR_RXO     /* Rx overrun */
 #define E1000_IMS_RXT0		E1000_ICR_RXT0    /* Rx timer intr */
 #define E1000_IMS_TXD_LOW	E1000_ICR_TXD_LOW
@@ -625,6 +631,7 @@
 #define E1000_ICS_LSC		E1000_ICR_LSC       /* Link Status Change */
 #define E1000_ICS_RXSEQ		E1000_ICR_RXSEQ     /* Rx sequence error */
 #define E1000_ICS_RXDMT0	E1000_ICR_RXDMT0    /* Rx desc min. threshold */
+#define E1000_ICS_DRSTA		IGC_ICR_DRSTA     /* Device Reset Aserted */
 
 /* Extended Interrupt Cause Set */
 #define E1000_EICS_RX_QUEUE0	E1000_EICR_RX_QUEUE0 /* Rx Queue 0 Interrupt */
@@ -820,7 +827,7 @@
 #define E1000_THSTAT_PWR_DOWN		0x00000001 /* Power Down Event */
 #define E1000_THSTAT_LINK_THROTTLE	0x00000002 /* Link Spd Throttle Event */
 
-/* I350 EEE defines */
+/* EEE defines */
 #define E1000_IPCNFG_EEE_2_5G_AN	0x00000010 /* IPCNFG EEE Ena 2.5G AN */
 #define E1000_IPCNFG_EEE_1G_AN		0x00000008 /* IPCNFG EEE Ena 1G AN */
 #define E1000_IPCNFG_EEE_100M_AN	0x00000004 /* IPCNFG EEE Ena 100M AN */
@@ -1396,6 +1403,8 @@
 #define GG82563_PHY_INBAND_CTRL		GG82563_REG(194, 18) /* Inband Ctrl */
 
 /* MDI Control */
+#define E1000_MDIC_DATA_MASK	0x0000FFFF
+#define E1000_MDIC_INT_EN	0x20000000
 #define E1000_MDIC_REG_MASK	0x001F0000
 #define E1000_MDIC_REG_SHIFT	16
 #define E1000_MDIC_PHY_MASK	0x03E00000
@@ -1406,6 +1415,11 @@
 #define E1000_MDIC_ERROR	0x40000000
 #define E1000_MDIC_DEST		0x80000000
 
+#define E1000_N0_QUEUE -1
+
+#define E1000_MAX_MAC_HDR_LEN	127
+#define E1000_MAX_NETWORK_HDR_LEN	511
+
 /* SerDes Control */
 #define E1000_GEN_CTL_READY		0x80000000
 #define E1000_GEN_CTL_ADDRESS_SHIFT	8
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 26/70] net/e1000/base: wrap the e1000 regs.h file
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (24 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 25/70] net/e1000/base: wrap the e1000 defines.h Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 27/70] net/e1000/base: cleanup duplicate declaration Guinan Sun
                   ` (45 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Allow the e1000_regs.h be processed by build.mk and be
closest as possible to the upstream igc_regs.h file
Fix the duplication and redefinition.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.h |  2 +-
 drivers/net/e1000/base/e1000_regs.h  | 42 ++++++++++++++++++++--------
 2 files changed, 31 insertions(+), 13 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index 25fc20ba8..fb810a4b3 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -252,7 +252,7 @@ struct e1000_adv_context_desc {
 #define E1000_ETQF_FILTER_ENABLE	(1 << 26)
 #define E1000_ETQF_IMM_INT		(1 << 29)
 #define E1000_ETQF_1588			(1 << 30)
-#define E1000_ETQF_QUEUE_ENABLE		(1U << 31)
+
 /*
  * ETQF filter list: one static filter per filter consumer. This is
  *                   to avoid filter collisions later. Add new filters
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index ef131af18..7a6cb7ce9 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -5,13 +5,15 @@
 #ifndef _E1000_REGS_H_
 #define _E1000_REGS_H_
 
+/* General Register Descriptions */
 #define E1000_CTRL	0x00000  /* Device Control - RW */
 #define E1000_CTRL_DUP	0x00004  /* Device Control Duplicate (Shadow) - RW */
 #define E1000_STATUS	0x00008  /* Device Status - RO */
 #define E1000_EECD	0x00010  /* EEPROM/Flash Control - RW */
-#define E1000_EERD	0x00014  /* EEPROM Read - RW */
+/* NVM  Register Descriptions */
+#define E1000_EERD		0x12014  /* EEprom mode read - RW */
+#define E1000_EEWR		0x12018  /* EEprom mode write - RW */
 #define E1000_CTRL_EXT	0x00018  /* Extended Device Control - RW */
-#define E1000_FLA	0x0001C  /* Flash Access - RW */
 #define E1000_MDIC	0x00020  /* MDI Control - RW */
 #define E1000_MDICNFG	0x00E04  /* MDI Config - RW */
 #define E1000_REGISTER_SET_SIZE		0x20000 /* CSR Size */
@@ -43,12 +45,12 @@
 #define E1000_FCT	0x00030  /* Flow Control Type - RW */
 #define E1000_CONNSW	0x00034  /* Copper/Fiber switch control - RW */
 #define E1000_VET	0x00038  /* VLAN Ether Type - RW */
-#define E1000_ICR	0x000C0  /* Interrupt Cause Read - R/clr */
+#define E1000_ICR	0x01500  /* Intr Cause Read - RC/W1C */
 #define E1000_ITR	0x000C4  /* Interrupt Throttling Rate - RW */
-#define E1000_ICS	0x000C8  /* Interrupt Cause Set - WO */
-#define E1000_IMS	0x000D0  /* Interrupt Mask Set - RW */
-#define E1000_IMC	0x000D8  /* Interrupt Mask Clear - WO */
-#define E1000_IAM	0x000E0  /* Interrupt Acknowledge Auto Mask */
+#define E1000_ICS	0x01504  /* Intr Cause Set - WO */
+#define E1000_IMS	0x01508  /* Intr Mask Set/Read - RW */
+#define E1000_IMC	0x0150C  /* Intr Mask Clear - WO */
+#define E1000_IAM	0x01510  /* Intr Ack Auto Mask- RW */
 #define E1000_IVAR	0x000E4  /* Interrupt Vector Allocation Register - RW */
 #define E1000_SVCR	0x000F0
 #define E1000_SVT	0x000F4
@@ -94,7 +96,6 @@
 #define E1000_EEARBC_I225	0x12024 /* EEPROM Auto Read Bus Control */
 #endif /* NO_I225_SUPPORT */
 #define E1000_FLASHT	0x01028  /* FLASH Timer Register */
-#define E1000_EEWR	0x0102C  /* EEPROM Write Register - RW */
 #define E1000_FLSWCTL	0x01030  /* FLASH control register */
 #define E1000_FLSWDATA	0x01034  /* FLASH data register */
 #define E1000_FLSWCNT	0x01038  /* FLASH Access Counter */
@@ -289,6 +290,7 @@
 #define E1000_TIDV	0x03820  /* Tx Interrupt Delay Value - RW */
 #define E1000_TADV	0x0382C  /* Tx Interrupt Absolute Delay Val - RW */
 #define E1000_TSPMT	0x03830  /* TCP Segmentation PAD & Min Threshold - RW */
+/* Statistics Register Descriptions */
 #define E1000_CRCERRS	0x04000  /* CRC Error Count - R/clr */
 #define E1000_ALGNERRC	0x04004  /* Alignment Error Count - R/clr */
 #define E1000_SYMERRS	0x04008  /* Symbol Error Count - R/clr */
@@ -348,6 +350,7 @@
 #define E1000_TSCTC	0x040F8  /* TCP Segmentation Context Tx - R/clr */
 #define E1000_TSCTFC	0x040FC  /* TCP Segmentation Context Tx Fail - R/clr */
 #define E1000_IAC	0x04100  /* Interrupt Assertion Count */
+/* Interrupt Cause */
 #define E1000_ICRXPTC	0x04104  /* Interrupt Cause Rx Pkt Timer Expire Count */
 #define E1000_ICRXATC	0x04108  /* Interrupt Cause Rx Abs Timer Expire Count */
 #define E1000_ICTXPTC	0x0410C  /* Interrupt Cause Tx Pkt Timer Expire Count */
@@ -470,6 +473,7 @@
 #define E1000_WUC	0x05800  /* Wakeup Control - RW */
 #define E1000_WUFC	0x05808  /* Wakeup Filter Control - RW */
 #define E1000_WUS	0x05810  /* Wakeup Status - RO */
+/* Management registers */
 #define E1000_MANC	0x05820  /* Management Control - RW */
 #define E1000_IPAV	0x05838  /* IP Address Valid - RW */
 #define E1000_IP4AT	0x05840  /* IPv4 Address Table - RW Array */
@@ -487,6 +491,7 @@
 #define E1000_RWPFC	0x05584  /* Range Wake Port Filter Control - RW */
 #define E1000_WFUTPS	0x05588  /* Wake Filter UDP TCP Status - RW1C */
 #define E1000_WCS	0x0558C  /* Wake Control Status - RW1C */
+/* MSI-X Table Register Descriptions */
 #define E1000_PBACL	0x05B68  /* MSIx PBA Clear - Read/Write 1's to clear */
 #define E1000_FFLT	0x05F00  /* Flexible Filter Length Table - RW Array */
 #define E1000_HOST_IF	0x08800  /* Host Interface */
@@ -501,17 +506,20 @@
 #define E1000_MANC2H		0x05860 /* Management Control To Host - RW */
 /* Management Decision Filters */
 #define E1000_MDEF(_n)		(0x05890 + (4 * (_n)))
+/* Semaphore registers */
 #define E1000_SW_FW_SYNC	0x05B5C /* SW-FW Synchronization - RW */
 #define E1000_CCMCTL	0x05B48 /* CCM Control Register */
 #define E1000_GIOCTL	0x05B44 /* GIO Analog Control Register */
 #define E1000_SCCTL	0x05B4C /* PCIc PLL Configuration Register */
+/* PCIe Register Description */
 #define E1000_GCR	0x05B00 /* PCI-Ex Control */
 #define E1000_GCR2	0x05B64 /* PCI-Ex Control #2 */
 #define E1000_GSCL_1	0x05B10 /* PCI-Ex Statistic Control #1 */
 #define E1000_GSCL_2	0x05B14 /* PCI-Ex Statistic Control #2 */
 #define E1000_GSCL_3	0x05B18 /* PCI-Ex Statistic Control #3 */
 #define E1000_GSCL_4	0x05B1C /* PCI-Ex Statistic Control #4 */
-#define E1000_FACTPS	0x05B30 /* Function Active and Power State to MNG */
+/* Function Active and Power State to MNG */
+#define E1000_FACTPS	0x05B30
 #define E1000_SWSM	0x05B50 /* SW Semaphore */
 #define E1000_FWSM	0x05B54 /* FW Semaphore */
 /* Driver-only SW semaphore (not used by BOOT agents) */
@@ -530,10 +538,13 @@
 #define E1000_IMIREXT(_i)	(0x05AA0 + ((_i) * 4)) /* Immediate INTR Ext*/
 #define E1000_IMIRVP		0x05AC0 /* Immediate INT Rx VLAN Priority -RW */
 #define E1000_MSIXBM(_i)	(0x01600 + ((_i) * 4)) /* MSI-X Alloc Reg -RW */
-#define E1000_RETA(_i)	(0x05C00 + ((_i) * 4)) /* Redirection Table - RW */
-#define E1000_RSSRK(_i)	(0x05C80 + ((_i) * 4)) /* RSS Random Key - RW */
+/* Redirection Table - RW Array */
+#define E1000_RETA(_i)	(0x05C00 + ((_i) * 4))
+/* RSS Random Key - RW Array */
+#define E1000_RSSRK(_i)	(0x05C80 + ((_i) * 4))
 #define E1000_RSSIM	0x05864 /* RSS Interrupt Mask */
 #define E1000_RSSIR	0x05868 /* RSS Interrupt Request */
+#define E1000_UTA	0x0A000 /* Unicast Table Array - RW */
 /* VT Registers */
 #define E1000_SWPBS	0x03004 /* Switch Packet Buffer Size - RW */
 #define E1000_MBVFICR	0x00C80 /* Mailbox VF Cause - RWC */
@@ -545,7 +556,6 @@
 #define E1000_DTXSWC	0x03500 /* DMA Tx Switch Control - RW */
 #define E1000_WVBR	0x03554 /* VM Wrong Behavior - RWS */
 #define E1000_RPLOLR	0x05AF0 /* Replication Offload - RW */
-#define E1000_UTA	0x0A000 /* Unicast Table Array - RW */
 #define E1000_IOVTCL	0x05BBC /* IOV Control Register */
 #define E1000_VMRCTL	0X05D80 /* Virtual Mirror Rule Control */
 #define E1000_VMRVLAN	0x05D90 /* Virtual Mirror Rule VLAN */
@@ -601,6 +611,14 @@
 #define E1000_SYNQF(_n)	(0x055FC + (4 * (_n))) /* SYN Packet Queue Fltr */
 #define E1000_ETQF(_n)	(0x05CB0 + (4 * (_n))) /* EType Queue Fltr */
 
+/* ETQF register bit definitions */
+#define E1000_ETQF_FILTER_ENABLE	(1 << 26)
+#define E1000_ETQF_IMM_INT		(1 << 29)
+#define E1000_ETQF_QUEUE_ENABLE		(1 << 31)
+#define E1000_ETQF_QUEUE_SHIFT		16
+#define E1000_ETQF_QUEUE_MASK		0x00070000
+#define E1000_ETQF_ETYPE_MASK		0x0000FFFF
+
 #define E1000_RTTDCS	0x3600 /* Reedtown Tx Desc plane control and status */
 #define E1000_RTTPCS	0x3474 /* Reedtown Tx Packet Plane control and status */
 #define E1000_RTRPCS	0x2474 /* Rx packet plane control and status */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 27/70] net/e1000/base: cleanup duplicate declaration
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (25 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 26/70] net/e1000/base: wrap the e1000 regs.h file Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 28/70] net/e1000/base: modify wrapper for registers and definitions Guinan Sun
                   ` (44 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher

Fix up a stray and duplicate function declaration.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/net/e1000/base/e1000_api.h b/drivers/net/e1000/base/e1000_api.h
index 34e065054..0b7b9016a 100644
--- a/drivers/net/e1000/base/e1000_api.h
+++ b/drivers/net/e1000/base/e1000_api.h
@@ -15,7 +15,6 @@ extern void e1000_init_function_pointers_82541(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_80003es2lan(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_82575(struct e1000_hw *hw);
-extern void e1000_rx_fifo_flush_82575(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_vf(struct e1000_hw *hw);
 extern void e1000_power_up_fiber_serdes_link(struct e1000_hw *hw);
 extern void e1000_shutdown_fiber_serdes_link(struct e1000_hw *hw);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 28/70] net/e1000/base: modify wrapper for registers and definitions
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (26 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 27/70] net/e1000/base: cleanup duplicate declaration Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 29/70] net/e1000/base: more function name cleanup Guinan Sun
                   ` (43 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Edit e1000_regs.h and e1000_defines.h files.
Add miss registers and definition.
Fix wrapper.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 341d66daf..7f9c85451 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -263,12 +263,12 @@
 #define E1000_CTRL_MDC_DIR		E1000_CTRL_SWDPIO3
 #define E1000_CTRL_MDC			E1000_CTRL_SWDPIN3
 
+#define E1000_CONNSW_AUTOSENSE_EN	0x1
 #define E1000_CONNSW_ENRGSRC		0x4
 #define E1000_CONNSW_PHYSD		0x400
 #define E1000_CONNSW_PHY_PDN		0x800
 #define E1000_CONNSW_SERDESD		0x200
 #define E1000_CONNSW_AUTOSENSE_CONF	0x2
-#define E1000_CONNSW_AUTOSENSE_EN	0x1
 #define E1000_PCS_CFG_PCS_EN		8
 #define E1000_PCS_LCTL_FLV_LINK_UP	1
 #define E1000_PCS_LCTL_FSV_10		0
@@ -646,9 +646,9 @@
 #define E1000_EICS_OTHER	E1000_EICR_OTHER   /* Interrupt Cause Active */
 
 #define E1000_EITR_ITR_INT_MASK	0x0000FFFF
+#define E1000_EITR_INTERVAL 0x00007FFC
 /* E1000_EITR_CNT_IGNR is only for 82576 and newer */
 #define E1000_EITR_CNT_IGNR	0x80000000 /* Don't reset counters on write */
-#define E1000_EITR_INTERVAL 0x00007FFC
 
 /* Transmit Descriptor Control */
 #define E1000_TXDCTL_PTHRESH	0x0000003F /* TXDCTL Prefetch Threshold */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 29/70] net/e1000/base: more function name cleanup
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (27 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 28/70] net/e1000/base: modify wrapper for registers and definitions Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 30/70] net/e1000/base: expose EEE defines Guinan Sun
                   ` (42 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher

Now that several functions are "generic" or "base" functions, drop the
family specific names to make more generic.

This is another step closer to making the family specific files
independent from other silicon specific family files and only include
the "common" functions and files.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.c  |  11 +-
 drivers/net/e1000/base/e1000_hw.h   |  17 +-
 drivers/net/e1000/base/e1000_i225.c | 562 ++++++++++++----------------
 drivers/net/e1000/base/e1000_mac.c  |  68 +---
 drivers/net/e1000/base/e1000_mac.h  |   1 +
 5 files changed, 258 insertions(+), 401 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index ae6f125a6..18fac769c 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -305,6 +305,10 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 	case E1000_DEV_ID_82576_SERDES_QUAD:
 		mac->type = e1000_82576;
 		break;
+	case E1000_DEV_ID_82576_VF:
+	case E1000_DEV_ID_82576_VF_HV:
+		mac->type = e1000_vfadapt;
+		break;
 	case E1000_DEV_ID_82580_COPPER:
 	case E1000_DEV_ID_82580_FIBER:
 	case E1000_DEV_ID_82580_SERDES:
@@ -337,21 +341,14 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 	case E1000_DEV_ID_I211_COPPER:
 		mac->type = e1000_i211;
 		break;
-#ifndef NO_I225_SUPPORT
 	case E1000_DEV_ID_I225_LM:
 	case E1000_DEV_ID_I225_V:
 		mac->type = e1000_i225;
 		break;
-#endif /* NO_I225_SUPPORT */
-	case E1000_DEV_ID_82576_VF:
-	case E1000_DEV_ID_82576_VF_HV:
-		mac->type = e1000_vfadapt;
-		break;
 	case E1000_DEV_ID_I350_VF:
 	case E1000_DEV_ID_I350_VF_HV:
 		mac->type = e1000_vfadapt_i350;
 		break;
-
 	case E1000_DEV_ID_I354_BACKPLANE_1GBPS:
 	case E1000_DEV_ID_I354_SGMII:
 	case E1000_DEV_ID_I354_BACKPLANE_2_5GBPS:
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 5042740f4..054f7b3c8 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -222,9 +222,7 @@ enum e1000_mac_type {
 	e1000_i354,
 	e1000_i210,
 	e1000_i211,
-#ifndef NO_I225_SUPPORT
 	e1000_i225,
-#endif /* NO_I225_SUPPORT */
 	e1000_vfadapt,
 	e1000_vfadapt_i350,
 	e1000_num_macs  /* List is 1-based, so subtract 1 for true count. */
@@ -360,7 +358,6 @@ enum e1000_serdes_link_state {
 	e1000_serdes_link_forced_up
 };
 
-#ifndef NO_I225_SUPPORT
 enum e1000_invm_structure_type {
 	e1000_invm_unitialized_structure		= 0x00,
 	e1000_invm_word_autoload_structure		= 0x01,
@@ -370,7 +367,6 @@ enum e1000_invm_structure_type {
 	e1000_invm_invalidated_structure		= 0x0f,
 };
 
-#endif /* NO_I225_SUPPORT */
 #define __le16 u16
 #define __le32 u32
 #define __le64 u64
@@ -701,6 +697,7 @@ struct e1000_mac_operations {
 	void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32);
 	s32  (*reset_hw)(struct e1000_hw *);
 	s32  (*init_hw)(struct e1000_hw *);
+	s32  (*set_eee)(struct e1000_hw *, bool, bool, bool);
 	void (*shutdown_serdes)(struct e1000_hw *);
 	void (*power_up_serdes)(struct e1000_hw *);
 	s32  (*setup_link)(struct e1000_hw *);
@@ -999,9 +996,20 @@ struct e1000_dev_spec_vf {
 	u32 v2p_mailbox;
 };
 
+struct e1000_dev_spec_i225 {
+	bool global_device_reset;
+	bool eee_disable;
+	bool clear_semaphore_once;
+	bool module_plugged;
+	u8 media_port;
+	bool mas_capable;
+	u32 mtu;
+};
+
 struct e1000_hw {
 	void *back;
 
+	u8 pf_id;               /* device profile info */
 	u8 *hw_addr;
 	u8 *flash_address;
 	unsigned long io_base;
@@ -1023,6 +1031,7 @@ struct e1000_hw {
 		struct e1000_dev_spec_ich8lan ich8lan;
 		struct e1000_dev_spec_82575 _82575;
 		struct e1000_dev_spec_vf vf;
+		struct e1000_dev_spec_i225 _i225;
 	} dev_spec;
 
 	u16 device_id;
diff --git a/drivers/net/e1000/base/e1000_i225.c b/drivers/net/e1000/base/e1000_i225.c
index 505eff8f9..85c692644 100644
--- a/drivers/net/e1000/base/e1000_i225.c
+++ b/drivers/net/e1000/base/e1000_i225.c
@@ -1,14 +1,9 @@
-#ifndef NO_API_SUPPORT
 #include "e1000_api.h"
-#else
-#include "e1000_hw.h"
-#endif /* NO_API_SUPPORT */
-#ifndef EXTERNAL_RELEASE
-#ifdef WPP_TRACING_ENABLED
-#include <e1000_i225.tmh>
-#endif /* WPP_TRACING_ENABLED */
-#endif /* EXTERNAL_RELEASE */
 
+STATIC s32 e1000_init_nvm_params_i225(struct e1000_hw *hw);
+STATIC s32 e1000_init_mac_params_i225(struct e1000_hw *hw);
+STATIC s32 e1000_init_phy_params_i225(struct e1000_hw *hw);
+STATIC s32 e1000_reset_hw_i225(struct e1000_hw *hw);
 STATIC s32 e1000_acquire_nvm_i225(struct e1000_hw *hw);
 STATIC void e1000_release_nvm_i225(struct e1000_hw *hw);
 STATIC s32 e1000_get_hw_semaphore_i225(struct e1000_hw *hw);
@@ -19,6 +14,236 @@ STATIC s32 __e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
 STATIC s32 e1000_pool_flash_update_done_i225(struct e1000_hw *hw);
 STATIC s32 e1000_valid_led_default_i225(struct e1000_hw *hw, u16 *data);
 
+/**
+ *  e1000_init_nvm_params_i225 - Init NVM func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+STATIC s32 e1000_init_nvm_params_i225(struct e1000_hw *hw)
+{
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+	u16 size;
+
+	DEBUGFUNC("e1000_init_nvm_params_i225");
+
+	size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
+		     E1000_EECD_SIZE_EX_SHIFT);
+	/*
+	 * Added to a constant, "size" becomes the left-shift value
+	 * for setting word_size.
+	 */
+	size += NVM_WORD_SIZE_BASE_SHIFT;
+
+	/* Just in case size is out of range, cap it to the largest
+	 * EEPROM size supported
+	 */
+	if (size > 15)
+		size = 15;
+
+	nvm->word_size = 1 << size;
+	nvm->opcode_bits = 8;
+	nvm->delay_usec = 1;
+	nvm->type = e1000_nvm_eeprom_spi;
+
+
+	nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
+	nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
+			    16 : 8;
+
+	if (nvm->word_size == (1 << 15))
+		nvm->page_size = 128;
+
+	nvm->ops.acquire = e1000_acquire_nvm_i225;
+	nvm->ops.release = e1000_release_nvm_i225;
+	nvm->ops.valid_led_default = e1000_valid_led_default_i225;
+	if (e1000_get_flash_presence_i225(hw)) {
+		hw->nvm.type = e1000_nvm_flash_hw;
+		nvm->ops.read    = e1000_read_nvm_srrd_i225;
+		nvm->ops.write   = e1000_write_nvm_srwr_i225;
+		nvm->ops.validate = e1000_validate_nvm_checksum_i225;
+		nvm->ops.update   = e1000_update_nvm_checksum_i225;
+	} else {
+		hw->nvm.type = e1000_nvm_invm;
+		nvm->ops.write    = e1000_null_write_nvm;
+		nvm->ops.validate = e1000_null_ops_generic;
+		nvm->ops.update   = e1000_null_ops_generic;
+	}
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_init_mac_params_i225 - Init MAC func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+STATIC s32 e1000_init_mac_params_i225(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	struct e1000_dev_spec_i225 *dev_spec = &hw->dev_spec._i225;
+
+	DEBUGFUNC("e1000_init_mac_params_i225");
+
+	/* Initialize function pointer */
+	e1000_init_mac_ops_generic(hw);
+
+	/* Set media type */
+	hw->phy.media_type = e1000_media_type_copper;
+	/* Set mta register count */
+	mac->mta_reg_count = 128;
+	/* Set rar entry count */
+	mac->rar_entry_count = E1000_RAR_ENTRIES_BASE;
+	/* Set EEE */
+	mac->ops.set_eee = e1000_set_eee_i225;
+	/* reset */
+	mac->ops.reset_hw = e1000_reset_hw_i225;
+	/* hw initialization */
+	mac->ops.init_hw = e1000_init_hw_i225;
+	/* link setup */
+	mac->ops.setup_link = e1000_setup_link_generic;
+	mac->ops.check_for_link = e1000_check_for_copper_link_generic;
+	/* link info */
+	mac->ops.get_link_up_info = e1000_get_speed_and_duplex_copper_generic;
+	/* acquire SW_FW sync */
+	mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_i225;
+	/* release SW_FW sync */
+	mac->ops.release_swfw_sync = e1000_release_swfw_sync_i225;
+
+	/* Allow a single clear of the SW semaphore on I225 */
+	dev_spec->clear_semaphore_once = true;
+	mac->ops.setup_physical_interface = e1000_setup_copper_link_i225;
+
+	/* Set if part includes ASF firmware */
+	mac->asf_firmware_present = true;
+
+	/* multicast address update */
+	mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic;
+
+	mac->ops.write_vfta = e1000_write_vfta_generic;
+
+	return E1000_SUCCESS;
+}
+
+/**
+ *  e1000_init_phy_params_i225 - Init PHY func ptrs.
+ *  @hw: pointer to the HW structure
+ **/
+STATIC s32 e1000_init_phy_params_i225(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+	s32 ret_val = E1000_SUCCESS;
+	u32 ctrl_ext;
+
+	DEBUGFUNC("e1000_init_phy_params_i225");
+
+	phy->ops.read_i2c_byte = e1000_read_i2c_byte_generic;
+	phy->ops.write_i2c_byte = e1000_write_i2c_byte_generic;
+
+	if (hw->phy.media_type != e1000_media_type_copper) {
+		phy->type = e1000_phy_none;
+		goto out;
+	}
+
+	phy->ops.power_up   = e1000_power_up_phy_copper;
+	phy->ops.power_down = e1000_power_down_phy_copper_base;
+
+	phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT_2500;
+
+	phy->reset_delay_us	= 100;
+
+	phy->ops.acquire	= e1000_acquire_phy_base;
+	phy->ops.check_reset_block = e1000_check_reset_block_generic;
+	phy->ops.commit		= e1000_phy_sw_reset_generic;
+	phy->ops.release	= e1000_release_phy_base;
+	phy->ops.reset		= e1000_phy_hw_reset_generic;
+
+	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
+
+	/* Make sure the PHY is in a good state. Several people have reported
+	 * firmware leaving the PHY's page select register set to something
+	 * other than the default of zero, which causes the PHY ID read to
+	 * access something other than the intended register.
+	 */
+	ret_val = hw->phy.ops.reset(hw);
+	if (ret_val)
+		goto out;
+
+	E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
+	phy->ops.read_reg = e1000_read_phy_reg_gpy;
+	phy->ops.write_reg = e1000_write_phy_reg_gpy;
+
+	ret_val = e1000_get_phy_id(hw);
+	/* Verify phy id and set remaining function pointers */
+	switch (phy->id) {
+	case I225_I_PHY_ID:
+		phy->type		= e1000_phy_i225;
+		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_i225;
+		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_i225;
+		/* TODO - complete with GPY PHY information */
+		break;
+	default:
+		ret_val = -E1000_ERR_PHY;
+		goto out;
+	}
+
+out:
+	return ret_val;
+}
+
+/**
+ *  e1000_reset_hw_i225 - Reset hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This resets the hardware into a known state.
+ **/
+STATIC s32 e1000_reset_hw_i225(struct e1000_hw *hw)
+{
+	u32 ctrl;
+	s32 ret_val;
+
+	DEBUGFUNC("e1000_reset_hw_i225");
+
+	/*
+	 * Prevent the PCI-E bus from sticking if there is no TLP connection
+	 * on the last TLP read/write transaction when MAC is reset.
+	 */
+	ret_val = e1000_disable_pcie_master_generic(hw);
+	if (ret_val)
+		DEBUGOUT("PCI-E Master disable polling has failed.\n");
+
+	DEBUGOUT("Masking off all interrupts\n");
+	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
+
+	E1000_WRITE_REG(hw, E1000_RCTL, 0);
+	E1000_WRITE_REG(hw, E1000_TCTL, E1000_TCTL_PSP);
+	E1000_WRITE_FLUSH(hw);
+
+	msec_delay(10);
+
+	ctrl = E1000_READ_REG(hw, E1000_CTRL);
+
+	DEBUGOUT("Issuing a global reset to MAC\n");
+	E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_DEV_RST);
+
+	ret_val = e1000_get_auto_rd_done_generic(hw);
+	if (ret_val) {
+		/*
+		 * When auto config read does not complete, do not
+		 * return with an error. This can happen in situations
+		 * where there is no eeprom and prevents getting link.
+		 */
+		DEBUGOUT("Auto Read Done did not complete\n");
+	}
+
+	/* Clear any pending interrupt events. */
+	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
+	E1000_READ_REG(hw, E1000_ICR);
+
+	/* Install any alternate MAC address into RAR0 */
+	ret_val = e1000_check_alt_mac_addr_generic(hw);
+
+	return ret_val;
+}
+
 /* e1000_acquire_nvm_i225 - Request for access to EEPROM
  * @hw: pointer to the HW structure
  *
@@ -407,88 +632,6 @@ STATIC s32 e1000_read_invm_word_i225(struct e1000_hw *hw, u8 address, u16 *data)
 	return status;
 }
 
-/* e1000_read_invm_i225 - Read invm wrapper function for I225
- * @hw: pointer to the HW structure
- * @address: the word address (aka eeprom offset) to read
- * @data: pointer to the data read
- *
- * Wrapper function to return data formerly found in the NVM.
- */
-STATIC s32 e1000_read_invm_i225(struct e1000_hw *hw, u16 offset,
-				u16 E1000_UNUSEDARG words, u16 *data)
-{
-	s32 ret_val = E1000_SUCCESS;
-
-	UNREFERENCED_1PARAMETER(words);
-
-	DEBUGFUNC("e1000_read_invm_i225");
-
-	/* Only the MAC addr is required to be present in the iNVM */
-	switch (offset) {
-	case NVM_MAC_ADDR:
-		ret_val = e1000_read_invm_word_i225(hw, (u8)offset, &data[0]);
-		ret_val |= e1000_read_invm_word_i225(hw, (u8)offset + 1,
-						     &data[1]);
-		ret_val |= e1000_read_invm_word_i225(hw, (u8)offset + 2,
-						     &data[2]);
-		if (ret_val != E1000_SUCCESS)
-			DEBUGOUT("MAC Addr not found in iNVM\n");
-		break;
-	case NVM_INIT_CTRL_2:
-		ret_val = e1000_read_invm_word_i225(hw, (u8)offset, data);
-		if (ret_val != E1000_SUCCESS) {
-			*data = NVM_INIT_CTRL_2_DEFAULT_I225;
-			ret_val = E1000_SUCCESS;
-		}
-		break;
-	case NVM_INIT_CTRL_4:
-		ret_val = e1000_read_invm_word_i225(hw, (u8)offset, data);
-		if (ret_val != E1000_SUCCESS) {
-			*data = NVM_INIT_CTRL_4_DEFAULT_I225;
-			ret_val = E1000_SUCCESS;
-		}
-		break;
-	case NVM_LED_1_CFG:
-		ret_val = e1000_read_invm_word_i225(hw, (u8)offset, data);
-		if (ret_val != E1000_SUCCESS) {
-			*data = NVM_LED_1_CFG_DEFAULT_I225;
-			ret_val = E1000_SUCCESS;
-		}
-		break;
-	case NVM_LED_0_2_CFG:
-		ret_val = e1000_read_invm_word_i225(hw, (u8)offset, data);
-		if (ret_val != E1000_SUCCESS) {
-			*data = NVM_LED_0_2_CFG_DEFAULT_I225;
-			ret_val = E1000_SUCCESS;
-		}
-		break;
-	case NVM_ID_LED_SETTINGS:
-		ret_val = e1000_read_invm_word_i225(hw, (u8)offset, data);
-		if (ret_val != E1000_SUCCESS) {
-			*data = ID_LED_RESERVED_FFFF;
-			ret_val = E1000_SUCCESS;
-		}
-		break;
-	case NVM_SUB_DEV_ID:
-		*data = hw->subsystem_device_id;
-		break;
-	case NVM_SUB_VEN_ID:
-		*data = hw->subsystem_vendor_id;
-		break;
-	case NVM_DEV_ID:
-		*data = hw->device_id;
-		break;
-	case NVM_VEN_ID:
-		*data = hw->vendor_id;
-		break;
-	default:
-		DEBUGOUT1("NVM word 0x%02x is not mapped.\n", offset);
-		*data = NVM_RESERVED_WORD;
-		break;
-	}
-	return ret_val;
-}
-
 #if defined(NVM_VERSION_SUPPORT) || defined(QV_RELEASE)
 /* e1000_read_invm_version_i225 - Reads iNVM version and image type
  * @hw: pointer to the HW structure
@@ -750,237 +893,6 @@ s32 e1000_pool_flash_update_done_i225(struct e1000_hw *hw)
 	return ret_val;
 }
 
-/* e1000_init_nvm_params_i225 - Initialize i225 NVM function pointers
- * @hw: pointer to the HW structure
- *
- * Initialize the i225/i211 NVM parameters and function pointers.
- */
-STATIC s32 e1000_init_nvm_params_i225(struct e1000_hw *hw)
-{
-	s32 ret_val;
-	struct e1000_nvm_info *nvm = &hw->nvm;
-
-	DEBUGFUNC("e1000_init_nvm_params_i225");
-
-	ret_val = e1000_init_nvm_params_82575(hw);
-	nvm->ops.acquire = e1000_acquire_nvm_i225;
-	nvm->ops.release = e1000_release_nvm_i225;
-	nvm->ops.valid_led_default = e1000_valid_led_default_i225;
-	if (e1000_get_flash_presence_i225(hw)) {
-		hw->nvm.type = e1000_nvm_flash_hw;
-		nvm->ops.read    = e1000_read_nvm_srrd_i225;
-		nvm->ops.write   = e1000_write_nvm_srwr_i225;
-		nvm->ops.validate = e1000_validate_nvm_checksum_i225;
-		nvm->ops.update   = e1000_update_nvm_checksum_i225;
-	} else {
-		hw->nvm.type = e1000_nvm_invm;
-		nvm->ops.read     = e1000_read_invm_i225;
-#ifndef NO_NULL_OPS_SUPPORT
-		nvm->ops.write    = e1000_null_write_nvm;
-		nvm->ops.validate = e1000_null_ops_generic;
-		nvm->ops.update   = e1000_null_ops_generic;
-#else
-		nvm->ops.write    = NULL;
-		nvm->ops.validate = NULL;
-		nvm->ops.update   = NULL;
-#endif /* NO_NULL_OPS_SUPPORT */
-	}
-	return ret_val;
-}
-
-#ifdef I225_LTR_SUPPORT
-/* e1000_set_ltr_i225 - Set Latency Tolerance Reporting thresholds.
- * @hw: pointer to the HW structure
- * @link: bool indicating link status
- *
- * Set the LTR thresholds based on the link speed (Mbps), EEE, and DMAC
- * settings, otherwise specify that there is no LTR requirement.
- */
-STATIC s32 e1000_set_ltr_i225(struct e1000_hw *hw, bool link)
-{
-	u16 speed, duplex;
-	u32 tw_system, ltrc, ltrv, ltr_min, ltr_max, scale_min, scale_max;
-	s32 size;
-
-	DEBUGFUNC("e1000_set_ltr_i225");
-
-	/* If we do not have link, LTR thresholds are zero. */
-	if (link) {
-		hw->mac.ops.get_link_up_info(hw, &speed, &duplex);
-
-		/* Check if using copper interface with EEE enabled or if the
-		 * link speed is 10 Mbps.
-		 */
-		if ((hw->phy.media_type == e1000_media_type_copper) &&
-		    !(hw->dev_spec._82575.eee_disable) &&
-		     (speed != SPEED_10)) {
-			/* EEE enabled, so send LTRMAX threshold. */
-			ltrc = E1000_READ_REG(hw, E1000_LTRC) |
-				E1000_LTRC_EEEMS_EN;
-			E1000_WRITE_REG(hw, E1000_LTRC, ltrc);
-
-			/* Calculate tw_system (nsec). */
-			if (speed == SPEED_100) {
-				tw_system = ((E1000_READ_REG(hw, E1000_EEE_SU) &
-					     E1000_TW_SYSTEM_100_MASK) >>
-					     E1000_TW_SYSTEM_100_SHIFT) * 500;
-			} else {
-				tw_system = (E1000_READ_REG(hw, E1000_EEE_SU) &
-					     E1000_TW_SYSTEM_1000_MASK) * 500;
-				}
-		} else {
-			tw_system = 0;
-			}
-
-		/* Get the Rx packet buffer size. */
-		size = E1000_READ_REG(hw, E1000_RXPBS) &
-			E1000_RXPBS_SIZE_I225_MASK;
-
-		/* Calculations vary based on DMAC settings. */
-		if (E1000_READ_REG(hw, E1000_DMACR) & E1000_DMACR_DMAC_EN) {
-			size -= (E1000_READ_REG(hw, E1000_DMACR) &
-				 E1000_DMACR_DMACTHR_MASK) >>
-				 E1000_DMACR_DMACTHR_SHIFT;
-			/* Convert size to bits. */
-			size *= 1024 * 8;
-		} else {
-			/* Convert size to bytes, subtract the MTU, and then
-			 * convert the size to bits.
-			 */
-			size *= 1024;
-			size -= hw->dev_spec._82575.mtu;
-			size *= 8;
-		}
-
-		if (size < 0) {
-			DEBUGOUT1("Invalid effective Rx buffer size %d\n",
-				  size);
-			return -E1000_ERR_CONFIG;
-		}
-
-		/* Calculate the thresholds. Since speed is in Mbps, simplify
-		 * the calculation by multiplying size/speed by 1000 for result
-		 * to be in nsec before dividing by the scale in nsec. Set the
-		 * scale such that the LTR threshold fits in the register.
-		 */
-		ltr_min = (1000 * size) / speed;
-		ltr_max = ltr_min + tw_system;
-		scale_min = (ltr_min / 1024) < 1024 ? E1000_LTRMINV_SCALE_1024 :
-			    E1000_LTRMINV_SCALE_32768;
-		scale_max = (ltr_max / 1024) < 1024 ? E1000_LTRMAXV_SCALE_1024 :
-			    E1000_LTRMAXV_SCALE_32768;
-		ltr_min /= scale_min == E1000_LTRMINV_SCALE_1024 ? 1024 : 32768;
-		ltr_max /= scale_max == E1000_LTRMAXV_SCALE_1024 ? 1024 : 32768;
-
-		/* Only write the LTR thresholds if they differ from before. */
-		ltrv = E1000_READ_REG(hw, E1000_LTRMINV);
-		if (ltr_min != (ltrv & E1000_LTRMINV_LTRV_MASK)) {
-			ltrv = E1000_LTRMINV_LSNP_REQ | ltr_min |
-			      (scale_min << E1000_LTRMINV_SCALE_SHIFT);
-			E1000_WRITE_REG(hw, E1000_LTRMINV, ltrv);
-		}
-
-		ltrv = E1000_READ_REG(hw, E1000_LTRMAXV);
-		if (ltr_max != (ltrv & E1000_LTRMAXV_LTRV_MASK)) {
-			ltrv = E1000_LTRMAXV_LSNP_REQ | ltr_max |
-			      (scale_min << E1000_LTRMAXV_SCALE_SHIFT);
-			E1000_WRITE_REG(hw, E1000_LTRMAXV, ltrv);
-		}
-	}
-
-	return E1000_SUCCESS;
-}
-
-/* e1000_check_for_link_i225 - Check for link
- * @hw: pointer to the HW structure
- *
- * Checks to see of the link status of the hardware has changed.  If a
- * change in link status has been detected, then we read the PHY registers
- * to get the current speed/duplex if link exists.
- */
-s32 e1000_check_for_link_i225(struct e1000_hw *hw)
-{
-	struct e1000_mac_info *mac = &hw->mac;
-	s32 ret_val;
-	bool link = false;
-
-	DEBUGFUNC("e1000_check_for_link_i225");
-
-	if (hw->phy.media_type != e1000_media_type_copper) {
-		u16 speed, duplex;
-
-		ret_val = e1000_get_pcs_speed_and_duplex_82575(hw, &speed,
-							       &duplex);
-		/* Use this flag to determine if link needs to be checked or
-		 * not.  If we have link clear the flag so that we do not
-		 * continue to check for link.
-		 */
-		hw->mac.get_link_status = !hw->mac.serdes_has_link;
-
-		link = hw->mac.serdes_has_link;
-	} else {
-		/* We only want to go out to the PHY registers to see if
-		 * Auto-Neg has completed and/or if our link status has
-		 * changed.  The get_link_status flag is set upon receiving
-		 * a Link Status Change or Rx Sequence Error interrupt.
-		 */
-		if (!mac->get_link_status) {
-			ret_val = E1000_SUCCESS;
-			goto out;
-		}
-
-		/* First we want to see if the MII Status Register reports
-		 * link.  If so, then we want to get the current speed/duplex
-		 * of the PHY.
-		 */
-		ret_val = e1000_phy_has_link_generic(hw, 1, 0, &link);
-		if (ret_val)
-			goto out;
-
-		if (!link)
-			goto out; /* No link detected */
-
-		mac->get_link_status = false;
-
-		/* Check if there was DownShift, must be checked
-		 * immediately after link-up
-		 */
-		e1000_check_downshift_generic(hw);
-
-		/* If we are forcing speed/duplex, then we simply return since
-		 * we have already determined whether we have link or not.
-		 */
-		if (!mac->autoneg) {
-			ret_val = -E1000_ERR_CONFIG;
-			goto out;
-		}
-
-		/* Auto-Neg is enabled.  Auto Speed Detection takes care
-		 * of MAC speed/duplex configuration.  So we only need to
-		 * configure Collision Distance in the MAC.
-		 */
-		mac->ops.config_collision_dist(hw);
-
-		/* Configure Flow Control now that Auto-Neg has completed.
-		 * First, we need to restore the desired flow control
-		 * settings because we may have had to re-autoneg with a
-		 * different link partner.
-		 */
-		ret_val = e1000_config_fc_after_link_up_generic(hw);
-		if (ret_val)
-			DEBUGOUT("Error configuring flow control\n");
-	}
-
-out:
-	/* Now that we are aware of our link settings, we can set the LTR
-	 * thresholds.
-	 */
-	ret_val = e1000_set_ltr_i225(hw, link);
-
-	return ret_val;
-}
-
-#endif /* I225_LTR_SUPPORT */
 /* e1000_init_function_pointers_i225 - Init func ptrs.
  * @hw: pointer to the HW structure
  *
@@ -988,8 +900,12 @@ s32 e1000_check_for_link_i225(struct e1000_hw *hw)
  */
 void e1000_init_function_pointers_i225(struct e1000_hw *hw)
 {
-	e1000_init_function_pointers_82575(hw);
+	e1000_init_mac_ops_generic(hw);
+	e1000_init_phy_ops_generic(hw);
+	e1000_init_nvm_ops_generic(hw);
+	hw->mac.ops.init_params = e1000_init_mac_params_i225;
 	hw->nvm.ops.init_params = e1000_init_nvm_params_i225;
+	hw->phy.ops.init_params = e1000_init_phy_params_i225;
 }
 
 /* e1000_valid_led_default_i225 - Verify a valid default LED config
diff --git a/drivers/net/e1000/base/e1000_mac.c b/drivers/net/e1000/base/e1000_mac.c
index 92ee33745..0ae2a60d8 100644
--- a/drivers/net/e1000/base/e1000_mac.c
+++ b/drivers/net/e1000/base/e1000_mac.c
@@ -4,10 +4,7 @@
 
 #include "e1000_api.h"
 
-STATIC s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw);
-STATIC void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
 STATIC void e1000_config_collision_dist_generic(struct e1000_hw *hw);
-STATIC int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);
 
 /**
  *  e1000_init_mac_ops_generic - Initialize MAC function pointers
@@ -22,32 +19,8 @@ void e1000_init_mac_ops_generic(struct e1000_hw *hw)
 
 	/* General Setup */
 	mac->ops.init_params = e1000_null_ops_generic;
-	mac->ops.init_hw = e1000_null_ops_generic;
-	mac->ops.reset_hw = e1000_null_ops_generic;
-	mac->ops.setup_physical_interface = e1000_null_ops_generic;
-	mac->ops.get_bus_info = e1000_null_ops_generic;
-	mac->ops.set_lan_id = e1000_set_lan_id_multi_port_pcie;
-	mac->ops.read_mac_addr = e1000_read_mac_addr_generic;
 	mac->ops.config_collision_dist = e1000_config_collision_dist_generic;
-	mac->ops.clear_hw_cntrs = e1000_null_mac_generic;
-	/* LED */
-	mac->ops.cleanup_led = e1000_null_ops_generic;
-	mac->ops.setup_led = e1000_null_ops_generic;
-	mac->ops.blink_led = e1000_null_ops_generic;
-	mac->ops.led_on = e1000_null_ops_generic;
-	mac->ops.led_off = e1000_null_ops_generic;
-	/* LINK */
-	mac->ops.setup_link = e1000_null_ops_generic;
-	mac->ops.get_link_up_info = e1000_null_link_info;
-	mac->ops.check_for_link = e1000_null_ops_generic;
-	/* Management */
-	mac->ops.check_mng_mode = e1000_null_mng_mode;
-	/* VLAN, MC, etc. */
-	mac->ops.update_mc_addr_list = e1000_null_update_mc;
-	mac->ops.clear_vfta = e1000_null_mac_generic;
-	mac->ops.write_vfta = e1000_null_write_vfta;
 	mac->ops.rar_set = e1000_rar_set_generic;
-	mac->ops.validate_mdi_setting = e1000_validate_mdi_setting_generic;
 }
 
 /**
@@ -240,26 +213,6 @@ s32 e1000_get_bus_info_pcie_generic(struct e1000_hw *hw)
 	return E1000_SUCCESS;
 }
 
-/**
- *  e1000_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
- *
- *  @hw: pointer to the HW structure
- *
- *  Determines the LAN function id by reading memory-mapped registers
- *  and swaps the port value if requested.
- **/
-STATIC void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw)
-{
-	struct e1000_bus_info *bus = &hw->bus;
-	u32 reg;
-
-	/* The status register reports the correct function number
-	 * for the device regardless of function swap state.
-	 */
-	reg = E1000_READ_REG(hw, E1000_STATUS);
-	bus->func = (reg & E1000_STATUS_FUNC_MASK) >> E1000_STATUS_FUNC_SHIFT;
-}
-
 /**
  *  e1000_set_lan_id_multi_port_pci - Set LAN id for PCI multiple port devices
  *  @hw: pointer to the HW structure
@@ -448,7 +401,7 @@ s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw)
  *  Sets the receive address array register at index to the address passed
  *  in by addr.
  **/
-STATIC int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)
+int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)
 {
 	u32 rar_low, rar_high;
 
@@ -2165,25 +2118,6 @@ void e1000_update_adaptive_generic(struct e1000_hw *hw)
 	}
 }
 
-/**
- *  e1000_validate_mdi_setting_generic - Verify MDI/MDIx settings
- *  @hw: pointer to the HW structure
- *
- *  Verify that when not using auto-negotiation that MDI/MDIx is correctly
- *  set, which is forced to MDI mode only.
- **/
-STATIC s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw)
-{
-	DEBUGFUNC("e1000_validate_mdi_setting_generic");
-
-	if (!hw->mac.autoneg && (hw->phy.mdix == 0 || hw->phy.mdix == 3)) {
-		DEBUGOUT("Invalid MDI setting detected\n");
-		hw->phy.mdix = 1;
-		return -E1000_ERR_CONFIG;
-	}
-
-	return E1000_SUCCESS;
-}
 
 /**
  *  e1000_validate_mdi_setting_crossover_generic - Verify MDI/MDIx settings
diff --git a/drivers/net/e1000/base/e1000_mac.h b/drivers/net/e1000/base/e1000_mac.h
index bbd2a7388..35a691f63 100644
--- a/drivers/net/e1000/base/e1000_mac.h
+++ b/drivers/net/e1000/base/e1000_mac.h
@@ -41,6 +41,7 @@ s32  e1000_led_on_generic(struct e1000_hw *hw);
 s32  e1000_led_off_generic(struct e1000_hw *hw);
 void e1000_update_mc_addr_list_generic(struct e1000_hw *hw,
 				       u8 *mc_addr_list, u32 mc_addr_count);
+int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);
 s32  e1000_set_default_fc_generic(struct e1000_hw *hw);
 s32  e1000_set_fc_watermarks_generic(struct e1000_hw *hw);
 s32  e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 30/70] net/e1000/base: expose EEE defines
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (28 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 29/70] net/e1000/base: more function name cleanup Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 31/70] net/e1000/base: expose the manage functionality Guinan Sun
                   ` (41 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher

Expose the needed EEE register and defines.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h |  3 +++
 drivers/net/e1000/base/e1000_i225.c    | 12 +++---------
 2 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 7f9c85451..86790c405 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -858,6 +858,7 @@
 #define E1000_EEE_SU_LPI_CLK_STP	0x00800000 /* EEE LPI Clock Stop */
 #define E1000_EEE_LP_ADV_DEV_I210	7          /* EEE LP Adv Device */
 #define E1000_EEE_LP_ADV_ADDR_I210	61         /* EEE LP Adv Register */
+#define E1000_EEE_SU_LPI_CLK_STP	0x00800000 /* EEE LPI Clock Stop */
 #ifndef NO_I225_SUPPORT
 #define E1000_EEE_LP_ADV_DEV_I225	7          /* EEE LP Adv Device */
 #define E1000_EEE_LP_ADV_ADDR_I225	61         /* EEE LP Adv Register */
@@ -1056,6 +1057,8 @@
 #define E1000_EECD_FLUPD_I225		0x00800000 /* Update FLASH */
 #define E1000_EECD_FLUDONE_I225		0x04000000 /* Update FLASH done */
 #define E1000_EECD_FLASH_DETECTED_I225	0x00080000 /* FLASH detected */
+#define E1000_FLUDONE_ATTEMPTS		20000
+#define E1000_EERD_EEWR_MAX_COUNT	512 /* buffered EEPROM words rw */
 
 #endif /* NO_I225_SUPPORT */
 #define E1000_NVM_RW_REG_DATA	16  /* Offset to data in NVM read/write regs */
diff --git a/drivers/net/e1000/base/e1000_i225.c b/drivers/net/e1000/base/e1000_i225.c
index 85c692644..5ace44546 100644
--- a/drivers/net/e1000/base/e1000_i225.c
+++ b/drivers/net/e1000/base/e1000_i225.c
@@ -406,8 +406,8 @@ STATIC s32 e1000_get_hw_semaphore_i225(struct e1000_hw *hw)
 		/* In rare circumstances, the SW semaphore may already be held
 		 * unintentionally. Clear the semaphore once before giving up.
 		 */
-		if (hw->dev_spec._82575.clear_semaphore_once) {
-			hw->dev_spec._82575.clear_semaphore_once = false;
+		if (hw->dev_spec._i225.clear_semaphore_once) {
+			hw->dev_spec._i225.clear_semaphore_once = false;
 			e1000_put_hw_semaphore_generic(hw);
 			for (i = 0; i < timeout; i++) {
 				swsm = E1000_READ_REG(hw, E1000_SWSM);
@@ -1147,7 +1147,7 @@ s32 e1000_set_eee_i225(struct e1000_hw *hw, bool adv2p5G, bool adv1G,
 	eeer = E1000_READ_REG(hw, E1000_EEER);
 
 	/* enable or disable per user setting */
-	if (!(hw->dev_spec._82575.eee_disable)) {
+	if (!(hw->dev_spec._i225.eee_disable)) {
 		u32 eee_su = E1000_READ_REG(hw, E1000_EEE_SU);
 
 		if (adv100M)
@@ -1168,12 +1168,6 @@ s32 e1000_set_eee_i225(struct e1000_hw *hw, bool adv2p5G, bool adv1G,
 		eeer |= (E1000_EEER_TX_LPI_EN | E1000_EEER_RX_LPI_EN |
 			E1000_EEER_LPI_FC);
 
-#ifndef EXTERNAL_RELEASE
-		/*
-		 * This bit is supposed to be cleared by the NVM. However, older
-		 * NVMs may not have done this (Springville HW HSD #359296).
-		 */
-#endif /* EXTERNAL_RELEASE */
 		/* This bit should not be set in normal operation. */
 		if (eee_su & E1000_EEE_SU_LPI_CLK_STP)
 			DEBUGOUT("LPI Clock Stop Bit should not be set!\n");
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 31/70] net/e1000/base: expose the manage functionality
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (29 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 30/70] net/e1000/base: expose EEE defines Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 32/70] net/e1000/base: modify the wrong return value Guinan Sun
                   ` (40 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Add the manage header to the base file.
Rid of compilation errors.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_manage.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_manage.c b/drivers/net/e1000/base/e1000_manage.c
index 7fb63dd72..74b4480de 100644
--- a/drivers/net/e1000/base/e1000_manage.c
+++ b/drivers/net/e1000/base/e1000_manage.c
@@ -3,6 +3,7 @@
  */
 
 #include "e1000_api.h"
+#include "e1000_manage.h"
 
 /**
  *  e1000_calculate_checksum - Calculate checksum for buffer
@@ -425,6 +426,7 @@ s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length)
 
 	return E1000_SUCCESS;
 }
+
 /**
  *  e1000_load_firmware - Writes proxy FW code buffer to host interface
  *                        and execute.
@@ -543,5 +545,3 @@ s32 e1000_load_firmware(struct e1000_hw *hw, u8 *buffer, u32 length)
 
 	return E1000_SUCCESS;
 }
-
-
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 32/70] net/e1000/base: modify the wrong return value
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (30 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 31/70] net/e1000/base: expose the manage functionality Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 33/70] net/e1000/base: wrap the unneeded code Guinan Sun
                   ` (39 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Make 'init_phy_hw_reset_generic' method to be closest to the
upstream method. Fix the return value to be same as in upstream.
Fix unable to handle kernel NULL pointer dereference at 0x0 caused
to kernel panic.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_phy.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index 73e2ecda8..bcb3df2f3 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -2905,7 +2905,7 @@ s32 e1000_phy_hw_reset_generic(struct e1000_hw *hw)
 
 	phy->ops.release(hw);
 
-	return phy->ops.get_cfg_done(hw);
+	return ret_val;
 }
 
 /**
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 33/70] net/e1000/base: wrap the unneeded code
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (31 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 32/70] net/e1000/base: modify the wrong return value Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 34/70] net/e1000/base: clean family specific functions from base Guinan Sun
                   ` (38 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

The default flow control settings for i225 should be set up as 'full'
for a request mode and do not depend from a NVM. '_set_default_fc_generic'
method took value from NVM and set a wrong default flow control settings.
Therefore driver up with none flow control settings.
Setting up '_fc_full' directly from a '_setup_link_generic' method and
solve this problem.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_mac.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_mac.c b/drivers/net/e1000/base/e1000_mac.c
index 0ae2a60d8..577ba9c1b 100644
--- a/drivers/net/e1000/base/e1000_mac.c
+++ b/drivers/net/e1000/base/e1000_mac.c
@@ -941,9 +941,7 @@ s32 e1000_setup_link_generic(struct e1000_hw *hw)
 	 * based on the EEPROM flow control settings.
 	 */
 	if (hw->fc.requested_mode == e1000_fc_default) {
-		ret_val = e1000_set_default_fc_generic(hw);
-		if (ret_val)
-			return ret_val;
+		hw->fc.requested_mode = e1000_fc_full;
 	}
 
 	/* Save off the requested flow control mode for use later.  Depending
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 34/70] net/e1000/base: clean family specific functions from base
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (32 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 33/70] net/e1000/base: wrap the unneeded code Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 35/70] net/e1000/base: expose more time synchronization registers Guinan Sun
                   ` (37 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher

Clean family specific functions.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i210.c | 2 --
 drivers/net/e1000/base/e1000_i225.c | 2 --
 2 files changed, 4 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index d4e4b527a..1126b2916 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -776,8 +776,6 @@ void e1000_init_function_pointers_i210(struct e1000_hw *hw)
 {
 	e1000_init_function_pointers_82575(hw);
 	hw->nvm.ops.init_params = e1000_init_nvm_params_i210;
-
-	return;
 }
 
 /**
diff --git a/drivers/net/e1000/base/e1000_i225.c b/drivers/net/e1000/base/e1000_i225.c
index 5ace44546..ef47f1810 100644
--- a/drivers/net/e1000/base/e1000_i225.c
+++ b/drivers/net/e1000/base/e1000_i225.c
@@ -7,10 +7,8 @@ STATIC s32 e1000_reset_hw_i225(struct e1000_hw *hw);
 STATIC s32 e1000_acquire_nvm_i225(struct e1000_hw *hw);
 STATIC void e1000_release_nvm_i225(struct e1000_hw *hw);
 STATIC s32 e1000_get_hw_semaphore_i225(struct e1000_hw *hw);
-#ifndef QV_RELEASE
 STATIC s32 __e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
 				  u16 *data);
-#endif /* QV_RELEASE */
 STATIC s32 e1000_pool_flash_update_done_i225(struct e1000_hw *hw);
 STATIC s32 e1000_valid_led_default_i225(struct e1000_hw *hw, u16 *data);
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 35/70] net/e1000/base: expose more time synchronization registers
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (33 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 34/70] net/e1000/base: clean family specific functions from base Guinan Sun
@ 2020-06-22  6:45 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 36/70] net/e1000/base: add define to PCIm function state Guinan Sun
                   ` (36 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:45 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Legacy PTP support for i225 device required time synchronization
registers. This patch add wrap to expose these registers to igc core
files.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.h   |  8 ---
 drivers/net/e1000/base/e1000_defines.h | 69 ++++++++++++++++++++++++++
 drivers/net/e1000/base/e1000_regs.h    | 10 ++++
 3 files changed, 79 insertions(+), 8 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index fb810a4b3..d8ea3ae1f 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -148,14 +148,12 @@ struct e1000_adv_context_desc {
 /* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */
 #define E1000_IMIR_PORT_IM_EN	0x00010000  /* TCP port enable */
 #define E1000_IMIR_PORT_BP	0x00020000  /* TCP port check bypass */
-#define E1000_IMIREXT_SIZE_BP	0x00001000  /* Packet size bypass */
 #define E1000_IMIREXT_CTRL_URG	0x00002000  /* Check URG bit in header */
 #define E1000_IMIREXT_CTRL_ACK	0x00004000  /* Check ACK bit in header */
 #define E1000_IMIREXT_CTRL_PSH	0x00008000  /* Check PSH bit in header */
 #define E1000_IMIREXT_CTRL_RST	0x00010000  /* Check RST bit in header */
 #define E1000_IMIREXT_CTRL_SYN	0x00020000  /* Check SYN bit in header */
 #define E1000_IMIREXT_CTRL_FIN	0x00040000  /* Check FIN bit in header */
-#define E1000_IMIREXT_CTRL_BP	0x00080000  /* Bypass check of ctrl bits */
 
 #define E1000_RXDADV_RSSTYPE_MASK	0x0000000F
 #define E1000_RXDADV_RSSTYPE_SHIFT	12
@@ -164,7 +162,6 @@ struct e1000_adv_context_desc {
 #define E1000_RXDADV_SPLITHEADER_EN	0x00001000
 #define E1000_RXDADV_SPH		0x8000
 #define E1000_RXDADV_STAT_TS		0x10000 /* Pkt was time stamped */
-#define E1000_RXDADV_STAT_TSIP		0x08000 /* timestamp in packet */
 #define E1000_RXDADV_ERR_HBO		0x00800000
 
 /* RSS Hash results */
@@ -251,7 +248,6 @@ struct e1000_adv_context_desc {
 /* ETQF register bit definitions */
 #define E1000_ETQF_FILTER_ENABLE	(1 << 26)
 #define E1000_ETQF_IMM_INT		(1 << 29)
-#define E1000_ETQF_1588			(1 << 30)
 
 /*
  * ETQF filter list: one static filter per filter consumer. This is
@@ -263,10 +259,6 @@ struct e1000_adv_context_desc {
  */
 #define E1000_ETQF_FILTER_EAPOL		0
 
-#define E1000_FTQF_VF_BP		0x00008000
-#define E1000_FTQF_1588_TIME_STAMP	0x08000000
-#define E1000_FTQF_MASK			0xF0000000
-#define E1000_FTQF_MASK_PROTO_BP	0x10000000
 #define E1000_FTQF_MASK_SOURCE_ADDR_BP	0x20000000
 #define E1000_FTQF_MASK_DEST_ADDR_BP	0x40000000
 #define E1000_FTQF_MASK_SOURCE_PORT_BP	0x80000000
diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 86790c405..b132d5ee2 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -784,6 +784,75 @@
 #define E1000_TIMINCA_INCPERIOD_SHIFT	24
 #define E1000_TIMINCA_INCVALUE_MASK	0x00FFFFFF
 
+/* Time Sync Interrupt Cause/Mask Register Bits */
+#define TSINTR_SYS_WRAP	(1 << 0) /* SYSTIM Wrap around. */
+#define TSINTR_TXTS	(1 << 1) /* Transmit Timestamp. */
+#define TSINTR_TT0	(1 << 3) /* Target Time 0 Trigger. */
+#define TSINTR_TT1	(1 << 4) /* Target Time 1 Trigger. */
+#define TSINTR_AUTT0	(1 << 5) /* Auxiliary Timestamp 0 Taken. */
+#define TSINTR_AUTT1	(1 << 6) /* Auxiliary Timestamp 1 Taken. */
+
+#define TSYNC_INTERRUPTS	TSINTR_TXTS
+
+/* TSAUXC Configuration Bits */
+#define TSAUXC_EN_TT0	(1 << 0)  /* Enable target time 0. */
+#define TSAUXC_EN_TT1	(1 << 1)  /* Enable target time 1. */
+#define TSAUXC_EN_CLK0	(1 << 2)  /* Enable Configurable Frequency Clock 0. */
+#define TSAUXC_ST0	(1 << 4)  /* Start Clock 0 Toggle on Target Time 0. */
+#define TSAUXC_EN_CLK1	(1 << 5)  /* Enable Configurable Frequency Clock 1. */
+#define TSAUXC_ST1	(1 << 7)  /* Start Clock 1 Toggle on Target Time 1. */
+#define TSAUXC_EN_TS0	(1 << 8)  /* Enable hardware timestamp 0. */
+#define TSAUXC_EN_TS1	(1 << 10) /* Enable hardware timestamp 0. */
+
+/* SDP Configuration Bits */
+#define AUX0_SEL_SDP0	(0u << 0)  /* Assign SDP0 to auxiliary time stamp 0. */
+#define AUX0_SEL_SDP1	(1u << 0)  /* Assign SDP1 to auxiliary time stamp 0. */
+#define AUX0_SEL_SDP2	(2u << 0)  /* Assign SDP2 to auxiliary time stamp 0. */
+#define AUX0_SEL_SDP3	(3u << 0)  /* Assign SDP3 to auxiliary time stamp 0. */
+#define AUX0_TS_SDP_EN	(1u << 2)  /* Enable auxiliary time stamp trigger 0. */
+#define AUX1_SEL_SDP0	(0u << 3)  /* Assign SDP0 to auxiliary time stamp 1. */
+#define AUX1_SEL_SDP1	(1u << 3)  /* Assign SDP1 to auxiliary time stamp 1. */
+#define AUX1_SEL_SDP2	(2u << 3)  /* Assign SDP2 to auxiliary time stamp 1. */
+#define AUX1_SEL_SDP3	(3u << 3)  /* Assign SDP3 to auxiliary time stamp 1. */
+#define AUX1_TS_SDP_EN	(1u << 5)  /* Enable auxiliary time stamp trigger 1. */
+#define TS_SDP0_EN	(1u << 8)  /* SDP0 is assigned to Tsync. */
+#define TS_SDP1_EN	(1u << 11) /* SDP1 is assigned to Tsync. */
+#define TS_SDP2_EN	(1u << 14) /* SDP2 is assigned to Tsync. */
+#define TS_SDP3_EN	(1u << 17) /* SDP3 is assigned to Tsync. */
+#define TS_SDP0_SEL_TT0	(0u << 6)  /* Target time 0 is output on SDP0. */
+#define TS_SDP0_SEL_TT1	(1u << 6)  /* Target time 1 is output on SDP0. */
+#define TS_SDP1_SEL_TT0	(0u << 9)  /* Target time 0 is output on SDP1. */
+#define TS_SDP1_SEL_TT1	(1u << 9)  /* Target time 1 is output on SDP1. */
+#define TS_SDP0_SEL_FC0	(2u << 6)  /* Freq clock  0 is output on SDP0. */
+#define TS_SDP0_SEL_FC1	(3u << 6)  /* Freq clock  1 is output on SDP0. */
+#define TS_SDP1_SEL_FC0	(2u << 9)  /* Freq clock  0 is output on SDP1. */
+#define TS_SDP1_SEL_FC1	(3u << 9)  /* Freq clock  1 is output on SDP1. */
+#define TS_SDP2_SEL_TT0	(0u << 12) /* Target time 0 is output on SDP2. */
+#define TS_SDP2_SEL_TT1	(1u << 12) /* Target time 1 is output on SDP2. */
+#define TS_SDP2_SEL_FC0	(2u << 12) /* Freq clock  0 is output on SDP2. */
+#define TS_SDP2_SEL_FC1	(3u << 12) /* Freq clock  1 is output on SDP2. */
+#define TS_SDP3_SEL_TT0	(0u << 15) /* Target time 0 is output on SDP3. */
+#define TS_SDP3_SEL_TT1	(1u << 15) /* Target time 1 is output on SDP3. */
+#define TS_SDP3_SEL_FC0	(2u << 15) /* Freq clock  0 is output on SDP3. */
+#define TS_SDP3_SEL_FC1	(3u << 15) /* Freq clock  1 is output on SDP3. */
+
+#define E1000_CTRL_SDP0_DIR	0x00400000  /* SDP0 Data direction */
+#define E1000_CTRL_SDP1_DIR	0x00800000  /* SDP1 Data direction */
+
+/* Extended Device Control */
+#define E1000_CTRL_EXT_SDP2_DIR	0x00000400 /* SDP2 Data direction */
+
+/* ETQF register bit definitions */
+#define E1000_ETQF_1588			(1 << 30)
+#define E1000_FTQF_VF_BP		0x00008000
+#define E1000_FTQF_1588_TIME_STAMP	0x08000000
+#define E1000_FTQF_MASK			0xF0000000
+#define E1000_FTQF_MASK_PROTO_BP	0x10000000
+/* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */
+#define E1000_IMIREXT_CTRL_BP	0x00080000  /* Bypass check of ctrl bits */
+#define E1000_IMIREXT_SIZE_BP	0x00001000  /* Packet size bypass */
+
+#define E1000_RXDADV_STAT_TSIP		0x08000 /* timestamp in packet */
 #define E1000_TSICR_TXTS		0x00000002
 #define E1000_TSIM_TXTS			0x00000002
 /* TUPLE Filtering Configuration */
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 7a6cb7ce9..2e14ce109 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -698,4 +698,14 @@
 
 
 
+/* IEEE 1588 TIMESYNCH */
+#define E1000_TRGTTIML0	0x0B644 /* Target Time Register 0 Low  - RW */
+#define E1000_TRGTTIMH0	0x0B648 /* Target Time Register 0 High - RW */
+#define E1000_TRGTTIML1	0x0B64C /* Target Time Register 1 Low  - RW */
+#define E1000_TRGTTIMH1	0x0B650 /* Target Time Register 1 High - RW */
+#define E1000_FREQOUT0	0x0B654 /* Frequency Out 0 Control Register - RW */
+#define E1000_FREQOUT1	0x0B658 /* Frequency Out 1 Control Register - RW */
+#define E1000_TSSDP	0x0003C  /* Time Sync SDP Configuration Register - RW */
+
+
 #endif
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 36/70] net/e1000/base: add define to PCIm function state
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (34 preceding siblings ...)
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 35/70] net/e1000/base: expose more time synchronization registers Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 37/70] net/e1000/base: add missing register defines Guinan Sun
                   ` (35 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Lifshits Vitaly

Added define to pcim function state

Signed-off-by: Lifshits Vitaly <vitaly.lifshits@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index b132d5ee2..a909aa979 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -316,6 +316,7 @@
 #define E1000_STATUS_PCIX_SPEED_66	0x00000000 /* PCI-X bus spd 50-66MHz */
 #define E1000_STATUS_PCIX_SPEED_100	0x00004000 /* PCI-X bus spd 66-100MHz */
 #define E1000_STATUS_PCIX_SPEED_133	0x00008000 /* PCI-X bus spd 100-133MHz*/
+#define E1000_STATUS_PCIM_STATE		0x40000000 /* PCIm function state */
 
 #define SPEED_10	10
 #define SPEED_100	100
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 37/70] net/e1000/base: add missing register defines
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (35 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 36/70] net/e1000/base: add define to PCIm function state Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 38/70] net/e1000/base: move the device reset definition Guinan Sun
                   ` (34 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher

Added defines for the EEC, SHADOWINF and FLFWUPDATE registers needed for
the nvmupd_validate_offset function to correctly validate the NVM update
offset.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_regs.h | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 2e14ce109..afd27ac2b 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -145,7 +145,10 @@
 #define E1000_RADV	0x0282C  /* Rx Interrupt Absolute Delay Timer - RW */
 #define E1000_EMIADD	0x10     /* Extended Memory Indirect Address */
 #define E1000_EMIDATA	0x11     /* Extended Memory Indirect Data */
-#define E1000_SRWR		0x12018  /* Shadow Ram Write Register - RW */
+/* Shadow Ram Write Register - RW */
+#define E1000_SRWR		0x12018
+#define E1000_EEC_REG		0x12010
+
 #define E1000_I210_FLMNGCTL	0x12038
 #define E1000_I210_FLMNGDATA	0x1203C
 #define E1000_I210_FLMNGCNT	0x12040
@@ -156,6 +159,9 @@
 
 #define E1000_I210_FLA		0x1201C
 
+#define E1000_SHADOWINF		0x12068
+#define E1000_FLFWUPDATE	0x12108
+
 #define E1000_INVM_DATA_REG(_n)	(0x12120 + 4*(_n))
 #define E1000_INVM_SIZE		64 /* Number of INVM Data Registers */
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 38/70] net/e1000/base: move the device reset definition
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (36 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 37/70] net/e1000/base: add missing register defines Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 39/70] net/e1000/base: increased timeout for ME ULP exit Guinan Sun
                   ` (33 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Design change request. i225 devices going to use device reset
instead of port soft reset. Move the device reset definition
from _82575.h file to _defines.h file and add appropriate wrap.
The reset flow changes for i225 will be submitted in separate patch.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.h   | 3 ---
 drivers/net/e1000/base/e1000_defines.h | 1 +
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index d8ea3ae1f..b03d4b66f 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -25,9 +25,7 @@
 #define E1000_RAR_ENTRIES_I350	32
 #define E1000_SW_SYNCH_MB	0x00000100
 #define E1000_STAT_DEV_RST_SET	0x00100000
-#define E1000_CTRL_DEV_RST	0x20000000
 
-#ifdef E1000_BIT_FIELDS
 struct e1000_adv_data_desc {
 	__le64 buffer_addr;    /* Address of the descriptor's data buffer */
 	union {
@@ -90,7 +88,6 @@ struct e1000_adv_context_desc {
 		} fields;
 	} l4_setup;
 };
-#endif
 
 /* SRRCTL bit definitions */
 #define E1000_SRRCTL_BSIZEHDRSIZE_MASK		0x00000F00
diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index a909aa979..abe83ad7d 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -251,6 +251,7 @@
 #define E1000_CTRL_SWDPIO0	0x00400000 /* SWDPIN 0 Input or output */
 #define E1000_CTRL_SWDPIO2	0x01000000 /* SWDPIN 2 input or output */
 #define E1000_CTRL_SWDPIO3	0x02000000 /* SWDPIN 3 input or output */
+#define E1000_CTRL_DEV_RST	0x20000000 /* Device reset */
 #define E1000_CTRL_RST		0x04000000 /* Global reset */
 #define E1000_CTRL_RFCE		0x08000000 /* Receive Flow Control enable */
 #define E1000_CTRL_TFCE		0x10000000 /* Transmit flow control enable */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 39/70] net/e1000/base: increased timeout for ME ULP exit
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (37 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 38/70] net/e1000/base: move the device reset definition Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 40/70] net/e1000/base: add missing device ID Guinan Sun
                   ` (32 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Efrati Nir

Due timing issues in WHL and since recovery by host is
not always supported, increased timeout for ME to finish
ULP exit flow for Nahum before timer expiration.

Signed-off-by: Efrati Nir <nir.efrati@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 1dc29553e..b79e3bad8 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -1268,6 +1268,7 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)
 s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
 {
 	s32 ret_val = E1000_SUCCESS;
+	u8 ulp_exit_timeout = 30;
 	u32 mac_reg;
 	u16 phy_reg;
 	int i = 0;
@@ -1289,10 +1290,12 @@ s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
 			E1000_WRITE_REG(hw, E1000_H2ME, mac_reg);
 		}
 
-		/* Poll up to 300msec for ME to clear ULP_CFG_DONE. */
+		if (hw->mac.type == e1000_pch_cnp)
+			ulp_exit_timeout = 100;
+
 		while (E1000_READ_REG(hw, E1000_FWSM) &
 		       E1000_FWSM_ULP_CFG_DONE) {
-			if (i++ == 30) {
+			if (i++ == ulp_exit_timeout) {
 				ret_val = -E1000_ERR_PHY;
 				goto out;
 			}
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 40/70] net/e1000/base: add missing device ID
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (38 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 39/70] net/e1000/base: increased timeout for ME ULP exit Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 41/70] net/e1000/base: add Foxville device IDs Guinan Sun
                   ` (31 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Kamil Bednarczyk

Adding Intel(R) I210 Gigabit Network Connection 15F6 device ID for SGMII
flashless automotive device.

Signed-off-by: Kamil Bednarczyk <Kamil.Bednarczyk@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.c | 1 +
 drivers/net/e1000/base/e1000_hw.h  | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index 18fac769c..646f917b4 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -330,6 +330,7 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 		break;
 	case E1000_DEV_ID_I210_COPPER_FLASHLESS:
 	case E1000_DEV_ID_I210_SERDES_FLASHLESS:
+	case E1000_DEV_ID_I210_SGMII_FLASHLESS:
 	case E1000_DEV_ID_I210_COPPER:
 	case E1000_DEV_ID_I210_COPPER_OEM1:
 	case E1000_DEV_ID_I210_COPPER_IT:
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 054f7b3c8..1e1e4e32e 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -158,6 +158,7 @@ struct e1000_hw;
 #define E1000_DEV_ID_I210_SGMII			0x1538
 #define E1000_DEV_ID_I210_COPPER_FLASHLESS	0x157B
 #define E1000_DEV_ID_I210_SERDES_FLASHLESS	0x157C
+#define E1000_DEV_ID_I210_SGMII_FLASHLESS	0x15F6
 #define E1000_DEV_ID_I211_COPPER		0x1539
 #ifndef NO_I225_SUPPORT
 #define E1000_DEV_ID_I225_LM			0x15F2
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 41/70] net/e1000/base: add Foxville device IDs
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (39 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 40/70] net/e1000/base: add missing device ID Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 42/70] net/e1000/base: expose more future extended NVM Guinan Sun
                   ` (30 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Lotem Leder

Add Foxville device IDs definitions according to the SKUs
described in EAS.

Signed-off-by: Lotem Leder <lotem.leder@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.c | 3 +++
 drivers/net/e1000/base/e1000_hw.h  | 5 +++--
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index 646f917b4..a22e67951 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -344,6 +344,9 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 		break;
 	case E1000_DEV_ID_I225_LM:
 	case E1000_DEV_ID_I225_V:
+	case E1000_DEV_ID_I225_K:
+	case E1000_DEV_ID_I225_I:
+	case E1000_DEV_ID_I220_V:
 		mac->type = e1000_i225;
 		break;
 	case E1000_DEV_ID_I350_VF:
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 1e1e4e32e..f62689334 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -160,10 +160,11 @@ struct e1000_hw;
 #define E1000_DEV_ID_I210_SERDES_FLASHLESS	0x157C
 #define E1000_DEV_ID_I210_SGMII_FLASHLESS	0x15F6
 #define E1000_DEV_ID_I211_COPPER		0x1539
-#ifndef NO_I225_SUPPORT
 #define E1000_DEV_ID_I225_LM			0x15F2
 #define E1000_DEV_ID_I225_V			0x15F3
-#endif /* NO_I225_SUPPORT */
+#define E1000_DEV_ID_I225_K			0x3100
+#define E1000_DEV_ID_I225_I			0x15F8
+#define E1000_DEV_ID_I220_V			0x15F7
 #define E1000_DEV_ID_I354_BACKPLANE_1GBPS	0x1F40
 #define E1000_DEV_ID_I354_SGMII			0x1F41
 #define E1000_DEV_ID_I354_BACKPLANE_2_5GBPS	0x1F45
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 42/70] net/e1000/base: expose more future extended NVM
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (40 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 41/70] net/e1000/base: add Foxville device IDs Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 43/70] net/e1000/base: add definition of EEE 2.5G setup register Guinan Sun
                   ` (29 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Future extended NVM 5 (five) required for a Dynamic Power Gating
control in the MAC.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_regs.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index afd27ac2b..fa382c441 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -37,6 +37,7 @@
 #define E1000_FEXTNVM	0x00028  /* Future Extended NVM - RW */
 #define E1000_FEXTNVM3	0x0003C  /* Future Extended NVM 3 - RW */
 #define E1000_FEXTNVM4	0x00024  /* Future Extended NVM 4 - RW */
+#define E1000_FEXTNVM5	0x00014  /* Future Extended NVM 5 - RW */
 #define E1000_FEXTNVM6	0x00010  /* Future Extended NVM 6 - RW */
 #define E1000_FEXTNVM7	0x000E4  /* Future Extended NVM 7 - RW */
 #define E1000_FEXTNVM9	0x5BB4  /* Future Extended NVM 9 - RW */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 43/70] net/e1000/base: add definition of EEE 2.5G setup register
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (41 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 42/70] net/e1000/base: expose more future extended NVM Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 44/70] net/e1000/base: add FXVL's Blank NVM device ID Guinan Sun
                   ` (28 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Lotem Leder

This is a new register which holds the minimum time in
microseconds for 2500BASE-T operation.

Signed-off-by: Lotem Leder <lotem.leder@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_regs.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index fa382c441..9428322f3 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -694,6 +694,7 @@
 #define E1000_LTRC	0x01A0 /* Latency Tolerance Reporting Control */
 #define E1000_EEER	0x0E30 /* Energy Efficient Ethernet "EEE"*/
 #define E1000_EEE_SU	0x0E34 /* EEE Setup */
+#define E1000_EEE_SU_2P5	0x0E3C /* EEE 2.5G Setup */
 #define E1000_TLPIC	0x4148 /* EEE Tx LPI Count - TLPIC */
 #define E1000_RLPIC	0x414C /* EEE Rx LPI Count - RLPIC */
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 44/70] net/e1000/base: add FXVL's Blank NVM device ID
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (42 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 43/70] net/e1000/base: add definition of EEE 2.5G setup register Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 45/70] net/e1000/base: remove useless statement Guinan Sun
                   ` (27 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Lotem Leder

In addition to commit 1b1a12, add definition of blank NVM device
id and missing cases.

Signed-off-by: Lotem Leder <lotem.leder@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.c | 1 +
 drivers/net/e1000/base/e1000_hw.h  | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index a22e67951..2ff79eeb7 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -347,6 +347,7 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 	case E1000_DEV_ID_I225_K:
 	case E1000_DEV_ID_I225_I:
 	case E1000_DEV_ID_I220_V:
+	case E1000_DEV_ID_I225_BLANK_NVM:
 		mac->type = e1000_i225;
 		break;
 	case E1000_DEV_ID_I350_VF:
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index f62689334..a78c47018 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -165,6 +165,7 @@ struct e1000_hw;
 #define E1000_DEV_ID_I225_K			0x3100
 #define E1000_DEV_ID_I225_I			0x15F8
 #define E1000_DEV_ID_I220_V			0x15F7
+#define E1000_DEV_ID_I225_BLANK_NVM		0x15FD
 #define E1000_DEV_ID_I354_BACKPLANE_1GBPS	0x1F40
 #define E1000_DEV_ID_I354_SGMII			0x1F41
 #define E1000_DEV_ID_I354_BACKPLANE_2_5GBPS	0x1F45
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 45/70] net/e1000/base: remove useless statement
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (43 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 44/70] net/e1000/base: add FXVL's Blank NVM device ID Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 46/70] net/e1000/base: add missed define for VFTA Guinan Sun
                   ` (26 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeb Cramer

As it stands now, this fix will not change the current functionality
of the code. In addition, we remove the comment that seemed to be
a copy/paste from a separate implementation.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index b79e3bad8..9b9cc7d90 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -4113,13 +4113,6 @@ STATIC s32 e1000_update_nvm_checksum_spt(struct e1000_hw *hw)
 	if (ret_val)
 		goto release;
 
-	/* And invalidate the previously valid segment by setting
-	 * its signature word (0x13) high_byte to 0b. This can be
-	 * done without an erase because flash erase sets all bits
-	 * to 1's. We can write 1's to 0's without an erase
-	 */
-	act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1;
-
 	/* offset in words but we read dword*/
 	act_offset = old_bank_offset + E1000_ICH_NVM_SIG_WORD - 1;
 	ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 46/70] net/e1000/base: add missed define for VFTA
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (44 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 45/70] net/e1000/base: remove useless statement Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 47/70] net/e1000/base: modify flow control setup Guinan Sun
                   ` (25 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

VLAN filtering using the VFTA (VLAN Filter Table Array) and
should be initialized prior to setting rx mode.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index abe83ad7d..985c8924b 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -1494,6 +1494,7 @@
 #define E1000_MAX_MAC_HDR_LEN	127
 #define E1000_MAX_NETWORK_HDR_LEN	511
 
+#define E1000_VFTA_BLOCK_SIZE	8
 /* SerDes Control */
 #define E1000_GEN_CTL_READY		0x80000000
 #define E1000_GEN_CTL_ADDRESS_SHIFT	8
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 47/70] net/e1000/base: modify flow control setup
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (45 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 46/70] net/e1000/base: add missed define for VFTA Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 48/70] net/e1000/base: support I225 update NVM flow Guinan Sun
                   ` (24 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Efrati Nir

Customers had a problem with large pings after connected standby.
This is due to the requirement of maintaining link after CS - the driver
blocks resets during "AdapterStart" and skips flow control setup.
Added condition in e1000_setup_link_ich8lan.c function that always setup
flow control, and setup physical interface only when no need to block
resets.

Signed-off-by: Efrati Nir <nir.efrati@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.c | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 9b9cc7d90..85344ebeb 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -5200,9 +5200,6 @@ STATIC s32 e1000_setup_link_ich8lan(struct e1000_hw *hw)
 
 	DEBUGFUNC("e1000_setup_link_ich8lan");
 
-	if (hw->phy.ops.check_reset_block(hw))
-		return E1000_SUCCESS;
-
 	/* ICH parts do not have a word in the NVM to determine
 	 * the default flow control setting, so we explicitly
 	 * set it to full.
@@ -5218,10 +5215,12 @@ STATIC s32 e1000_setup_link_ich8lan(struct e1000_hw *hw)
 	DEBUGOUT1("After fix-ups FlowControl is now = %x\n",
 		hw->fc.current_mode);
 
-	/* Continue to configure the copper link. */
-	ret_val = hw->mac.ops.setup_physical_interface(hw);
-	if (ret_val)
-		return ret_val;
+	if (!hw->phy.ops.check_reset_block(hw)) {
+		/* Continue to configure the copper link. */
+		ret_val = hw->mac.ops.setup_physical_interface(hw);
+		if (ret_val)
+			return ret_val;
+	}
 
 	E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time);
 	if ((hw->phy.type == e1000_phy_82578) ||
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 48/70] net/e1000/base: support I225 update NVM flow
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (46 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 47/70] net/e1000/base: modify flow control setup Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 49/70] net/e1000/base: led blinking fix for i210 Guinan Sun
                   ` (23 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Lotem Leder

As long as I225 firmware is valid and operational,
it is responsible for updating the NVM.
If FW is not valid, it is up to the SW to update the NVM
while making sure to check which sector is valid and update
accordingly.

Signed-off-by: Lotem Leder <lotem.leder@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h |   5 +-
 drivers/net/e1000/base/e1000_i225.c    | 166 +++++++++++++++++++++++--
 drivers/net/e1000/base/e1000_regs.h    |   6 +-
 3 files changed, 160 insertions(+), 17 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 985c8924b..80a8645e3 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -1124,14 +1124,15 @@
 /* Firmware code revision field word offset*/
 #define E1000_I210_FW_VER_OFFSET	328
 
-#ifndef NO_I225_SUPPORT
 #define E1000_EECD_FLUPD_I225		0x00800000 /* Update FLASH */
 #define E1000_EECD_FLUDONE_I225		0x04000000 /* Update FLASH done */
 #define E1000_EECD_FLASH_DETECTED_I225	0x00080000 /* FLASH detected */
 #define E1000_FLUDONE_ATTEMPTS		20000
 #define E1000_EERD_EEWR_MAX_COUNT	512 /* buffered EEPROM words rw */
+#define E1000_EECD_SEC1VAL_I225		0x02000000 /* Sector One Valid */
+#define E1000_FLSECU_BLK_SW_ACCESS_I225	0x00000004 /* Block SW access */
+#define E1000_FWSM_FW_VALID_I225	0x8000 /* FW valid bit */
 
-#endif /* NO_I225_SUPPORT */
 #define E1000_NVM_RW_REG_DATA	16  /* Offset to data in NVM read/write regs */
 #define E1000_NVM_RW_REG_DONE	2   /* Offset to READ/WRITE done bit */
 #define E1000_NVM_RW_REG_START	1   /* Start operation */
diff --git a/drivers/net/e1000/base/e1000_i225.c b/drivers/net/e1000/base/e1000_i225.c
index ef47f1810..089bc7a2a 100644
--- a/drivers/net/e1000/base/e1000_i225.c
+++ b/drivers/net/e1000/base/e1000_i225.c
@@ -840,31 +840,171 @@ bool e1000_get_flash_presence_i225(struct e1000_hw *hw)
 	return ret_val;
 }
 
+/* e1000_set_flsw_flash_burst_counter_i225 - sets FLSW NVM Burst
+ * Counter in FLSWCNT register.
+ *
+ * @hw: pointer to the HW structure
+ * @burst_counter: size in bytes of the Flash burst to read or write
+ */
+s32 e1000_set_flsw_flash_burst_counter_i225(struct e1000_hw *hw,
+					    u32 burst_counter)
+{
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_set_flsw_flash_burst_counter_i225");
+
+	/* Validate input data */
+	if (burst_counter < E1000_I225_SHADOW_RAM_SIZE) {
+		/* Write FLSWCNT - burst counter */
+		E1000_WRITE_REG(hw, E1000_I225_FLSWCNT, burst_counter);
+	} else {
+		ret_val = E1000_ERR_INVALID_ARGUMENT;
+	}
+
+	return ret_val;
+}
+
+/* e1000_write_erase_flash_command_i225 - write/erase to a sector
+ * region on a given address.
+ *
+ * @hw: pointer to the HW structure
+ * @opcode: opcode to be used for the write command
+ * @address: the offset to write into the FLASH image
+ */
+s32 e1000_write_erase_flash_command_i225(struct e1000_hw *hw, u32 opcode,
+					 u32 address)
+{
+	u32 flswctl = 0;
+	s32 timeout = E1000_NVM_GRANT_ATTEMPTS;
+	s32 ret_val = E1000_SUCCESS;
+
+	DEBUGFUNC("e1000_write_erase_flash_command_i225");
+
+	flswctl = E1000_READ_REG(hw, E1000_I225_FLSWCTL);
+	/* Polling done bit on FLSWCTL register */
+	while (timeout) {
+		if (flswctl & E1000_FLSWCTL_DONE)
+			break;
+		usec_delay(5);
+		flswctl = E1000_READ_REG(hw, E1000_I225_FLSWCTL);
+		timeout--;
+	}
+
+	if (!timeout) {
+		DEBUGOUT("Flash transaction was not done\n");
+		return -E1000_ERR_NVM;
+	}
+
+	/* Build and issue command on FLSWCTL register */
+	flswctl = address | opcode;
+	E1000_WRITE_REG(hw, E1000_I225_FLSWCTL, flswctl);
+
+	/* Check if issued command is valid on FLSWCTL register */
+	flswctl = E1000_READ_REG(hw, E1000_I225_FLSWCTL);
+	if (!(flswctl & E1000_FLSWCTL_CMDV)) {
+		DEBUGOUT("Write flash command failed\n");
+		ret_val = E1000_ERR_INVALID_ARGUMENT;
+	}
+
+	return ret_val;
+}
+
 /* e1000_update_flash_i225 - Commit EEPROM to the flash
+ * if fw_valid_bit is set, FW is active. setting FLUPD bit in EEC
+ * register makes the FW load the internal shadow RAM into the flash.
+ * Otherwise, fw_valid_bit is 0. if FL_SECU.block_prtotected_sw = 0
+ * then FW is not active so the SW is responsible shadow RAM dump.
+ *
  * @hw: pointer to the HW structure
  */
 s32 e1000_update_flash_i225(struct e1000_hw *hw)
 {
-	s32 ret_val;
+	u16 current_offset_data = 0;
+	u32 block_sw_protect = 1;
+	u16 base_address = 0x0;
+	u32 i, fw_valid_bit;
+	u16 current_offset;
+	s32 ret_val = 0;
 	u32 flup;
 
 	DEBUGFUNC("e1000_update_flash_i225");
 
-	ret_val = e1000_pool_flash_update_done_i225(hw);
-	if (ret_val == -E1000_ERR_NVM) {
-		DEBUGOUT("Flash update time out\n");
-		goto out;
-	}
+	block_sw_protect = E1000_READ_REG(hw, E1000_I225_FLSECU) &
+					  E1000_FLSECU_BLK_SW_ACCESS_I225;
+	fw_valid_bit = E1000_READ_REG(hw, E1000_FWSM) &
+				      E1000_FWSM_FW_VALID_I225;
+	if (fw_valid_bit) {
+		ret_val = e1000_pool_flash_update_done_i225(hw);
+		if (ret_val == -E1000_ERR_NVM) {
+			DEBUGOUT("Flash update time out\n");
+			goto out;
+		}
 
-	flup = E1000_READ_REG(hw, E1000_EECD) | E1000_EECD_FLUPD_I225;
-	E1000_WRITE_REG(hw, E1000_EECD, flup);
+		flup = E1000_READ_REG(hw, E1000_EECD) | E1000_EECD_FLUPD_I225;
+		E1000_WRITE_REG(hw, E1000_EECD, flup);
 
-	ret_val = e1000_pool_flash_update_done_i225(hw);
-	if (ret_val == E1000_SUCCESS)
-		DEBUGOUT("Flash update complete\n");
-	else
-		DEBUGOUT("Flash update time out\n");
+		ret_val = e1000_pool_flash_update_done_i225(hw);
+		if (ret_val == E1000_SUCCESS)
+			DEBUGOUT("Flash update complete\n");
+		else
+			DEBUGOUT("Flash update time out\n");
+	} else if (!block_sw_protect) {
+		/* FW is not active and security protection is disabled.
+		 * therefore, SW is in charge of shadow RAM dump.
+		 * Check which sector is valid. if sector 0 is valid,
+		 * base address remains 0x0. otherwise, sector 1 is
+		 * valid and it's base address is 0x1000
+		 */
+		if (E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_SEC1VAL_I225)
+			base_address = 0x1000;
+
+		/* Valid sector erase */
+		ret_val = e1000_write_erase_flash_command_i225(hw,
+						  E1000_I225_ERASE_CMD_OPCODE,
+						  base_address);
+		if (!ret_val) {
+			DEBUGOUT("Sector erase failed\n");
+			goto out;
+		}
 
+		current_offset = base_address;
+
+		/* Write */
+		for (i = 0; i < E1000_I225_SHADOW_RAM_SIZE / 2; i++) {
+			/* Set burst write length */
+			ret_val = e1000_set_flsw_flash_burst_counter_i225(hw,
+									  0x2);
+			if (ret_val != E1000_SUCCESS)
+				break;
+
+			/* Set address and opcode */
+			ret_val = e1000_write_erase_flash_command_i225(hw,
+						E1000_I225_WRITE_CMD_OPCODE,
+						2 * current_offset);
+			if (ret_val != E1000_SUCCESS)
+				break;
+
+			ret_val = e1000_read_nvm_eerd(hw, current_offset,
+						      1, &current_offset_data);
+			if (ret_val) {
+				DEBUGOUT("Failed to read from EEPROM\n");
+				goto out;
+			}
+
+			/* Write CurrentOffseData to FLSWDATA register */
+			E1000_WRITE_REG(hw, E1000_I225_FLSWDATA,
+					current_offset_data);
+			current_offset++;
+
+			/* Wait till operation has finished */
+			ret_val = e1000_poll_eerd_eewr_done(hw,
+						E1000_NVM_POLL_READ);
+			if (ret_val)
+				break;
+
+			usec_delay(1000);
+		}
+	}
 out:
 	return ret_val;
 }
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 9428322f3..2d94e7294 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -31,9 +31,11 @@
 #define E1000_SCTL	0x00024  /* SerDes Control - RW */
 #define E1000_FCAL	0x00028  /* Flow Control Address Low - RW */
 #define E1000_FCAH	0x0002C  /* Flow Control Address High -RW */
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 #define E1000_FEXT	0x0002C  /* Future Extended - RW */
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
+#define E1000_I225_FLSWCTL	0x12048 /* FLASH control register */
+#define E1000_I225_FLSWDATA	0x1204C /* FLASH data register */
+#define E1000_I225_FLSWCNT	0x12050 /* FLASH Access Counter */
+#define E1000_I225_FLSECU	0x12114 /* FLASH Security */
 #define E1000_FEXTNVM	0x00028  /* Future Extended NVM - RW */
 #define E1000_FEXTNVM3	0x0003C  /* Future Extended NVM 3 - RW */
 #define E1000_FEXTNVM4	0x00024  /* Future Extended NVM 4 - RW */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 49/70] net/e1000/base: led blinking fix for i210
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (47 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 48/70] net/e1000/base: support I225 update NVM flow Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 50/70] net/e1000/base: clean up dead code Guinan Sun
                   ` (22 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Maciej Hefczyc

Added initialization of identification LED.

Signed-off-by: Maciej Hefczyc <maciej.hefczyc@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i210.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index 1126b2916..8dadde8ca 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -925,6 +925,7 @@ STATIC s32 e1000_get_cfg_done_i210(struct e1000_hw *hw)
 s32 e1000_init_hw_i210(struct e1000_hw *hw)
 {
 	s32 ret_val;
+	struct e1000_mac_info *mac = &hw->mac;
 
 	DEBUGFUNC("e1000_init_hw_i210");
 	if ((hw->mac.type >= e1000_i210) &&
@@ -934,6 +935,10 @@ s32 e1000_init_hw_i210(struct e1000_hw *hw)
 			return ret_val;
 	}
 	hw->phy.ops.get_cfg_done = e1000_get_cfg_done_i210;
+
+	/* Initialize identification LED */
+	ret_val = mac->ops.id_led_init(hw);
+
 	ret_val = e1000_init_hw_base(hw);
 	return ret_val;
 }
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 50/70] net/e1000/base: clean up dead code
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (48 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 49/70] net/e1000/base: led blinking fix for i210 Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 51/70] net/e1000/base: expose new FEXTNVM registers and masks Guinan Sun
                   ` (21 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher

For i225 devices, the tag NO_I225_SUPPORT will never be defined, so
remove the tag and code that reside in the i225 family file.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i225.c | 125 +---------------------------
 1 file changed, 1 insertion(+), 124 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_i225.c b/drivers/net/e1000/base/e1000_i225.c
index 089bc7a2a..85f0a72b1 100644
--- a/drivers/net/e1000/base/e1000_i225.c
+++ b/drivers/net/e1000/base/e1000_i225.c
@@ -587,50 +587,6 @@ STATIC s32 __e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
 	return ret_val;
 }
 
-/* e1000_read_invm_word_i225 - Reads OTP
- * @hw: pointer to the HW structure
- * @address: the word address (aka eeprom offset) to read
- * @data: pointer to the data read
- *
- * Reads 16-bit words from the OTP. Return error when the word is not
- * stored in OTP.
- */
-STATIC s32 e1000_read_invm_word_i225(struct e1000_hw *hw, u8 address, u16 *data)
-{
-	s32 status = -E1000_ERR_INVM_VALUE_NOT_FOUND;
-	u32 invm_dword;
-	u16 i;
-	u8 record_type, word_address;
-
-	DEBUGFUNC("e1000_read_invm_word_i225");
-
-	for (i = 0; i < E1000_INVM_SIZE; i++) {
-		invm_dword = E1000_READ_REG(hw, E1000_INVM_DATA_REG(i));
-		/* Get record type */
-		record_type = INVM_DWORD_TO_RECORD_TYPE(invm_dword);
-		if (record_type == e1000_invm_unitialized_structure)
-			break;
-		if (record_type == e1000_invm_csr_autoload_structure)
-			i += E1000_INVM_CSR_AUTOLOAD_DATA_SIZE_IN_DWORDS;
-		if (record_type == e1000_invm_rsa_key_sha256_structure)
-			i += E1000_INVM_RSA_KEY_SHA256_DATA_SIZE_IN_DWORDS;
-		if (record_type == e1000_invm_word_autoload_structure) {
-			word_address = INVM_DWORD_TO_WORD_ADDRESS(invm_dword);
-			if (word_address == address) {
-				*data = INVM_DWORD_TO_WORD_DATA(invm_dword);
-				DEBUGOUT2("Read INVM Word 0x%02x = %x",
-					  address, *data);
-				status = E1000_SUCCESS;
-				break;
-			}
-		}
-	}
-	if (status != E1000_SUCCESS)
-		DEBUGOUT1("Requested word 0x%02x not found in OTP\n", address);
-	return status;
-}
-
-#if defined(NVM_VERSION_SUPPORT) || defined(QV_RELEASE)
 /* e1000_read_invm_version_i225 - Reads iNVM version and image type
  * @hw: pointer to the HW structure
  * @invm_ver: version structure for the version read
@@ -727,7 +683,6 @@ s32 e1000_read_invm_version_i225(struct e1000_hw *hw,
 	return status;
 }
 
-#endif /* NVM_VERSION_SUPPORT or QV_RELEASE */
 /* e1000_validate_nvm_checksum_i225 - Validate EEPROM checksum
  * @hw: pointer to the HW structure
  *
@@ -1076,80 +1031,7 @@ STATIC s32 e1000_valid_led_default_i225(struct e1000_hw *hw, u16 *data)
 			break;
 		}
 	}
-#ifndef QV_RELEASE
 out:
-#endif /* QV_RELEASE */
-	return ret_val;
-}
-
-/* e1000_pll_workaround_i225
- * @hw: pointer to the HW structure
- *
- * Works around an errata in the PLL circuit where it occasionally
- * provides the wrong clock frequency after power up.
- */
-STATIC s32 e1000_pll_workaround_i225(struct e1000_hw *hw)
-{
-	s32 ret_val;
-	u32 wuc, mdicnfg, ctrl, ctrl_ext, reg_val;
-	u16 nvm_word, phy_word, pci_word, tmp_nvm;
-	int i;
-
-	/* Get PHY semaphore */
-	hw->phy.ops.acquire(hw);
-	/* Get and set needed register values */
-	wuc = E1000_READ_REG(hw, E1000_WUC);
-	mdicnfg = E1000_READ_REG(hw, E1000_MDICNFG);
-	reg_val = mdicnfg & ~E1000_MDICNFG_EXT_MDIO;
-	E1000_WRITE_REG(hw, E1000_MDICNFG, reg_val);
-
-	/* Get data from NVM, or set default */
-	ret_val = e1000_read_invm_word_i225(hw, E1000_INVM_AUTOLOAD,
-					    &nvm_word);
-	if (ret_val != E1000_SUCCESS)
-		nvm_word = E1000_INVM_DEFAULT_AL;
-	tmp_nvm = nvm_word | E1000_INVM_PLL_WO_VAL;
-	for (i = 0; i < E1000_MAX_PLL_TRIES; i++) {
-		/* check current state directly from internal PHY */
-		e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0xFC);
-		usec_delay(20);
-		e1000_read_phy_reg_mdic(hw, E1000_PHY_PLL_FREQ_REG, &phy_word);
-		usec_delay(20);
-		e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0);
-		if ((phy_word & E1000_PHY_PLL_UNCONF)
-		    != E1000_PHY_PLL_UNCONF) {
-			ret_val = E1000_SUCCESS;
-		} else {
-			ret_val = -E1000_ERR_PHY;
-		}
-		/* directly reset the internal PHY */
-		ctrl = E1000_READ_REG(hw, E1000_CTRL);
-		E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PHY_RST);
-
-		ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
-		ctrl_ext |= (E1000_CTRL_EXT_PHYPDEN | E1000_CTRL_EXT_SDLPE);
-		E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
-
-		E1000_WRITE_REG(hw, E1000_WUC, 0);
-		reg_val = (E1000_INVM_AUTOLOAD << 4) | (tmp_nvm << 16);
-		E1000_WRITE_REG(hw, E1000_EEARBC_I225, reg_val);
-
-		e1000_read_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);
-		pci_word |= E1000_PCI_PMCSR_D3;
-		e1000_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);
-		msec_delay(1);
-		pci_word &= ~E1000_PCI_PMCSR_D3;
-		e1000_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);
-		reg_val = (E1000_INVM_AUTOLOAD << 4) | (nvm_word << 16);
-		E1000_WRITE_REG(hw, E1000_EEARBC_I225, reg_val);
-
-		/* restore WUC register */
-		E1000_WRITE_REG(hw, E1000_WUC, wuc);
-	}
-	/* restore MDICNFG setting */
-	E1000_WRITE_REG(hw, E1000_MDICNFG, mdicnfg);
-	/* Release PHY semaphore */
-	hw->phy.ops.release(hw);
 	return ret_val;
 }
 
@@ -1191,12 +1073,7 @@ s32 e1000_init_hw_i225(struct e1000_hw *hw)
 	s32 ret_val;
 
 	DEBUGFUNC("e1000_init_hw_i225");
-	if ((hw->mac.type >= e1000_i225) &&
-	    !(e1000_get_flash_presence_i225(hw))) {
-		ret_val = e1000_pll_workaround_i225(hw);
-		if (ret_val != E1000_SUCCESS)
-			return ret_val;
-	}
+
 	hw->phy.ops.get_cfg_done = e1000_get_cfg_done_i225;
 	ret_val = e1000_init_hw_base(hw);
 	return ret_val;
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 51/70] net/e1000/base: expose new FEXTNVM registers and masks
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (49 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 50/70] net/e1000/base: clean up dead code Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 52/70] net/e1000/base: cleanup duplicate defines Guinan Sun
                   ` (20 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Nir Efrati

Adding defines for FEXTNVM8 and FEXTNVM12 registers with new masks for
future use.

Signed-off-by: Nir Efrati <nir.efrati@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.h | 5 ++---
 drivers/net/e1000/base/e1000_regs.h    | 2 ++
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/base/e1000_ich8lan.h
index 7f6cbdc0e..0fe0b71a4 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.h
+++ b/drivers/net/e1000/base/e1000_ich8lan.h
@@ -89,14 +89,13 @@
 /* bit for disabling packet buffer read */
 #define E1000_FEXTNVM7_DISABLE_PB_READ	0x00040000
 #define E1000_FEXTNVM7_SIDE_CLK_UNGATE	0x00000004
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 #define E1000_FEXTNVM7_DISABLE_SMB_PERST	0x00000020
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
+#define E1000_FEXTNVM8_UNBIND_DPG_FROM_MPHY	0x00000400
 #define E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS	0x00000800
 #define E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS	0x00001000
 #define E1000_FEXTNVM11_DISABLE_PB_READ		0x00000200
 #define E1000_FEXTNVM11_DISABLE_MULR_FIX	0x00002000
-
+#define E1000_FEXTNVM12_DONT_WAK_DPG_CLKREQ	0x00001000
 /* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */
 #define E1000_RXDCTL_THRESH_UNIT_DESC	0x01000000
 
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 2d94e7294..2a258543e 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -42,8 +42,10 @@
 #define E1000_FEXTNVM5	0x00014  /* Future Extended NVM 5 - RW */
 #define E1000_FEXTNVM6	0x00010  /* Future Extended NVM 6 - RW */
 #define E1000_FEXTNVM7	0x000E4  /* Future Extended NVM 7 - RW */
+#define E1000_FEXTNVM8	0x5BB0  /* Future Extended NVM 8 - RW */
 #define E1000_FEXTNVM9	0x5BB4  /* Future Extended NVM 9 - RW */
 #define E1000_FEXTNVM11	0x5BBC  /* Future Extended NVM 11 - RW */
+#define E1000_FEXTNVM12	0x5BC0  /* Future Extended NVM 12 - RW */
 #define E1000_PCIEANACFG	0x00F18 /* PCIE Analog Config */
 #define E1000_FCT	0x00030  /* Flow Control Type - RW */
 #define E1000_CONNSW	0x00034  /* Copper/Fiber switch control - RW */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 52/70] net/e1000/base: cleanup duplicate defines
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (50 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 51/70] net/e1000/base: expose new FEXTNVM registers and masks Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 53/70] net/e1000/base: add WUC registers and defines Guinan Sun
                   ` (19 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher

Now that more than one silicon family uses the filter defines for ETQF,
move the defines out of the 82575 silicon family header, into the
general register/defines location.

This will reduce the duplicate defines for drivers that support all the
silicon families in one driver.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.h | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index b03d4b66f..4ff3e949f 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -242,10 +242,6 @@ struct e1000_adv_context_desc {
 #define E1000_IMS_LSECPNS	E1000_ICR_LSECPNS /* PN threshold - server */
 #define E1000_ICS_LSECPNS	E1000_ICR_LSECPNS /* PN threshold - server */
 
-/* ETQF register bit definitions */
-#define E1000_ETQF_FILTER_ENABLE	(1 << 26)
-#define E1000_ETQF_IMM_INT		(1 << 29)
-
 /*
  * ETQF filter list: one static filter per filter consumer. This is
  *                   to avoid filter collisions later. Add new filters
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 53/70] net/e1000/base: add WUC registers and defines
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (51 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 52/70] net/e1000/base: cleanup duplicate defines Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 54/70] net/e1000/base: correct PHY power up flow for i225 Guinan Sun
                   ` (18 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Wake up control registers added for just i225 device.
Corresponde to the i225 EAS, these registers in use and
required for a legacy power management support.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 80a8645e3..eef692338 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -34,6 +34,25 @@
 #define E1000_WUS_MC		E1000_WUFC_MC
 #define E1000_WUS_BC		E1000_WUFC_BC
 
+/* Packet types that are enabled for wake packet delivery */
+#define WAKE_PKT_WUS ( \
+	E1000_WUS_EX   | \
+	E1000_WUS_ARPD | \
+	E1000_WUS_IPV4 | \
+	E1000_WUS_IPV6 | \
+	E1000_WUS_NSD)
+
+/* Wake Up Packet Length */
+#define E1000_WUPL_MASK		0x00000FFF
+
+/* Wake Up Packet Memory stores the first 128 bytes of the wake up packet */
+#define E1000_WUPM_BYTES	128
+
+#define E1000_WUS_ARPD	0x00000020 /* Directed ARP Request */
+#define E1000_WUS_IPV4	0x00000040 /* Directed IPv4 */
+#define E1000_WUS_IPV6	0x00000080 /* Directed IPv6 */
+#define E1000_WUS_NSD	0x00000400 /* Directed IPv6 Neighbor Solicitation */
+
 /* Extended Device Control */
 #define E1000_CTRL_EXT_LPCD		0x00000004 /* LCD Power Cycle Done */
 #define E1000_CTRL_EXT_SDP4_DATA	0x00000010 /* SW Definable Pin 4 data */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 54/70] net/e1000/base: correct PHY power up flow for i225
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (52 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 53/70] net/e1000/base: add WUC registers and defines Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 55/70] net/e1000/base: add support for Nahum10 Guinan Sun
                   ` (17 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

gPHY GPY211A1 specification (i225 PHY) required 300 microseconds
delay after a good power up sequence.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_phy.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index bcb3df2f3..b9d8739ee 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -3528,6 +3528,7 @@ void e1000_power_up_phy_copper(struct e1000_hw *hw)
 	hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
 	mii_reg &= ~MII_CR_POWER_DOWN;
 	hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);
+	usec_delay(300);
 }
 
 /**
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 55/70] net/e1000/base: add support for Nahum10
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (53 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 54/70] net/e1000/base: correct PHY power up flow for i225 Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 56/70] net/e1000/base: add fall-through comments for switch cases Guinan Sun
                   ` (16 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Roman Fridlyand

Add support to a new MAC type (for Nahum10) and
new device ids (Alderlake).
Operate rebuild after NAHUM10_HW introduction
in the build.mk file.
Code review comments addressed.

Signed-off-by: Roman Fridlyand <roman.fridlyand@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.c     | 7 +++++++
 drivers/net/e1000/base/e1000_hw.h      | 5 +++++
 drivers/net/e1000/base/e1000_ich8lan.c | 9 +++++++--
 3 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index 2ff79eeb7..d28622885 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -290,6 +290,12 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 	case E1000_DEV_ID_PCH_ICP_I219_V9:
 		mac->type = e1000_pch_cnp;
 		break;
+	case E1000_DEV_ID_PCH_ADL_I219_LM16:
+	case E1000_DEV_ID_PCH_ADL_I219_V16:
+	case E1000_DEV_ID_PCH_ADL_I219_LM17:
+	case E1000_DEV_ID_PCH_ADL_I219_V17:
+		mac->type = e1000_pch_adp;
+		break;
 	case E1000_DEV_ID_82575EB_COPPER:
 	case E1000_DEV_ID_82575EB_FIBER_SERDES:
 	case E1000_DEV_ID_82575GB_QUAD_COPPER:
@@ -450,6 +456,7 @@ s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device)
 	case e1000_pch_lpt:
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
+	case e1000_pch_adp:
 		e1000_init_function_pointers_ich8lan(hw);
 		break;
 	case e1000_82575:
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index a78c47018..e425b0e20 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -124,6 +124,10 @@ struct e1000_hw;
 #define E1000_DEV_ID_PCH_ICP_I219_V8		0x15E0
 #define E1000_DEV_ID_PCH_ICP_I219_LM9		0x15E1
 #define E1000_DEV_ID_PCH_ICP_I219_V9		0x15E2
+#define E1000_DEV_ID_PCH_ADL_I219_LM16		0x1A1E
+#define E1000_DEV_ID_PCH_ADL_I219_V16		0x1A1F
+#define E1000_DEV_ID_PCH_ADL_I219_LM17		0x1A1C
+#define E1000_DEV_ID_PCH_ADL_I219_V17		0x1A1D
 #define E1000_DEV_ID_82576			0x10C9
 #define E1000_DEV_ID_82576_FIBER		0x10E6
 #define E1000_DEV_ID_82576_SERDES		0x10E7
@@ -218,6 +222,7 @@ enum e1000_mac_type {
 	e1000_pch_lpt,
 	e1000_pch_spt,
 	e1000_pch_cnp,
+	e1000_pch_adp,
 	e1000_82575,
 	e1000_82576,
 	e1000_82580,
diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 85344ebeb..61dcc1e61 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -318,6 +318,7 @@ STATIC s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
 	case e1000_pch_lpt:
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
+	case e1000_pch_adp:
 		if (e1000_phy_is_accessible_pchlan(hw))
 			break;
 
@@ -467,6 +468,7 @@ STATIC s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
 		case e1000_pch_lpt:
 		case e1000_pch_spt:
 		case e1000_pch_cnp:
+		case e1000_pch_adp:
 			/* In case the PHY needs to be in mdio slow mode,
 			 * set slow mode and try to get the PHY id again.
 			 */
@@ -772,12 +774,11 @@ STATIC s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 	case e1000_pch_lpt:
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
-#ifndef NO_NON_BLOCKING_PHY_MTA_UPDATE_SUPPORT
+	case e1000_pch_adp:
 		/* multicast address update for pch2 */
 		mac->ops.update_mc_addr_list =
 			e1000_update_mc_addr_list_pch2lan;
 		/* fall-through */
-#endif
 	case e1000_pchlan:
 #if defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT)
 		/* save PCH revision_id */
@@ -1764,6 +1765,7 @@ void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw)
 	case e1000_pch_lpt:
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
+	case e1000_pch_adp:
 		hw->phy.ops.init_params = e1000_init_phy_params_pchlan;
 		break;
 	default:
@@ -2231,6 +2233,7 @@ STATIC s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
 	case e1000_pch_lpt:
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
+	case e1000_pch_adp:
 		sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M;
 		break;
 	default:
@@ -3358,6 +3361,7 @@ STATIC s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
 	switch (hw->mac.type) {
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
+	case e1000_pch_adp:
 		bank1_offset = nvm->flash_bank_size;
 		act_offset = E1000_ICH_NVM_SIG_WORD;
 
@@ -4329,6 +4333,7 @@ STATIC s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)
 	case e1000_pch_lpt:
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
+	case e1000_pch_adp:
 		word = NVM_COMPAT;
 		valid_csum_mask = NVM_COMPAT_VALID_CSUM;
 		break;
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 56/70] net/e1000/base: add fall-through comments for switch cases
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (54 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 55/70] net/e1000/base: add support for Nahum10 Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 57/70] net/e1000/base: add EEE functions and defines for IGC Guinan Sun
                   ` (15 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeb Cramer

Add fall-through comments to cases without break statements.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_vf.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_vf.c b/drivers/net/e1000/base/e1000_vf.c
index 543fa7741..dc109d5e0 100644
--- a/drivers/net/e1000/base/e1000_vf.c
+++ b/drivers/net/e1000/base/e1000_vf.c
@@ -462,8 +462,10 @@ s32 e1000_promisc_set_vf(struct e1000_hw *hw, enum e1000_promisc_type type)
 		break;
 	case e1000_promisc_enabled:
 		msgbuf |= E1000_VF_SET_PROMISC_MULTICAST;
+		/* fall-through */
 	case e1000_promisc_unicast:
 		msgbuf |= E1000_VF_SET_PROMISC_UNICAST;
+		/* fall-through */
 	case e1000_promisc_disabled:
 		break;
 	default:
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 57/70] net/e1000/base: add EEE functions and defines for IGC
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (55 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 56/70] net/e1000/base: add fall-through comments for switch cases Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 58/70] net/e1000/base: add PHY power management control Guinan Sun
                   ` (14 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Lifshits Vitaly

Added support for required defines and functions to EEE for I225 drivers.

Signed-off-by: Lifshits Vitaly <vitaly.lifshits@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index eef692338..00afdaa25 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -949,11 +949,14 @@
 #define E1000_EEE_LP_ADV_DEV_I210	7          /* EEE LP Adv Device */
 #define E1000_EEE_LP_ADV_ADDR_I210	61         /* EEE LP Adv Register */
 #define E1000_EEE_SU_LPI_CLK_STP	0x00800000 /* EEE LPI Clock Stop */
-#ifndef NO_I225_SUPPORT
 #define E1000_EEE_LP_ADV_DEV_I225	7          /* EEE LP Adv Device */
 #define E1000_EEE_LP_ADV_ADDR_I225	61         /* EEE LP Adv Register */
+#define E1000_EEE_LP_ADV_2_5G           0          /* EEE LP Adv 2.5G */
+#define E1000_EEE_LP_ADV_1G             2          /* EEE LP Adv 1G */
+#define E1000_EEE_LP_ADV_100M           1          /* EEE LP Adv 100M */
+#define E1000_ANEG_EEE_AN_LPAB1_I225    26         /* EEE LP Ability 1 Offset */
+#define E1000_ANEG_EEE_AN_LPAB2_I225    0x2A       /* EEE LP Ability 2 Offset */
 
-#endif /* NO_I225_SUPPORT */
 /* PCI Express Control */
 #define E1000_GCR_RXD_NO_SNOOP		0x00000001
 #define E1000_GCR_RXDSCW_NO_SNOOP	0x00000002
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 58/70] net/e1000/base: add PHY power management control
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (56 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 57/70] net/e1000/base: add EEE functions and defines for IGC Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 59/70] net/e1000/base: introduce DPGFR register Guinan Sun
                   ` (13 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

PHY power management control should provide a reliable and accurate
indication of PHY reset completion and decrease the delay time
after a PHY reset.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h |  4 ++++
 drivers/net/e1000/base/e1000_phy.c     | 12 +++++++++++-
 2 files changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 00afdaa25..effd04dfd 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -1100,8 +1100,12 @@
 #define ANEG_MULTIGBT_AN_CTRL	0x0020 /* MULTI GBT AN Control Register */
 #define MMD_DEVADDR_SHIFT	16     /* Shift MMD to higher bits */
 #define CR_2500T_FD_CAPS	0x0080 /* Advertise 2500T FD capability */
+
 #define PHY_CONTROL_LB		0x4000 /* PHY Loopback bit */
 
+
+#define E1000_PHY_RST_COMP	0x0100 /* Internal PHY reset completion */
+
 /* NVM Control */
 #define E1000_EECD_SK		0x00000001 /* NVM Clock */
 #define E1000_EECD_CS		0x00000002 /* NVM Chip Select */
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index b9d8739ee..712ec1269 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -2877,6 +2877,7 @@ s32 e1000_phy_sw_reset_generic(struct e1000_hw *hw)
 s32 e1000_phy_hw_reset_generic(struct e1000_hw *hw)
 {
 	struct e1000_phy_info *phy = &hw->phy;
+	u32 phpm = 0, timeout = 10000;
 	s32 ret_val;
 	u32 ctrl;
 
@@ -2892,6 +2893,7 @@ s32 e1000_phy_hw_reset_generic(struct e1000_hw *hw)
 	if (ret_val)
 		return ret_val;
 
+	phpm = E1000_READ_REG(hw, E1000_I225_PHPM);
 	ctrl = E1000_READ_REG(hw, E1000_CTRL);
 	E1000_WRITE_REG(hw, E1000_CTRL, ctrl | E1000_CTRL_PHY_RST);
 	E1000_WRITE_FLUSH(hw);
@@ -2901,7 +2903,15 @@ s32 e1000_phy_hw_reset_generic(struct e1000_hw *hw)
 	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
 	E1000_WRITE_FLUSH(hw);
 
-	usec_delay(150);
+	/* SW should guarantee 100us for the completion of the PHY reset */
+	usec_delay(100);
+	do {
+		phpm = E1000_READ_REG(hw, E1000_I225_PHPM);
+		timeout--;
+		usec_delay(1);
+	} while (!(phpm & E1000_PHY_RST_COMP) && timeout);
+
+	usec_delay(100);
 
 	phy->ops.release(hw);
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 59/70] net/e1000/base: introduce DPGFR register
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (57 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 58/70] net/e1000/base: add PHY power management control Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 60/70] net/e1000/base: add new device IDs for Foxville B2 Guinan Sun
                   ` (12 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Vitaly Lifshits

Defined DPGFR, Dynamic Power Gate Force Control Register.

Signed-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_regs.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 2a258543e..9262d7fac 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -47,6 +47,7 @@
 #define E1000_FEXTNVM11	0x5BBC  /* Future Extended NVM 11 - RW */
 #define E1000_FEXTNVM12	0x5BC0  /* Future Extended NVM 12 - RW */
 #define E1000_PCIEANACFG	0x00F18 /* PCIE Analog Config */
+#define E1000_DPGFR	0x00FAC	/* Dynamic Power Gate Force Control Register */
 #define E1000_FCT	0x00030  /* Flow Control Type - RW */
 #define E1000_CONNSW	0x00034  /* Copper/Fiber switch control - RW */
 #define E1000_VET	0x00038  /* VLAN Ether Type - RW */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 60/70] net/e1000/base: add new device IDs for Foxville B2
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (58 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 59/70] net/e1000/base: introduce DPGFR register Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 61/70] net/e1000/base: add address and queue select Guinan Sun
                   ` (11 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Lotem Leder

Add support to new device IDs for Foxville B2.

Signed-off-by: Lotem Leder <lotem.leder@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.c | 3 +++
 drivers/net/e1000/base/e1000_hw.h  | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index d28622885..65c155b93 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -351,6 +351,9 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 	case E1000_DEV_ID_I225_LM:
 	case E1000_DEV_ID_I225_V:
 	case E1000_DEV_ID_I225_K:
+	case E1000_DEV_ID_I225_K2:
+	case E1000_DEV_ID_I225_LMVP:
+	case E1000_DEV_ID_I225_IT:
 	case E1000_DEV_ID_I225_I:
 	case E1000_DEV_ID_I220_V:
 	case E1000_DEV_ID_I225_BLANK_NVM:
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index e425b0e20..f9fd90e61 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -167,6 +167,9 @@ struct e1000_hw;
 #define E1000_DEV_ID_I225_LM			0x15F2
 #define E1000_DEV_ID_I225_V			0x15F3
 #define E1000_DEV_ID_I225_K			0x3100
+#define E1000_DEV_ID_I225_K2			0x3101
+#define E1000_DEV_ID_I225_LMVP			0x5502
+#define E1000_DEV_ID_I225_IT			0x0D9F
 #define E1000_DEV_ID_I225_I			0x15F8
 #define E1000_DEV_ID_I220_V			0x15F7
 #define E1000_DEV_ID_I225_BLANK_NVM		0x15FD
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 61/70] net/e1000/base: add address and queue select
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (59 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 60/70] net/e1000/base: add new device IDs for Foxville B2 Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 62/70] net/e1000/base: introduce IEEE PHY ID mask Guinan Sun
                   ` (10 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Address select mask selects source address to be
used in the address filtering. Queue select indicates
which Rx queue should get the packet matching this
MAC address.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index effd04dfd..0b215d2cf 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -699,6 +699,10 @@
  */
 #define E1000_RAR_ENTRIES	15
 #define E1000_RAH_AV		0x80000000 /* Receive descriptor valid */
+#define E1000_RAH_QSEL_MASK	0x000C0000
+#define E1000_RAH_QSEL_SHIFT	18
+#define E1000_RAH_ASEL_SRC_ADDR	0x00010000
+#define E1000_RAH_QSEL_ENABLE	0x10000000
 #define E1000_RAL_MAC_ADDR_LEN	4
 #define E1000_RAH_MAC_ADDR_LEN	2
 #define E1000_RAH_QUEUE_MASK_82575	0x000C0000
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 62/70] net/e1000/base: introduce IEEE PHY ID mask
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (60 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 61/70] net/e1000/base: add address and queue select Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 63/70] net/e1000/base: modify VLAN names Guinan Sun
                   ` (9 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

This patch introduce the proprietary mask to select
PHYID bits from PHYID1 and PHYID2 words.
PHYID2 word contain also Intel Device Number (LDN) and
Intel Device Revision Nember (LDRN)

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 0b215d2cf..bcd7a1008 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -1380,12 +1380,11 @@
 #define I82580_I_PHY_ID		0x015403A0
 #define I350_I_PHY_ID		0x015403B0
 #define I210_I_PHY_ID		0x01410C00
-#ifndef NO_I225_SUPPORT
-#define I225_I_PHY_ID		0x67C9DC00
-#endif /* NO_I225_SUPPORT */
 #define IGP04E1000_E_PHY_ID	0x02A80391
 #define BCM54616_E_PHY_ID	0x03625D10
 #define M88_VENDOR		0x0141
+#define I225_I_PHY_ID		0x67C9DC00
+#define I225_I_PHY_ID_MASK	0x3FFFFC00
 
 /* M88E1000 Specific Registers */
 #define M88E1000_PHY_SPEC_CTRL		0x10  /* PHY Specific Control Reg */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 63/70] net/e1000/base: modify VLAN names
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (61 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 62/70] net/e1000/base: introduce IEEE PHY ID mask Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 64/70] net/e1000/base: add EEE set function to share code API Guinan Sun
                   ` (8 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Fix defines macro to be align with upstream.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 3 +++
 drivers/net/e1000/base/e1000_regs.h    | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index bcd7a1008..9302e5ed6 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -1524,6 +1524,9 @@
 #define E1000_MAX_MAC_HDR_LEN	127
 #define E1000_MAX_NETWORK_HDR_LEN	511
 
+#define E1000_VLANPQF_QSEL(_n, q_idx) ((q_idx) << ((_n) * 4))
+#define E1000_VLANPQF_VALID(_n)	(0x1 << (3 + (_n) * 4))
+#define E1000_VLANPQF_QUEUE_MASK	0x03
 #define E1000_VFTA_BLOCK_SIZE	8
 /* SerDes Control */
 #define E1000_GEN_CTL_READY		0x80000000
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 9262d7fac..b0f9ff487 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -271,6 +271,8 @@
 				 (0x054E0 + ((_i - 16) * 8)))
 #define E1000_RAH(_i)		(((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \
 				 (0x054E4 + ((_i - 16) * 8)))
+#define E1000_VLANPQF		0x055B0  /* VLAN Priority Queue Filter VLAPQF */
+
 #define E1000_SHRAL(_i)		(0x05438 + ((_i) * 8))
 #define E1000_SHRAH(_i)		(0x0543C + ((_i) * 8))
 #define E1000_IP4AT_REG(_i)	(0x05840 + ((_i) * 8))
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 64/70] net/e1000/base: add EEE set function to share code API
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (62 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 63/70] net/e1000/base: modify VLAN names Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 65/70] net/e1000/base: add defines for source address filters Guinan Sun
                   ` (7 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Evgeny Efimov

For the e1000_set_eee function to be used by windows E2F driver
added a reference function at api.c file.

Signed-off-by: Evgeny Efimov <evgeny.efimov@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.c | 16 ++++++++++++++++
 drivers/net/e1000/base/e1000_api.h |  2 ++
 2 files changed, 18 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index 65c155b93..64b6dd185 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -1376,3 +1376,19 @@ void e1000_shutdown_fiber_serdes_link(struct e1000_hw *hw)
 		hw->mac.ops.shutdown_serdes(hw);
 }
 
+/**
+ *  e1000_set_eee_i225 - Set EEE
+ *  @hw: pointer to the HW structure
+ *  @adv2p5G: boolean flag enabling 2.5G EEE advertisement
+ *  @adv1G: boolean flag enabling 1G EEE advertisement
+ *  @adv100M: boolean flag enabling 100M EEE advertisement
+ *
+ *  Enable/disable EEE based on setting in dev_spec structure.
+ **/
+s32 e1000_set_eee(struct e1000_hw *hw, bool adv2p5G, bool adv1G, bool adv100M)
+{
+	if (hw->mac.ops.set_eee)
+		return hw->mac.ops.set_eee(hw, adv2p5G, adv1G, adv100M);
+
+	return -E1000_ERR_CONFIG;
+}
diff --git a/drivers/net/e1000/base/e1000_api.h b/drivers/net/e1000/base/e1000_api.h
index 0b7b9016a..0786654fd 100644
--- a/drivers/net/e1000/base/e1000_api.h
+++ b/drivers/net/e1000/base/e1000_api.h
@@ -89,6 +89,8 @@ s32 e1000_mng_write_cmd_header(struct e1000_hw *hw,
 s32 e1000_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
 u32  e1000_translate_register_82542(u32 reg);
 
+s32 e1000_set_eee(struct e1000_hw *hw, bool adv2p5G, bool adv1G, bool adv100M);
+
 
 
 /*
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 65/70] net/e1000/base: add defines for source address filters
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (63 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 64/70] net/e1000/base: add EEE set function to share code API Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 66/70] net/e1000/base: add LPI counters Guinan Sun
                   ` (6 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

A new defines is added to indicate if the filter
type is source or destination.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 9302e5ed6..75f983817 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -699,6 +699,9 @@
  */
 #define E1000_RAR_ENTRIES	15
 #define E1000_RAH_AV		0x80000000 /* Receive descriptor valid */
+#define E1000_RAH_RAH_MASK	0x0000FFFF
+#define E1000_RAH_ASEL_MASK	0x00030000
+#define E1000_RAH_ASEL_SRC_ADD	0x00010000
 #define E1000_RAH_QSEL_MASK	0x000C0000
 #define E1000_RAH_QSEL_SHIFT	18
 #define E1000_RAH_ASEL_SRC_ADDR	0x00010000
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 66/70] net/e1000/base: add LPI counters
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (64 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 65/70] net/e1000/base: add defines for source address filters Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 67/70] net/e1000/base: remove conditional compilation wrapper Guinan Sun
                   ` (5 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

A new defines is added to indicate if EEE LPI entries
has been observed on Tx and Rx path.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_hw.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index f9fd90e61..cf6b55172 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -605,6 +605,8 @@ struct e1000_hw_stats {
 	u64 o2bspc;
 	u64 b2ospc;
 	u64 b2ogprc;
+	u64 tlpic;
+	u64 rlpic;
 };
 
 struct e1000_vf_stats {
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 67/70] net/e1000/base: remove conditional compilation wrapper
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (65 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 66/70] net/e1000/base: add LPI counters Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 68/70] net/e1000/base: modify copyright Guinan Sun
                   ` (4 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun

Remove conditional compilation statements.

Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h |  13 +--
 drivers/net/e1000/base/e1000_hw.h      |   4 -
 drivers/net/e1000/base/e1000_i210.c    |   2 +-
 drivers/net/e1000/base/e1000_i225.c    |   1 -
 drivers/net/e1000/base/e1000_ich8lan.c |  19 ----
 drivers/net/e1000/base/e1000_ich8lan.h |  17 +---
 drivers/net/e1000/base/e1000_mac.c     | 132 -------------------------
 drivers/net/e1000/base/e1000_mac.h     |   2 -
 drivers/net/e1000/base/e1000_nvm.c     |   2 -
 drivers/net/e1000/base/e1000_phy.h     |   2 -
 drivers/net/e1000/base/e1000_regs.h    |   5 -
 11 files changed, 5 insertions(+), 194 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 75f983817..4a1d230c3 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -147,9 +147,7 @@
 	E1000_RXDEXT_STATERR_CXE |	\
 	E1000_RXDEXT_STATERR_RXE)
 
-#if !defined(EXTERNAL_RELEASE) || defined(E1000E_MQ)
 #define E1000_MRQC_ENABLE_RSS_2Q		0x00000001
-#endif /* !EXTERNAL_RELEASE || E1000E_MQ */
 #define E1000_MRQC_RSS_FIELD_MASK		0xFFFF0000
 #define E1000_MRQC_RSS_FIELD_IPV4_TCP		0x00010000
 #define E1000_MRQC_RSS_FIELD_IPV4		0x00020000
@@ -1129,9 +1127,7 @@
 /* NVM Addressing bits based on type 0=small, 1=large */
 #define E1000_EECD_ADDR_BITS	0x00000400
 #define E1000_EECD_TYPE		0x00002000 /* NVM Type (1-SPI, 0-Microwire) */
-#ifndef E1000_NVM_GRANT_ATTEMPTS
 #define E1000_NVM_GRANT_ATTEMPTS	1000 /* NVM # attempts to gain grant */
-#endif
 #define E1000_EECD_AUTO_RD		0x00000200  /* NVM Auto Read done */
 #define E1000_EECD_SIZE_EX_MASK		0x00007800  /* NVM Size */
 #define E1000_EECD_SIZE_EX_SHIFT	11
@@ -1347,9 +1343,7 @@
 #define PCIE_LINK_SPEED_5000		0x02
 #define PCIE_DEVICE_CONTROL2_16ms	0x0005
 
-#ifndef ETH_ADDR_LEN
 #define ETH_ADDR_LEN			6
-#endif
 
 #define PHY_REVISION_MASK		0xFFFFFFF0
 #define MAX_PHY_REG_ADDRESS		0x1F  /* 5 bit address bus (0-0x1F) */
@@ -1606,7 +1600,6 @@
 #define I210_TXPBSIZE_DEFAULT		0x04000014 /* TXPBSIZE default */
 
 
-#ifndef NO_I225_SUPPORT
 #define I225_RXPBSIZE_DEFAULT		0x000000A2 /* RXPBSIZE default */
 #define I225_TXPBSIZE_DEFAULT		0x04000014 /* TXPBSIZE default */
 #define E1000_RXPBS_SIZE_I225_MASK	0x0000003F /* Rx packet buffer size */
@@ -1641,7 +1634,7 @@
 #define E1000_INVM_DEFAULT_AL		0x202F
 #define E1000_INVM_AUTOLOAD		0x0A
 #define E1000_INVM_PLL_WO_VAL		0x0010
-#endif /* NO_I225_SUPPORT */
+
 /* Proxy Filter Control Extended */
 #define E1000_PROXYFCEX_MDNS		0x00000001 /* mDNS */
 #define E1000_PROXYFCEX_MDNS_M		0x00000002 /* mDNS Multicast */
@@ -1682,10 +1675,6 @@
 #define E1000_STATUS_LAN_ID_OFFSET	2
 #define E1000_VFTA_ENTRIES		128
 
-#ifndef E1000_UNUSEDARG
 #define E1000_UNUSEDARG
-#endif /* E1000_UNUSEDARG */
-#ifndef ERROR_REPORT
 #define ERROR_REPORT(fmt)	do { } while (0)
-#endif /* ERROR_REPORT */
 #endif /* _E1000_DEFINES_H_ */
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index cf6b55172..210c7da16 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -963,7 +963,6 @@ struct e1000_shadow_ram {
 
 #define E1000_SHADOW_RAM_WORDS		2048
 
-#ifdef ULP_SUPPORT
 /* I218 PHY Ultra Low Power (ULP) states */
 enum e1000_ulp_state {
 	e1000_ulp_state_unknown,
@@ -971,7 +970,6 @@ enum e1000_ulp_state {
 	e1000_ulp_state_on,
 };
 
-#endif /* ULP_SUPPORT */
 struct e1000_dev_spec_ich8lan {
 	bool kmrn_lock_loss_workaround_enabled;
 	struct e1000_shadow_ram shadow_ram[E1000_SHADOW_RAM_WORDS];
@@ -981,12 +979,10 @@ struct e1000_dev_spec_ich8lan {
 	bool disable_k1_off;
 	bool eee_disable;
 	u16 eee_lp_ability;
-#ifdef ULP_SUPPORT
 	enum e1000_ulp_state ulp_state;
 	bool ulp_capability_disabled;
 	bool during_suspend_flow;
 	bool during_dpg_exit;
-#endif /* ULP_SUPPORT */
 	u16 lat_enc;
 	u16 max_ltr_enc;
 	bool smbus_disable;
diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index 8dadde8ca..d32b0f089 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -310,7 +310,7 @@ STATIC s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
 	}
 
 	for (i = 0; i < words; i++) {
-		eewr = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) |
+		eewr = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) |
 			(data[i] << E1000_NVM_RW_REG_DATA) |
 			E1000_NVM_RW_REG_START;
 
diff --git a/drivers/net/e1000/base/e1000_i225.c b/drivers/net/e1000/base/e1000_i225.c
index 85f0a72b1..628695760 100644
--- a/drivers/net/e1000/base/e1000_i225.c
+++ b/drivers/net/e1000/base/e1000_i225.c
@@ -1137,7 +1137,6 @@ s32 e1000_set_d3_lplu_state_i225(struct e1000_hw *hw, bool active)
 	return E1000_SUCCESS;
 }
 
-
 /**
  *  e1000_set_eee_i225 - Enable/disable EEE support
  *  @hw: pointer to the HW structure
diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 61dcc1e61..bf77bfa1d 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -51,11 +51,9 @@ STATIC bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw);
 STATIC int  e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index);
 STATIC int  e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index);
 STATIC s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw);
-#ifndef NO_NON_BLOCKING_PHY_MTA_UPDATE_SUPPORT
 STATIC void e1000_update_mc_addr_list_pch2lan(struct e1000_hw *hw,
 					      u8 *mc_addr_list,
 					      u32 mc_addr_count);
-#endif /* NO_NON_BLOCKING_PHY_MTA_UPDATE_SUPPORT */
 STATIC s32  e1000_check_reset_block_ich8lan(struct e1000_hw *hw);
 STATIC s32  e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw);
 STATIC s32  e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active);
@@ -297,13 +295,11 @@ STATIC s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
 	 */
 	e1000_gate_hw_phy_config_ich8lan(hw, true);
 
-#ifdef ULP_SUPPORT
 	/* It is not possible to be certain of the current state of ULP
 	 * so forcibly disable it.
 	 */
 	hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_unknown;
 
-#endif /* ULP_SUPPORT */
 	ret_val = hw->phy.ops.acquire(hw);
 	if (ret_val) {
 		DEBUGOUT("Failed to initialize PHY flow\n");
@@ -701,9 +697,7 @@ STATIC s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)
 STATIC s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 {
 	struct e1000_mac_info *mac = &hw->mac;
-#if defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT)
 	u16 pci_cfg;
-#endif /* QV_RELEASE || !defined(NO_PCH_LPT_B0_SUPPORT) */
 
 	DEBUGFUNC("e1000_init_mac_params_ich8lan");
 
@@ -780,7 +774,6 @@ STATIC s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 			e1000_update_mc_addr_list_pch2lan;
 		/* fall-through */
 	case e1000_pchlan:
-#if defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT)
 		/* save PCH revision_id */
 		e1000_read_pci_cfg(hw, E1000_PCI_REVISION_ID_REG, &pci_cfg);
 		/* SPT uses full byte for revision ID,
@@ -790,7 +783,6 @@ STATIC s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 			hw->revision_id = (u8)(pci_cfg &= 0x00FF);
 		else
 			hw->revision_id = (u8)(pci_cfg &= 0x000F);
-#endif /* QV_RELEASE || !defined(NO_PCH_LPT_B0_SUPPORT) */
 		/* check management mode */
 		mac->ops.check_mng_mode = e1000_check_mng_mode_pchlan;
 		/* ID LED init */
@@ -1074,7 +1066,6 @@ STATIC s32 e1000_k1_workaround_lpt_lp(struct e1000_hw *hw, bool link)
 	return ret_val;
 }
 
-#ifdef ULP_SUPPORT
 /**
  *  e1000_enable_ulp_lpt_lp - configure Ultra Low Power mode for LynxPoint-LP
  *  @hw: pointer to the HW structure
@@ -1453,7 +1444,6 @@ s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
 	return ret_val;
 }
 
-#endif /* ULP_SUPPORT */
 
 
 /**
@@ -2080,7 +2070,6 @@ STATIC int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index)
 	return -E1000_ERR_CONFIG;
 }
 
-#ifndef NO_NON_BLOCKING_PHY_MTA_UPDATE_SUPPORT
 /**
  *  e1000_update_mc_addr_list_pch2lan - Update Multicast addresses
  *  @hw: pointer to the HW structure
@@ -2125,7 +2114,6 @@ STATIC void e1000_update_mc_addr_list_pch2lan(struct e1000_hw *hw,
 	hw->phy.ops.release(hw);
 }
 
-#endif /* NO_NON_BLOCKING_PHY_MTA_UPDATE_SUPPORT */
 /**
  *  e1000_check_reset_block_ich8lan - Check if PHY reset is blocked
  *  @hw: pointer to the HW structure
@@ -2677,7 +2665,6 @@ void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw)
 	hw->phy.ops.release(hw);
 }
 
-#ifndef CRC32_OS_SUPPORT
 STATIC u32 e1000_calc_rx_da_crc(u8 mac[])
 {
 	u32 poly = 0xEDB88320;	/* Polynomial for 802.3 CRC calculation */
@@ -2696,7 +2683,6 @@ STATIC u32 e1000_calc_rx_da_crc(u8 mac[])
 	return ~crc;
 }
 
-#endif /* CRC32_OS_SUPPORT */
 /**
  *  e1000_lv_jumbo_workaround_ich8lan - required for jumbo frame operation
  *  with 82579 PHY
@@ -2741,13 +2727,8 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable)
 			mac_addr[4] = (addr_high & 0xFF);
 			mac_addr[5] = ((addr_high >> 8) & 0xFF);
 
-#ifndef CRC32_OS_SUPPORT
 			E1000_WRITE_REG(hw, E1000_PCH_RAICC(i),
 					e1000_calc_rx_da_crc(mac_addr));
-#else /* CRC32_OS_SUPPORT */
-			E1000_WRITE_REG(hw, E1000_PCH_RAICC(i),
-					E1000_CRC32(ETH_ADDR_LEN, mac_addr));
-#endif /* CRC32_OS_SUPPORT */
 		}
 
 		/* Write Rx addresses to the PHY */
diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/base/e1000_ich8lan.h
index 0fe0b71a4..5e89f4442 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.h
+++ b/drivers/net/e1000/base/e1000_ich8lan.h
@@ -40,22 +40,16 @@
 
 #define E1000_FWSM_WLOCK_MAC_MASK	0x0380
 #define E1000_FWSM_WLOCK_MAC_SHIFT	7
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 #define E1000_FWSM_ULP_CFG_DONE		0x00000400  /* Low power cfg done */
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
 
 /* Shared Receive Address Registers */
 #define E1000_SHRAL_PCH_LPT(_i)		(0x05408 + ((_i) * 8))
 #define E1000_SHRAH_PCH_LPT(_i)		(0x0540C + ((_i) * 8))
 
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 #define E1000_H2ME		0x05B50    /* Host to ME */
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 #define E1000_H2ME_ULP		0x00000800 /* ULP Indication Bit */
 #define E1000_H2ME_ENFORCE_SETTINGS	0x00001000 /* Enforce Settings */
 
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
 #define ID_LED_DEFAULT_ICH8LAN	((ID_LED_DEF1_DEF2 << 12) | \
 				 (ID_LED_OFF1_OFF2 <<  8) | \
 				 (ID_LED_OFF1_ON2  <<  4) | \
@@ -68,11 +62,9 @@
 
 #define E1000_ICH8_LAN_INIT_TIMEOUT	1500
 
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 /* FEXT register bit definition */
 #define E1000_FEXT_PHY_CABLE_DISCONNECTED	0x00000004
 
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
 #define E1000_FEXTNVM_SW_CONFIG		1
 #define E1000_FEXTNVM_SW_CONFIG_ICH8M	(1 << 27) /* different on ICH8M */
 
@@ -172,7 +164,6 @@
 #define CV_SMB_CTRL		PHY_REG(769, 23)
 #define CV_SMB_CTRL_FORCE_SMBUS	0x0001
 
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 /* I218 Ultra Low Power Configuration 1 Register */
 #define I218_ULP_CONFIG1		PHY_REG(779, 16)
 #define I218_ULP_CONFIG1_START		0x0001 /* Start auto ULP config */
@@ -187,7 +178,7 @@
 #define I218_ULP_CONFIG1_DIS_CLR_STICKY_ON_PERST	0x0800
 #define I218_ULP_CONFIG1_DISABLE_SMB_PERST	0x1000 /* Disable on PERST# */
 
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
+
 /* SMBus Address Phy Register */
 #define HV_SMB_ADDR		PHY_REG(768, 26)
 #define HV_SMB_ADDR_MASK	0x007F
@@ -285,10 +276,10 @@
 
 /* Receive Address Initial CRC Calculation */
 #define E1000_PCH_RAICC(_n)	(0x05F50 + ((_n) * 4))
+
 #define E1000_PCI_VENDOR_ID_REGISTER	0x00
-#if defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT)
+
 #define E1000_PCI_REVISION_ID_REG	0x08
-#endif /* defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT) */
 void e1000_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
 						 bool state);
 void e1000_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
@@ -302,9 +293,7 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable);
 s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data);
 s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data);
 s32 e1000_set_eee_pchlan(struct e1000_hw *hw);
-#ifdef ULP_SUPPORT
 s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx);
 s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force);
-#endif /* ULP_SUPPORT */
 #endif /* _E1000_ICH8LAN_H_ */
 void e1000_demote_ltr(struct e1000_hw *hw, bool demote, bool link);
diff --git a/drivers/net/e1000/base/e1000_mac.c b/drivers/net/e1000/base/e1000_mac.c
index 577ba9c1b..4b67acea3 100644
--- a/drivers/net/e1000/base/e1000_mac.c
+++ b/drivers/net/e1000/base/e1000_mac.c
@@ -1276,7 +1276,6 @@ s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw)
 {
 	struct e1000_mac_info *mac = &hw->mac;
 	s32 ret_val = E1000_SUCCESS;
-	u32 pcs_status_reg, pcs_adv_reg, pcs_lp_ability_reg, pcs_ctrl_reg;
 	u16 mii_status_reg, mii_nway_adv_reg, mii_nway_lp_ability_reg;
 	u16 speed, duplex;
 
@@ -1287,10 +1286,6 @@ s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw)
 	 * configuration of the MAC to match the "fc" parameter.
 	 */
 	if (mac->autoneg_failed) {
-		if (hw->phy.media_type == e1000_media_type_fiber ||
-		    hw->phy.media_type == e1000_media_type_internal_serdes)
-			ret_val = e1000_force_mac_fc_generic(hw);
-	} else {
 		if (hw->phy.media_type == e1000_media_type_copper)
 			ret_val = e1000_force_mac_fc_generic(hw);
 	}
@@ -1444,130 +1439,6 @@ s32 e1000_config_fc_after_link_up_generic(struct e1000_hw *hw)
 		}
 	}
 
-	/* Check for the case where we have SerDes media and auto-neg is
-	 * enabled.  In this case, we need to check and see if Auto-Neg
-	 * has completed, and if so, how the PHY and link partner has
-	 * flow control configured.
-	 */
-	if ((hw->phy.media_type == e1000_media_type_internal_serdes) &&
-	    mac->autoneg) {
-		/* Read the PCS_LSTS and check to see if AutoNeg
-		 * has completed.
-		 */
-		pcs_status_reg = E1000_READ_REG(hw, E1000_PCS_LSTAT);
-
-		if (!(pcs_status_reg & E1000_PCS_LSTS_AN_COMPLETE)) {
-			DEBUGOUT("PCS Auto Neg has not completed.\n");
-			return ret_val;
-		}
-
-		/* The AutoNeg process has completed, so we now need to
-		 * read both the Auto Negotiation Advertisement
-		 * Register (PCS_ANADV) and the Auto_Negotiation Base
-		 * Page Ability Register (PCS_LPAB) to determine how
-		 * flow control was negotiated.
-		 */
-		pcs_adv_reg = E1000_READ_REG(hw, E1000_PCS_ANADV);
-		pcs_lp_ability_reg = E1000_READ_REG(hw, E1000_PCS_LPAB);
-
-		/* Two bits in the Auto Negotiation Advertisement Register
-		 * (PCS_ANADV) and two bits in the Auto Negotiation Base
-		 * Page Ability Register (PCS_LPAB) determine flow control
-		 * for both the PHY and the link partner.  The following
-		 * table, taken out of the IEEE 802.3ab/D6.0 dated March 25,
-		 * 1999, describes these PAUSE resolution bits and how flow
-		 * control is determined based upon these settings.
-		 * NOTE:  DC = Don't Care
-		 *
-		 *   LOCAL DEVICE  |   LINK PARTNER
-		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | NIC Resolution
-		 *-------|---------|-------|---------|--------------------
-		 *   0   |    0    |  DC   |   DC    | e1000_fc_none
-		 *   0   |    1    |   0   |   DC    | e1000_fc_none
-		 *   0   |    1    |   1   |    0    | e1000_fc_none
-		 *   0   |    1    |   1   |    1    | e1000_fc_tx_pause
-		 *   1   |    0    |   0   |   DC    | e1000_fc_none
-		 *   1   |   DC    |   1   |   DC    | e1000_fc_full
-		 *   1   |    1    |   0   |    0    | e1000_fc_none
-		 *   1   |    1    |   0   |    1    | e1000_fc_rx_pause
-		 *
-		 * Are both PAUSE bits set to 1?  If so, this implies
-		 * Symmetric Flow Control is enabled at both ends.  The
-		 * ASM_DIR bits are irrelevant per the spec.
-		 *
-		 * For Symmetric Flow Control:
-		 *
-		 *   LOCAL DEVICE  |   LINK PARTNER
-		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
-		 *-------|---------|-------|---------|--------------------
-		 *   1   |   DC    |   1   |   DC    | e1000_fc_full
-		 *
-		 */
-		if ((pcs_adv_reg & E1000_TXCW_PAUSE) &&
-		    (pcs_lp_ability_reg & E1000_TXCW_PAUSE)) {
-			/* Now we need to check if the user selected Rx ONLY
-			 * of pause frames.  In this case, we had to advertise
-			 * FULL flow control because we could not advertise Rx
-			 * ONLY. Hence, we must now check to see if we need to
-			 * turn OFF the TRANSMISSION of PAUSE frames.
-			 */
-			if (hw->fc.requested_mode == e1000_fc_full) {
-				hw->fc.current_mode = e1000_fc_full;
-				DEBUGOUT("Flow Control = FULL.\n");
-			} else {
-				hw->fc.current_mode = e1000_fc_rx_pause;
-				DEBUGOUT("Flow Control = Rx PAUSE frames only.\n");
-			}
-		}
-		/* For receiving PAUSE frames ONLY.
-		 *
-		 *   LOCAL DEVICE  |   LINK PARTNER
-		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
-		 *-------|---------|-------|---------|--------------------
-		 *   0   |    1    |   1   |    1    | e1000_fc_tx_pause
-		 */
-		else if (!(pcs_adv_reg & E1000_TXCW_PAUSE) &&
-			  (pcs_adv_reg & E1000_TXCW_ASM_DIR) &&
-			  (pcs_lp_ability_reg & E1000_TXCW_PAUSE) &&
-			  (pcs_lp_ability_reg & E1000_TXCW_ASM_DIR)) {
-			hw->fc.current_mode = e1000_fc_tx_pause;
-			DEBUGOUT("Flow Control = Tx PAUSE frames only.\n");
-		}
-		/* For transmitting PAUSE frames ONLY.
-		 *
-		 *   LOCAL DEVICE  |   LINK PARTNER
-		 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
-		 *-------|---------|-------|---------|--------------------
-		 *   1   |    1    |   0   |    1    | e1000_fc_rx_pause
-		 */
-		else if ((pcs_adv_reg & E1000_TXCW_PAUSE) &&
-			 (pcs_adv_reg & E1000_TXCW_ASM_DIR) &&
-			 !(pcs_lp_ability_reg & E1000_TXCW_PAUSE) &&
-			 (pcs_lp_ability_reg & E1000_TXCW_ASM_DIR)) {
-			hw->fc.current_mode = e1000_fc_rx_pause;
-			DEBUGOUT("Flow Control = Rx PAUSE frames only.\n");
-		} else {
-			/* Per the IEEE spec, at this point flow control
-			 * should be disabled.
-			 */
-			hw->fc.current_mode = e1000_fc_none;
-			DEBUGOUT("Flow Control = NONE.\n");
-		}
-
-		/* Now we call a subroutine to actually force the MAC
-		 * controller to use the correct flow control settings.
-		 */
-		pcs_ctrl_reg = E1000_READ_REG(hw, E1000_PCS_LCTL);
-		pcs_ctrl_reg |= E1000_PCS_LCTL_FORCE_FCTRL;
-		E1000_WRITE_REG(hw, E1000_PCS_LCTL, pcs_ctrl_reg);
-
-		ret_val = e1000_force_mac_fc_generic(hw);
-		if (ret_val) {
-			DEBUGOUT("Error forcing flow control settings\n");
-			return ret_val;
-		}
-	}
-
 	return E1000_SUCCESS;
 }
 
@@ -2024,9 +1895,6 @@ s32 e1000_disable_pcie_master_generic(struct e1000_hw *hw)
 
 	DEBUGFUNC("e1000_disable_pcie_master_generic");
 
-	if (hw->bus.type != e1000_bus_type_pci_express)
-		return E1000_SUCCESS;
-
 	ctrl = E1000_READ_REG(hw, E1000_CTRL);
 	ctrl |= E1000_CTRL_GIO_MASTER_DISABLE;
 	E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
diff --git a/drivers/net/e1000/base/e1000_mac.h b/drivers/net/e1000/base/e1000_mac.h
index 35a691f63..8a4f1635b 100644
--- a/drivers/net/e1000/base/e1000_mac.h
+++ b/drivers/net/e1000/base/e1000_mac.h
@@ -6,9 +6,7 @@
 #define _E1000_MAC_H_
 
 void e1000_init_mac_ops_generic(struct e1000_hw *hw);
-#ifndef E1000_REMOVED
 #define E1000_REMOVED(a) (0)
-#endif /* E1000_REMOVED */
 void e1000_null_mac_generic(struct e1000_hw *hw);
 s32  e1000_null_ops_generic(struct e1000_hw *hw);
 s32  e1000_null_link_info(struct e1000_hw *hw, u16 *s, u16 *d);
diff --git a/drivers/net/e1000/base/e1000_nvm.c b/drivers/net/e1000/base/e1000_nvm.c
index 93d10ebb3..6aa432834 100644
--- a/drivers/net/e1000/base/e1000_nvm.c
+++ b/drivers/net/e1000/base/e1000_nvm.c
@@ -1295,9 +1295,7 @@ void e1000_get_fw_version(struct e1000_hw *hw, struct e1000_fw_version *fw_vers)
 			return;
 		}
 		/* fall through */
-#ifndef NO_I225_SUPPORT
 	case e1000_i225:
-#endif /* NO_I225_SUPPORT */
 	case e1000_i350:
 		hw->nvm.ops.read(hw, NVM_ETRACK_HIWORD, 1, &etrack_test);
 		/* find combo image version */
diff --git a/drivers/net/e1000/base/e1000_phy.h b/drivers/net/e1000/base/e1000_phy.h
index 3321bc0ba..a6f3d1021 100644
--- a/drivers/net/e1000/base/e1000_phy.h
+++ b/drivers/net/e1000/base/e1000_phy.h
@@ -122,8 +122,6 @@ s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
 #define GS40G_MAC_SPEED_1G		0X0006
 #define GS40G_COPPER_SPEC		0x0010
 
-#endif /* NO_I210_SUPPORT */
-#ifndef NO_I225_SUPPORT
 #define E1000_I225_PHPM			0x0E14 /* I225 PHY Power Management */
 #define E1000_I225_PHPM_DIS_1000_D3	0x0008 /* Disable 1G in D3 */
 #define E1000_I225_PHPM_LINK_ENERGY	0x0010 /* Link Energy Detect */
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index b0f9ff487..e374083e5 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -93,14 +93,10 @@
 #define E1000_IOSFPC	0x00F28  /* TX corrupted data  */
 #define E1000_EEMNGCTL	0x01010  /* MNG EEprom Control */
 #define E1000_EEMNGCTL_I210	0x01010  /* i210 MNG EEprom Mode Control */
-#ifndef NO_I225_SUPPORT
 #define E1000_EEMNGCTL_I225	0x01010  /* i225 MNG EEprom Mode Control */
-#endif /* NO_I225_SUPPORT */
 #define E1000_EEARBC	0x01024  /* EEPROM Auto Read Bus Control */
 #define E1000_EEARBC_I210	0x12024 /* EEPROM Auto Read Bus Control */
-#ifndef NO_I225_SUPPORT
 #define E1000_EEARBC_I225	0x12024 /* EEPROM Auto Read Bus Control */
-#endif /* NO_I225_SUPPORT */
 #define E1000_FLASHT	0x01028  /* FLASH Timer Register */
 #define E1000_FLSWCTL	0x01030  /* FLASH control register */
 #define E1000_FLSWDATA	0x01034  /* FLASH data register */
@@ -215,7 +211,6 @@
 
 #define E1000_MMDAC			13 /* MMD Access Control */
 #define E1000_MMDAAD			14 /* MMD Access Address/Data */
-
 /* Convenience macros
  *
  * Note: "_n" is the queue number of the register to be written to.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 68/70] net/e1000/base: modify copyright
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (66 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 67/70] net/e1000/base: remove conditional compilation wrapper Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 69/70] net/e1000/base: update version Guinan Sun
                   ` (3 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun

Modify the copyright of the file header.

Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_80003es2lan.c | 2 +-
 drivers/net/e1000/base/e1000_80003es2lan.h | 2 +-
 drivers/net/e1000/base/e1000_82540.c       | 2 +-
 drivers/net/e1000/base/e1000_82541.c       | 2 +-
 drivers/net/e1000/base/e1000_82541.h       | 2 +-
 drivers/net/e1000/base/e1000_82542.c       | 2 +-
 drivers/net/e1000/base/e1000_82543.c       | 2 +-
 drivers/net/e1000/base/e1000_82543.h       | 2 +-
 drivers/net/e1000/base/e1000_82571.c       | 2 +-
 drivers/net/e1000/base/e1000_82571.h       | 2 +-
 drivers/net/e1000/base/e1000_82575.c       | 2 +-
 drivers/net/e1000/base/e1000_82575.h       | 2 +-
 drivers/net/e1000/base/e1000_api.c         | 2 +-
 drivers/net/e1000/base/e1000_api.h         | 2 +-
 drivers/net/e1000/base/e1000_defines.h     | 2 +-
 drivers/net/e1000/base/e1000_hw.h          | 2 +-
 drivers/net/e1000/base/e1000_i210.c        | 2 +-
 drivers/net/e1000/base/e1000_i210.h        | 2 +-
 drivers/net/e1000/base/e1000_i225.c        | 4 ++++
 drivers/net/e1000/base/e1000_i225.h        | 4 ++++
 drivers/net/e1000/base/e1000_ich8lan.c     | 2 +-
 drivers/net/e1000/base/e1000_ich8lan.h     | 2 +-
 drivers/net/e1000/base/e1000_mac.c         | 2 +-
 drivers/net/e1000/base/e1000_mac.h         | 2 +-
 drivers/net/e1000/base/e1000_manage.c      | 2 +-
 drivers/net/e1000/base/e1000_manage.h      | 3 +--
 drivers/net/e1000/base/e1000_mbx.c         | 2 +-
 drivers/net/e1000/base/e1000_mbx.h         | 2 +-
 drivers/net/e1000/base/e1000_nvm.c         | 2 +-
 drivers/net/e1000/base/e1000_nvm.h         | 2 +-
 drivers/net/e1000/base/e1000_phy.c         | 2 +-
 drivers/net/e1000/base/e1000_phy.h         | 2 +-
 drivers/net/e1000/base/e1000_regs.h        | 2 +-
 drivers/net/e1000/base/e1000_vf.c          | 2 +-
 drivers/net/e1000/base/e1000_vf.h          | 2 +-
 35 files changed, 41 insertions(+), 34 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_80003es2lan.c b/drivers/net/e1000/base/e1000_80003es2lan.c
index b795491c0..243bc6fe3 100644
--- a/drivers/net/e1000/base/e1000_80003es2lan.c
+++ b/drivers/net/e1000/base/e1000_80003es2lan.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /* 80003ES2LAN Gigabit Ethernet Controller (Copper)
diff --git a/drivers/net/e1000/base/e1000_80003es2lan.h b/drivers/net/e1000/base/e1000_80003es2lan.h
index f77beb253..74264362b 100644
--- a/drivers/net/e1000/base/e1000_80003es2lan.h
+++ b/drivers/net/e1000/base/e1000_80003es2lan.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_80003ES2LAN_H_
diff --git a/drivers/net/e1000/base/e1000_82540.c b/drivers/net/e1000/base/e1000_82540.c
index 0d14f6e07..068f9f68f 100644
--- a/drivers/net/e1000/base/e1000_82540.c
+++ b/drivers/net/e1000/base/e1000_82540.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /*
diff --git a/drivers/net/e1000/base/e1000_82541.c b/drivers/net/e1000/base/e1000_82541.c
index eb80873f5..74efd8b6f 100644
--- a/drivers/net/e1000/base/e1000_82541.c
+++ b/drivers/net/e1000/base/e1000_82541.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /*
diff --git a/drivers/net/e1000/base/e1000_82541.h b/drivers/net/e1000/base/e1000_82541.h
index 2f343f182..72fc07d0e 100644
--- a/drivers/net/e1000/base/e1000_82541.h
+++ b/drivers/net/e1000/base/e1000_82541.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_82541_H_
diff --git a/drivers/net/e1000/base/e1000_82542.c b/drivers/net/e1000/base/e1000_82542.c
index 9351ed722..fd473c1c6 100644
--- a/drivers/net/e1000/base/e1000_82542.c
+++ b/drivers/net/e1000/base/e1000_82542.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /*
diff --git a/drivers/net/e1000/base/e1000_82543.c b/drivers/net/e1000/base/e1000_82543.c
index dfde2a8b9..ca273b436 100644
--- a/drivers/net/e1000/base/e1000_82543.c
+++ b/drivers/net/e1000/base/e1000_82543.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /*
diff --git a/drivers/net/e1000/base/e1000_82543.h b/drivers/net/e1000/base/e1000_82543.h
index 51a421190..cf81e4e84 100644
--- a/drivers/net/e1000/base/e1000_82543.h
+++ b/drivers/net/e1000/base/e1000_82543.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_82543_H_
diff --git a/drivers/net/e1000/base/e1000_82571.c b/drivers/net/e1000/base/e1000_82571.c
index 157b953cd..9dc7f6025 100644
--- a/drivers/net/e1000/base/e1000_82571.c
+++ b/drivers/net/e1000/base/e1000_82571.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /* 82571EB Gigabit Ethernet Controller
diff --git a/drivers/net/e1000/base/e1000_82571.h b/drivers/net/e1000/base/e1000_82571.h
index 7cc179b37..0d8412678 100644
--- a/drivers/net/e1000/base/e1000_82571.h
+++ b/drivers/net/e1000/base/e1000_82571.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_82571_H_
diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index b392d1f2a..81ff633b0 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /*
diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index 4ff3e949f..e2364606d 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_82575_H_
diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index 64b6dd185..0a3463b90 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_api.h"
diff --git a/drivers/net/e1000/base/e1000_api.h b/drivers/net/e1000/base/e1000_api.h
index 0786654fd..c16ed2163 100644
--- a/drivers/net/e1000/base/e1000_api.h
+++ b/drivers/net/e1000/base/e1000_api.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_API_H_
diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 4a1d230c3..11a5bc0dc 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_DEFINES_H_
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 210c7da16..72f746443 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_HW_H_
diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index d32b0f089..3c349d33f 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_api.h"
diff --git a/drivers/net/e1000/base/e1000_i210.h b/drivers/net/e1000/base/e1000_i210.h
index 940eee21a..b5cc84766 100644
--- a/drivers/net/e1000/base/e1000_i210.h
+++ b/drivers/net/e1000/base/e1000_i210.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_I210_H_
diff --git a/drivers/net/e1000/base/e1000_i225.c b/drivers/net/e1000/base/e1000_i225.c
index 628695760..d82538d83 100644
--- a/drivers/net/e1000/base/e1000_i225.c
+++ b/drivers/net/e1000/base/e1000_i225.c
@@ -1,3 +1,7 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2020 Intel Corporation
+ */
+
 #include "e1000_api.h"
 
 STATIC s32 e1000_init_nvm_params_i225(struct e1000_hw *hw);
diff --git a/drivers/net/e1000/base/e1000_i225.h b/drivers/net/e1000/base/e1000_i225.h
index f13a7bbde..c66641c88 100644
--- a/drivers/net/e1000/base/e1000_i225.h
+++ b/drivers/net/e1000/base/e1000_i225.h
@@ -1,3 +1,7 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2020 Intel Corporation
+ */
+
 #ifndef _E1000_I225_H_
 #define _E1000_I225_H_
 
diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index bf77bfa1d..14f86b7bd 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /* 82562G 10/100 Network Connection
diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/base/e1000_ich8lan.h
index 5e89f4442..a30b32e97 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.h
+++ b/drivers/net/e1000/base/e1000_ich8lan.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_ICH8LAN_H_
diff --git a/drivers/net/e1000/base/e1000_mac.c b/drivers/net/e1000/base/e1000_mac.c
index 4b67acea3..889d649e5 100644
--- a/drivers/net/e1000/base/e1000_mac.c
+++ b/drivers/net/e1000/base/e1000_mac.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_api.h"
diff --git a/drivers/net/e1000/base/e1000_mac.h b/drivers/net/e1000/base/e1000_mac.h
index 8a4f1635b..86fcad23b 100644
--- a/drivers/net/e1000/base/e1000_mac.h
+++ b/drivers/net/e1000/base/e1000_mac.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_MAC_H_
diff --git a/drivers/net/e1000/base/e1000_manage.c b/drivers/net/e1000/base/e1000_manage.c
index 74b4480de..4b8102830 100644
--- a/drivers/net/e1000/base/e1000_manage.c
+++ b/drivers/net/e1000/base/e1000_manage.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_api.h"
diff --git a/drivers/net/e1000/base/e1000_manage.h b/drivers/net/e1000/base/e1000_manage.h
index 45dbb0069..268a13381 100644
--- a/drivers/net/e1000/base/e1000_manage.h
+++ b/drivers/net/e1000/base/e1000_manage.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_MANAGE_H_
@@ -62,5 +62,4 @@ enum e1000_mng_mode {
 
 /* Intel(R) Active Management Technology signature */
 #define E1000_IAMT_SIGNATURE		0x544D4149
-
 #endif
diff --git a/drivers/net/e1000/base/e1000_mbx.c b/drivers/net/e1000/base/e1000_mbx.c
index 3f3b326c6..3f477ddb6 100644
--- a/drivers/net/e1000/base/e1000_mbx.c
+++ b/drivers/net/e1000/base/e1000_mbx.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_mbx.h"
diff --git a/drivers/net/e1000/base/e1000_mbx.h b/drivers/net/e1000/base/e1000_mbx.h
index 683781e21..f3464b49b 100644
--- a/drivers/net/e1000/base/e1000_mbx.h
+++ b/drivers/net/e1000/base/e1000_mbx.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_MBX_H_
diff --git a/drivers/net/e1000/base/e1000_nvm.c b/drivers/net/e1000/base/e1000_nvm.c
index 6aa432834..aec5e8098 100644
--- a/drivers/net/e1000/base/e1000_nvm.c
+++ b/drivers/net/e1000/base/e1000_nvm.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_api.h"
diff --git a/drivers/net/e1000/base/e1000_nvm.h b/drivers/net/e1000/base/e1000_nvm.h
index 38adab528..056f82353 100644
--- a/drivers/net/e1000/base/e1000_nvm.h
+++ b/drivers/net/e1000/base/e1000_nvm.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_NVM_H_
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index 712ec1269..14a476298 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_api.h"
diff --git a/drivers/net/e1000/base/e1000_phy.h b/drivers/net/e1000/base/e1000_phy.h
index a6f3d1021..a7834240e 100644
--- a/drivers/net/e1000/base/e1000_phy.h
+++ b/drivers/net/e1000/base/e1000_phy.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_PHY_H_
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index e374083e5..29a0a1ed5 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_REGS_H_
diff --git a/drivers/net/e1000/base/e1000_vf.c b/drivers/net/e1000/base/e1000_vf.c
index dc109d5e0..44ebe07ee 100644
--- a/drivers/net/e1000/base/e1000_vf.c
+++ b/drivers/net/e1000/base/e1000_vf.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 
diff --git a/drivers/net/e1000/base/e1000_vf.h b/drivers/net/e1000/base/e1000_vf.h
index c05d557f0..4bec21c93 100644
--- a/drivers/net/e1000/base/e1000_vf.h
+++ b/drivers/net/e1000/base/e1000_vf.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_VF_H_
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 69/70] net/e1000/base: update version
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (67 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 68/70] net/e1000/base: modify copyright Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 70/70] net/e1000/base: resolve core dump Guinan Sun
                   ` (2 subsequent siblings)
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun

Update base code version in readme.

Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/README | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/README b/drivers/net/e1000/base/README
index 56738d001..b84ee5ad6 100644
--- a/drivers/net/e1000/base/README
+++ b/drivers/net/e1000/base/README
@@ -1,9 +1,9 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2010-2016 Intel Corporation
+ * Copyright(c) 2010-2020 Intel Corporation
  */
 
 This directory contains source code of FreeBSD em & igb drivers of version
-cid-shared-code.2016.11.22 released by ND. The sub-directory of base/
+cid-gigabit.2020.06.05.tar.gz released by ND. The sub-directory of base/
 contains the original source package.
 
 This driver is valid for the product(s) listed below
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH 70/70] net/e1000/base: resolve core dump
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (68 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 69/70] net/e1000/base: update version Guinan Sun
@ 2020-06-22  6:46 ` Guinan Sun
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
  71 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-22  6:46 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun

The initialization of set_lan_id is deleted,
resulting in a core dump when testpmd starts.
This patch reverts part of the code to fix
core dump problems.

Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_mac.c  | 65 +++++++++++++++++++++++++++++
 drivers/net/e1000/base/e1000_regs.h |  4 +-
 2 files changed, 67 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_mac.c b/drivers/net/e1000/base/e1000_mac.c
index 889d649e5..e58a60fc9 100644
--- a/drivers/net/e1000/base/e1000_mac.c
+++ b/drivers/net/e1000/base/e1000_mac.c
@@ -4,6 +4,8 @@
 
 #include "e1000_api.h"
 
+STATIC s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw);
+STATIC void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
 STATIC void e1000_config_collision_dist_generic(struct e1000_hw *hw);
 
 /**
@@ -19,8 +21,32 @@ void e1000_init_mac_ops_generic(struct e1000_hw *hw)
 
 	/* General Setup */
 	mac->ops.init_params = e1000_null_ops_generic;
+	mac->ops.init_hw = e1000_null_ops_generic;
+	mac->ops.reset_hw = e1000_null_ops_generic;
+	mac->ops.setup_physical_interface = e1000_null_ops_generic;
+	mac->ops.get_bus_info = e1000_null_ops_generic;
+	mac->ops.set_lan_id = e1000_set_lan_id_multi_port_pcie;
+	mac->ops.read_mac_addr = e1000_read_mac_addr_generic;
 	mac->ops.config_collision_dist = e1000_config_collision_dist_generic;
+	mac->ops.clear_hw_cntrs = e1000_null_mac_generic;
+	/* LED */
+	mac->ops.cleanup_led = e1000_null_ops_generic;
+	mac->ops.setup_led = e1000_null_ops_generic;
+	mac->ops.blink_led = e1000_null_ops_generic;
+	mac->ops.led_on = e1000_null_ops_generic;
+	mac->ops.led_off = e1000_null_ops_generic;
+	/* LINK */
+	mac->ops.setup_link = e1000_null_ops_generic;
+	mac->ops.get_link_up_info = e1000_null_link_info;
+	mac->ops.check_for_link = e1000_null_ops_generic;
+	/* Management */
+	mac->ops.check_mng_mode = e1000_null_mng_mode;
+	/* VLAN, MC, etc. */
+	mac->ops.update_mc_addr_list = e1000_null_update_mc;
+	mac->ops.clear_vfta = e1000_null_mac_generic;
+	mac->ops.write_vfta = e1000_null_write_vfta;
 	mac->ops.rar_set = e1000_rar_set_generic;
+	mac->ops.validate_mdi_setting = e1000_validate_mdi_setting_generic;
 }
 
 /**
@@ -213,6 +239,26 @@ s32 e1000_get_bus_info_pcie_generic(struct e1000_hw *hw)
 	return E1000_SUCCESS;
 }
 
+/**
+ *  e1000_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port devices
+ *
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines the LAN function id by reading memory-mapped registers
+ *  and swaps the port value if requested.
+ **/
+STATIC void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw)
+{
+	struct e1000_bus_info *bus = &hw->bus;
+	u32 reg;
+
+	/* The status register reports the correct function number
+	 * for the device regardless of function swap state.
+	 */
+	reg = E1000_READ_REG(hw, E1000_STATUS);
+	bus->func = (reg & E1000_STATUS_FUNC_MASK) >> E1000_STATUS_FUNC_SHIFT;
+}
+
 /**
  *  e1000_set_lan_id_multi_port_pci - Set LAN id for PCI multiple port devices
  *  @hw: pointer to the HW structure
@@ -1984,6 +2030,25 @@ void e1000_update_adaptive_generic(struct e1000_hw *hw)
 	}
 }
 
+/**
+ *  e1000_validate_mdi_setting_generic - Verify MDI/MDIx settings
+ *  @hw: pointer to the HW structure
+ *
+ *  Verify that when not using auto-negotiation that MDI/MDIx is correctly
+ *  set, which is forced to MDI mode only.
+ **/
+STATIC s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw)
+{
+	DEBUGFUNC("e1000_validate_mdi_setting_generic");
+
+	if (!hw->mac.autoneg && (hw->phy.mdix == 0 || hw->phy.mdix == 3)) {
+		DEBUGOUT("Invalid MDI setting detected\n");
+		hw->phy.mdix = 1;
+		return -E1000_ERR_CONFIG;
+	}
+
+	return E1000_SUCCESS;
+}
 
 /**
  *  e1000_validate_mdi_setting_crossover_generic - Verify MDI/MDIx settings
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 29a0a1ed5..858feed95 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -11,8 +11,8 @@
 #define E1000_STATUS	0x00008  /* Device Status - RO */
 #define E1000_EECD	0x00010  /* EEPROM/Flash Control - RW */
 /* NVM  Register Descriptions */
-#define E1000_EERD		0x12014  /* EEprom mode read - RW */
-#define E1000_EEWR		0x12018  /* EEprom mode write - RW */
+#define E1000_EERD		0x00014  /* EEprom mode read - RW */
+#define E1000_EEWR		0x00018  /* EEprom mode write - RW */
 #define E1000_CTRL_EXT	0x00018  /* Extended Device Control - RW */
 #define E1000_MDIC	0x00020  /* MDI Control - RW */
 #define E1000_MDICNFG	0x00E04  /* MDI Config - RW */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [dpdk-dev] [PATCH 15/70] net/e1000/base: setup copper link function for i225
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 15/70] net/e1000/base: setup copper link function for i225 Guinan Sun
@ 2020-06-23  2:22   ` Zhao1, Wei
  0 siblings, 0 replies; 149+ messages in thread
From: Zhao1, Wei @ 2020-06-23  2:22 UTC (permalink / raw)
  To: Sun, GuinanX, dev; +Cc: Guo, Jia, Trakhtenberg, Dany

Hi, 

> -----Original Message-----
> From: Sun, GuinanX <guinanx.sun@intel.com>
> Sent: Monday, June 22, 2020 2:46 PM
> To: dev@dpdk.org
> Cc: Guo, Jia <jia.guo@intel.com>; Zhao1, Wei <wei.zhao1@intel.com>; Sun,
> GuinanX <guinanx.sun@intel.com>; Trakhtenberg, Dany
> <dany.trakhtenberg@intel.com>
> Subject: [PATCH 15/70] net/e1000/base: setup copper link function for i225
> 
> A dedicated function for i225 that Configures the link for auto-neg or forced
> speed and duplex. It was taken from the
> e1000_setup_copper_link_82575 function in e1000_82575 file and was
> refactored for i225 only.
> 
> Signed-off-by: Dany Trakhtenberg <Dany.Trakhtenberg@intel.com>
> Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
> ---
>  drivers/net/e1000/base/e1000_i225.c | 30
> +++++++++++++++++++++++++++++  drivers/net/e1000/base/e1000_phy.h
> | 13 +++++++++++++
>  2 files changed, 43 insertions(+)
> 
> diff --git a/drivers/net/e1000/base/e1000_i225.c
> b/drivers/net/e1000/base/e1000_i225.c
> index 4ba6c45be..621dc6863 100644
> --- a/drivers/net/e1000/base/e1000_i225.c
> +++ b/drivers/net/e1000/base/e1000_i225.c

It seems we should commit to folder dpdk/drivers/net/igc/base not in e1000 folder for i225


> @@ -124,6 +124,36 @@ void e1000_release_swfw_sync_i225(struct
> e1000_hw *hw, u16 mask)
>  	e1000_put_hw_semaphore_generic(hw);
>  }
> 
> +/*
> + * e1000_setup_copper_link_i225 - Configure copper link settings
> + * @hw: pointer to the HW structure
> + *
> + * Configures the link for auto-neg or forced speed and duplex.  Then
> +we check
> + * for link, once link is established calls to configure collision
> +distance
> + * and flow control are called.
> + */
> +s32 e1000_setup_copper_link_i225(struct e1000_hw *hw) {
> +	u32 phpm_reg;
> +


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [dpdk-dev] [PATCH 16/70] net/e1000/base: implement Low-Power-Link-Up (LPLU) for i225
  2020-06-22  6:45 ` [dpdk-dev] [PATCH 16/70] net/e1000/base: implement Low-Power-Link-Up (LPLU) " Guinan Sun
@ 2020-06-23  2:23   ` Zhao1, Wei
  0 siblings, 0 replies; 149+ messages in thread
From: Zhao1, Wei @ 2020-06-23  2:23 UTC (permalink / raw)
  To: Sun, GuinanX, dev; +Cc: Guo, Jia, Dima Ruinskiy

Hi, 

> -----Original Message-----
> From: Sun, GuinanX <guinanx.sun@intel.com>
> Sent: Monday, June 22, 2020 2:46 PM
> To: dev@dpdk.org
> Cc: Guo, Jia <jia.guo@intel.com>; Zhao1, Wei <wei.zhao1@intel.com>; Sun,
> GuinanX <guinanx.sun@intel.com>; Dima Ruinskiy <dima.ruinskiy@intel.com>
> Subject: [PATCH 16/70] net/e1000/base: implement Low-Power-Link-Up (LPLU)
> for i225
> 
> I225 introduces a new mechanism for Low-Power-Link-Up (LPLU) control.
> This patch implements the new functions and sets the PHY OPS pointers.
> 
> Signed-off-by: Dima Ruinskiy <dima.ruinskiy@intel.com>
> Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
> ---
>  drivers/net/e1000/base/e1000_i225.c | 58
> +++++++++++++++++++++++++++++
>  1 file changed, 58 insertions(+)
> 
> diff --git a/drivers/net/e1000/base/e1000_i225.c
> b/drivers/net/e1000/base/e1000_i225.c
> index 621dc6863..dbebb6fa3 100644
> --- a/drivers/net/e1000/base/e1000_i225.c
> +++ b/drivers/net/e1000/base/e1000_i225.c


It seems we should commit to folder dpdk/drivers/net/igc/base not in e1000 folder for i225

> @@ -1147,3 +1147,61 @@ s32 e1000_init_hw_i225(struct e1000_hw *hw)
>  	ret_val = e1000_init_hw_82575(hw);
>  	return ret_val;
>  }
> +
> +/*
> + * e1000_set_d0_lplu_state_i225 - Set Low-Power-Link-Up (LPLU) D0 state
> + * @hw: pointer to the HW structure
> + * @active: true to enable LPLU, false to disable
> + *
> + * Note: since I225 does not actually support LPLU, this function
> + * simply enables/disables 1G and 2.5G speeds in D0.
> + */
> +s32 e1000_set_d0_lplu_state_i225(struct e1000_hw *hw, bool active) {
> +	u32 data;
> +
> +	DEBUGFUNC("e1000_set_d0_lplu_state_i225");
> +
> +	data = E1000_READ_REG(hw, E1000_I225_PHPM);
> +
> +	if (active) {
> +		data |= E1000_I225_PHPM_DIS_1000;
> +		data |= E1000_I225_PHPM_DIS_2500;
> +	} else {
> +		data &= ~E1000_I225_PHPM_DIS_1000;
> +		data &= ~E1000_I225_PHPM_DIS_2500;
> +	}
> +
> +	E1000_WRITE_REG(hw, E1000_I225_PHPM, data);
> +	return E1000_SUCCESS;
> +}
> +
> +/*
> + * e1000_set_d3_lplu_state_i225 - Set Low-Power-Link-Up (LPLU) D3 state
> + * @hw: pointer to the HW structure
> + * @active: true to enable LPLU, false to disable
> + *
> + * Note: since I225 does not actually support LPLU, this function
> + * simply enables/disables 100M, 1G and 2.5G speeds in D3.
> + */
> +s32 e1000_set_d3_lplu_state_i225(struct e1000_hw *hw, bool active) {
> +	u32 data;
> +
> +	DEBUGFUNC("e1000_set_d3_lplu_state_i225");
> +
> +	data = E1000_READ_REG(hw, E1000_I225_PHPM);
> +
> +	if (active) {
> +		data |= E1000_I225_PHPM_DIS_100_D3;
> +		data |= E1000_I225_PHPM_DIS_1000_D3;
> +		data |= E1000_I225_PHPM_DIS_2500_D3;
> +	} else {
> +		data &= ~E1000_I225_PHPM_DIS_100_D3;
> +		data &= ~E1000_I225_PHPM_DIS_1000_D3;
> +		data &= ~E1000_I225_PHPM_DIS_2500_D3;
> +	}
> +
> +	E1000_WRITE_REG(hw, E1000_I225_PHPM, data);
> +	return E1000_SUCCESS;
> +}
> --
> 2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 00/42] update e1000 base code
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (69 preceding siblings ...)
  2020-06-22  6:46 ` [dpdk-dev] [PATCH 70/70] net/e1000/base: resolve core dump Guinan Sun
@ 2020-06-24  7:52 ` Guinan Sun
  2020-06-24  7:52   ` [dpdk-dev] [PATCH v2 01/42] net/e1000/base: resolve flash presence for i210 devices Guinan Sun
                     ` (42 more replies)
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
  71 siblings, 43 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:52 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun

update e1000 base code.
---
v2:
* Remove codes about i225.

Guinan Sun (42):
  net/e1000/base: resolve flash presence for i210 devices
  net/e1000/base: i210 slow system clock update
  net/e1000/base: add ICL device id's
  net/e1000/base: remove shadowing variable declarations
  net/e1000/base: introduce flags
  net/e1000/base: modify MAC initialization for i211
  net/e1000/base: modify parens to match other MAC checks
  net/e1000/base: expose xmdio methods
  net/e1000/base: fall through explicitly
  net/e1000/base: add function parameter descriptions
  net/e1000/base: modify fall through code comments
  net/e1000/base: modify klocwork errors
  net/e1000/base: modify klockwork about unused return values
  net/e1000/base: improve coding style
  net/e1000/base: modify HW level time sync mechanisms
  net/e1000/base: modify description
  net/e1000/base: remove duplicated codes from 82575
  net/e1000/base: add definitions for ETQF register bit
  net/e1000/base: cleanup duplicate declaration
  net/e1000/base: expose MAC functions
  net/e1000/base: move definitions from 82575 to defines file
  net/e1000/base: add define to PCIm function state
  net/e1000/base: add missing register defines
  net/e1000/base: move the device reset definition
  net/e1000/base: increased timeout for ME ULP exit
  net/e1000/base: add missing device ID
  net/e1000/base: expose more future extended NVM
  net/e1000/base: add definition of EEE 2.5G setup register
  net/e1000/base: remove definitions
  net/e1000/base: remove useless statement
  net/e1000/base: add missed define for VFTA
  net/e1000/base: modify flow control setup
  net/e1000/base: led blinking fix for i210
  net/e1000/base: expose new FEXTNVM registers and masks
  net/e1000/base: cleanup duplicate defines
  net/e1000/base: add support for Nahum10
  net/e1000/base: add fall-through comments for switch cases
  net/e1000/base: modify typo in Alder Lake brand name
  net/e1000/base: introduce DPGFR register
  net/e1000/base: remove conditional compilation wrapper
  net/e1000/base: modify copyright
  net/e1000/base: update version

 drivers/net/e1000/Makefile                 |   1 +
 drivers/net/e1000/base/README              |   4 +-
 drivers/net/e1000/base/e1000_80003es2lan.c |   3 +-
 drivers/net/e1000/base/e1000_80003es2lan.h |   2 +-
 drivers/net/e1000/base/e1000_82540.c       |   2 +-
 drivers/net/e1000/base/e1000_82541.c       |   2 +-
 drivers/net/e1000/base/e1000_82541.h       |   2 +-
 drivers/net/e1000/base/e1000_82542.c       |   2 +-
 drivers/net/e1000/base/e1000_82543.c       |   2 +-
 drivers/net/e1000/base/e1000_82543.h       |   2 +-
 drivers/net/e1000/base/e1000_82571.c       |   2 +-
 drivers/net/e1000/base/e1000_82571.h       |   2 +-
 drivers/net/e1000/base/e1000_82575.c       | 523 +++++++--------------
 drivers/net/e1000/base/e1000_82575.h       |  95 +---
 drivers/net/e1000/base/e1000_api.c         |  14 +-
 drivers/net/e1000/base/e1000_api.h         |   3 +-
 drivers/net/e1000/base/e1000_base.c        | 192 ++++++++
 drivers/net/e1000/base/e1000_base.h        | 127 +++++
 drivers/net/e1000/base/e1000_defines.h     |  27 +-
 drivers/net/e1000/base/e1000_hw.h          |  17 +-
 drivers/net/e1000/base/e1000_i210.c        | 101 +---
 drivers/net/e1000/base/e1000_i210.h        |   6 +-
 drivers/net/e1000/base/e1000_ich8lan.c     | 115 ++---
 drivers/net/e1000/base/e1000_ich8lan.h     |  28 +-
 drivers/net/e1000/base/e1000_mac.c         |  13 +-
 drivers/net/e1000/base/e1000_mac.h         |   5 +-
 drivers/net/e1000/base/e1000_manage.c      |   6 +-
 drivers/net/e1000/base/e1000_manage.h      |   3 +-
 drivers/net/e1000/base/e1000_mbx.c         |   7 +-
 drivers/net/e1000/base/e1000_mbx.h         |   2 +-
 drivers/net/e1000/base/e1000_nvm.c         |  16 +-
 drivers/net/e1000/base/e1000_nvm.h         |   2 +-
 drivers/net/e1000/base/e1000_phy.c         |  86 +++-
 drivers/net/e1000/base/e1000_phy.h         |   7 +-
 drivers/net/e1000/base/e1000_regs.h        |  40 +-
 drivers/net/e1000/base/e1000_vf.c          |   4 +-
 drivers/net/e1000/base/e1000_vf.h          |   2 +-
 drivers/net/e1000/base/meson.build         |   1 +
 drivers/net/e1000/igb_rxtx.c               |   2 +-
 39 files changed, 810 insertions(+), 660 deletions(-)
 create mode 100644 drivers/net/e1000/base/e1000_base.c
 create mode 100644 drivers/net/e1000/base/e1000_base.h

-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 01/42] net/e1000/base: resolve flash presence for i210 devices
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
@ 2020-06-24  7:52   ` Guinan Sun
  2020-06-29  3:29     ` Yang, Qiming
  2020-06-24  7:52   ` [dpdk-dev] [PATCH v2 02/42] net/e1000/base: i210 slow system clock update Guinan Sun
                     ` (41 subsequent siblings)
  42 siblings, 1 reply; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:52 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Sasha Neftin

There is a conflict with legacy i210.
This patch is for compatibility with i211.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_nvm.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_nvm.c b/drivers/net/e1000/base/e1000_nvm.c
index 56e2db122..4d4a8e04b 100644
--- a/drivers/net/e1000/base/e1000_nvm.c
+++ b/drivers/net/e1000/base/e1000_nvm.c
@@ -749,8 +749,9 @@ s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
 
 	DEBUGFUNC("e1000_read_pba_string_generic");
 
-	if ((hw->mac.type >= e1000_i210) &&
-	    !e1000_get_flash_presence_i210(hw)) {
+	if ((hw->mac.type == e1000_i210 ||
+	     hw->mac.type == e1000_i211) &&
+	     !e1000_get_flash_presence_i210(hw)) {
 		DEBUGOUT("Flashless no PBA string\n");
 		return -E1000_ERR_NVM_PBA_SECTION;
 	}
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 02/42] net/e1000/base: i210 slow system clock update
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
  2020-06-24  7:52   ` [dpdk-dev] [PATCH v2 01/42] net/e1000/base: resolve flash presence for i210 devices Guinan Sun
@ 2020-06-24  7:52   ` Guinan Sun
  2020-06-24  7:52   ` [dpdk-dev] [PATCH v2 03/42] net/e1000/base: add ICL device id's Guinan Sun
                     ` (40 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:52 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Todd Fujinaka

This code is required for the update for system clock.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i210.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index 9298223c3..d9cd1a084 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -900,6 +900,8 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 	u16 nvm_word, phy_word, pci_word, tmp_nvm;
 	int i;
 
+	/* Get PHY semaphore */
+	hw->phy.ops.acquire(hw);
 	/* Get and set needed register values */
 	wuc = E1000_READ_REG(hw, E1000_WUC);
 	mdicnfg = E1000_READ_REG(hw, E1000_MDICNFG);
@@ -915,8 +917,11 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 	phy_word = E1000_PHY_PLL_UNCONF;
 	for (i = 0; i < E1000_MAX_PLL_TRIES; i++) {
 		/* check current state directly from internal PHY */
-		e1000_read_phy_reg_gs40g(hw, (E1000_PHY_PLL_FREQ_PAGE |
-					 E1000_PHY_PLL_FREQ_REG), &phy_word);
+		e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0xFC);
+		usec_delay(20);
+		e1000_read_phy_reg_mdic(hw, E1000_PHY_PLL_FREQ_REG, &phy_word);
+		usec_delay(20);
+		e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0);
 		if ((phy_word & E1000_PHY_PLL_UNCONF)
 		    != E1000_PHY_PLL_UNCONF) {
 			ret_val = E1000_SUCCESS;
@@ -950,6 +955,8 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 	}
 	/* restore MDICNFG setting */
 	E1000_WRITE_REG(hw, E1000_MDICNFG, mdicnfg);
+	/* Release PHY semaphore */
+	hw->phy.ops.release(hw);
 	return ret_val;
 }
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 03/42] net/e1000/base: add ICL device id's
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
  2020-06-24  7:52   ` [dpdk-dev] [PATCH v2 01/42] net/e1000/base: resolve flash presence for i210 devices Guinan Sun
  2020-06-24  7:52   ` [dpdk-dev] [PATCH v2 02/42] net/e1000/base: i210 slow system clock update Guinan Sun
@ 2020-06-24  7:52   ` Guinan Sun
  2020-06-24  7:52   ` [dpdk-dev] [PATCH v2 04/42] net/e1000/base: remove shadowing variable declarations Guinan Sun
                     ` (39 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:52 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Lotem Leder

This patch contains a preliminary support for new LAN device ID's.

Signed-off-by: Lotem Leder <lotem.leder@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.c | 4 ++++
 drivers/net/e1000/base/e1000_hw.h  | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index 718952801..a93e8ff03 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -284,6 +284,10 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 	case E1000_DEV_ID_PCH_CNP_I219_V6:
 	case E1000_DEV_ID_PCH_CNP_I219_LM7:
 	case E1000_DEV_ID_PCH_CNP_I219_V7:
+	case E1000_DEV_ID_PCH_ICP_I219_LM8:
+	case E1000_DEV_ID_PCH_ICP_I219_V8:
+	case E1000_DEV_ID_PCH_ICP_I219_LM9:
+	case E1000_DEV_ID_PCH_ICP_I219_V9:
 		mac->type = e1000_pch_cnp;
 		break;
 	case E1000_DEV_ID_82575EB_COPPER:
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 9793b724e..933a9204c 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -120,6 +120,10 @@ struct e1000_hw;
 #define E1000_DEV_ID_PCH_CNP_I219_V6		0x15BE
 #define E1000_DEV_ID_PCH_CNP_I219_LM7		0x15BB
 #define E1000_DEV_ID_PCH_CNP_I219_V7		0x15BC
+#define E1000_DEV_ID_PCH_ICP_I219_LM8		0x15DF
+#define E1000_DEV_ID_PCH_ICP_I219_V8		0x15E0
+#define E1000_DEV_ID_PCH_ICP_I219_LM9		0x15E1
+#define E1000_DEV_ID_PCH_ICP_I219_V9		0x15E2
 #define E1000_DEV_ID_82576			0x10C9
 #define E1000_DEV_ID_82576_FIBER		0x10E6
 #define E1000_DEV_ID_82576_SERDES		0x10E7
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 04/42] net/e1000/base: remove shadowing variable declarations
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (2 preceding siblings ...)
  2020-06-24  7:52   ` [dpdk-dev] [PATCH v2 03/42] net/e1000/base: add ICL device id's Guinan Sun
@ 2020-06-24  7:52   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 05/42] net/e1000/base: introduce flags Guinan Sun
                     ` (38 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:52 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Jacob Keller

The variable phy_reg is already declared at the top of
e1000_check_for_copper_link_ich8lan() and we don't need to re-declare it
in the inner if{} scope. Remove the unnecessary extra declarations which
fixes the sparse warning generated by shadowed variable names.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 5241cf698..1666826cc 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -1546,8 +1546,6 @@ STATIC s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
 
 
 		if (hw->mac.type >= e1000_pch_lpt) {
-			u16 phy_reg;
-
 			hw->phy.ops.read_reg_locked(hw, I217_PLL_CLOCK_GATE_REG,
 						    &phy_reg);
 			phy_reg &= ~I217_PLL_CLOCK_GATE_MASK;
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 05/42] net/e1000/base: introduce flags
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (3 preceding siblings ...)
  2020-06-24  7:52   ` [dpdk-dev] [PATCH v2 04/42] net/e1000/base: remove shadowing variable declarations Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 06/42] net/e1000/base: modify MAC initialization for i211 Guinan Sun
                     ` (37 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Sasha Neftin

Introduce E1000_TARC0_CB_MULTIQ_2_REQ flag to make flexible adjusting
number of outstanding requests.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/base/e1000_ich8lan.h
index 699a92c4b..9c21396c3 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.h
+++ b/drivers/net/e1000/base/e1000_ich8lan.h
@@ -103,8 +103,8 @@
 #define NVM_SIZE_MULTIPLIER 4096  /*multiplier for NVMS field*/
 #define E1000_FLASH_BASE_ADDR 0xE000 /*offset of NVM access regs*/
 #define E1000_CTRL_EXT_NVMVS 0x3 /*NVM valid sector */
-#define E1000_TARC0_CB_MULTIQ_3_REQ	(1 << 28 | 1 << 29)
-#define E1000_TARC0_CB_MULTIQ_2_REQ	(1 << 29)
+#define E1000_TARC0_CB_MULTIQ_3_REQ	0x30000000
+#define E1000_TARC0_CB_MULTIQ_2_REQ	0x20000000
 #define PCIE_ICH8_SNOOP_ALL	PCIE_NO_SNOOP_ALL
 
 #define E1000_ICH_RAR_ENTRIES	7
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 06/42] net/e1000/base: modify MAC initialization for i211
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (4 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 05/42] net/e1000/base: introduce flags Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-29  3:30     ` Yang, Qiming
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 07/42] net/e1000/base: modify parens to match other MAC checks Guinan Sun
                     ` (36 subsequent siblings)
  42 siblings, 1 reply; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Todd Fujinaka

Introduce SF/FW syncronization, acquire and release
for i211 devices.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 4c3611c6d..952bb4235 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -486,7 +486,7 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	/* acquire SW_FW sync */
 	mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_82575;
 	mac->ops.release_swfw_sync = e1000_release_swfw_sync_82575;
-	if (mac->type >= e1000_i210) {
+	if (mac->type == e1000_i210 || mac->type == e1000_i211) {
 		mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_i210;
 		mac->ops.release_swfw_sync = e1000_release_swfw_sync_i210;
 	}
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 07/42] net/e1000/base: modify parens to match other MAC checks
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (5 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 06/42] net/e1000/base: modify MAC initialization for i211 Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 08/42] net/e1000/base: expose xmdio methods Guinan Sun
                     ` (35 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Todd Fujinaka

Fix parens to match the rest of the MAC checks.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 952bb4235..146a7ee41 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -432,10 +432,10 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	else
 	mac->ops.reset_hw = e1000_reset_hw_82575;
 	/* hw initialization */
-	if ((mac->type == e1000_i210) || (mac->type == e1000_i211))
+	if (mac->type == e1000_i210 || mac->type == e1000_i211)
 		mac->ops.init_hw = e1000_init_hw_i210;
 	else
-	mac->ops.init_hw = e1000_init_hw_82575;
+		mac->ops.init_hw = e1000_init_hw_82575;
 	/* link setup */
 	mac->ops.setup_link = e1000_setup_link_generic;
 	/* physical interface link setup */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 08/42] net/e1000/base: expose xmdio methods
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (6 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 07/42] net/e1000/base: modify parens to match other MAC checks Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 09/42] net/e1000/base: fall through explicitly Guinan Sun
                     ` (34 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Neftin Sasha

move read and write xmdio methods to e1000_phy.

Signed-off-by: Neftin Sasha <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i210.c | 71 ----------------------------
 drivers/net/e1000/base/e1000_i210.h |  4 --
 drivers/net/e1000/base/e1000_phy.c  | 72 +++++++++++++++++++++++++++++
 drivers/net/e1000/base/e1000_phy.h  |  5 ++
 4 files changed, 77 insertions(+), 75 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index d9cd1a084..5c2fe8a3e 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -815,77 +815,6 @@ STATIC s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data)
 	return ret_val;
 }
 
-/**
- *  __e1000_access_xmdio_reg - Read/write XMDIO register
- *  @hw: pointer to the HW structure
- *  @address: XMDIO address to program
- *  @dev_addr: device address to program
- *  @data: pointer to value to read/write from/to the XMDIO address
- *  @read: boolean flag to indicate read or write
- **/
-STATIC s32 __e1000_access_xmdio_reg(struct e1000_hw *hw, u16 address,
-				    u8 dev_addr, u16 *data, bool read)
-{
-	s32 ret_val;
-
-	DEBUGFUNC("__e1000_access_xmdio_reg");
-
-	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr);
-	if (ret_val)
-		return ret_val;
-
-	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address);
-	if (ret_val)
-		return ret_val;
-
-	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA |
-							 dev_addr);
-	if (ret_val)
-		return ret_val;
-
-	if (read)
-		ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data);
-	else
-		ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data);
-	if (ret_val)
-		return ret_val;
-
-	/* Recalibrate the device back to 0 */
-	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0);
-	if (ret_val)
-		return ret_val;
-
-	return ret_val;
-}
-
-/**
- *  e1000_read_xmdio_reg - Read XMDIO register
- *  @hw: pointer to the HW structure
- *  @addr: XMDIO address to program
- *  @dev_addr: device address to program
- *  @data: value to be read from the EMI address
- **/
-s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data)
-{
-	DEBUGFUNC("e1000_read_xmdio_reg");
-
-	return __e1000_access_xmdio_reg(hw, addr, dev_addr, data, true);
-}
-
-/**
- *  e1000_write_xmdio_reg - Write XMDIO register
- *  @hw: pointer to the HW structure
- *  @addr: XMDIO address to program
- *  @dev_addr: device address to program
- *  @data: value to be written to the XMDIO address
- **/
-s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)
-{
-	DEBUGFUNC("e1000_read_xmdio_reg");
-
-	return __e1000_access_xmdio_reg(hw, addr, dev_addr, &data, false);
-}
-
 /**
  * e1000_pll_workaround_i210
  * @hw: pointer to the HW structure
diff --git a/drivers/net/e1000/base/e1000_i210.h b/drivers/net/e1000/base/e1000_i210.h
index c6aa2a17b..940eee21a 100644
--- a/drivers/net/e1000/base/e1000_i210.h
+++ b/drivers/net/e1000/base/e1000_i210.h
@@ -17,10 +17,6 @@ s32 e1000_read_invm_version(struct e1000_hw *hw,
 			    struct e1000_fw_version *invm_ver);
 s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
 void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
-s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
-			 u16 *data);
-s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
-			  u16 data);
 s32 e1000_init_hw_i210(struct e1000_hw *hw);
 
 #define E1000_STM_OPCODE		0xDB00
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index 956c06747..e8d922147 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -4229,3 +4229,75 @@ bool e1000_is_mphy_ready(struct e1000_hw *hw)
 
 	return ready;
 }
+
+/**
+ *  __e1000_access_xmdio_reg - Read/write XMDIO register
+ *  @hw: pointer to the HW structure
+ *  @address: XMDIO address to program
+ *  @dev_addr: device address to program
+ *  @data: pointer to value to read/write from/to the XMDIO address
+ *  @read: boolean flag to indicate read or write
+ **/
+STATIC s32 __e1000_access_xmdio_reg(struct e1000_hw *hw, u16 address,
+				    u8 dev_addr, u16 *data, bool read)
+{
+	s32 ret_val;
+
+	DEBUGFUNC("__e1000_access_xmdio_reg");
+
+	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr);
+	if (ret_val)
+		return ret_val;
+
+	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address);
+	if (ret_val)
+		return ret_val;
+
+	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA |
+					dev_addr);
+	if (ret_val)
+		return ret_val;
+
+	if (read)
+		ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data);
+	else
+		ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data);
+	if (ret_val)
+		return ret_val;
+
+	/* Recalibrate the device back to 0 */
+	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0);
+	if (ret_val)
+		return ret_val;
+
+	return ret_val;
+}
+
+/**
+ *  e1000_read_xmdio_reg - Read XMDIO register
+ *  @hw: pointer to the HW structure
+ *  @addr: XMDIO address to program
+ *  @dev_addr: device address to program
+ *  @data: value to be read from the EMI address
+ **/
+s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data)
+{
+	DEBUGFUNC("e1000_read_xmdio_reg");
+
+		return __e1000_access_xmdio_reg(hw, addr, dev_addr, data, true);
+}
+
+/**
+ *  e1000_write_xmdio_reg - Write XMDIO register
+ *  @hw: pointer to the HW structure
+ *  @addr: XMDIO address to program
+ *  @dev_addr: device address to program
+ *  @data: value to be written to the XMDIO address
+ **/
+s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)
+{
+	DEBUGFUNC("e1000_write_xmdio_reg");
+
+		return __e1000_access_xmdio_reg(hw, addr, dev_addr, &data,
+						false);
+}
diff --git a/drivers/net/e1000/base/e1000_phy.h b/drivers/net/e1000/base/e1000_phy.h
index 2c71e64c8..1c38498d1 100644
--- a/drivers/net/e1000/base/e1000_phy.h
+++ b/drivers/net/e1000/base/e1000_phy.h
@@ -91,6 +91,11 @@ s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,
 			     bool line_override);
 bool e1000_is_mphy_ready(struct e1000_hw *hw);
 
+s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
+			 u16 *data);
+s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
+			  u16 data);
+
 #define E1000_MAX_PHY_ADDR		8
 
 /* IGP01E1000 Specific Registers */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 09/42] net/e1000/base: fall through explicitly
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (7 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 08/42] net/e1000/base: expose xmdio methods Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 10/42] net/e1000/base: add function parameter descriptions Guinan Sun
                     ` (33 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Todd Fujinaka

This patch adds/changes fall through comments to address new warnings
produced by gcc 7.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 2 +-
 drivers/net/e1000/base/e1000_mbx.c   | 1 +
 drivers/net/e1000/base/e1000_phy.c   | 1 +
 3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 146a7ee41..0fa0e8310 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -1779,7 +1779,7 @@ STATIC s32 e1000_get_media_type_82575(struct e1000_hw *hw)
 			dev_spec->sgmii_active = true;
 			break;
 		}
-		/* fall through for I2C based SGMII */
+		/* Fall through for I2C based SGMII */
 	case E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES:
 		/* read media type from SFP EEPROM */
 		ret_val = e1000_set_sfp_media_type_82575(hw);
diff --git a/drivers/net/e1000/base/e1000_mbx.c b/drivers/net/e1000/base/e1000_mbx.c
index 6fae6767f..4cac3642e 100644
--- a/drivers/net/e1000/base/e1000_mbx.c
+++ b/drivers/net/e1000/base/e1000_mbx.c
@@ -755,6 +755,7 @@ s32 e1000_init_mbx_params_pf(struct e1000_hw *hw)
 		mbx->stats.reqs = 0;
 		mbx->stats.acks = 0;
 		mbx->stats.rsts = 0;
+		/* Fall through */
 	default:
 		return E1000_SUCCESS;
 	}
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index e8d922147..be4786794 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -1274,6 +1274,7 @@ s32 e1000_copper_link_setup_m88_gen2(struct e1000_hw *hw)
 			phy_data |= M88E1000_PSCR_AUTO_X_1000T;
 			break;
 		}
+		/* Fall through */
 	case 0:
 	default:
 		phy_data |= M88E1000_PSCR_AUTO_X_MODE;
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 10/42] net/e1000/base: add function parameter descriptions
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (8 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 09/42] net/e1000/base: fall through explicitly Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 11/42] net/e1000/base: modify fall through code comments Guinan Sun
                     ` (32 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Todd Fujinaka

Add function parameter descriptions to address gcc 7 warnings.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 11 +++++------
 drivers/net/e1000/base/e1000_mac.c   |  8 ++++++++
 drivers/net/e1000/base/e1000_mbx.c   |  4 ++++
 drivers/net/e1000/base/e1000_nvm.c   |  7 +++++++
 drivers/net/e1000/base/e1000_phy.c   |  6 ++++++
 5 files changed, 30 insertions(+), 6 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 0fa0e8310..bf193eb9e 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -2757,7 +2757,7 @@ STATIC s32 e1000_update_nvm_checksum_i350(struct e1000_hw *hw)
 /**
  *  __e1000_access_emi_reg - Read/write EMI register
  *  @hw: pointer to the HW structure
- *  @addr: EMI address to program
+ *  @address: EMI address to program
  *  @data: pointer to value to read/write from/to the EMI address
  *  @read: boolean flag to indicate read or write
  **/
@@ -2984,8 +2984,8 @@ s32 e1000_initialize_M88E1543_phy(struct e1000_hw *hw)
 /**
  *  e1000_set_eee_i350 - Enable/disable EEE support
  *  @hw: pointer to the HW structure
- *  @adv1g: boolean flag enabling 1G EEE advertisement
- *  @adv100m: boolean flag enabling 100M EEE advertisement
+ *  @adv1G: boolean flag enabling 1G EEE advertisement
+ *  @adv100M: boolean flag enabling 100M EEE advertisement
  *
  *  Enable/disable EEE based on setting in dev_spec structure.
  *
@@ -3039,8 +3039,8 @@ s32 e1000_set_eee_i350(struct e1000_hw *hw, bool adv1G, bool adv100M)
 /**
  *  e1000_set_eee_i354 - Enable/disable EEE support
  *  @hw: pointer to the HW structure
- *  @adv1g: boolean flag enabling 1G EEE advertisement
- *  @adv100m: boolean flag enabling 100M EEE advertisement
+ *  @adv1G: boolean flag enabling 1G EEE advertisement
+ *  @adv100M: boolean flag enabling 100M EEE advertisement
  *
  *  Enable/disable EEE legacy mode based on setting in dev_spec structure.
  *
@@ -3696,7 +3696,6 @@ STATIC s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data)
 
 /**
  *  e1000_get_i2c_data - Reads the I2C SDA data bit
- *  @hw: pointer to hardware structure
  *  @i2cctl: Current value of I2CCTL register
  *
  *  Returns the I2C data bit value
diff --git a/drivers/net/e1000/base/e1000_mac.c b/drivers/net/e1000/base/e1000_mac.c
index d0e1fa58b..48384b284 100644
--- a/drivers/net/e1000/base/e1000_mac.c
+++ b/drivers/net/e1000/base/e1000_mac.c
@@ -75,6 +75,8 @@ void e1000_null_mac_generic(struct e1000_hw E1000_UNUSEDARG *hw)
 /**
  *  e1000_null_link_info - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @s: dummy variable
+ *  @d: dummy variable
  **/
 s32 e1000_null_link_info(struct e1000_hw E1000_UNUSEDARG *hw,
 			 u16 E1000_UNUSEDARG *s, u16 E1000_UNUSEDARG *d)
@@ -98,6 +100,8 @@ bool e1000_null_mng_mode(struct e1000_hw E1000_UNUSEDARG *hw)
 /**
  *  e1000_null_update_mc - No-op function, return void
  *  @hw: pointer to the HW structure
+ *  @h: dummy variable
+ *  @a: dummy variable
  **/
 void e1000_null_update_mc(struct e1000_hw E1000_UNUSEDARG *hw,
 			  u8 E1000_UNUSEDARG *h, u32 E1000_UNUSEDARG a)
@@ -110,6 +114,8 @@ void e1000_null_update_mc(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_write_vfta - No-op function, return void
  *  @hw: pointer to the HW structure
+ *  @a: dummy variable
+ *  @b: dummy variable
  **/
 void e1000_null_write_vfta(struct e1000_hw E1000_UNUSEDARG *hw,
 			   u32 E1000_UNUSEDARG a, u32 E1000_UNUSEDARG b)
@@ -122,6 +128,8 @@ void e1000_null_write_vfta(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_rar_set - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @h: dummy variable
+ *  @a: dummy variable
  **/
 int e1000_null_rar_set(struct e1000_hw E1000_UNUSEDARG *hw,
 			u8 E1000_UNUSEDARG *h, u32 E1000_UNUSEDARG a)
diff --git a/drivers/net/e1000/base/e1000_mbx.c b/drivers/net/e1000/base/e1000_mbx.c
index 4cac3642e..3f3b326c6 100644
--- a/drivers/net/e1000/base/e1000_mbx.c
+++ b/drivers/net/e1000/base/e1000_mbx.c
@@ -7,6 +7,7 @@
 /**
  *  e1000_null_mbx_check_for_flag - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @mbx_id: id of mailbox to read
  **/
 STATIC s32 e1000_null_mbx_check_for_flag(struct e1000_hw E1000_UNUSEDARG *hw,
 					 u16 E1000_UNUSEDARG mbx_id)
@@ -20,6 +21,9 @@ STATIC s32 e1000_null_mbx_check_for_flag(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_mbx_transact - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @msg: The message buffer
+ *  @size: Length of buffer
+ *  @mbx_id: id of mailbox to read
  **/
 STATIC s32 e1000_null_mbx_transact(struct e1000_hw E1000_UNUSEDARG *hw,
 				   u32 E1000_UNUSEDARG *msg,
diff --git a/drivers/net/e1000/base/e1000_nvm.c b/drivers/net/e1000/base/e1000_nvm.c
index 4d4a8e04b..19a7f77ad 100644
--- a/drivers/net/e1000/base/e1000_nvm.c
+++ b/drivers/net/e1000/base/e1000_nvm.c
@@ -32,6 +32,9 @@ void e1000_init_nvm_ops_generic(struct e1000_hw *hw)
 /**
  *  e1000_null_nvm_read - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @a: dummy variable
+ *  @b: dummy variable
+ *  @c: dummy variable
  **/
 s32 e1000_null_read_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
 			u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
@@ -56,6 +59,7 @@ void e1000_null_nvm_generic(struct e1000_hw E1000_UNUSEDARG *hw)
 /**
  *  e1000_null_led_default - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @data: dummy variable
  **/
 s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw,
 			   u16 E1000_UNUSEDARG *data)
@@ -68,6 +72,9 @@ s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_write_nvm - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @a: dummy variable
+ *  @b: dummy variable
+ *  @c: dummy variable
  **/
 s32 e1000_null_write_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
 			 u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index be4786794..c506d2344 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -73,6 +73,7 @@ void e1000_init_phy_ops_generic(struct e1000_hw *hw)
 /**
  *  e1000_null_set_page - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @data: dummy variable
  **/
 s32 e1000_null_set_page(struct e1000_hw E1000_UNUSEDARG *hw,
 			u16 E1000_UNUSEDARG data)
@@ -85,6 +86,8 @@ s32 e1000_null_set_page(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_read_reg - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @offset: dummy variable
+ *  @data: dummy variable
  **/
 s32 e1000_null_read_reg(struct e1000_hw E1000_UNUSEDARG *hw,
 			u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG *data)
@@ -108,6 +111,7 @@ void e1000_null_phy_generic(struct e1000_hw E1000_UNUSEDARG *hw)
 /**
  *  e1000_null_lplu_state - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @active: dummy variable
  **/
 s32 e1000_null_lplu_state(struct e1000_hw E1000_UNUSEDARG *hw,
 			  bool E1000_UNUSEDARG active)
@@ -120,6 +124,8 @@ s32 e1000_null_lplu_state(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_write_reg - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @offset: dummy variable
+ *  @data: dummy variable
  **/
 s32 e1000_null_write_reg(struct e1000_hw E1000_UNUSEDARG *hw,
 			 u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG data)
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 11/42] net/e1000/base: modify fall through code comments
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (9 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 10/42] net/e1000/base: add function parameter descriptions Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 12/42] net/e1000/base: modify klocwork errors Guinan Sun
                     ` (31 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Jeff Kirsher

Found some inconsistent code comments when it came to when we "fall
through", so made them more consistent and non-repetitive.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index bf193eb9e..f4856af9c 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -1560,14 +1560,21 @@ STATIC s32 e1000_setup_copper_link_82575(struct e1000_hw *hw)
 	}
 	switch (hw->phy.type) {
 	case e1000_phy_i210:
+	/* fall through */
 	case e1000_phy_m88:
 		switch (hw->phy.id) {
 		case I347AT4_E_PHY_ID:
+		/* fall through */
 		case M88E1112_E_PHY_ID:
+		/* fall through */
 		case M88E1340M_E_PHY_ID:
+		/* fall through */
 		case M88E1543_E_PHY_ID:
+		/* fall through */
 		case M88E1512_E_PHY_ID:
+		/* fall through */
 		case I210_I_PHY_ID:
+		/* fall through */
 			ret_val = e1000_copper_link_setup_m88_gen2(hw);
 			break;
 		default:
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 12/42] net/e1000/base: modify klocwork errors
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (10 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 11/42] net/e1000/base: modify fall through code comments Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 13/42] net/e1000/base: modify klockwork about unused return values Guinan Sun
                     ` (30 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Robert Konklewski, Doug Dziggel

This patch fixes klocwork scans errors relating to operands in bitwise
operations having different sizes.

Signed-off-by: Robert Konklewski <robertx.konklewski@intel.com>
Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 2 +-
 drivers/net/e1000/base/e1000_i210.c  | 2 +-
 drivers/net/e1000/base/e1000_phy.c   | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index f4856af9c..021a54fc5 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -1084,7 +1084,7 @@ STATIC void e1000_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask)
 		; /* Empty */
 
 	swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
-	swfw_sync &= ~mask;
+	swfw_sync &= (u32)~mask;
 	E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
 
 	e1000_put_hw_semaphore_generic(hw);
diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index 5c2fe8a3e..b13730d84 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -117,7 +117,7 @@ void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask)
 		; /* Empty */
 
 	swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
-	swfw_sync &= ~mask;
+	swfw_sync &= (u32)~mask;
 	E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
 
 	e1000_put_hw_semaphore_generic(hw);
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index c506d2344..6589c2c7f 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -597,7 +597,7 @@ s32 e1000_write_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 data)
 				 * lane and update whole word
 				 */
 				data_local = i2ccmd & 0xFF00;
-				data_local |= data;
+				data_local |= (u32)data;
 				i2ccmd = ((offset <<
 					E1000_I2CCMD_REG_ADDR_SHIFT) |
 					E1000_I2CCMD_OPCODE_WRITE | data_local);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 13/42] net/e1000/base: modify klockwork about unused return values
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (11 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 12/42] net/e1000/base: modify klocwork errors Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 14/42] net/e1000/base: improve coding style Guinan Sun
                     ` (29 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Todd Fujinaka

Klockwork found unreachable code since *clock_in_i2c_* always return
success. Don't return unused s32 and don't check for constants.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 16 +++++-----------
 1 file changed, 5 insertions(+), 11 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 021a54fc5..c49e81ae5 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -75,10 +75,10 @@ STATIC void e1000_clear_vfta_i350(struct e1000_hw *hw);
 
 STATIC void e1000_i2c_start(struct e1000_hw *hw);
 STATIC void e1000_i2c_stop(struct e1000_hw *hw);
-STATIC s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);
+STATIC void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);
 STATIC s32 e1000_clock_out_i2c_byte(struct e1000_hw *hw, u8 data);
 STATIC s32 e1000_get_i2c_ack(struct e1000_hw *hw);
-STATIC s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);
+STATIC void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);
 STATIC s32 e1000_clock_out_i2c_bit(struct e1000_hw *hw, bool data);
 STATIC void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
 STATIC void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
@@ -3300,9 +3300,7 @@ s32 e1000_read_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset,
 		if (status != E1000_SUCCESS)
 			goto fail;
 
-		status = e1000_clock_in_i2c_byte(hw, data);
-		if (status != E1000_SUCCESS)
-			goto fail;
+		e1000_clock_in_i2c_byte(hw, data);
 
 		status = e1000_clock_out_i2c_bit(hw, nack);
 		if (status != E1000_SUCCESS)
@@ -3466,7 +3464,7 @@ STATIC void e1000_i2c_stop(struct e1000_hw *hw)
  *
  *  Clocks in one byte data via I2C data/clock
  **/
-STATIC s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
+STATIC void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
 {
 	s32 i;
 	bool bit = 0;
@@ -3478,8 +3476,6 @@ STATIC s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
 		e1000_clock_in_i2c_bit(hw, &bit);
 		*data |= bit << i;
 	}
-
-	return E1000_SUCCESS;
 }
 
 /**
@@ -3568,7 +3564,7 @@ STATIC s32 e1000_get_i2c_ack(struct e1000_hw *hw)
  *
  *  Clocks in one bit via I2C data/clock
  **/
-STATIC s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
+STATIC void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
 {
 	u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
 
@@ -3586,8 +3582,6 @@ STATIC s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
 
 	/* Minimum low period of clock is 4.7 us */
 	usec_delay(E1000_I2C_T_LOW);
-
-	return E1000_SUCCESS;
 }
 
 /**
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 14/42] net/e1000/base: improve coding style
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (12 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 13/42] net/e1000/base: modify klockwork about unused return values Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 15/42] net/e1000/base: modify HW level time sync mechanisms Guinan Sun
                     ` (28 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Jeff Kirsher, Neftin Sasha

fix typo in piece of code of NVM access for SPT.
And cleans up the remaining instances in the
shared code where it was not adhering to the
Linux code standard.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Neftin Sasha <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i210.c    |  8 +++---
 drivers/net/e1000/base/e1000_ich8lan.c | 34 ++++++++++++++------------
 drivers/net/e1000/base/e1000_nvm.c     |  2 +-
 3 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index b13730d84..a6d8e3b34 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -310,7 +310,7 @@ STATIC s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
 	}
 
 	for (i = 0; i < words; i++) {
-		eewr = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) |
+		eewr = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) |
 			(data[i] << E1000_NVM_RW_REG_DATA) |
 			E1000_NVM_RW_REG_START;
 
@@ -397,9 +397,9 @@ STATIC s32 e1000_read_invm_i210(struct e1000_hw *hw, u16 offset,
 	switch (offset) {
 	case NVM_MAC_ADDR:
 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, &data[0]);
-		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+1,
+		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 1,
 						     &data[1]);
-		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+2,
+		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 2,
 						     &data[2]);
 		if (ret_val != E1000_SUCCESS)
 			DEBUGOUT("MAC Addr not found in iNVM\n");
@@ -776,8 +776,6 @@ void e1000_init_function_pointers_i210(struct e1000_hw *hw)
 {
 	e1000_init_function_pointers_82575(hw);
 	hw->nvm.ops.init_params = e1000_init_nvm_params_i210;
-
-	return;
 }
 
 /**
diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 1666826cc..133cef4cd 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -822,7 +822,7 @@ STATIC s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 /**
  *  __e1000_access_emi_reg_locked - Read/write EMI register
  *  @hw: pointer to the HW structure
- *  @addr: EMI address to program
+ *  @address: EMI address to program
  *  @data: pointer to value to read/write from/to the EMI address
  *  @read: boolean flag to indicate read or write
  *
@@ -3477,8 +3477,9 @@ STATIC s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
 
 	for (i = 0; i < words; i += 2) {
 		if (words - i == 1) {
-			if (dev_spec->shadow_ram[offset+i].modified) {
-				data[i] = dev_spec->shadow_ram[offset+i].value;
+			if (dev_spec->shadow_ram[offset + i].modified) {
+				data[i] =
+				    dev_spec->shadow_ram[offset + i].value;
 			} else {
 				offset_to_read = act_offset + i -
 						 ((act_offset + i) % 2);
@@ -3495,8 +3496,8 @@ STATIC s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
 			}
 		} else {
 			offset_to_read = act_offset + i;
-			if (!(dev_spec->shadow_ram[offset+i].modified) ||
-			    !(dev_spec->shadow_ram[offset+i+1].modified)) {
+			if (!(dev_spec->shadow_ram[offset + i].modified) ||
+			    !(dev_spec->shadow_ram[offset + i + 1].modified)) {
 				ret_val =
 				   e1000_read_flash_dword_ich8lan(hw,
 								 offset_to_read,
@@ -3504,15 +3505,16 @@ STATIC s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
 				if (ret_val)
 					break;
 			}
-			if (dev_spec->shadow_ram[offset+i].modified)
-				data[i] = dev_spec->shadow_ram[offset+i].value;
+			if (dev_spec->shadow_ram[offset + i].modified)
+				data[i] =
+				    dev_spec->shadow_ram[offset + i].value;
 			else
-				data[i] = (u16) (dword & 0xFFFF);
-			if (dev_spec->shadow_ram[offset+i].modified)
-				data[i+1] =
-				   dev_spec->shadow_ram[offset+i+1].value;
+				data[i] = (u16)(dword & 0xFFFF);
+			if (dev_spec->shadow_ram[offset + i + 1].modified)
+				data[i + 1] =
+				   dev_spec->shadow_ram[offset + i + 1].value;
 			else
-				data[i+1] = (u16) (dword >> 16 & 0xFFFF);
+				data[i + 1] = (u16)(dword >> 16 & 0xFFFF);
 		}
 	}
 
@@ -3566,8 +3568,8 @@ STATIC s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
 
 	ret_val = E1000_SUCCESS;
 	for (i = 0; i < words; i++) {
-		if (dev_spec->shadow_ram[offset+i].modified) {
-			data[i] = dev_spec->shadow_ram[offset+i].value;
+		if (dev_spec->shadow_ram[offset + i].modified) {
+			data[i] = dev_spec->shadow_ram[offset + i].value;
 		} else {
 			ret_val = e1000_read_flash_word_ich8lan(hw,
 								act_offset + i,
@@ -3972,8 +3974,8 @@ STATIC s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
 	nvm->ops.acquire(hw);
 
 	for (i = 0; i < words; i++) {
-		dev_spec->shadow_ram[offset+i].modified = true;
-		dev_spec->shadow_ram[offset+i].value = data[i];
+		dev_spec->shadow_ram[offset + i].modified = true;
+		dev_spec->shadow_ram[offset + i].value = data[i];
 	}
 
 	nvm->ops.release(hw);
diff --git a/drivers/net/e1000/base/e1000_nvm.c b/drivers/net/e1000/base/e1000_nvm.c
index 19a7f77ad..ca87ec122 100644
--- a/drivers/net/e1000/base/e1000_nvm.c
+++ b/drivers/net/e1000/base/e1000_nvm.c
@@ -551,7 +551,7 @@ s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 	}
 
 	for (i = 0; i < words; i++) {
-		eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
+		eerd = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) +
 		       E1000_NVM_RW_REG_START;
 
 		E1000_WRITE_REG(hw, E1000_EERD, eerd);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 15/42] net/e1000/base: modify HW level time sync mechanisms
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (13 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 14/42] net/e1000/base: improve coding style Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 16/42] net/e1000/base: modify description Guinan Sun
                     ` (27 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Efimov Evgeny

Add additinal configuration space access to allow HW
level time sync mechanism.

Signed-off-by: Efimov Evgeny <evgeny.efimov@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.c | 18 ++++++++++++++++++
 drivers/net/e1000/base/e1000_ich8lan.h |  1 +
 2 files changed, 19 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 133cef4cd..4790196f2 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -4894,6 +4894,7 @@ STATIC s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
 	u16 kum_cfg;
 	u32 ctrl, reg;
 	s32 ret_val;
+	u16 pci_cfg;
 
 	DEBUGFUNC("e1000_reset_hw_ich8lan");
 
@@ -4954,11 +4955,28 @@ STATIC s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
 			e1000_gate_hw_phy_config_ich8lan(hw, true);
 	}
 	ret_val = e1000_acquire_swflag_ich8lan(hw);
+
+	/* Read from EXTCNF_CTRL in e1000_acquire_swflag_ich8lan function
+	 * may occur during global reset and cause system hang.
+	 * Configuration space access creates the needed delay.
+	 * Write to E1000_STRAP RO register E1000_PCI_VENDOR_ID_REGISTER value
+	 * insures configuration space read is done before global reset.
+	 */
+	e1000_read_pci_cfg(hw, E1000_PCI_VENDOR_ID_REGISTER, &pci_cfg);
+	E1000_WRITE_REG(hw, E1000_STRAP, pci_cfg);
 	DEBUGOUT("Issuing a global reset to ich8lan\n");
 	E1000_WRITE_REG(hw, E1000_CTRL, (ctrl | E1000_CTRL_RST));
 	/* cannot issue a flush here because it hangs the hardware */
 	msec_delay(20);
 
+	/* Configuration space access improve HW level time sync mechanism.
+	 * Write to E1000_STRAP RO register E1000_PCI_VENDOR_ID_REGISTER
+	 * value to insure configuration space read is done
+	 * before any access to mac register.
+	 */
+	e1000_read_pci_cfg(hw, E1000_PCI_VENDOR_ID_REGISTER, &pci_cfg);
+	E1000_WRITE_REG(hw, E1000_STRAP, pci_cfg);
+
 	/* Set Phy Config Counter to 50msec */
 	if (hw->mac.type == e1000_pch2lan) {
 		reg = E1000_READ_REG(hw, E1000_FEXTNVM3);
diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/base/e1000_ich8lan.h
index 9c21396c3..bfee467b3 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.h
+++ b/drivers/net/e1000/base/e1000_ich8lan.h
@@ -287,6 +287,7 @@
 /* Receive Address Initial CRC Calculation */
 #define E1000_PCH_RAICC(_n)	(0x05F50 + ((_n) * 4))
 
+#define E1000_PCI_VENDOR_ID_REGISTER	0x00
 #if defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT)
 #define E1000_PCI_REVISION_ID_REG	0x08
 #endif /* defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT) */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 16/42] net/e1000/base: modify description
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (14 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 15/42] net/e1000/base: modify HW level time sync mechanisms Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 17/42] net/e1000/base: remove duplicated codes from 82575 Guinan Sun
                     ` (26 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Lifshits Vitaly

Wrong description was found in the mentioned file,
so fix them.

Signed-off-by: Lifshits Vitaly <vitaly.lifshits@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_80003es2lan.c | 1 -
 drivers/net/e1000/base/e1000_ich8lan.c     | 4 +++-
 drivers/net/e1000/base/e1000_phy.c         | 3 +++
 3 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_80003es2lan.c b/drivers/net/e1000/base/e1000_80003es2lan.c
index bcfda9415..b795491c0 100644
--- a/drivers/net/e1000/base/e1000_80003es2lan.c
+++ b/drivers/net/e1000/base/e1000_80003es2lan.c
@@ -1210,7 +1210,6 @@ STATIC s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw)
 /**
  *  e1000_cfg_on_link_up_80003es2lan - es2 link configuration after link-up
  *  @hw: pointer to the HW structure
- *  @duplex: current duplex setting
  *
  *  Configure the KMRN interface by applying last minute quirks for
  *  10/100 operation.
diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 4790196f2..1dc29553e 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -2399,7 +2399,7 @@ STATIC s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)
 /**
  *  e1000_configure_k1_ich8lan - Configure K1 power state
  *  @hw: pointer to the HW structure
- *  @enable: K1 state to configure
+ *  @k1_enable: K1 state to configure
  *
  *  Configure the K1 power state based on the provided parameter.
  *  Assumes semaphore already acquired.
@@ -2547,6 +2547,7 @@ STATIC s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw)
 /**
  *  e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be
  *  done after every PHY reset.
+ *  @hw: pointer to the HW structure
  **/
 STATIC s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
 {
@@ -2873,6 +2874,7 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable)
 /**
  *  e1000_lv_phy_workarounds_ich8lan - A series of Phy workarounds to be
  *  done after every PHY reset.
+ *  @hw: pointer to the HW structure
  **/
 STATIC s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw)
 {
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index 6589c2c7f..4995578f4 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -3071,6 +3071,7 @@ s32 e1000_determine_phy_address(struct e1000_hw *hw)
 /**
  *  e1000_get_phy_addr_for_bm_page - Retrieve PHY page address
  *  @page: page to access
+ *  @reg: register to access
  *
  *  Returns the phy address for the page requested.
  **/
@@ -3508,6 +3509,7 @@ void e1000_power_down_phy_copper(struct e1000_hw *hw)
  *  @offset: register offset to be read
  *  @data: pointer to the read data
  *  @locked: semaphore has already been acquired or not
+ *  @page_set: BM_WUC_PAGE already set and access enabled
  *
  *  Acquires semaphore, if necessary, then reads the PHY register at offset
  *  and stores the retrieved information in data.  Release any acquired
@@ -3618,6 +3620,7 @@ s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data)
  *  @offset: register offset to write to
  *  @data: data to write at register offset
  *  @locked: semaphore has already been acquired or not
+ *  @page_set: BM_WUC_PAGE already set and access enabled
  *
  *  Acquires semaphore, if necessary, then writes the data to PHY register
  *  at the offset.  Release any acquired semaphores before exiting.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 17/42] net/e1000/base: remove duplicated codes from 82575
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (15 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 16/42] net/e1000/base: modify description Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 18/42] net/e1000/base: add definitions for ETQF register bit Guinan Sun
                     ` (25 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Jeff Kirsher, Sasha Neftin

These files will improve e1000_82575 codes.
Remove the code duplication from e1000_82575 files.
Remove the licenses.
Clean family specific functions from base.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/Makefile             |   1 +
 drivers/net/e1000/base/e1000_82575.c   | 475 ++++++++-----------------
 drivers/net/e1000/base/e1000_82575.h   |  60 +---
 drivers/net/e1000/base/e1000_base.c    | 192 ++++++++++
 drivers/net/e1000/base/e1000_base.h    | 127 +++++++
 drivers/net/e1000/base/e1000_defines.h |   2 +-
 drivers/net/e1000/base/e1000_hw.h      |   1 +
 drivers/net/e1000/base/e1000_i210.c    |   2 +-
 drivers/net/e1000/base/meson.build     |   1 +
 drivers/net/e1000/igb_rxtx.c           |   2 +-
 10 files changed, 483 insertions(+), 380 deletions(-)
 create mode 100644 drivers/net/e1000/base/e1000_base.c
 create mode 100644 drivers/net/e1000/base/e1000_base.h

diff --git a/drivers/net/e1000/Makefile b/drivers/net/e1000/Makefile
index 9fb038cf0..f186f8d0e 100644
--- a/drivers/net/e1000/Makefile
+++ b/drivers/net/e1000/Makefile
@@ -50,6 +50,7 @@ VPATH += $(SRCDIR)/base
 #
 # all source are stored in SRCS-y
 #
+SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_base.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_80003es2lan.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_82540.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_82541.c
diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index c49e81ae5..18593552d 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -17,8 +17,6 @@
 
 STATIC s32  e1000_init_phy_params_82575(struct e1000_hw *hw);
 STATIC s32  e1000_init_mac_params_82575(struct e1000_hw *hw);
-STATIC s32  e1000_acquire_phy_82575(struct e1000_hw *hw);
-STATIC void e1000_release_phy_82575(struct e1000_hw *hw);
 STATIC s32  e1000_acquire_nvm_82575(struct e1000_hw *hw);
 STATIC void e1000_release_nvm_82575(struct e1000_hw *hw);
 STATIC s32  e1000_check_for_link_82575(struct e1000_hw *hw);
@@ -30,6 +28,7 @@ STATIC s32  e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw);
 STATIC s32  e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
 					   u16 *data);
 STATIC s32  e1000_reset_hw_82575(struct e1000_hw *hw);
+STATIC s32 e1000_init_hw_82575(struct e1000_hw *hw);
 STATIC s32  e1000_reset_hw_82580(struct e1000_hw *hw);
 STATIC s32  e1000_read_phy_reg_82580(struct e1000_hw *hw,
 				     u32 offset, u16 *data);
@@ -55,10 +54,8 @@ STATIC s32  e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw,
 STATIC s32  e1000_get_phy_id_82575(struct e1000_hw *hw);
 STATIC void e1000_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask);
 STATIC bool e1000_sgmii_active_82575(struct e1000_hw *hw);
-STATIC s32  e1000_reset_init_script_82575(struct e1000_hw *hw);
 STATIC s32  e1000_read_mac_addr_82575(struct e1000_hw *hw);
 STATIC void e1000_config_collision_dist_82575(struct e1000_hw *hw);
-STATIC void e1000_power_down_phy_copper_82575(struct e1000_hw *hw);
 STATIC void e1000_shutdown_serdes_link_82575(struct e1000_hw *hw);
 STATIC void e1000_power_up_serdes_link_82575(struct e1000_hw *hw);
 STATIC s32 e1000_set_pcie_completion_timeout(struct e1000_hw *hw);
@@ -127,8 +124,8 @@ STATIC bool e1000_sgmii_uses_mdio_82575(struct e1000_hw *hw)
 }
 
 /**
- *  e1000_init_phy_params_82575 - Init PHY func ptrs.
- *  @hw: pointer to the HW structure
+ * e1000_init_phy_params_82575 - Initialize PHY function ptrs
+ * @hw: pointer to the HW structure
  **/
 STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
 {
@@ -146,17 +143,17 @@ STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
 		goto out;
 	}
 
-	phy->ops.power_up   = e1000_power_up_phy_copper;
-	phy->ops.power_down = e1000_power_down_phy_copper_82575;
+	phy->ops.power_up	= e1000_power_up_phy_copper;
+	phy->ops.power_down	= e1000_power_down_phy_copper_base;
 
 	phy->autoneg_mask	= AUTONEG_ADVERTISE_SPEED_DEFAULT;
 	phy->reset_delay_us	= 100;
 
-	phy->ops.acquire	= e1000_acquire_phy_82575;
+	phy->ops.acquire	= e1000_acquire_phy_base;
 	phy->ops.check_reset_block = e1000_check_reset_block_generic;
 	phy->ops.commit		= e1000_phy_sw_reset_generic;
 	phy->ops.get_cfg_done	= e1000_get_cfg_done_82575;
-	phy->ops.release	= e1000_release_phy_82575;
+	phy->ops.release	= e1000_release_phy_base;
 
 	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
 
@@ -203,76 +200,38 @@ STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
 	case I347AT4_E_PHY_ID:
 	case M88E1112_E_PHY_ID:
 	case M88E1340M_E_PHY_ID:
+		phy->type		= e1000_phy_m88;
+		phy->ops.check_polarity	= e1000_check_polarity_m88;
+		phy->ops.get_info	= e1000_get_phy_info_m88;
+		phy->ops.get_cable_length = e1000_get_cable_length_m88_gen2;
+		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
+		break;
 	case M88E1111_I_PHY_ID:
 		phy->type		= e1000_phy_m88;
 		phy->ops.check_polarity	= e1000_check_polarity_m88;
 		phy->ops.get_info	= e1000_get_phy_info_m88;
-		if (phy->id == I347AT4_E_PHY_ID ||
-		    phy->id == M88E1112_E_PHY_ID ||
-		    phy->id == M88E1340M_E_PHY_ID)
-			phy->ops.get_cable_length =
-					 e1000_get_cable_length_m88_gen2;
-		else if (phy->id == M88E1543_E_PHY_ID ||
-			 phy->id == M88E1512_E_PHY_ID)
-			phy->ops.get_cable_length =
-					 e1000_get_cable_length_m88_gen2;
-		else
-			phy->ops.get_cable_length = e1000_get_cable_length_m88;
+		phy->ops.get_cable_length = e1000_get_cable_length_m88;
 		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
-		/* Check if this PHY is confgured for media swap. */
-		if (phy->id == M88E1112_E_PHY_ID) {
-			u16 data;
-
-			ret_val = phy->ops.write_reg(hw,
-						     E1000_M88E1112_PAGE_ADDR,
-						     2);
-			if (ret_val)
-				goto out;
-
-			ret_val = phy->ops.read_reg(hw,
-						    E1000_M88E1112_MAC_CTRL_1,
-						    &data);
-			if (ret_val)
-				goto out;
-
-			data = (data & E1000_M88E1112_MAC_CTRL_1_MODE_MASK) >>
-			       E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT;
-			if (data == E1000_M88E1112_AUTO_COPPER_SGMII ||
-			    data == E1000_M88E1112_AUTO_COPPER_BASEX)
-				hw->mac.ops.check_for_link =
-						e1000_check_for_link_media_swap;
-		}
-		if (phy->id == M88E1512_E_PHY_ID) {
-			ret_val = e1000_initialize_M88E1512_phy(hw);
-			if (ret_val)
-				goto out;
-		}
-		if (phy->id == M88E1543_E_PHY_ID) {
-			ret_val = e1000_initialize_M88E1543_phy(hw);
-			if (ret_val)
-				goto out;
-		}
 		break;
 	case IGP03E1000_E_PHY_ID:
 	case IGP04E1000_E_PHY_ID:
-		phy->type = e1000_phy_igp_3;
-		phy->ops.check_polarity = e1000_check_polarity_igp;
-		phy->ops.get_info = e1000_get_phy_info_igp;
+		phy->type		= e1000_phy_igp_3;
+		phy->ops.check_polarity	= e1000_check_polarity_igp;
+		phy->ops.get_info	= e1000_get_phy_info_igp;
 		phy->ops.get_cable_length = e1000_get_cable_length_igp_2;
-		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp;
 		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82575;
 		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
+		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp;
 		break;
 	case I82580_I_PHY_ID:
 	case I350_I_PHY_ID:
-		phy->type = e1000_phy_82580;
-		phy->ops.check_polarity = e1000_check_polarity_82577;
-		phy->ops.force_speed_duplex =
-					 e1000_phy_force_speed_duplex_82577;
+		phy->type		= e1000_phy_82580;
+		phy->ops.check_polarity	= e1000_check_polarity_82577;
+		phy->ops.get_info	= e1000_get_phy_info_82577;
 		phy->ops.get_cable_length = e1000_get_cable_length_82577;
-		phy->ops.get_info = e1000_get_phy_info_82577;
 		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82580;
 		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82580;
+		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_82577;
 		break;
 	case I210_I_PHY_ID:
 		phy->type		= e1000_phy_i210;
@@ -291,98 +250,50 @@ STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
 		goto out;
 	}
 
-out:
-	return ret_val;
-}
-
-/**
- *  e1000_init_nvm_params_82575 - Init NVM func ptrs.
- *  @hw: pointer to the HW structure
- **/
-s32 e1000_init_nvm_params_82575(struct e1000_hw *hw)
-{
-	struct e1000_nvm_info *nvm = &hw->nvm;
-	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
-	u16 size;
-
-	DEBUGFUNC("e1000_init_nvm_params_82575");
-
-	size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
-		     E1000_EECD_SIZE_EX_SHIFT);
-	/*
-	 * Added to a constant, "size" becomes the left-shift value
-	 * for setting word_size.
-	 */
-	size += NVM_WORD_SIZE_BASE_SHIFT;
-
-	/* Just in case size is out of range, cap it to the largest
-	 * EEPROM size supported
-	 */
-	if (size > 15)
-		size = 15;
-
-	nvm->word_size = 1 << size;
-	if (hw->mac.type < e1000_i210) {
-		nvm->opcode_bits = 8;
-		nvm->delay_usec = 1;
+	/* Check if this PHY is configured for media swap. */
+	switch (phy->id) {
+	case M88E1112_E_PHY_ID:
+	{
+		u16 data;
 
-		switch (nvm->override) {
-		case e1000_nvm_override_spi_large:
-			nvm->page_size = 32;
-			nvm->address_bits = 16;
-			break;
-		case e1000_nvm_override_spi_small:
-			nvm->page_size = 8;
-			nvm->address_bits = 8;
-			break;
-		default:
-			nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
-			nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
-					    16 : 8;
-			break;
-		}
-		if (nvm->word_size == (1 << 15))
-			nvm->page_size = 128;
+		ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 2);
+		if (ret_val)
+			goto out;
+		ret_val = phy->ops.read_reg(hw, E1000_M88E1112_MAC_CTRL_1,
+					    &data);
+		if (ret_val)
+			goto out;
 
-		nvm->type = e1000_nvm_eeprom_spi;
-	} else {
-		nvm->type = e1000_nvm_flash_hw;
+		data = (data & E1000_M88E1112_MAC_CTRL_1_MODE_MASK) >>
+			E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT;
+		if (data == E1000_M88E1112_AUTO_COPPER_SGMII ||
+		    data == E1000_M88E1112_AUTO_COPPER_BASEX)
+			hw->mac.ops.check_for_link =
+						e1000_check_for_link_media_swap;
+		break;
 	}
-
-	/* Function Pointers */
-	nvm->ops.acquire = e1000_acquire_nvm_82575;
-	nvm->ops.release = e1000_release_nvm_82575;
-	if (nvm->word_size < (1 << 15))
-		nvm->ops.read = e1000_read_nvm_eerd;
-	else
-		nvm->ops.read = e1000_read_nvm_spi;
-
-	nvm->ops.write = e1000_write_nvm_spi;
-	nvm->ops.validate = e1000_validate_nvm_checksum_generic;
-	nvm->ops.update = e1000_update_nvm_checksum_generic;
-	nvm->ops.valid_led_default = e1000_valid_led_default_82575;
-
-	/* override generic family function pointers for specific descendants */
-	switch (hw->mac.type) {
-	case e1000_82580:
-		nvm->ops.validate = e1000_validate_nvm_checksum_82580;
-		nvm->ops.update = e1000_update_nvm_checksum_82580;
+	case M88E1512_E_PHY_ID:
+	{
+		ret_val = e1000_initialize_M88E1512_phy(hw);
 		break;
-	case e1000_i350:
-	case e1000_i354:
-		nvm->ops.validate = e1000_validate_nvm_checksum_i350;
-		nvm->ops.update = e1000_update_nvm_checksum_i350;
+	}
+	case M88E1543_E_PHY_ID:
+	{
+		ret_val = e1000_initialize_M88E1543_phy(hw);
 		break;
+	}
 	default:
-		break;
+		goto out;
 	}
 
-	return E1000_SUCCESS;
+out:
+	return ret_val;
 }
 
+
 /**
- *  e1000_init_mac_params_82575 - Init MAC func ptrs.
- *  @hw: pointer to the HW structure
+ * e1000_init_mac_params_82575 - Initialize MAC function ptrs
+ * @hw: pointer to the HW structure
  **/
 STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 {
@@ -391,13 +302,16 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 
 	DEBUGFUNC("e1000_init_mac_params_82575");
 
+	/* Initialize function pointer */
+	e1000_init_mac_ops_generic(hw);
+
 	/* Derives media type */
 	e1000_get_media_type_82575(hw);
-	/* Set mta register count */
+	/* Set MTA register count */
 	mac->mta_reg_count = 128;
-	/* Set uta register count */
+	/* Set UTA register count */
 	mac->uta_reg_count = (hw->mac.type == e1000_82575) ? 0 : 128;
-	/* Set rar entry count */
+	/* Set RAR entry count */
 	mac->rar_entry_count = E1000_RAR_ENTRIES_82575;
 	if (mac->type == e1000_82576)
 		mac->rar_entry_count = E1000_RAR_ENTRIES_82576;
@@ -430,8 +344,8 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	if (mac->type >= e1000_82580)
 		mac->ops.reset_hw = e1000_reset_hw_82580;
 	else
-	mac->ops.reset_hw = e1000_reset_hw_82575;
-	/* hw initialization */
+		mac->ops.reset_hw = e1000_reset_hw_82575;
+	/* HW initialization */
 	if (mac->type == e1000_i210 || mac->type == e1000_i211)
 		mac->ops.init_hw = e1000_init_hw_i210;
 	else
@@ -467,7 +381,7 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	}
 	if (hw->mac.type >= e1000_82580)
 		mac->ops.validate_mdi_setting =
-				e1000_validate_mdi_setting_crossover_generic;
+			e1000_validate_mdi_setting_crossover_generic;
 	/* ID LED init */
 	mac->ops.id_led_init = e1000_id_led_init_generic;
 	/* blink LED */
@@ -485,6 +399,7 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	mac->ops.get_link_up_info = e1000_get_link_up_info_82575;
 	/* acquire SW_FW sync */
 	mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_82575;
+	/* release SW_FW sync */
 	mac->ops.release_swfw_sync = e1000_release_swfw_sync_82575;
 	if (mac->type == e1000_i210 || mac->type == e1000_i211) {
 		mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_i210;
@@ -498,63 +413,102 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 }
 
 /**
- *  e1000_init_function_pointers_82575 - Init func ptrs.
- *  @hw: pointer to the HW structure
- *
- *  Called to initialize all function pointers and parameters.
+ * e1000_init_nvm_params_82575 - Initialize NVM function ptrs
+ * @hw: pointer to the HW structure
  **/
-void e1000_init_function_pointers_82575(struct e1000_hw *hw)
+s32 e1000_init_nvm_params_82575(struct e1000_hw *hw)
 {
-	DEBUGFUNC("e1000_init_function_pointers_82575");
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+	u16 size;
 
-	hw->mac.ops.init_params = e1000_init_mac_params_82575;
-	hw->nvm.ops.init_params = e1000_init_nvm_params_82575;
-	hw->phy.ops.init_params = e1000_init_phy_params_82575;
-	hw->mbx.ops.init_params = e1000_init_mbx_params_pf;
-}
+	DEBUGFUNC("e1000_init_nvm_params_82575");
 
-/**
- *  e1000_acquire_phy_82575 - Acquire rights to access PHY
- *  @hw: pointer to the HW structure
- *
- *  Acquire access rights to the correct PHY.
- **/
-STATIC s32 e1000_acquire_phy_82575(struct e1000_hw *hw)
-{
-	u16 mask = E1000_SWFW_PHY0_SM;
+	size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
+		     E1000_EECD_SIZE_EX_SHIFT);
+	/* Added to a constant, "size" becomes the left-shift value
+	 * for setting word_size.
+	 */
+	size += NVM_WORD_SIZE_BASE_SHIFT;
 
-	DEBUGFUNC("e1000_acquire_phy_82575");
+	/* Just in case size is out of range, cap it to the largest
+	 * EEPROM size supported
+	 */
+	if (size > 15)
+		size = 15;
 
-	if (hw->bus.func == E1000_FUNC_1)
-		mask = E1000_SWFW_PHY1_SM;
-	else if (hw->bus.func == E1000_FUNC_2)
-		mask = E1000_SWFW_PHY2_SM;
-	else if (hw->bus.func == E1000_FUNC_3)
-		mask = E1000_SWFW_PHY3_SM;
+	nvm->word_size = 1 << size;
+	if (hw->mac.type < e1000_i210) {
+		nvm->opcode_bits = 8;
+		nvm->delay_usec = 1;
 
-	return hw->mac.ops.acquire_swfw_sync(hw, mask);
+		switch (nvm->override) {
+		case e1000_nvm_override_spi_large:
+			nvm->page_size = 32;
+			nvm->address_bits = 16;
+			break;
+		case e1000_nvm_override_spi_small:
+			nvm->page_size = 8;
+			nvm->address_bits = 8;
+			break;
+		default:
+			nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
+			nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
+					    16 : 8;
+			break;
+		}
+		if (nvm->word_size == (1 << 15))
+			nvm->page_size = 128;
+
+		nvm->type = e1000_nvm_eeprom_spi;
+	} else {
+		nvm->type = e1000_nvm_flash_hw;
+	}
+
+	/* Function Pointers */
+	nvm->ops.acquire = e1000_acquire_nvm_82575;
+	nvm->ops.release = e1000_release_nvm_82575;
+	if (nvm->word_size < (1 << 15))
+		nvm->ops.read = e1000_read_nvm_eerd;
+	else
+		nvm->ops.read = e1000_read_nvm_spi;
+
+	nvm->ops.write = e1000_write_nvm_spi;
+	nvm->ops.validate = e1000_validate_nvm_checksum_generic;
+	nvm->ops.update = e1000_update_nvm_checksum_generic;
+	nvm->ops.valid_led_default = e1000_valid_led_default_82575;
+
+	/* override generic family function pointers for specific descendants */
+	switch (hw->mac.type) {
+	case e1000_82580:
+		nvm->ops.validate = e1000_validate_nvm_checksum_82580;
+		nvm->ops.update = e1000_update_nvm_checksum_82580;
+		break;
+	case e1000_i350:
+		nvm->ops.validate = e1000_validate_nvm_checksum_i350;
+		nvm->ops.update = e1000_update_nvm_checksum_i350;
+		break;
+	default:
+		break;
+	}
+
+	return E1000_SUCCESS;
 }
 
 /**
- *  e1000_release_phy_82575 - Release rights to access PHY
+ *  e1000_init_function_pointers_82575 - Init func ptrs.
  *  @hw: pointer to the HW structure
  *
- *  A wrapper to release access rights to the correct PHY.
+ *  Called to initialize all function pointers and parameters.
  **/
-STATIC void e1000_release_phy_82575(struct e1000_hw *hw)
+void e1000_init_function_pointers_82575(struct e1000_hw *hw)
 {
-	u16 mask = E1000_SWFW_PHY0_SM;
-
-	DEBUGFUNC("e1000_release_phy_82575");
-
-	if (hw->bus.func == E1000_FUNC_1)
-		mask = E1000_SWFW_PHY1_SM;
-	else if (hw->bus.func == E1000_FUNC_2)
-		mask = E1000_SWFW_PHY2_SM;
-	else if (hw->bus.func == E1000_FUNC_3)
-		mask = E1000_SWFW_PHY3_SM;
+	DEBUGFUNC("e1000_init_function_pointers_82575");
 
-	hw->mac.ops.release_swfw_sync(hw, mask);
+	hw->mac.ops.init_params = e1000_init_mac_params_82575;
+	hw->nvm.ops.init_params = e1000_init_nvm_params_82575;
+	hw->phy.ops.init_params = e1000_init_phy_params_82575;
+	hw->mbx.ops.init_params = e1000_init_mbx_params_pf;
 }
 
 /**
@@ -1455,16 +1409,15 @@ STATIC s32 e1000_reset_hw_82575(struct e1000_hw *hw)
 }
 
 /**
- *  e1000_init_hw_82575 - Initialize hardware
- *  @hw: pointer to the HW structure
+ * e1000_init_hw_82575 - Initialize hardware
+ * @hw: pointer to the HW structure
  *
- *  This inits the hardware readying it for operation.
+ * This inits the hardware readying it for operation.
  **/
-s32 e1000_init_hw_82575(struct e1000_hw *hw)
+STATIC s32 e1000_init_hw_82575(struct e1000_hw *hw)
 {
 	struct e1000_mac_info *mac = &hw->mac;
 	s32 ret_val;
-	u16 i, rar_count = mac->rar_entry_count;
 
 	DEBUGFUNC("e1000_init_hw_82575");
 
@@ -1479,27 +1432,12 @@ s32 e1000_init_hw_82575(struct e1000_hw *hw)
 	DEBUGOUT("Initializing the IEEE VLAN\n");
 	mac->ops.clear_vfta(hw);
 
-	/* Setup the receive address */
-	e1000_init_rx_addrs_generic(hw, rar_count);
-
-	/* Zero out the Multicast HASH table */
-	DEBUGOUT("Zeroing the MTA\n");
-	for (i = 0; i < mac->mta_reg_count; i++)
-		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
-
-	/* Zero out the Unicast HASH table */
-	DEBUGOUT("Zeroing the UTA\n");
-	for (i = 0; i < mac->uta_reg_count; i++)
-		E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, 0);
-
-	/* Setup link and flow control */
-	ret_val = mac->ops.setup_link(hw);
+	ret_val = e1000_init_hw_base(hw);
 
 	/* Set the default MTU size */
 	hw->dev_spec._82575.mtu = 1500;
 
-	/*
-	 * Clear all of the statistics registers (clear on read).  It is
+	/* Clear all of the statistics registers (clear on read).  It is
 	 * important that we do this after we have tried to establish link
 	 * because the symbol error count will increment wildly if there
 	 * is no link.
@@ -1508,7 +1446,6 @@ s32 e1000_init_hw_82575(struct e1000_hw *hw)
 
 	return ret_val;
 }
-
 /**
  *  e1000_setup_copper_link_82575 - Configure copper link settings
  *  @hw: pointer to the HW structure
@@ -1519,9 +1456,9 @@ s32 e1000_init_hw_82575(struct e1000_hw *hw)
  **/
 STATIC s32 e1000_setup_copper_link_82575(struct e1000_hw *hw)
 {
-	u32 ctrl;
-	s32 ret_val;
 	u32 phpm_reg;
+	s32 ret_val;
+	u32 ctrl;
 
 	DEBUGFUNC("e1000_setup_copper_link_82575");
 
@@ -1588,8 +1525,6 @@ STATIC s32 e1000_setup_copper_link_82575(struct e1000_hw *hw)
 	case e1000_phy_82580:
 		ret_val = e1000_copper_link_setup_82577(hw);
 		break;
-	case e1000_phy_none:
-		break;
 	default:
 		ret_val = -E1000_ERR_PHY;
 		break;
@@ -1951,7 +1886,7 @@ STATIC bool e1000_sgmii_active_82575(struct e1000_hw *hw)
  *  Inits recommended HW defaults after a reset when there is no EEPROM
  *  detected. This is only for the 82575.
  **/
-STATIC s32 e1000_reset_init_script_82575(struct e1000_hw *hw)
+s32 e1000_reset_init_script_82575(struct e1000_hw *hw)
 {
 	DEBUGFUNC("e1000_reset_init_script_82575");
 
@@ -2029,27 +1964,6 @@ STATIC void e1000_config_collision_dist_82575(struct e1000_hw *hw)
 	E1000_WRITE_FLUSH(hw);
 }
 
-/**
- * e1000_power_down_phy_copper_82575 - Remove link during PHY power down
- * @hw: pointer to the HW structure
- *
- * In the case of a PHY power down to save power, or to turn off link during a
- * driver unload, or wake on lan is not enabled, remove the link.
- **/
-STATIC void e1000_power_down_phy_copper_82575(struct e1000_hw *hw)
-{
-	struct e1000_phy_info *phy = &hw->phy;
-
-	if (!(phy->ops.check_reset_block))
-		return;
-
-	/* If the management interface is not enabled, then power down */
-	if (!(e1000_enable_mng_pass_thru(hw) || phy->ops.check_reset_block(hw)))
-		e1000_power_down_phy_copper(hw);
-
-	return;
-}
-
 /**
  *  e1000_clear_hw_cntrs_82575 - Clear device specific hardware counters
  *  @hw: pointer to the HW structure
@@ -2115,85 +2029,6 @@ STATIC void e1000_clear_hw_cntrs_82575(struct e1000_hw *hw)
 		E1000_READ_REG(hw, E1000_SCVPC);
 }
 
-/**
- *  e1000_rx_fifo_flush_82575 - Clean rx fifo after Rx enable
- *  @hw: pointer to the HW structure
- *
- *  After Rx enable, if manageability is enabled then there is likely some
- *  bad data at the start of the fifo and possibly in the DMA fifo.  This
- *  function clears the fifos and flushes any packets that came in as rx was
- *  being enabled.
- **/
-void e1000_rx_fifo_flush_82575(struct e1000_hw *hw)
-{
-	u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled;
-	int i, ms_wait;
-
-	DEBUGFUNC("e1000_rx_fifo_flush_82575");
-
-	/* disable IPv6 options as per hardware errata */
-	rfctl = E1000_READ_REG(hw, E1000_RFCTL);
-	rfctl |= E1000_RFCTL_IPV6_EX_DIS;
-	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
-
-	if (hw->mac.type != e1000_82575 ||
-	    !(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_RCV_TCO_EN))
-		return;
-
-	/* Disable all Rx queues */
-	for (i = 0; i < 4; i++) {
-		rxdctl[i] = E1000_READ_REG(hw, E1000_RXDCTL(i));
-		E1000_WRITE_REG(hw, E1000_RXDCTL(i),
-				rxdctl[i] & ~E1000_RXDCTL_QUEUE_ENABLE);
-	}
-	/* Poll all queues to verify they have shut down */
-	for (ms_wait = 0; ms_wait < 10; ms_wait++) {
-		msec_delay(1);
-		rx_enabled = 0;
-		for (i = 0; i < 4; i++)
-			rx_enabled |= E1000_READ_REG(hw, E1000_RXDCTL(i));
-		if (!(rx_enabled & E1000_RXDCTL_QUEUE_ENABLE))
-			break;
-	}
-
-	if (ms_wait == 10)
-		DEBUGOUT("Queue disable timed out after 10ms\n");
-
-	/* Clear RLPML, RCTL.SBP, RFCTL.LEF, and set RCTL.LPE so that all
-	 * incoming packets are rejected.  Set enable and wait 2ms so that
-	 * any packet that was coming in as RCTL.EN was set is flushed
-	 */
-	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl & ~E1000_RFCTL_LEF);
-
-	rlpml = E1000_READ_REG(hw, E1000_RLPML);
-	E1000_WRITE_REG(hw, E1000_RLPML, 0);
-
-	rctl = E1000_READ_REG(hw, E1000_RCTL);
-	temp_rctl = rctl & ~(E1000_RCTL_EN | E1000_RCTL_SBP);
-	temp_rctl |= E1000_RCTL_LPE;
-
-	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl);
-	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl | E1000_RCTL_EN);
-	E1000_WRITE_FLUSH(hw);
-	msec_delay(2);
-
-	/* Enable Rx queues that were previously enabled and restore our
-	 * previous state
-	 */
-	for (i = 0; i < 4; i++)
-		E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl[i]);
-	E1000_WRITE_REG(hw, E1000_RCTL, rctl);
-	E1000_WRITE_FLUSH(hw);
-
-	E1000_WRITE_REG(hw, E1000_RLPML, rlpml);
-	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
-
-	/* Flush receive errors generated by workaround */
-	E1000_READ_REG(hw, E1000_ROC);
-	E1000_READ_REG(hw, E1000_RNBC);
-	E1000_READ_REG(hw, E1000_MPC);
-}
-
 /**
  *  e1000_set_pcie_completion_timeout - set pci-e completion timeout
  *  @hw: pointer to the HW structure
diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index 52dd7a9a1..a588f7c1e 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -160,38 +160,6 @@ struct e1000_adv_context_desc {
 #define E1000_IMIREXT_CTRL_FIN	0x00040000  /* Check FIN bit in header */
 #define E1000_IMIREXT_CTRL_BP	0x00080000  /* Bypass check of ctrl bits */
 
-/* Receive Descriptor - Advanced */
-union e1000_adv_rx_desc {
-	struct {
-		__le64 pkt_addr; /* Packet buffer address */
-		__le64 hdr_addr; /* Header buffer address */
-	} read;
-	struct {
-		struct {
-			union {
-				__le32 data;
-				struct {
-					__le16 pkt_info; /*RSS type, Pkt type*/
-					/* Split Header, header buffer len */
-					__le16 hdr_info;
-				} hs_rss;
-			} lo_dword;
-			union {
-				__le32 rss; /* RSS Hash */
-				struct {
-					__le16 ip_id; /* IP id */
-					__le16 csum; /* Packet Checksum */
-				} csum_ip;
-			} hi_dword;
-		} lower;
-		struct {
-			__le32 status_error; /* ext status/error */
-			__le16 length; /* Packet length */
-			__le16 vlan; /* VLAN tag */
-		} upper;
-	} wb;  /* writeback */
-};
-
 #define E1000_RXDADV_RSSTYPE_MASK	0x0000000F
 #define E1000_RXDADV_RSSTYPE_SHIFT	12
 #define E1000_RXDADV_HDRBUFLEN_MASK	0x7FE0
@@ -248,20 +216,6 @@ union e1000_adv_rx_desc {
 #define E1000_RXDADV_IPSEC_ERROR_INVALID_LENGTH		0x10000000
 #define E1000_RXDADV_IPSEC_ERROR_AUTHENTICATION_FAILED	0x18000000
 
-/* Transmit Descriptor - Advanced */
-union e1000_adv_tx_desc {
-	struct {
-		__le64 buffer_addr;    /* Address of descriptor's data buf */
-		__le32 cmd_type_len;
-		__le32 olinfo_status;
-	} read;
-	struct {
-		__le64 rsvd;       /* Reserved */
-		__le32 nxtseq_seed;
-		__le32 status;
-	} wb;
-};
-
 /* Adv Transmit Descriptor Config Masks */
 #define E1000_ADVTXD_DTYP_CTXT	0x00200000 /* Advanced Context Descriptor */
 #define E1000_ADVTXD_DTYP_DATA	0x00300000 /* Advanced Data Descriptor */
@@ -284,14 +238,6 @@ union e1000_adv_tx_desc {
 #define E1000_ADVTXD_POPTS_IPSEC	0x00000400 /* IPSec offload request */
 #define E1000_ADVTXD_PAYLEN_SHIFT	14 /* Adv desc PAYLEN shift */
 
-/* Context descriptors */
-struct e1000_adv_tx_context_desc {
-	__le32 vlan_macip_lens;
-	__le32 seqnum_seed;
-	__le32 type_tucmd_mlhl;
-	__le32 mss_l4len_idx;
-};
-
 #define E1000_ADVTXD_MACLEN_SHIFT	9  /* Adv ctxt desc mac len shift */
 #define E1000_ADVTXD_VLAN_SHIFT		16  /* Adv ctxt vlan tag shift */
 #define E1000_ADVTXD_TUCMD_IPV4		0x00000400  /* IP Packet Type: 1=IPv4 */
@@ -354,7 +300,6 @@ struct e1000_adv_tx_context_desc {
 #define E1000_ETQF_FILTER_ENABLE	(1 << 26)
 #define E1000_ETQF_IMM_INT		(1 << 29)
 #define E1000_ETQF_1588			(1 << 30)
-#define E1000_ETQF_QUEUE_ENABLE		(1U << 31)
 /*
  * ETQF filter list: one static filter per filter consumer. This is
  *                   to avoid filter collisions later. Add new filters
@@ -444,13 +389,14 @@ struct e1000_adv_tx_context_desc {
 
 #define ALL_QUEUES		0xFFFF
 
+s32 e1000_reset_init_script_82575(struct e1000_hw *hw);
+s32 e1000_init_nvm_params_82575(struct e1000_hw *hw);
+
 /* Rx packet buffer size defines */
 #define E1000_RXPBS_SIZE_MASK_82576	0x0000007F
 void e1000_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable);
 void e1000_vmdq_set_anti_spoofing_pf(struct e1000_hw *hw, bool enable, int pf);
 void e1000_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable);
-s32 e1000_init_nvm_params_82575(struct e1000_hw *hw);
-s32  e1000_init_hw_82575(struct e1000_hw *hw);
 
 enum e1000_promisc_type {
 	e1000_promisc_disabled = 0,   /* all promisc modes disabled */
diff --git a/drivers/net/e1000/base/e1000_base.c b/drivers/net/e1000/base/e1000_base.c
new file mode 100644
index 000000000..3d069cc76
--- /dev/null
+++ b/drivers/net/e1000/base/e1000_base.c
@@ -0,0 +1,192 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2020 Intel Corporation
+ */
+
+#include "e1000_hw.h"
+#include "e1000_82575.h"
+#include "e1000_mac.h"
+#include "e1000_base.h"
+#include "e1000_manage.h"
+
+/**
+ *  e1000_acquire_phy_base - Acquire rights to access PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Acquire access rights to the correct PHY.
+ **/
+s32 e1000_acquire_phy_base(struct e1000_hw *hw)
+{
+	u16 mask = E1000_SWFW_PHY0_SM;
+
+	DEBUGFUNC("e1000_acquire_phy_base");
+
+	if (hw->bus.func == E1000_FUNC_1)
+		mask = E1000_SWFW_PHY1_SM;
+	else if (hw->bus.func == E1000_FUNC_2)
+		mask = E1000_SWFW_PHY2_SM;
+	else if (hw->bus.func == E1000_FUNC_3)
+		mask = E1000_SWFW_PHY3_SM;
+
+	return hw->mac.ops.acquire_swfw_sync(hw, mask);
+}
+
+/**
+ *  e1000_release_phy_base - Release rights to access PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  A wrapper to release access rights to the correct PHY.
+ **/
+void e1000_release_phy_base(struct e1000_hw *hw)
+{
+	u16 mask = E1000_SWFW_PHY0_SM;
+
+	DEBUGFUNC("e1000_release_phy_base");
+
+	if (hw->bus.func == E1000_FUNC_1)
+		mask = E1000_SWFW_PHY1_SM;
+	else if (hw->bus.func == E1000_FUNC_2)
+		mask = E1000_SWFW_PHY2_SM;
+	else if (hw->bus.func == E1000_FUNC_3)
+		mask = E1000_SWFW_PHY3_SM;
+
+	hw->mac.ops.release_swfw_sync(hw, mask);
+}
+
+/**
+ *  e1000_init_hw_base - Initialize hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This inits the hardware readying it for operation.
+ **/
+s32 e1000_init_hw_base(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	u16 i, rar_count = mac->rar_entry_count;
+
+	DEBUGFUNC("e1000_init_hw_base");
+
+	/* Setup the receive address */
+	e1000_init_rx_addrs_generic(hw, rar_count);
+
+	/* Zero out the Multicast HASH table */
+	DEBUGOUT("Zeroing the MTA\n");
+	for (i = 0; i < mac->mta_reg_count; i++)
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
+
+	/* Zero out the Unicast HASH table */
+	DEBUGOUT("Zeroing the UTA\n");
+	for (i = 0; i < mac->uta_reg_count; i++)
+		E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, 0);
+
+	/* Setup link and flow control */
+	ret_val = mac->ops.setup_link(hw);
+	/*
+	 * Clear all of the statistics registers (clear on read).  It is
+	 * important that we do this after we have tried to establish link
+	 * because the symbol error count will increment wildly if there
+	 * is no link.
+	 */
+	e1000_clear_hw_cntrs_base_generic(hw);
+
+	return ret_val;
+}
+
+/**
+ * e1000_power_down_phy_copper_base - Remove link during PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, remove the link.
+ **/
+void e1000_power_down_phy_copper_base(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+
+	if (!(phy->ops.check_reset_block))
+		return;
+
+	/* If the management interface is not enabled, then power down */
+	if (phy->ops.check_reset_block(hw))
+		e1000_power_down_phy_copper(hw);
+
+	return;
+}
+
+/**
+ *  e1000_rx_fifo_flush_base - Clean Rx FIFO after Rx enable
+ *  @hw: pointer to the HW structure
+ *
+ *  After Rx enable, if manageability is enabled then there is likely some
+ *  bad data at the start of the FIFO and possibly in the DMA FIFO.  This
+ *  function clears the FIFOs and flushes any packets that came in as Rx was
+ *  being enabled.
+ **/
+void e1000_rx_fifo_flush_base(struct e1000_hw *hw)
+{
+	u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled;
+	int i, ms_wait;
+
+	DEBUGFUNC("e1000_rx_fifo_flush_base");
+
+	/* disable IPv6 options as per hardware errata */
+	rfctl = E1000_READ_REG(hw, E1000_RFCTL);
+	rfctl |= E1000_RFCTL_IPV6_EX_DIS;
+	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
+
+	if (!(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_RCV_TCO_EN))
+		return;
+
+	/* Disable all Rx queues */
+	for (i = 0; i < 4; i++) {
+		rxdctl[i] = E1000_READ_REG(hw, E1000_RXDCTL(i));
+		E1000_WRITE_REG(hw, E1000_RXDCTL(i),
+				rxdctl[i] & ~E1000_RXDCTL_QUEUE_ENABLE);
+	}
+	/* Poll all queues to verify they have shut down */
+	for (ms_wait = 0; ms_wait < 10; ms_wait++) {
+		msec_delay(1);
+		rx_enabled = 0;
+		for (i = 0; i < 4; i++)
+			rx_enabled |= E1000_READ_REG(hw, E1000_RXDCTL(i));
+		if (!(rx_enabled & E1000_RXDCTL_QUEUE_ENABLE))
+			break;
+	}
+
+	if (ms_wait == 10)
+		DEBUGOUT("Queue disable timed out after 10ms\n");
+
+	/* Clear RLPML, RCTL.SBP, RFCTL.LEF, and set RCTL.LPE so that all
+	 * incoming packets are rejected.  Set enable and wait 2ms so that
+	 * any packet that was coming in as RCTL.EN was set is flushed
+	 */
+	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl & ~E1000_RFCTL_LEF);
+
+	rlpml = E1000_READ_REG(hw, E1000_RLPML);
+	E1000_WRITE_REG(hw, E1000_RLPML, 0);
+
+	rctl = E1000_READ_REG(hw, E1000_RCTL);
+	temp_rctl = rctl & ~(E1000_RCTL_EN | E1000_RCTL_SBP);
+	temp_rctl |= E1000_RCTL_LPE;
+
+	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl);
+	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl | E1000_RCTL_EN);
+	E1000_WRITE_FLUSH(hw);
+	msec_delay(2);
+
+	/* Enable Rx queues that were previously enabled and restore our
+	 * previous state
+	 */
+	for (i = 0; i < 4; i++)
+		E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl[i]);
+	E1000_WRITE_REG(hw, E1000_RCTL, rctl);
+	E1000_WRITE_FLUSH(hw);
+
+	E1000_WRITE_REG(hw, E1000_RLPML, rlpml);
+	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
+
+	/* Flush receive errors generated by workaround */
+	E1000_READ_REG(hw, E1000_ROC);
+	E1000_READ_REG(hw, E1000_RNBC);
+	E1000_READ_REG(hw, E1000_MPC);
+}
diff --git a/drivers/net/e1000/base/e1000_base.h b/drivers/net/e1000/base/e1000_base.h
new file mode 100644
index 000000000..0d6172b6d
--- /dev/null
+++ b/drivers/net/e1000/base/e1000_base.h
@@ -0,0 +1,127 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2020 Intel Corporation
+ */
+
+#ifndef _E1000_BASE_H_
+#define _E1000_BASE_H_
+
+/* forward declaration */
+s32 e1000_init_hw_base(struct e1000_hw *hw);
+void e1000_power_down_phy_copper_base(struct e1000_hw *hw);
+extern void e1000_rx_fifo_flush_base(struct e1000_hw *hw);
+s32 e1000_acquire_phy_base(struct e1000_hw *hw);
+void e1000_release_phy_base(struct e1000_hw *hw);
+
+/* Transmit Descriptor - Advanced */
+union e1000_adv_tx_desc {
+	struct {
+		__le64 buffer_addr;    /* Address of descriptor's data buf */
+		__le32 cmd_type_len;
+		__le32 olinfo_status;
+	} read;
+	struct {
+		__le64 rsvd;       /* Reserved */
+		__le32 nxtseq_seed;
+		__le32 status;
+	} wb;
+};
+
+/* Context descriptors */
+struct e1000_adv_tx_context_desc {
+	__le32 vlan_macip_lens;
+	union {
+		__le32 launch_time;
+		__le32 seqnum_seed;
+	} u;
+	__le32 type_tucmd_mlhl;
+	__le32 mss_l4len_idx;
+};
+
+/* Adv Transmit Descriptor Config Masks */
+#define E1000_ADVTXD_DTYP_CTXT	0x00200000 /* Advanced Context Descriptor */
+#define E1000_ADVTXD_DTYP_DATA	0x00300000 /* Advanced Data Descriptor */
+#define E1000_ADVTXD_DCMD_EOP	0x01000000 /* End of Packet */
+#define E1000_ADVTXD_DCMD_IFCS	0x02000000 /* Insert FCS (Ethernet CRC) */
+#define E1000_ADVTXD_DCMD_RS	0x08000000 /* Report Status */
+#define E1000_ADVTXD_DCMD_DDTYP_ISCSI	0x10000000 /* DDP hdr type or iSCSI */
+#define E1000_ADVTXD_DCMD_DEXT	0x20000000 /* Descriptor extension (1=Adv) */
+#define E1000_ADVTXD_DCMD_VLE	0x40000000 /* VLAN pkt enable */
+#define E1000_ADVTXD_DCMD_TSE	0x80000000 /* TCP Seg enable */
+#define E1000_ADVTXD_MAC_LINKSEC	0x00040000 /* Apply LinkSec on pkt */
+#define E1000_ADVTXD_MAC_TSTAMP		0x00080000 /* IEEE1588 Timestamp pkt */
+#define E1000_ADVTXD_STAT_SN_CRC	0x00000002 /* NXTSEQ/SEED prsnt in WB */
+#define E1000_ADVTXD_IDX_SHIFT		4  /* Adv desc Index shift */
+#define E1000_ADVTXD_POPTS_ISCO_1ST	0x00000000 /* 1st TSO of iSCSI PDU */
+#define E1000_ADVTXD_POPTS_ISCO_MDL	0x00000800 /* Middle TSO of iSCSI PDU */
+#define E1000_ADVTXD_POPTS_ISCO_LAST	0x00001000 /* Last TSO of iSCSI PDU */
+/* 1st & Last TSO-full iSCSI PDU*/
+#define E1000_ADVTXD_POPTS_ISCO_FULL	0x00001800
+#define E1000_ADVTXD_POPTS_IPSEC	0x00000400 /* IPSec offload request */
+#define E1000_ADVTXD_PAYLEN_SHIFT	14 /* Adv desc PAYLEN shift */
+
+/* Advanced Transmit Context Descriptor Config */
+#define E1000_ADVTXD_MACLEN_SHIFT	9  /* Adv ctxt desc mac len shift */
+#define E1000_ADVTXD_VLAN_SHIFT		16  /* Adv ctxt vlan tag shift */
+#define E1000_ADVTXD_TUCMD_IPV4		0x00000400  /* IP Packet Type: 1=IPv4 */
+#define E1000_ADVTXD_TUCMD_IPV6		0x00000000  /* IP Packet Type: 0=IPv6 */
+#define E1000_ADVTXD_TUCMD_L4T_UDP	0x00000000  /* L4 Packet TYPE of UDP */
+#define E1000_ADVTXD_TUCMD_L4T_TCP	0x00000800  /* L4 Packet TYPE of TCP */
+#define E1000_ADVTXD_TUCMD_L4T_SCTP	0x00001000  /* L4 Packet TYPE of SCTP */
+#define E1000_ADVTXD_TUCMD_IPSEC_TYPE_ESP	0x00002000 /* IPSec Type ESP */
+/* IPSec Encrypt Enable for ESP */
+#define E1000_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN	0x00004000
+/* Req requires Markers and CRC */
+#define E1000_ADVTXD_TUCMD_MKRREQ	0x00002000
+#define E1000_ADVTXD_L4LEN_SHIFT	8  /* Adv ctxt L4LEN shift */
+#define E1000_ADVTXD_MSS_SHIFT		16  /* Adv ctxt MSS shift */
+/* Adv ctxt IPSec SA IDX mask */
+#define E1000_ADVTXD_IPSEC_SA_INDEX_MASK	0x000000FF
+/* Adv ctxt IPSec ESP len mask */
+#define E1000_ADVTXD_IPSEC_ESP_LEN_MASK		0x000000FF
+
+#define E1000_RAR_ENTRIES_BASE		16
+
+/* Receive Descriptor - Advanced */
+union e1000_adv_rx_desc {
+	struct {
+		__le64 pkt_addr; /* Packet buffer address */
+		__le64 hdr_addr; /* Header buffer address */
+	} read;
+	struct {
+		struct {
+			union {
+				__le32 data;
+				struct {
+					__le16 pkt_info; /*RSS type, Pkt type*/
+					/* Split Header, header buffer len */
+					__le16 hdr_info;
+				} hs_rss;
+			} lo_dword;
+			union {
+				__le32 rss; /* RSS Hash */
+				struct {
+					__le16 ip_id; /* IP id */
+					__le16 csum; /* Packet Checksum */
+				} csum_ip;
+			} hi_dword;
+		} lower;
+		struct {
+			__le32 status_error; /* ext status/error */
+			__le16 length; /* Packet length */
+			__le16 vlan; /* VLAN tag */
+		} upper;
+	} wb;  /* writeback */
+};
+
+/* Additional Transmit Descriptor Control definitions */
+#define E1000_TXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Tx Queue */
+
+/* Additional Receive Descriptor Control definitions */
+#define E1000_RXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Rx Queue */
+
+/* SRRCTL bit definitions */
+#define E1000_SRRCTL_BSIZEPKT_SHIFT		10 /* Shift _right_ */
+#define E1000_SRRCTL_BSIZEHDRSIZE_SHIFT		2  /* Shift _left_ */
+#define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF	0x02000000
+
+#endif /* _E1000_BASE_H_ */
diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 8831da7ca..111e408be 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -414,8 +414,8 @@
 #define E1000_RFCTL_LEF			0x00040000
 
 /* Collision related configuration parameters */
-#define E1000_COLLISION_THRESHOLD	15
 #define E1000_CT_SHIFT			4
+#define E1000_COLLISION_THRESHOLD	15
 #define E1000_COLLISION_DISTANCE	63
 #define E1000_COLD_SHIFT		12
 
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 933a9204c..688174200 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -1012,6 +1012,7 @@ struct e1000_hw {
 #include "e1000_ich8lan.h"
 #include "e1000_82575.h"
 #include "e1000_i210.h"
+#include "e1000_base.h"
 
 /* These functions must be implemented by drivers */
 void e1000_pci_clear_mwi(struct e1000_hw *hw);
diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index a6d8e3b34..553803261 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -934,6 +934,6 @@ s32 e1000_init_hw_i210(struct e1000_hw *hw)
 			return ret_val;
 	}
 	hw->phy.ops.get_cfg_done = e1000_get_cfg_done_i210;
-	ret_val = e1000_init_hw_82575(hw);
+	ret_val = e1000_init_hw_base(hw);
 	return ret_val;
 }
diff --git a/drivers/net/e1000/base/meson.build b/drivers/net/e1000/base/meson.build
index 5e1716def..d13f693d3 100644
--- a/drivers/net/e1000/base/meson.build
+++ b/drivers/net/e1000/base/meson.build
@@ -2,6 +2,7 @@
 # Copyright(c) 2017 Intel Corporation
 
 sources = [
+	'e1000_base.c',
 	'e1000_80003es2lan.c',
 	'e1000_82540.c',
 	'e1000_82541.c',
diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c
index 684fa4ad8..688320284 100644
--- a/drivers/net/e1000/igb_rxtx.c
+++ b/drivers/net/e1000/igb_rxtx.c
@@ -320,7 +320,7 @@ igbe_set_xmit_ctx(struct igb_tx_queue* txq,
 	vlan_macip_lens = (uint32_t)tx_offload.data;
 	ctx_txd->vlan_macip_lens = rte_cpu_to_le_32(vlan_macip_lens);
 	ctx_txd->mss_l4len_idx = rte_cpu_to_le_32(mss_l4len_idx);
-	ctx_txd->seqnum_seed = 0;
+	ctx_txd->u.seqnum_seed = 0;
 }
 
 /*
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 18/42] net/e1000/base: add definitions for ETQF register bit
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (16 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 17/42] net/e1000/base: remove duplicated codes from 82575 Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 19/42] net/e1000/base: cleanup duplicate declaration Guinan Sun
                     ` (24 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Sasha Neftin

Add definitions for ETQF register bit and modify some comments.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_regs.h | 23 +++++++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index b072c5c1d..9edd3c528 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -138,7 +138,8 @@
 #define E1000_RADV	0x0282C  /* Rx Interrupt Absolute Delay Timer - RW */
 #define E1000_EMIADD	0x10     /* Extended Memory Indirect Address */
 #define E1000_EMIDATA	0x11     /* Extended Memory Indirect Data */
-#define E1000_SRWR		0x12018  /* Shadow Ram Write Register - RW */
+/* Shadow Ram Write Register - RW */
+#define E1000_SRWR		0x12018
 #define E1000_I210_FLMNGCTL	0x12038
 #define E1000_I210_FLMNGDATA	0x1203C
 #define E1000_I210_FLMNGCNT	0x12040
@@ -283,6 +284,7 @@
 #define E1000_TIDV	0x03820  /* Tx Interrupt Delay Value - RW */
 #define E1000_TADV	0x0382C  /* Tx Interrupt Absolute Delay Val - RW */
 #define E1000_TSPMT	0x03830  /* TCP Segmentation PAD & Min Threshold - RW */
+/* Statistics Register Descriptions */
 #define E1000_CRCERRS	0x04000  /* CRC Error Count - R/clr */
 #define E1000_ALGNERRC	0x04004  /* Alignment Error Count - R/clr */
 #define E1000_SYMERRS	0x04008  /* Symbol Error Count - R/clr */
@@ -484,17 +486,20 @@
 #define E1000_MANC2H		0x05860 /* Management Control To Host - RW */
 /* Management Decision Filters */
 #define E1000_MDEF(_n)		(0x05890 + (4 * (_n)))
+/* Semaphore registers */
 #define E1000_SW_FW_SYNC	0x05B5C /* SW-FW Synchronization - RW */
 #define E1000_CCMCTL	0x05B48 /* CCM Control Register */
 #define E1000_GIOCTL	0x05B44 /* GIO Analog Control Register */
 #define E1000_SCCTL	0x05B4C /* PCIc PLL Configuration Register */
+/* PCIe Register Description */
 #define E1000_GCR	0x05B00 /* PCI-Ex Control */
 #define E1000_GCR2	0x05B64 /* PCI-Ex Control #2 */
 #define E1000_GSCL_1	0x05B10 /* PCI-Ex Statistic Control #1 */
 #define E1000_GSCL_2	0x05B14 /* PCI-Ex Statistic Control #2 */
 #define E1000_GSCL_3	0x05B18 /* PCI-Ex Statistic Control #3 */
 #define E1000_GSCL_4	0x05B1C /* PCI-Ex Statistic Control #4 */
-#define E1000_FACTPS	0x05B30 /* Function Active and Power State to MNG */
+/* Function Active and Power State to MNG */
+#define E1000_FACTPS	0x05B30
 #define E1000_SWSM	0x05B50 /* SW Semaphore */
 #define E1000_FWSM	0x05B54 /* FW Semaphore */
 /* Driver-only SW semaphore (not used by BOOT agents) */
@@ -513,8 +518,10 @@
 #define E1000_IMIREXT(_i)	(0x05AA0 + ((_i) * 4)) /* Immediate INTR Ext*/
 #define E1000_IMIRVP		0x05AC0 /* Immediate INT Rx VLAN Priority -RW */
 #define E1000_MSIXBM(_i)	(0x01600 + ((_i) * 4)) /* MSI-X Alloc Reg -RW */
-#define E1000_RETA(_i)	(0x05C00 + ((_i) * 4)) /* Redirection Table - RW */
-#define E1000_RSSRK(_i)	(0x05C80 + ((_i) * 4)) /* RSS Random Key - RW */
+/* Redirection Table - RW Array */
+#define E1000_RETA(_i)	(0x05C00 + ((_i) * 4))
+/* RSS Random Key - RW Array */
+#define E1000_RSSRK(_i)	(0x05C80 + ((_i) * 4))
 #define E1000_RSSIM	0x05864 /* RSS Interrupt Mask */
 #define E1000_RSSIR	0x05868 /* RSS Interrupt Request */
 /* VT Registers */
@@ -584,6 +591,14 @@
 #define E1000_SYNQF(_n)	(0x055FC + (4 * (_n))) /* SYN Packet Queue Fltr */
 #define E1000_ETQF(_n)	(0x05CB0 + (4 * (_n))) /* EType Queue Fltr */
 
+/* ETQF register bit definitions */
+#define E1000_ETQF_FILTER_ENABLE	(1 << 26)
+#define E1000_ETQF_IMM_INT		(1 << 29)
+#define E1000_ETQF_QUEUE_ENABLE		(1 << 31)
+#define E1000_ETQF_QUEUE_SHIFT		16
+#define E1000_ETQF_QUEUE_MASK		0x00070000
+#define E1000_ETQF_ETYPE_MASK		0x0000FFFF
+
 #define E1000_RTTDCS	0x3600 /* Reedtown Tx Desc plane control and status */
 #define E1000_RTTPCS	0x3474 /* Reedtown Tx Packet Plane control and status */
 #define E1000_RTRPCS	0x2474 /* Rx packet plane control and status */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 19/42] net/e1000/base: cleanup duplicate declaration
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (17 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 18/42] net/e1000/base: add definitions for ETQF register bit Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 20/42] net/e1000/base: expose MAC functions Guinan Sun
                     ` (23 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Jeff Kirsher

Fix up a stray and duplicate function declaration.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/net/e1000/base/e1000_api.h b/drivers/net/e1000/base/e1000_api.h
index 3054d5b9d..d719b691a 100644
--- a/drivers/net/e1000/base/e1000_api.h
+++ b/drivers/net/e1000/base/e1000_api.h
@@ -15,7 +15,6 @@ extern void e1000_init_function_pointers_82541(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_80003es2lan(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_82575(struct e1000_hw *hw);
-extern void e1000_rx_fifo_flush_82575(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_vf(struct e1000_hw *hw);
 extern void e1000_power_up_fiber_serdes_link(struct e1000_hw *hw);
 extern void e1000_shutdown_fiber_serdes_link(struct e1000_hw *hw);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 20/42] net/e1000/base: expose MAC functions
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (18 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 19/42] net/e1000/base: cleanup duplicate declaration Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 21/42] net/e1000/base: move definitions from 82575 to defines file Guinan Sun
                     ` (22 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Jeff Kirsher

Now the functions are being accessed outside of the file, we need
to properly expose them for silicon families to use.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_mac.c | 3 +--
 drivers/net/e1000/base/e1000_mac.h | 1 +
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_mac.c b/drivers/net/e1000/base/e1000_mac.c
index 48384b284..1a2abd9a2 100644
--- a/drivers/net/e1000/base/e1000_mac.c
+++ b/drivers/net/e1000/base/e1000_mac.c
@@ -7,7 +7,6 @@
 STATIC s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw);
 STATIC void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
 STATIC void e1000_config_collision_dist_generic(struct e1000_hw *hw);
-STATIC int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);
 
 /**
  *  e1000_init_mac_ops_generic - Initialize MAC function pointers
@@ -448,7 +447,7 @@ s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw)
  *  Sets the receive address array register at index to the address passed
  *  in by addr.
  **/
-STATIC int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)
+int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)
 {
 	u32 rar_low, rar_high;
 
diff --git a/drivers/net/e1000/base/e1000_mac.h b/drivers/net/e1000/base/e1000_mac.h
index bbd2a7388..35a691f63 100644
--- a/drivers/net/e1000/base/e1000_mac.h
+++ b/drivers/net/e1000/base/e1000_mac.h
@@ -41,6 +41,7 @@ s32  e1000_led_on_generic(struct e1000_hw *hw);
 s32  e1000_led_off_generic(struct e1000_hw *hw);
 void e1000_update_mc_addr_list_generic(struct e1000_hw *hw,
 				       u8 *mc_addr_list, u32 mc_addr_count);
+int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);
 s32  e1000_set_default_fc_generic(struct e1000_hw *hw);
 s32  e1000_set_fc_watermarks_generic(struct e1000_hw *hw);
 s32  e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 21/42] net/e1000/base: move definitions from 82575 to defines file
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (19 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 20/42] net/e1000/base: expose MAC functions Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 22/42] net/e1000/base: add define to PCIm function state Guinan Sun
                     ` (21 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun

Move definitions from 82575 to e1000_defines.h file.
The patch is for refactoring the codes.

Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.h   |  8 --------
 drivers/net/e1000/base/e1000_defines.h | 11 +++++++++++
 2 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index a588f7c1e..c5e5f8221 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -151,14 +151,12 @@ struct e1000_adv_context_desc {
 /* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */
 #define E1000_IMIR_PORT_IM_EN	0x00010000  /* TCP port enable */
 #define E1000_IMIR_PORT_BP	0x00020000  /* TCP port check bypass */
-#define E1000_IMIREXT_SIZE_BP	0x00001000  /* Packet size bypass */
 #define E1000_IMIREXT_CTRL_URG	0x00002000  /* Check URG bit in header */
 #define E1000_IMIREXT_CTRL_ACK	0x00004000  /* Check ACK bit in header */
 #define E1000_IMIREXT_CTRL_PSH	0x00008000  /* Check PSH bit in header */
 #define E1000_IMIREXT_CTRL_RST	0x00010000  /* Check RST bit in header */
 #define E1000_IMIREXT_CTRL_SYN	0x00020000  /* Check SYN bit in header */
 #define E1000_IMIREXT_CTRL_FIN	0x00040000  /* Check FIN bit in header */
-#define E1000_IMIREXT_CTRL_BP	0x00080000  /* Bypass check of ctrl bits */
 
 #define E1000_RXDADV_RSSTYPE_MASK	0x0000000F
 #define E1000_RXDADV_RSSTYPE_SHIFT	12
@@ -167,7 +165,6 @@ struct e1000_adv_context_desc {
 #define E1000_RXDADV_SPLITHEADER_EN	0x00001000
 #define E1000_RXDADV_SPH		0x8000
 #define E1000_RXDADV_STAT_TS		0x10000 /* Pkt was time stamped */
-#define E1000_RXDADV_STAT_TSIP		0x08000 /* timestamp in packet */
 #define E1000_RXDADV_ERR_HBO		0x00800000
 
 /* RSS Hash results */
@@ -299,7 +296,6 @@ struct e1000_adv_context_desc {
 /* ETQF register bit definitions */
 #define E1000_ETQF_FILTER_ENABLE	(1 << 26)
 #define E1000_ETQF_IMM_INT		(1 << 29)
-#define E1000_ETQF_1588			(1 << 30)
 /*
  * ETQF filter list: one static filter per filter consumer. This is
  *                   to avoid filter collisions later. Add new filters
@@ -310,10 +306,6 @@ struct e1000_adv_context_desc {
  */
 #define E1000_ETQF_FILTER_EAPOL		0
 
-#define E1000_FTQF_VF_BP		0x00008000
-#define E1000_FTQF_1588_TIME_STAMP	0x08000000
-#define E1000_FTQF_MASK			0xF0000000
-#define E1000_FTQF_MASK_PROTO_BP	0x10000000
 #define E1000_FTQF_MASK_SOURCE_ADDR_BP	0x20000000
 #define E1000_FTQF_MASK_DEST_ADDR_BP	0x40000000
 #define E1000_FTQF_MASK_SOURCE_PORT_BP	0x80000000
diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 111e408be..12747918c 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -770,6 +770,17 @@
 #define E1000_TIMINCA_INCPERIOD_SHIFT	24
 #define E1000_TIMINCA_INCVALUE_MASK	0x00FFFFFF
 
+/* ETQF register bit definitions */
+#define E1000_ETQF_1588			(1 << 30)
+#define E1000_FTQF_VF_BP		0x00008000
+#define E1000_FTQF_1588_TIME_STAMP	0x08000000
+#define E1000_FTQF_MASK			0xF0000000
+#define E1000_FTQF_MASK_PROTO_BP	0x10000000
+/* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */
+#define E1000_IMIREXT_CTRL_BP	0x00080000  /* Bypass check of ctrl bits */
+#define E1000_IMIREXT_SIZE_BP	0x00001000  /* Packet size bypass */
+
+#define E1000_RXDADV_STAT_TSIP		0x08000 /* timestamp in packet */
 #define E1000_TSICR_TXTS		0x00000002
 #define E1000_TSIM_TXTS			0x00000002
 /* TUPLE Filtering Configuration */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 22/42] net/e1000/base: add define to PCIm function state
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (20 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 21/42] net/e1000/base: move definitions from 82575 to defines file Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 23/42] net/e1000/base: add missing register defines Guinan Sun
                     ` (20 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Lifshits Vitaly

Added define to pcim function state.

Signed-off-by: Lifshits Vitaly <vitaly.lifshits@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 12747918c..b73a67f30 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -315,6 +315,7 @@
 #define E1000_STATUS_PCIX_SPEED_66	0x00000000 /* PCI-X bus spd 50-66MHz */
 #define E1000_STATUS_PCIX_SPEED_100	0x00004000 /* PCI-X bus spd 66-100MHz */
 #define E1000_STATUS_PCIX_SPEED_133	0x00008000 /* PCI-X bus spd 100-133MHz*/
+#define E1000_STATUS_PCIM_STATE		0x40000000 /* PCIm function state */
 
 #define SPEED_10	10
 #define SPEED_100	100
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 23/42] net/e1000/base: add missing register defines
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (21 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 22/42] net/e1000/base: add define to PCIm function state Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 24/42] net/e1000/base: move the device reset definition Guinan Sun
                     ` (19 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Jeff Kirsher

Added defines for the EEC, SHADOWINF and FLFWUPDATE registers needed for
the nvmupd_validate_offset function to correctly validate the NVM update
offset.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_regs.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 9edd3c528..4af9e1746 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -140,6 +140,8 @@
 #define E1000_EMIDATA	0x11     /* Extended Memory Indirect Data */
 /* Shadow Ram Write Register - RW */
 #define E1000_SRWR		0x12018
+#define E1000_EEC_REG		0x12010
+
 #define E1000_I210_FLMNGCTL	0x12038
 #define E1000_I210_FLMNGDATA	0x1203C
 #define E1000_I210_FLMNGCNT	0x12040
@@ -150,6 +152,9 @@
 
 #define E1000_I210_FLA		0x1201C
 
+#define E1000_SHADOWINF		0x12068
+#define E1000_FLFWUPDATE	0x12108
+
 #define E1000_INVM_DATA_REG(_n)	(0x12120 + 4*(_n))
 #define E1000_INVM_SIZE		64 /* Number of INVM Data Registers */
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 24/42] net/e1000/base: move the device reset definition
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (22 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 23/42] net/e1000/base: add missing register defines Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 25/42] net/e1000/base: increased timeout for ME ULP exit Guinan Sun
                     ` (18 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Sasha Neftin

Move the device reset definition from _82575.h file to _defines.h file.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.h   | 1 -
 drivers/net/e1000/base/e1000_defines.h | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index c5e5f8221..e572fe0e1 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -25,7 +25,6 @@
 #define E1000_RAR_ENTRIES_I350	32
 #define E1000_SW_SYNCH_MB	0x00000100
 #define E1000_STAT_DEV_RST_SET	0x00100000
-#define E1000_CTRL_DEV_RST	0x20000000
 
 #ifdef E1000_BIT_FIELDS
 struct e1000_adv_data_desc {
diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index b73a67f30..41a2b5c3f 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -251,6 +251,7 @@
 #define E1000_CTRL_SWDPIO0	0x00400000 /* SWDPIN 0 Input or output */
 #define E1000_CTRL_SWDPIO2	0x01000000 /* SWDPIN 2 input or output */
 #define E1000_CTRL_SWDPIO3	0x02000000 /* SWDPIN 3 input or output */
+#define E1000_CTRL_DEV_RST	0x20000000 /* Device reset */
 #define E1000_CTRL_RST		0x04000000 /* Global reset */
 #define E1000_CTRL_RFCE		0x08000000 /* Receive Flow Control enable */
 #define E1000_CTRL_TFCE		0x10000000 /* Transmit flow control enable */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 25/42] net/e1000/base: increased timeout for ME ULP exit
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (23 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 24/42] net/e1000/base: move the device reset definition Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 26/42] net/e1000/base: add missing device ID Guinan Sun
                     ` (17 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Efrati Nir

Due timing issues in WHL and since recovery by host is
not always supported, increased timeout for ME to finish
ULP exit flow for Nahum before timer expiration.

Signed-off-by: Efrati Nir <nir.efrati@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 1dc29553e..b79e3bad8 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -1268,6 +1268,7 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)
 s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
 {
 	s32 ret_val = E1000_SUCCESS;
+	u8 ulp_exit_timeout = 30;
 	u32 mac_reg;
 	u16 phy_reg;
 	int i = 0;
@@ -1289,10 +1290,12 @@ s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
 			E1000_WRITE_REG(hw, E1000_H2ME, mac_reg);
 		}
 
-		/* Poll up to 300msec for ME to clear ULP_CFG_DONE. */
+		if (hw->mac.type == e1000_pch_cnp)
+			ulp_exit_timeout = 100;
+
 		while (E1000_READ_REG(hw, E1000_FWSM) &
 		       E1000_FWSM_ULP_CFG_DONE) {
-			if (i++ == 30) {
+			if (i++ == ulp_exit_timeout) {
 				ret_val = -E1000_ERR_PHY;
 				goto out;
 			}
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 26/42] net/e1000/base: add missing device ID
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (24 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 25/42] net/e1000/base: increased timeout for ME ULP exit Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 27/42] net/e1000/base: expose more future extended NVM Guinan Sun
                     ` (16 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Kamil Bednarczyk

Adding Intel(R) I210 Gigabit Network Connection 15F6 device ID for SGMII
flashless automotive device.

Signed-off-by: Kamil Bednarczyk <Kamil.Bednarczyk@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.c | 1 +
 drivers/net/e1000/base/e1000_hw.h  | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index a93e8ff03..a9a4493ac 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -326,6 +326,7 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 		break;
 	case E1000_DEV_ID_I210_COPPER_FLASHLESS:
 	case E1000_DEV_ID_I210_SERDES_FLASHLESS:
+	case E1000_DEV_ID_I210_SGMII_FLASHLESS:
 	case E1000_DEV_ID_I210_COPPER:
 	case E1000_DEV_ID_I210_COPPER_OEM1:
 	case E1000_DEV_ID_I210_COPPER_IT:
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 688174200..b71cb4d4d 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -158,6 +158,7 @@ struct e1000_hw;
 #define E1000_DEV_ID_I210_SGMII			0x1538
 #define E1000_DEV_ID_I210_COPPER_FLASHLESS	0x157B
 #define E1000_DEV_ID_I210_SERDES_FLASHLESS	0x157C
+#define E1000_DEV_ID_I210_SGMII_FLASHLESS	0x15F6
 #define E1000_DEV_ID_I211_COPPER		0x1539
 #define E1000_DEV_ID_I354_BACKPLANE_1GBPS	0x1F40
 #define E1000_DEV_ID_I354_SGMII			0x1F41
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 27/42] net/e1000/base: expose more future extended NVM
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (25 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 26/42] net/e1000/base: add missing device ID Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 28/42] net/e1000/base: add definition of EEE 2.5G setup register Guinan Sun
                     ` (15 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Sasha Neftin

Future extended NVM 5 (five) required for a Dynamic Power Gating
control in the MAC.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_regs.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 4af9e1746..71c8d28b0 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -35,6 +35,7 @@
 #define E1000_FEXTNVM	0x00028  /* Future Extended NVM - RW */
 #define E1000_FEXTNVM3	0x0003C  /* Future Extended NVM 3 - RW */
 #define E1000_FEXTNVM4	0x00024  /* Future Extended NVM 4 - RW */
+#define E1000_FEXTNVM5	0x00014  /* Future Extended NVM 5 - RW */
 #define E1000_FEXTNVM6	0x00010  /* Future Extended NVM 6 - RW */
 #define E1000_FEXTNVM7	0x000E4  /* Future Extended NVM 7 - RW */
 #define E1000_FEXTNVM9	0x5BB4  /* Future Extended NVM 9 - RW */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 28/42] net/e1000/base: add definition of EEE 2.5G setup register
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (26 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 27/42] net/e1000/base: expose more future extended NVM Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 29/42] net/e1000/base: remove definitions Guinan Sun
                     ` (14 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Lotem Leder

This is a new register which holds the minimum time in
microseconds for 2500BASE-T operation.

Signed-off-by: Lotem Leder <lotem.leder@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_regs.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 71c8d28b0..e551fca25 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -673,6 +673,7 @@
 #define E1000_LTRC	0x01A0 /* Latency Tolerance Reporting Control */
 #define E1000_EEER	0x0E30 /* Energy Efficient Ethernet "EEE"*/
 #define E1000_EEE_SU	0x0E34 /* EEE Setup */
+#define E1000_EEE_SU_2P5	0x0E3C /* EEE 2.5G Setup */
 #define E1000_TLPIC	0x4148 /* EEE Tx LPI Count - TLPIC */
 #define E1000_RLPIC	0x414C /* EEE Rx LPI Count - RLPIC */
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 29/42] net/e1000/base: remove definitions
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (27 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 28/42] net/e1000/base: add definition of EEE 2.5G setup register Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 30/42] net/e1000/base: remove useless statement Guinan Sun
                     ` (13 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Jeff Kirsher

Remove defines from 82575.h.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.h | 19 -------------------
 1 file changed, 19 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index e572fe0e1..41ead1c68 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -234,25 +234,6 @@ struct e1000_adv_context_desc {
 #define E1000_ADVTXD_POPTS_IPSEC	0x00000400 /* IPSec offload request */
 #define E1000_ADVTXD_PAYLEN_SHIFT	14 /* Adv desc PAYLEN shift */
 
-#define E1000_ADVTXD_MACLEN_SHIFT	9  /* Adv ctxt desc mac len shift */
-#define E1000_ADVTXD_VLAN_SHIFT		16  /* Adv ctxt vlan tag shift */
-#define E1000_ADVTXD_TUCMD_IPV4		0x00000400  /* IP Packet Type: 1=IPv4 */
-#define E1000_ADVTXD_TUCMD_IPV6		0x00000000  /* IP Packet Type: 0=IPv6 */
-#define E1000_ADVTXD_TUCMD_L4T_UDP	0x00000000  /* L4 Packet TYPE of UDP */
-#define E1000_ADVTXD_TUCMD_L4T_TCP	0x00000800  /* L4 Packet TYPE of TCP */
-#define E1000_ADVTXD_TUCMD_L4T_SCTP	0x00001000  /* L4 Packet TYPE of SCTP */
-#define E1000_ADVTXD_TUCMD_IPSEC_TYPE_ESP	0x00002000 /* IPSec Type ESP */
-/* IPSec Encrypt Enable for ESP */
-#define E1000_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN	0x00004000
-/* Req requires Markers and CRC */
-#define E1000_ADVTXD_TUCMD_MKRREQ	0x00002000
-#define E1000_ADVTXD_L4LEN_SHIFT	8  /* Adv ctxt L4LEN shift */
-#define E1000_ADVTXD_MSS_SHIFT		16  /* Adv ctxt MSS shift */
-/* Adv ctxt IPSec SA IDX mask */
-#define E1000_ADVTXD_IPSEC_SA_INDEX_MASK	0x000000FF
-/* Adv ctxt IPSec ESP len mask */
-#define E1000_ADVTXD_IPSEC_ESP_LEN_MASK		0x000000FF
-
 /* Additional Transmit Descriptor Control definitions */
 #define E1000_TXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Tx Queue */
 #define E1000_TXDCTL_SWFLSH		0x04000000 /* Tx Desc. wbk flushing */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 30/42] net/e1000/base: remove useless statement
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (28 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 29/42] net/e1000/base: remove definitions Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 31/42] net/e1000/base: add missed define for VFTA Guinan Sun
                     ` (12 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Jeb Cramer

As it stands now, this fix will not change the current functionality
of the code. In addition, we remove the comment that seemed to be
a copy/paste from a separate implementation.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index b79e3bad8..9b9cc7d90 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -4113,13 +4113,6 @@ STATIC s32 e1000_update_nvm_checksum_spt(struct e1000_hw *hw)
 	if (ret_val)
 		goto release;
 
-	/* And invalidate the previously valid segment by setting
-	 * its signature word (0x13) high_byte to 0b. This can be
-	 * done without an erase because flash erase sets all bits
-	 * to 1's. We can write 1's to 0's without an erase
-	 */
-	act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1;
-
 	/* offset in words but we read dword*/
 	act_offset = old_bank_offset + E1000_ICH_NVM_SIG_WORD - 1;
 	ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 31/42] net/e1000/base: add missed define for VFTA
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (29 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 30/42] net/e1000/base: remove useless statement Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 32/42] net/e1000/base: modify flow control setup Guinan Sun
                     ` (11 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Sasha Neftin

VLAN filtering using the VFTA (VLAN Filter Table Array) and
should be initialized prior to setting rx mode.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 41a2b5c3f..3d015fb20 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -1392,6 +1392,7 @@
 #define E1000_MDIC_ERROR	0x40000000
 #define E1000_MDIC_DEST		0x80000000
 
+#define E1000_VFTA_BLOCK_SIZE	8
 /* SerDes Control */
 #define E1000_GEN_CTL_READY		0x80000000
 #define E1000_GEN_CTL_ADDRESS_SHIFT	8
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 32/42] net/e1000/base: modify flow control setup
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (30 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 31/42] net/e1000/base: add missed define for VFTA Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 33/42] net/e1000/base: led blinking fix for i210 Guinan Sun
                     ` (10 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Efrati Nir

Customers had a problem with large pings after connected standby.
This is due to the requirement of maintaining link after CS - the driver
blocks resets during "AdapterStart" and skips flow control setup.
Added condition in e1000_setup_link_ich8lan.c function that always setup
flow control, and setup physical interface only when no need to block
resets.

Signed-off-by: Efrati Nir <nir.efrati@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.c | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 9b9cc7d90..85344ebeb 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -5200,9 +5200,6 @@ STATIC s32 e1000_setup_link_ich8lan(struct e1000_hw *hw)
 
 	DEBUGFUNC("e1000_setup_link_ich8lan");
 
-	if (hw->phy.ops.check_reset_block(hw))
-		return E1000_SUCCESS;
-
 	/* ICH parts do not have a word in the NVM to determine
 	 * the default flow control setting, so we explicitly
 	 * set it to full.
@@ -5218,10 +5215,12 @@ STATIC s32 e1000_setup_link_ich8lan(struct e1000_hw *hw)
 	DEBUGOUT1("After fix-ups FlowControl is now = %x\n",
 		hw->fc.current_mode);
 
-	/* Continue to configure the copper link. */
-	ret_val = hw->mac.ops.setup_physical_interface(hw);
-	if (ret_val)
-		return ret_val;
+	if (!hw->phy.ops.check_reset_block(hw)) {
+		/* Continue to configure the copper link. */
+		ret_val = hw->mac.ops.setup_physical_interface(hw);
+		if (ret_val)
+			return ret_val;
+	}
 
 	E1000_WRITE_REG(hw, E1000_FCTTV, hw->fc.pause_time);
 	if ((hw->phy.type == e1000_phy_82578) ||
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 33/42] net/e1000/base: led blinking fix for i210
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (31 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 32/42] net/e1000/base: modify flow control setup Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 34/42] net/e1000/base: expose new FEXTNVM registers and masks Guinan Sun
                     ` (9 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Maciej Hefczyc

Added initialization of identification LED.

Signed-off-by: Maciej Hefczyc <maciej.hefczyc@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i210.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index 553803261..d32b0f089 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -925,6 +925,7 @@ STATIC s32 e1000_get_cfg_done_i210(struct e1000_hw *hw)
 s32 e1000_init_hw_i210(struct e1000_hw *hw)
 {
 	s32 ret_val;
+	struct e1000_mac_info *mac = &hw->mac;
 
 	DEBUGFUNC("e1000_init_hw_i210");
 	if ((hw->mac.type >= e1000_i210) &&
@@ -934,6 +935,10 @@ s32 e1000_init_hw_i210(struct e1000_hw *hw)
 			return ret_val;
 	}
 	hw->phy.ops.get_cfg_done = e1000_get_cfg_done_i210;
+
+	/* Initialize identification LED */
+	ret_val = mac->ops.id_led_init(hw);
+
 	ret_val = e1000_init_hw_base(hw);
 	return ret_val;
 }
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 34/42] net/e1000/base: expose new FEXTNVM registers and masks
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (32 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 33/42] net/e1000/base: led blinking fix for i210 Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 35/42] net/e1000/base: cleanup duplicate defines Guinan Sun
                     ` (8 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Nir Efrati

Adding defines for FEXTNVM8 and FEXTNVM12 registers with new masks for
future use.

Signed-off-by: Nir Efrati <nir.efrati@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.h | 3 ++-
 drivers/net/e1000/base/e1000_regs.h    | 2 ++
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/base/e1000_ich8lan.h
index bfee467b3..3be3ee246 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.h
+++ b/drivers/net/e1000/base/e1000_ich8lan.h
@@ -92,11 +92,12 @@
 #if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 #define E1000_FEXTNVM7_DISABLE_SMB_PERST	0x00000020
 #endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
+#define E1000_FEXTNVM8_UNBIND_DPG_FROM_MPHY	0x00000400
 #define E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS	0x00000800
 #define E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS	0x00001000
 #define E1000_FEXTNVM11_DISABLE_PB_READ		0x00000200
 #define E1000_FEXTNVM11_DISABLE_MULR_FIX	0x00002000
-
+#define E1000_FEXTNVM12_DONT_WAK_DPG_CLKREQ	0x00001000
 /* bit24: RXDCTL thresholds granularity: 0 - cache lines, 1 - descriptors */
 #define E1000_RXDCTL_THRESH_UNIT_DESC	0x01000000
 
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index e551fca25..b867ba67a 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -38,8 +38,10 @@
 #define E1000_FEXTNVM5	0x00014  /* Future Extended NVM 5 - RW */
 #define E1000_FEXTNVM6	0x00010  /* Future Extended NVM 6 - RW */
 #define E1000_FEXTNVM7	0x000E4  /* Future Extended NVM 7 - RW */
+#define E1000_FEXTNVM8	0x5BB0  /* Future Extended NVM 8 - RW */
 #define E1000_FEXTNVM9	0x5BB4  /* Future Extended NVM 9 - RW */
 #define E1000_FEXTNVM11	0x5BBC  /* Future Extended NVM 11 - RW */
+#define E1000_FEXTNVM12	0x5BC0  /* Future Extended NVM 12 - RW */
 #define E1000_PCIEANACFG	0x00F18 /* PCIE Analog Config */
 #define E1000_FCT	0x00030  /* Flow Control Type - RW */
 #define E1000_CONNSW	0x00034  /* Copper/Fiber switch control - RW */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 35/42] net/e1000/base: cleanup duplicate defines
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (33 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 34/42] net/e1000/base: expose new FEXTNVM registers and masks Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 36/42] net/e1000/base: add support for Nahum10 Guinan Sun
                     ` (7 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Jeff Kirsher

Now that more than one silicon family uses the filter defines for ETQF,
move the defines out of the 82575 silicon family header, into the
general register/defines location.

This will reduce the duplicate defines for drivers that support all the
silicon families in one driver.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.h | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index 41ead1c68..14887e25f 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -273,9 +273,6 @@ struct e1000_adv_context_desc {
 #define E1000_IMS_LSECPNS	E1000_ICR_LSECPNS /* PN threshold - server */
 #define E1000_ICS_LSECPNS	E1000_ICR_LSECPNS /* PN threshold - server */
 
-/* ETQF register bit definitions */
-#define E1000_ETQF_FILTER_ENABLE	(1 << 26)
-#define E1000_ETQF_IMM_INT		(1 << 29)
 /*
  * ETQF filter list: one static filter per filter consumer. This is
  *                   to avoid filter collisions later. Add new filters
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 36/42] net/e1000/base: add support for Nahum10
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (34 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 35/42] net/e1000/base: cleanup duplicate defines Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 37/42] net/e1000/base: add fall-through comments for switch cases Guinan Sun
                     ` (6 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Roman Fridlyand

Add support to a new MAC type (for Nahum10).

Signed-off-by: Roman Fridlyand <roman.fridlyand@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_hw.h      | 1 +
 drivers/net/e1000/base/e1000_ich8lan.c | 9 +++++++--
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index b71cb4d4d..11acec27e 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -212,6 +212,7 @@ enum e1000_mac_type {
 	e1000_pch_lpt,
 	e1000_pch_spt,
 	e1000_pch_cnp,
+	e1000_pch_adp,
 	e1000_82575,
 	e1000_82576,
 	e1000_82580,
diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 85344ebeb..61dcc1e61 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -318,6 +318,7 @@ STATIC s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
 	case e1000_pch_lpt:
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
+	case e1000_pch_adp:
 		if (e1000_phy_is_accessible_pchlan(hw))
 			break;
 
@@ -467,6 +468,7 @@ STATIC s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
 		case e1000_pch_lpt:
 		case e1000_pch_spt:
 		case e1000_pch_cnp:
+		case e1000_pch_adp:
 			/* In case the PHY needs to be in mdio slow mode,
 			 * set slow mode and try to get the PHY id again.
 			 */
@@ -772,12 +774,11 @@ STATIC s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 	case e1000_pch_lpt:
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
-#ifndef NO_NON_BLOCKING_PHY_MTA_UPDATE_SUPPORT
+	case e1000_pch_adp:
 		/* multicast address update for pch2 */
 		mac->ops.update_mc_addr_list =
 			e1000_update_mc_addr_list_pch2lan;
 		/* fall-through */
-#endif
 	case e1000_pchlan:
 #if defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT)
 		/* save PCH revision_id */
@@ -1764,6 +1765,7 @@ void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw)
 	case e1000_pch_lpt:
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
+	case e1000_pch_adp:
 		hw->phy.ops.init_params = e1000_init_phy_params_pchlan;
 		break;
 	default:
@@ -2231,6 +2233,7 @@ STATIC s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
 	case e1000_pch_lpt:
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
+	case e1000_pch_adp:
 		sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M;
 		break;
 	default:
@@ -3358,6 +3361,7 @@ STATIC s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
 	switch (hw->mac.type) {
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
+	case e1000_pch_adp:
 		bank1_offset = nvm->flash_bank_size;
 		act_offset = E1000_ICH_NVM_SIG_WORD;
 
@@ -4329,6 +4333,7 @@ STATIC s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)
 	case e1000_pch_lpt:
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
+	case e1000_pch_adp:
 		word = NVM_COMPAT;
 		valid_csum_mask = NVM_COMPAT_VALID_CSUM;
 		break;
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 37/42] net/e1000/base: add fall-through comments for switch cases
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (35 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 36/42] net/e1000/base: add support for Nahum10 Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 38/42] net/e1000/base: modify typo in Alder Lake brand name Guinan Sun
                     ` (5 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Jeb Cramer

Add fall-through comments to cases without break statements.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_vf.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_vf.c b/drivers/net/e1000/base/e1000_vf.c
index 543fa7741..8d5427af4 100644
--- a/drivers/net/e1000/base/e1000_vf.c
+++ b/drivers/net/e1000/base/e1000_vf.c
@@ -462,8 +462,10 @@ s32 e1000_promisc_set_vf(struct e1000_hw *hw, enum e1000_promisc_type type)
 		break;
 	case e1000_promisc_enabled:
 		msgbuf |= E1000_VF_SET_PROMISC_MULTICAST;
+		/* Fall-through */
 	case e1000_promisc_unicast:
 		msgbuf |= E1000_VF_SET_PROMISC_UNICAST;
+		/* Fall-through */
 	case e1000_promisc_disabled:
 		break;
 	default:
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 38/42] net/e1000/base: modify typo in Alder Lake brand name
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (36 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 37/42] net/e1000/base: add fall-through comments for switch cases Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 39/42] net/e1000/base: introduce DPGFR register Guinan Sun
                     ` (4 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Sasha Neftin

Fix typo in brand name.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.c | 7 +++++++
 drivers/net/e1000/base/e1000_hw.h  | 4 ++++
 2 files changed, 11 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index a9a4493ac..352e31932 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -290,6 +290,12 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 	case E1000_DEV_ID_PCH_ICP_I219_V9:
 		mac->type = e1000_pch_cnp;
 		break;
+	case E1000_DEV_ID_PCH_ADL_I219_LM16:
+	case E1000_DEV_ID_PCH_ADL_I219_V16:
+	case E1000_DEV_ID_PCH_ADL_I219_LM17:
+	case E1000_DEV_ID_PCH_ADL_I219_V17:
+		mac->type = e1000_pch_adp;
+		break;
 	case E1000_DEV_ID_82575EB_COPPER:
 	case E1000_DEV_ID_82575EB_FIBER_SERDES:
 	case E1000_DEV_ID_82575GB_QUAD_COPPER:
@@ -443,6 +449,7 @@ s32 e1000_setup_init_funcs(struct e1000_hw *hw, bool init_device)
 	case e1000_pch_lpt:
 	case e1000_pch_spt:
 	case e1000_pch_cnp:
+	case e1000_pch_adp:
 		e1000_init_function_pointers_ich8lan(hw);
 		break;
 	case e1000_82575:
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 11acec27e..85d09feae 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -124,6 +124,10 @@ struct e1000_hw;
 #define E1000_DEV_ID_PCH_ICP_I219_V8		0x15E0
 #define E1000_DEV_ID_PCH_ICP_I219_LM9		0x15E1
 #define E1000_DEV_ID_PCH_ICP_I219_V9		0x15E2
+#define E1000_DEV_ID_PCH_ADL_I219_LM16		0x1A1E
+#define E1000_DEV_ID_PCH_ADL_I219_V16		0x1A1F
+#define E1000_DEV_ID_PCH_ADL_I219_LM17		0x1A1C
+#define E1000_DEV_ID_PCH_ADL_I219_V17		0x1A1D
 #define E1000_DEV_ID_82576			0x10C9
 #define E1000_DEV_ID_82576_FIBER		0x10E6
 #define E1000_DEV_ID_82576_SERDES		0x10E7
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 39/42] net/e1000/base: introduce DPGFR register
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (37 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 38/42] net/e1000/base: modify typo in Alder Lake brand name Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 40/42] net/e1000/base: remove conditional compilation wrapper Guinan Sun
                     ` (3 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun, Vitaly Lifshits

Defined DPGFR, Dynamic Power Gate Force Control Register.

Signed-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_regs.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index b867ba67a..a60506264 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -43,6 +43,7 @@
 #define E1000_FEXTNVM11	0x5BBC  /* Future Extended NVM 11 - RW */
 #define E1000_FEXTNVM12	0x5BC0  /* Future Extended NVM 12 - RW */
 #define E1000_PCIEANACFG	0x00F18 /* PCIE Analog Config */
+#define E1000_DPGFR	0x00FAC	/* Dynamic Power Gate Force Control Register */
 #define E1000_FCT	0x00030  /* Flow Control Type - RW */
 #define E1000_CONNSW	0x00034  /* Copper/Fiber switch control - RW */
 #define E1000_VET	0x00038  /* VLAN Ether Type - RW */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 40/42] net/e1000/base: remove conditional compilation wrapper
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (38 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 39/42] net/e1000/base: introduce DPGFR register Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 41/42] net/e1000/base: modify copyright Guinan Sun
                     ` (2 subsequent siblings)
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun

Remove conditional compilation statements.

Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c   |  2 +-
 drivers/net/e1000/base/e1000_82575.h   |  2 --
 drivers/net/e1000/base/e1000_defines.h |  9 +--------
 drivers/net/e1000/base/e1000_hw.h      |  4 ----
 drivers/net/e1000/base/e1000_ich8lan.c | 19 -------------------
 drivers/net/e1000/base/e1000_ich8lan.h | 18 ++----------------
 drivers/net/e1000/base/e1000_mac.h     |  2 --
 drivers/net/e1000/base/e1000_manage.c  |  4 ++--
 drivers/net/e1000/base/e1000_regs.h    |  5 +++--
 9 files changed, 9 insertions(+), 56 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 18593552d..db92cc207 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -1595,7 +1595,7 @@ STATIC s32 e1000_setup_serdes_link_82575(struct e1000_hw *hw)
 	case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX:
 		/* disable PCS autoneg and support parallel detect only */
 		pcs_autoneg = false;
-		/* fall through to default case */
+		/* Fall through */
 	default:
 		if (hw->mac.type == e1000_82575 ||
 		    hw->mac.type == e1000_82576) {
diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index 14887e25f..10383b03f 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -26,7 +26,6 @@
 #define E1000_SW_SYNCH_MB	0x00000100
 #define E1000_STAT_DEV_RST_SET	0x00100000
 
-#ifdef E1000_BIT_FIELDS
 struct e1000_adv_data_desc {
 	__le64 buffer_addr;    /* Address of the descriptor's data buffer */
 	union {
@@ -89,7 +88,6 @@ struct e1000_adv_context_desc {
 		} fields;
 	} l4_setup;
 };
-#endif
 
 /* SRRCTL bit definitions */
 #define E1000_SRRCTL_BSIZEPKT_SHIFT		10 /* Shift _right_ */
diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 3d015fb20..c09635344 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -128,9 +128,7 @@
 	E1000_RXDEXT_STATERR_CXE |	\
 	E1000_RXDEXT_STATERR_RXE)
 
-#if !defined(EXTERNAL_RELEASE) || defined(E1000E_MQ)
 #define E1000_MRQC_ENABLE_RSS_2Q		0x00000001
-#endif /* !EXTERNAL_RELEASE || E1000E_MQ */
 #define E1000_MRQC_RSS_FIELD_MASK		0xFFFF0000
 #define E1000_MRQC_RSS_FIELD_IPV4_TCP		0x00010000
 #define E1000_MRQC_RSS_FIELD_IPV4		0x00020000
@@ -1221,9 +1219,7 @@
 #define PCIE_LINK_SPEED_5000		0x02
 #define PCIE_DEVICE_CONTROL2_16ms	0x0005
 
-#ifndef ETH_ADDR_LEN
 #define ETH_ADDR_LEN			6
-#endif
 
 #define PHY_REVISION_MASK		0xFFFFFFF0
 #define MAX_PHY_REG_ADDRESS		0x1F  /* 5 bit address bus (0-0x1F) */
@@ -1490,10 +1486,7 @@
 /* Lan ID bit field offset in status register */
 #define E1000_STATUS_LAN_ID_OFFSET	2
 #define E1000_VFTA_ENTRIES		128
-#ifndef E1000_UNUSEDARG
+
 #define E1000_UNUSEDARG
-#endif /* E1000_UNUSEDARG */
-#ifndef ERROR_REPORT
 #define ERROR_REPORT(fmt)	do { } while (0)
-#endif /* ERROR_REPORT */
 #endif /* _E1000_DEFINES_H_ */
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 85d09feae..6e2697248 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -931,7 +931,6 @@ struct e1000_shadow_ram {
 
 #define E1000_SHADOW_RAM_WORDS		2048
 
-#ifdef ULP_SUPPORT
 /* I218 PHY Ultra Low Power (ULP) states */
 enum e1000_ulp_state {
 	e1000_ulp_state_unknown,
@@ -939,7 +938,6 @@ enum e1000_ulp_state {
 	e1000_ulp_state_on,
 };
 
-#endif /* ULP_SUPPORT */
 struct e1000_dev_spec_ich8lan {
 	bool kmrn_lock_loss_workaround_enabled;
 	struct e1000_shadow_ram shadow_ram[E1000_SHADOW_RAM_WORDS];
@@ -949,12 +947,10 @@ struct e1000_dev_spec_ich8lan {
 	bool disable_k1_off;
 	bool eee_disable;
 	u16 eee_lp_ability;
-#ifdef ULP_SUPPORT
 	enum e1000_ulp_state ulp_state;
 	bool ulp_capability_disabled;
 	bool during_suspend_flow;
 	bool during_dpg_exit;
-#endif /* ULP_SUPPORT */
 	u16 lat_enc;
 	u16 max_ltr_enc;
 	bool smbus_disable;
diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 61dcc1e61..bf77bfa1d 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -51,11 +51,9 @@ STATIC bool e1000_check_mng_mode_pchlan(struct e1000_hw *hw);
 STATIC int  e1000_rar_set_pch2lan(struct e1000_hw *hw, u8 *addr, u32 index);
 STATIC int  e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index);
 STATIC s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw);
-#ifndef NO_NON_BLOCKING_PHY_MTA_UPDATE_SUPPORT
 STATIC void e1000_update_mc_addr_list_pch2lan(struct e1000_hw *hw,
 					      u8 *mc_addr_list,
 					      u32 mc_addr_count);
-#endif /* NO_NON_BLOCKING_PHY_MTA_UPDATE_SUPPORT */
 STATIC s32  e1000_check_reset_block_ich8lan(struct e1000_hw *hw);
 STATIC s32  e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw);
 STATIC s32  e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active);
@@ -297,13 +295,11 @@ STATIC s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
 	 */
 	e1000_gate_hw_phy_config_ich8lan(hw, true);
 
-#ifdef ULP_SUPPORT
 	/* It is not possible to be certain of the current state of ULP
 	 * so forcibly disable it.
 	 */
 	hw->dev_spec.ich8lan.ulp_state = e1000_ulp_state_unknown;
 
-#endif /* ULP_SUPPORT */
 	ret_val = hw->phy.ops.acquire(hw);
 	if (ret_val) {
 		DEBUGOUT("Failed to initialize PHY flow\n");
@@ -701,9 +697,7 @@ STATIC s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)
 STATIC s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 {
 	struct e1000_mac_info *mac = &hw->mac;
-#if defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT)
 	u16 pci_cfg;
-#endif /* QV_RELEASE || !defined(NO_PCH_LPT_B0_SUPPORT) */
 
 	DEBUGFUNC("e1000_init_mac_params_ich8lan");
 
@@ -780,7 +774,6 @@ STATIC s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 			e1000_update_mc_addr_list_pch2lan;
 		/* fall-through */
 	case e1000_pchlan:
-#if defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT)
 		/* save PCH revision_id */
 		e1000_read_pci_cfg(hw, E1000_PCI_REVISION_ID_REG, &pci_cfg);
 		/* SPT uses full byte for revision ID,
@@ -790,7 +783,6 @@ STATIC s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 			hw->revision_id = (u8)(pci_cfg &= 0x00FF);
 		else
 			hw->revision_id = (u8)(pci_cfg &= 0x000F);
-#endif /* QV_RELEASE || !defined(NO_PCH_LPT_B0_SUPPORT) */
 		/* check management mode */
 		mac->ops.check_mng_mode = e1000_check_mng_mode_pchlan;
 		/* ID LED init */
@@ -1074,7 +1066,6 @@ STATIC s32 e1000_k1_workaround_lpt_lp(struct e1000_hw *hw, bool link)
 	return ret_val;
 }
 
-#ifdef ULP_SUPPORT
 /**
  *  e1000_enable_ulp_lpt_lp - configure Ultra Low Power mode for LynxPoint-LP
  *  @hw: pointer to the HW structure
@@ -1453,7 +1444,6 @@ s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
 	return ret_val;
 }
 
-#endif /* ULP_SUPPORT */
 
 
 /**
@@ -2080,7 +2070,6 @@ STATIC int e1000_rar_set_pch_lpt(struct e1000_hw *hw, u8 *addr, u32 index)
 	return -E1000_ERR_CONFIG;
 }
 
-#ifndef NO_NON_BLOCKING_PHY_MTA_UPDATE_SUPPORT
 /**
  *  e1000_update_mc_addr_list_pch2lan - Update Multicast addresses
  *  @hw: pointer to the HW structure
@@ -2125,7 +2114,6 @@ STATIC void e1000_update_mc_addr_list_pch2lan(struct e1000_hw *hw,
 	hw->phy.ops.release(hw);
 }
 
-#endif /* NO_NON_BLOCKING_PHY_MTA_UPDATE_SUPPORT */
 /**
  *  e1000_check_reset_block_ich8lan - Check if PHY reset is blocked
  *  @hw: pointer to the HW structure
@@ -2677,7 +2665,6 @@ void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw)
 	hw->phy.ops.release(hw);
 }
 
-#ifndef CRC32_OS_SUPPORT
 STATIC u32 e1000_calc_rx_da_crc(u8 mac[])
 {
 	u32 poly = 0xEDB88320;	/* Polynomial for 802.3 CRC calculation */
@@ -2696,7 +2683,6 @@ STATIC u32 e1000_calc_rx_da_crc(u8 mac[])
 	return ~crc;
 }
 
-#endif /* CRC32_OS_SUPPORT */
 /**
  *  e1000_lv_jumbo_workaround_ich8lan - required for jumbo frame operation
  *  with 82579 PHY
@@ -2741,13 +2727,8 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable)
 			mac_addr[4] = (addr_high & 0xFF);
 			mac_addr[5] = ((addr_high >> 8) & 0xFF);
 
-#ifndef CRC32_OS_SUPPORT
 			E1000_WRITE_REG(hw, E1000_PCH_RAICC(i),
 					e1000_calc_rx_da_crc(mac_addr));
-#else /* CRC32_OS_SUPPORT */
-			E1000_WRITE_REG(hw, E1000_PCH_RAICC(i),
-					E1000_CRC32(ETH_ADDR_LEN, mac_addr));
-#endif /* CRC32_OS_SUPPORT */
 		}
 
 		/* Write Rx addresses to the PHY */
diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/base/e1000_ich8lan.h
index 3be3ee246..5e89f4442 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.h
+++ b/drivers/net/e1000/base/e1000_ich8lan.h
@@ -40,22 +40,16 @@
 
 #define E1000_FWSM_WLOCK_MAC_MASK	0x0380
 #define E1000_FWSM_WLOCK_MAC_SHIFT	7
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 #define E1000_FWSM_ULP_CFG_DONE		0x00000400  /* Low power cfg done */
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
 
 /* Shared Receive Address Registers */
 #define E1000_SHRAL_PCH_LPT(_i)		(0x05408 + ((_i) * 8))
 #define E1000_SHRAH_PCH_LPT(_i)		(0x0540C + ((_i) * 8))
 
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 #define E1000_H2ME		0x05B50    /* Host to ME */
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 #define E1000_H2ME_ULP		0x00000800 /* ULP Indication Bit */
 #define E1000_H2ME_ENFORCE_SETTINGS	0x00001000 /* Enforce Settings */
 
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
 #define ID_LED_DEFAULT_ICH8LAN	((ID_LED_DEF1_DEF2 << 12) | \
 				 (ID_LED_OFF1_OFF2 <<  8) | \
 				 (ID_LED_OFF1_ON2  <<  4) | \
@@ -68,11 +62,9 @@
 
 #define E1000_ICH8_LAN_INIT_TIMEOUT	1500
 
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 /* FEXT register bit definition */
 #define E1000_FEXT_PHY_CABLE_DISCONNECTED	0x00000004
 
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
 #define E1000_FEXTNVM_SW_CONFIG		1
 #define E1000_FEXTNVM_SW_CONFIG_ICH8M	(1 << 27) /* different on ICH8M */
 
@@ -89,9 +81,7 @@
 /* bit for disabling packet buffer read */
 #define E1000_FEXTNVM7_DISABLE_PB_READ	0x00040000
 #define E1000_FEXTNVM7_SIDE_CLK_UNGATE	0x00000004
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 #define E1000_FEXTNVM7_DISABLE_SMB_PERST	0x00000020
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
 #define E1000_FEXTNVM8_UNBIND_DPG_FROM_MPHY	0x00000400
 #define E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS	0x00000800
 #define E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS	0x00001000
@@ -174,7 +164,6 @@
 #define CV_SMB_CTRL		PHY_REG(769, 23)
 #define CV_SMB_CTRL_FORCE_SMBUS	0x0001
 
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 /* I218 Ultra Low Power Configuration 1 Register */
 #define I218_ULP_CONFIG1		PHY_REG(779, 16)
 #define I218_ULP_CONFIG1_START		0x0001 /* Start auto ULP config */
@@ -189,7 +178,7 @@
 #define I218_ULP_CONFIG1_DIS_CLR_STICKY_ON_PERST	0x0800
 #define I218_ULP_CONFIG1_DISABLE_SMB_PERST	0x1000 /* Disable on PERST# */
 
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
+
 /* SMBus Address Phy Register */
 #define HV_SMB_ADDR		PHY_REG(768, 26)
 #define HV_SMB_ADDR_MASK	0x007F
@@ -289,9 +278,8 @@
 #define E1000_PCH_RAICC(_n)	(0x05F50 + ((_n) * 4))
 
 #define E1000_PCI_VENDOR_ID_REGISTER	0x00
-#if defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT)
+
 #define E1000_PCI_REVISION_ID_REG	0x08
-#endif /* defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT) */
 void e1000_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
 						 bool state);
 void e1000_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
@@ -305,9 +293,7 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable);
 s32 e1000_read_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 *data);
 s32 e1000_write_emi_reg_locked(struct e1000_hw *hw, u16 addr, u16 data);
 s32 e1000_set_eee_pchlan(struct e1000_hw *hw);
-#ifdef ULP_SUPPORT
 s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx);
 s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force);
-#endif /* ULP_SUPPORT */
 #endif /* _E1000_ICH8LAN_H_ */
 void e1000_demote_ltr(struct e1000_hw *hw, bool demote, bool link);
diff --git a/drivers/net/e1000/base/e1000_mac.h b/drivers/net/e1000/base/e1000_mac.h
index 35a691f63..8a4f1635b 100644
--- a/drivers/net/e1000/base/e1000_mac.h
+++ b/drivers/net/e1000/base/e1000_mac.h
@@ -6,9 +6,7 @@
 #define _E1000_MAC_H_
 
 void e1000_init_mac_ops_generic(struct e1000_hw *hw);
-#ifndef E1000_REMOVED
 #define E1000_REMOVED(a) (0)
-#endif /* E1000_REMOVED */
 void e1000_null_mac_generic(struct e1000_hw *hw);
 s32  e1000_null_ops_generic(struct e1000_hw *hw);
 s32  e1000_null_link_info(struct e1000_hw *hw, u16 *s, u16 *d);
diff --git a/drivers/net/e1000/base/e1000_manage.c b/drivers/net/e1000/base/e1000_manage.c
index 7fb63dd72..74b4480de 100644
--- a/drivers/net/e1000/base/e1000_manage.c
+++ b/drivers/net/e1000/base/e1000_manage.c
@@ -3,6 +3,7 @@
  */
 
 #include "e1000_api.h"
+#include "e1000_manage.h"
 
 /**
  *  e1000_calculate_checksum - Calculate checksum for buffer
@@ -425,6 +426,7 @@ s32 e1000_host_interface_command(struct e1000_hw *hw, u8 *buffer, u32 length)
 
 	return E1000_SUCCESS;
 }
+
 /**
  *  e1000_load_firmware - Writes proxy FW code buffer to host interface
  *                        and execute.
@@ -543,5 +545,3 @@ s32 e1000_load_firmware(struct e1000_hw *hw, u8 *buffer, u32 length)
 
 	return E1000_SUCCESS;
 }
-
-
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index a60506264..786e519e7 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -29,9 +29,7 @@
 #define E1000_SCTL	0x00024  /* SerDes Control - RW */
 #define E1000_FCAL	0x00028  /* Flow Control Address Low - RW */
 #define E1000_FCAH	0x0002C  /* Flow Control Address High -RW */
-#if !defined(EXTERNAL_RELEASE) || defined(ULP_SUPPORT)
 #define E1000_FEXT	0x0002C  /* Future Extended - RW */
-#endif /* !EXTERNAL_RELEASE || ULP_SUPPORT */
 #define E1000_FEXTNVM	0x00028  /* Future Extended NVM - RW */
 #define E1000_FEXTNVM3	0x0003C  /* Future Extended NVM 3 - RW */
 #define E1000_FEXTNVM4	0x00024  /* Future Extended NVM 4 - RW */
@@ -353,6 +351,7 @@
 #define E1000_TSCTC	0x040F8  /* TCP Segmentation Context Tx - R/clr */
 #define E1000_TSCTFC	0x040FC  /* TCP Segmentation Context Tx Fail - R/clr */
 #define E1000_IAC	0x04100  /* Interrupt Assertion Count */
+/* Interrupt Cause */
 #define E1000_ICRXPTC	0x04104  /* Interrupt Cause Rx Pkt Timer Expire Count */
 #define E1000_ICRXATC	0x04108  /* Interrupt Cause Rx Abs Timer Expire Count */
 #define E1000_ICTXPTC	0x0410C  /* Interrupt Cause Tx Pkt Timer Expire Count */
@@ -475,12 +474,14 @@
 #define E1000_WUC	0x05800  /* Wakeup Control - RW */
 #define E1000_WUFC	0x05808  /* Wakeup Filter Control - RW */
 #define E1000_WUS	0x05810  /* Wakeup Status - RO */
+/* Management registers */
 #define E1000_MANC	0x05820  /* Management Control - RW */
 #define E1000_IPAV	0x05838  /* IP Address Valid - RW */
 #define E1000_IP4AT	0x05840  /* IPv4 Address Table - RW Array */
 #define E1000_IP6AT	0x05880  /* IPv6 Address Table - RW Array */
 #define E1000_WUPL	0x05900  /* Wakeup Packet Length - RW */
 #define E1000_WUPM	0x05A00  /* Wakeup Packet Memory - RO A */
+/* MSI-X Table Register Descriptions */
 #define E1000_PBACL	0x05B68  /* MSIx PBA Clear - Read/Write 1's to clear */
 #define E1000_FFLT	0x05F00  /* Flexible Filter Length Table - RW Array */
 #define E1000_HOST_IF	0x08800  /* Host Interface */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 41/42] net/e1000/base: modify copyright
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (39 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 40/42] net/e1000/base: remove conditional compilation wrapper Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 42/42] net/e1000/base: update version Guinan Sun
  2020-06-28  1:28   ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Zhao1, Wei
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun

Modify the copyright of the file header.

Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_80003es2lan.c | 2 +-
 drivers/net/e1000/base/e1000_80003es2lan.h | 2 +-
 drivers/net/e1000/base/e1000_82540.c       | 2 +-
 drivers/net/e1000/base/e1000_82541.c       | 2 +-
 drivers/net/e1000/base/e1000_82541.h       | 2 +-
 drivers/net/e1000/base/e1000_82542.c       | 2 +-
 drivers/net/e1000/base/e1000_82543.c       | 2 +-
 drivers/net/e1000/base/e1000_82543.h       | 2 +-
 drivers/net/e1000/base/e1000_82571.c       | 2 +-
 drivers/net/e1000/base/e1000_82571.h       | 2 +-
 drivers/net/e1000/base/e1000_82575.c       | 2 +-
 drivers/net/e1000/base/e1000_82575.h       | 2 +-
 drivers/net/e1000/base/e1000_api.c         | 2 +-
 drivers/net/e1000/base/e1000_api.h         | 2 +-
 drivers/net/e1000/base/e1000_defines.h     | 2 +-
 drivers/net/e1000/base/e1000_hw.h          | 2 +-
 drivers/net/e1000/base/e1000_i210.c        | 2 +-
 drivers/net/e1000/base/e1000_i210.h        | 2 +-
 drivers/net/e1000/base/e1000_ich8lan.c     | 2 +-
 drivers/net/e1000/base/e1000_ich8lan.h     | 2 +-
 drivers/net/e1000/base/e1000_mac.c         | 2 +-
 drivers/net/e1000/base/e1000_mac.h         | 2 +-
 drivers/net/e1000/base/e1000_manage.c      | 2 +-
 drivers/net/e1000/base/e1000_manage.h      | 3 +--
 drivers/net/e1000/base/e1000_mbx.c         | 2 +-
 drivers/net/e1000/base/e1000_mbx.h         | 2 +-
 drivers/net/e1000/base/e1000_nvm.c         | 2 +-
 drivers/net/e1000/base/e1000_nvm.h         | 2 +-
 drivers/net/e1000/base/e1000_phy.c         | 2 +-
 drivers/net/e1000/base/e1000_phy.h         | 2 +-
 drivers/net/e1000/base/e1000_regs.h        | 2 +-
 drivers/net/e1000/base/e1000_vf.c          | 2 +-
 drivers/net/e1000/base/e1000_vf.h          | 2 +-
 33 files changed, 33 insertions(+), 34 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_80003es2lan.c b/drivers/net/e1000/base/e1000_80003es2lan.c
index b795491c0..243bc6fe3 100644
--- a/drivers/net/e1000/base/e1000_80003es2lan.c
+++ b/drivers/net/e1000/base/e1000_80003es2lan.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /* 80003ES2LAN Gigabit Ethernet Controller (Copper)
diff --git a/drivers/net/e1000/base/e1000_80003es2lan.h b/drivers/net/e1000/base/e1000_80003es2lan.h
index f77beb253..74264362b 100644
--- a/drivers/net/e1000/base/e1000_80003es2lan.h
+++ b/drivers/net/e1000/base/e1000_80003es2lan.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_80003ES2LAN_H_
diff --git a/drivers/net/e1000/base/e1000_82540.c b/drivers/net/e1000/base/e1000_82540.c
index 0d14f6e07..068f9f68f 100644
--- a/drivers/net/e1000/base/e1000_82540.c
+++ b/drivers/net/e1000/base/e1000_82540.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /*
diff --git a/drivers/net/e1000/base/e1000_82541.c b/drivers/net/e1000/base/e1000_82541.c
index eb80873f5..74efd8b6f 100644
--- a/drivers/net/e1000/base/e1000_82541.c
+++ b/drivers/net/e1000/base/e1000_82541.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /*
diff --git a/drivers/net/e1000/base/e1000_82541.h b/drivers/net/e1000/base/e1000_82541.h
index 2f343f182..72fc07d0e 100644
--- a/drivers/net/e1000/base/e1000_82541.h
+++ b/drivers/net/e1000/base/e1000_82541.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_82541_H_
diff --git a/drivers/net/e1000/base/e1000_82542.c b/drivers/net/e1000/base/e1000_82542.c
index 9351ed722..fd473c1c6 100644
--- a/drivers/net/e1000/base/e1000_82542.c
+++ b/drivers/net/e1000/base/e1000_82542.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /*
diff --git a/drivers/net/e1000/base/e1000_82543.c b/drivers/net/e1000/base/e1000_82543.c
index dfde2a8b9..ca273b436 100644
--- a/drivers/net/e1000/base/e1000_82543.c
+++ b/drivers/net/e1000/base/e1000_82543.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /*
diff --git a/drivers/net/e1000/base/e1000_82543.h b/drivers/net/e1000/base/e1000_82543.h
index 51a421190..cf81e4e84 100644
--- a/drivers/net/e1000/base/e1000_82543.h
+++ b/drivers/net/e1000/base/e1000_82543.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_82543_H_
diff --git a/drivers/net/e1000/base/e1000_82571.c b/drivers/net/e1000/base/e1000_82571.c
index 157b953cd..9dc7f6025 100644
--- a/drivers/net/e1000/base/e1000_82571.c
+++ b/drivers/net/e1000/base/e1000_82571.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /* 82571EB Gigabit Ethernet Controller
diff --git a/drivers/net/e1000/base/e1000_82571.h b/drivers/net/e1000/base/e1000_82571.h
index 7cc179b37..0d8412678 100644
--- a/drivers/net/e1000/base/e1000_82571.h
+++ b/drivers/net/e1000/base/e1000_82571.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_82571_H_
diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index db92cc207..cd3b23f18 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /*
diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index 10383b03f..006b37ae9 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_82575_H_
diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index 352e31932..6a2376f40 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_api.h"
diff --git a/drivers/net/e1000/base/e1000_api.h b/drivers/net/e1000/base/e1000_api.h
index d719b691a..6b38e2b7b 100644
--- a/drivers/net/e1000/base/e1000_api.h
+++ b/drivers/net/e1000/base/e1000_api.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_API_H_
diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index c09635344..3fbb6c8ea 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_DEFINES_H_
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 6e2697248..4e93855e7 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_HW_H_
diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index d32b0f089..3c349d33f 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_api.h"
diff --git a/drivers/net/e1000/base/e1000_i210.h b/drivers/net/e1000/base/e1000_i210.h
index 940eee21a..b5cc84766 100644
--- a/drivers/net/e1000/base/e1000_i210.h
+++ b/drivers/net/e1000/base/e1000_i210.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_I210_H_
diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index bf77bfa1d..14f86b7bd 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 /* 82562G 10/100 Network Connection
diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/base/e1000_ich8lan.h
index 5e89f4442..a30b32e97 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.h
+++ b/drivers/net/e1000/base/e1000_ich8lan.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_ICH8LAN_H_
diff --git a/drivers/net/e1000/base/e1000_mac.c b/drivers/net/e1000/base/e1000_mac.c
index 1a2abd9a2..d3b3a6bac 100644
--- a/drivers/net/e1000/base/e1000_mac.c
+++ b/drivers/net/e1000/base/e1000_mac.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_api.h"
diff --git a/drivers/net/e1000/base/e1000_mac.h b/drivers/net/e1000/base/e1000_mac.h
index 8a4f1635b..86fcad23b 100644
--- a/drivers/net/e1000/base/e1000_mac.h
+++ b/drivers/net/e1000/base/e1000_mac.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_MAC_H_
diff --git a/drivers/net/e1000/base/e1000_manage.c b/drivers/net/e1000/base/e1000_manage.c
index 74b4480de..4b8102830 100644
--- a/drivers/net/e1000/base/e1000_manage.c
+++ b/drivers/net/e1000/base/e1000_manage.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_api.h"
diff --git a/drivers/net/e1000/base/e1000_manage.h b/drivers/net/e1000/base/e1000_manage.h
index 45dbb0069..268a13381 100644
--- a/drivers/net/e1000/base/e1000_manage.h
+++ b/drivers/net/e1000/base/e1000_manage.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_MANAGE_H_
@@ -62,5 +62,4 @@ enum e1000_mng_mode {
 
 /* Intel(R) Active Management Technology signature */
 #define E1000_IAMT_SIGNATURE		0x544D4149
-
 #endif
diff --git a/drivers/net/e1000/base/e1000_mbx.c b/drivers/net/e1000/base/e1000_mbx.c
index 3f3b326c6..3f477ddb6 100644
--- a/drivers/net/e1000/base/e1000_mbx.c
+++ b/drivers/net/e1000/base/e1000_mbx.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_mbx.h"
diff --git a/drivers/net/e1000/base/e1000_mbx.h b/drivers/net/e1000/base/e1000_mbx.h
index 683781e21..f3464b49b 100644
--- a/drivers/net/e1000/base/e1000_mbx.h
+++ b/drivers/net/e1000/base/e1000_mbx.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_MBX_H_
diff --git a/drivers/net/e1000/base/e1000_nvm.c b/drivers/net/e1000/base/e1000_nvm.c
index ca87ec122..430fecaf6 100644
--- a/drivers/net/e1000/base/e1000_nvm.c
+++ b/drivers/net/e1000/base/e1000_nvm.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_api.h"
diff --git a/drivers/net/e1000/base/e1000_nvm.h b/drivers/net/e1000/base/e1000_nvm.h
index 38adab528..056f82353 100644
--- a/drivers/net/e1000/base/e1000_nvm.h
+++ b/drivers/net/e1000/base/e1000_nvm.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_NVM_H_
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index 4995578f4..62d0be508 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #include "e1000_api.h"
diff --git a/drivers/net/e1000/base/e1000_phy.h b/drivers/net/e1000/base/e1000_phy.h
index 1c38498d1..81c530858 100644
--- a/drivers/net/e1000/base/e1000_phy.h
+++ b/drivers/net/e1000/base/e1000_phy.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_PHY_H_
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 786e519e7..c76ccb0bb 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_REGS_H_
diff --git a/drivers/net/e1000/base/e1000_vf.c b/drivers/net/e1000/base/e1000_vf.c
index 8d5427af4..4b666b5c6 100644
--- a/drivers/net/e1000/base/e1000_vf.c
+++ b/drivers/net/e1000/base/e1000_vf.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 
diff --git a/drivers/net/e1000/base/e1000_vf.h b/drivers/net/e1000/base/e1000_vf.h
index c05d557f0..4bec21c93 100644
--- a/drivers/net/e1000/base/e1000_vf.h
+++ b/drivers/net/e1000/base/e1000_vf.h
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2001 - 2015 Intel Corporation
+ * Copyright(c) 2001-2020 Intel Corporation
  */
 
 #ifndef _E1000_VF_H_
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v2 42/42] net/e1000/base: update version
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (40 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 41/42] net/e1000/base: modify copyright Guinan Sun
@ 2020-06-24  7:53   ` Guinan Sun
  2020-06-28  1:28   ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Zhao1, Wei
  42 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-06-24  7:53 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Wenzhuo Lu, Guinan Sun

Update base code version in readme.

Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/README | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/README b/drivers/net/e1000/base/README
index 56738d001..b84ee5ad6 100644
--- a/drivers/net/e1000/base/README
+++ b/drivers/net/e1000/base/README
@@ -1,9 +1,9 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2010-2016 Intel Corporation
+ * Copyright(c) 2010-2020 Intel Corporation
  */
 
 This directory contains source code of FreeBSD em & igb drivers of version
-cid-shared-code.2016.11.22 released by ND. The sub-directory of base/
+cid-gigabit.2020.06.05.tar.gz released by ND. The sub-directory of base/
 contains the original source package.
 
 This driver is valid for the product(s) listed below
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [dpdk-dev] [PATCH v2 00/42] update e1000 base code
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
                     ` (41 preceding siblings ...)
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 42/42] net/e1000/base: update version Guinan Sun
@ 2020-06-28  1:28   ` Zhao1, Wei
  42 siblings, 0 replies; 149+ messages in thread
From: Zhao1, Wei @ 2020-06-28  1:28 UTC (permalink / raw)
  To: Sun, GuinanX, dev; +Cc: Guo, Jia, Lu, Wenzhuo, Sun, GuinanX

Hi, guinan

  Please give out test-by for this patch set.

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Guinan Sun
> Sent: Wednesday, June 24, 2020 3:53 PM
> To: dev@dpdk.org
> Cc: Guo, Jia <jia.guo@intel.com>; Lu, Wenzhuo <wenzhuo.lu@intel.com>; Sun,
> GuinanX <guinanx.sun@intel.com>
> Subject: [dpdk-dev] [PATCH v2 00/42] update e1000 base code
> 
> update e1000 base code.
> ---
> v2:
> * Remove codes about i225.
> 
> Guinan Sun (42):
>   net/e1000/base: resolve flash presence for i210 devices
>   net/e1000/base: i210 slow system clock update
>   net/e1000/base: add ICL device id's
>   net/e1000/base: remove shadowing variable declarations
>   net/e1000/base: introduce flags
>   net/e1000/base: modify MAC initialization for i211
>   net/e1000/base: modify parens to match other MAC checks
>   net/e1000/base: expose xmdio methods
>   net/e1000/base: fall through explicitly
>   net/e1000/base: add function parameter descriptions
>   net/e1000/base: modify fall through code comments
>   net/e1000/base: modify klocwork errors
>   net/e1000/base: modify klockwork about unused return values
>   net/e1000/base: improve coding style
>   net/e1000/base: modify HW level time sync mechanisms
>   net/e1000/base: modify description
>   net/e1000/base: remove duplicated codes from 82575
>   net/e1000/base: add definitions for ETQF register bit
>   net/e1000/base: cleanup duplicate declaration
>   net/e1000/base: expose MAC functions
>   net/e1000/base: move definitions from 82575 to defines file
>   net/e1000/base: add define to PCIm function state
>   net/e1000/base: add missing register defines
>   net/e1000/base: move the device reset definition
>   net/e1000/base: increased timeout for ME ULP exit
>   net/e1000/base: add missing device ID
>   net/e1000/base: expose more future extended NVM
>   net/e1000/base: add definition of EEE 2.5G setup register
>   net/e1000/base: remove definitions
>   net/e1000/base: remove useless statement
>   net/e1000/base: add missed define for VFTA
>   net/e1000/base: modify flow control setup
>   net/e1000/base: led blinking fix for i210
>   net/e1000/base: expose new FEXTNVM registers and masks
>   net/e1000/base: cleanup duplicate defines
>   net/e1000/base: add support for Nahum10
>   net/e1000/base: add fall-through comments for switch cases
>   net/e1000/base: modify typo in Alder Lake brand name
>   net/e1000/base: introduce DPGFR register
>   net/e1000/base: remove conditional compilation wrapper
>   net/e1000/base: modify copyright
>   net/e1000/base: update version
> 
>  drivers/net/e1000/Makefile                 |   1 +
>  drivers/net/e1000/base/README              |   4 +-
>  drivers/net/e1000/base/e1000_80003es2lan.c |   3 +-
>  drivers/net/e1000/base/e1000_80003es2lan.h |   2 +-
>  drivers/net/e1000/base/e1000_82540.c       |   2 +-
>  drivers/net/e1000/base/e1000_82541.c       |   2 +-
>  drivers/net/e1000/base/e1000_82541.h       |   2 +-
>  drivers/net/e1000/base/e1000_82542.c       |   2 +-
>  drivers/net/e1000/base/e1000_82543.c       |   2 +-
>  drivers/net/e1000/base/e1000_82543.h       |   2 +-
>  drivers/net/e1000/base/e1000_82571.c       |   2 +-
>  drivers/net/e1000/base/e1000_82571.h       |   2 +-
>  drivers/net/e1000/base/e1000_82575.c       | 523 +++++++--------------
>  drivers/net/e1000/base/e1000_82575.h       |  95 +---
>  drivers/net/e1000/base/e1000_api.c         |  14 +-
>  drivers/net/e1000/base/e1000_api.h         |   3 +-
>  drivers/net/e1000/base/e1000_base.c        | 192 ++++++++
>  drivers/net/e1000/base/e1000_base.h        | 127 +++++
>  drivers/net/e1000/base/e1000_defines.h     |  27 +-
>  drivers/net/e1000/base/e1000_hw.h          |  17 +-
>  drivers/net/e1000/base/e1000_i210.c        | 101 +---
>  drivers/net/e1000/base/e1000_i210.h        |   6 +-
>  drivers/net/e1000/base/e1000_ich8lan.c     | 115 ++---
>  drivers/net/e1000/base/e1000_ich8lan.h     |  28 +-
>  drivers/net/e1000/base/e1000_mac.c         |  13 +-
>  drivers/net/e1000/base/e1000_mac.h         |   5 +-
>  drivers/net/e1000/base/e1000_manage.c      |   6 +-
>  drivers/net/e1000/base/e1000_manage.h      |   3 +-
>  drivers/net/e1000/base/e1000_mbx.c         |   7 +-
>  drivers/net/e1000/base/e1000_mbx.h         |   2 +-
>  drivers/net/e1000/base/e1000_nvm.c         |  16 +-
>  drivers/net/e1000/base/e1000_nvm.h         |   2 +-
>  drivers/net/e1000/base/e1000_phy.c         |  86 +++-
>  drivers/net/e1000/base/e1000_phy.h         |   7 +-
>  drivers/net/e1000/base/e1000_regs.h        |  40 +-
>  drivers/net/e1000/base/e1000_vf.c          |   4 +-
>  drivers/net/e1000/base/e1000_vf.h          |   2 +-
>  drivers/net/e1000/base/meson.build         |   1 +
>  drivers/net/e1000/igb_rxtx.c               |   2 +-
>  39 files changed, 810 insertions(+), 660 deletions(-)  create mode 100644
> drivers/net/e1000/base/e1000_base.c
>  create mode 100644 drivers/net/e1000/base/e1000_base.h
> 
> --
> 2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [dpdk-dev] [PATCH v2 01/42] net/e1000/base: resolve flash presence for i210 devices
  2020-06-24  7:52   ` [dpdk-dev] [PATCH v2 01/42] net/e1000/base: resolve flash presence for i210 devices Guinan Sun
@ 2020-06-29  3:29     ` Yang, Qiming
  0 siblings, 0 replies; 149+ messages in thread
From: Yang, Qiming @ 2020-06-29  3:29 UTC (permalink / raw)
  To: Sun, GuinanX, dev; +Cc: Guo, Jia, Lu, Wenzhuo, Sun, GuinanX, Neftin, Sasha



> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Guinan Sun
> Sent: Wednesday, June 24, 2020 15:53
> To: dev@dpdk.org
> Cc: Guo, Jia <jia.guo@intel.com>; Lu, Wenzhuo <wenzhuo.lu@intel.com>;
> Sun, GuinanX <guinanx.sun@intel.com>; Neftin, Sasha
> <sasha.neftin@intel.com>
> Subject: [dpdk-dev] [PATCH v2 01/42] net/e1000/base: resolve flash
> presence for i210 devices
> 
> There is a conflict with legacy i210.
> This patch is for compatibility with i211.

Confuse commit log and name.
This patch should be add support for i211 and should merge other support for i211 in this patch.

> 
> Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
> Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
> ---
>  drivers/net/e1000/base/e1000_nvm.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/e1000/base/e1000_nvm.c
> b/drivers/net/e1000/base/e1000_nvm.c
> index 56e2db122..4d4a8e04b 100644
> --- a/drivers/net/e1000/base/e1000_nvm.c
> +++ b/drivers/net/e1000/base/e1000_nvm.c
> @@ -749,8 +749,9 @@ s32 e1000_read_pba_string_generic(struct e1000_hw
> *hw, u8 *pba_num,
> 
>  	DEBUGFUNC("e1000_read_pba_string_generic");
> 
> -	if ((hw->mac.type >= e1000_i210) &&
> -	    !e1000_get_flash_presence_i210(hw)) {
> +	if ((hw->mac.type == e1000_i210 ||
> +	     hw->mac.type == e1000_i211) &&
> +	     !e1000_get_flash_presence_i210(hw)) {
>  		DEBUGOUT("Flashless no PBA string\n");
>  		return -E1000_ERR_NVM_PBA_SECTION;
>  	}
> --
> 2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* Re: [dpdk-dev] [PATCH v2 06/42] net/e1000/base: modify MAC initialization for i211
  2020-06-24  7:53   ` [dpdk-dev] [PATCH v2 06/42] net/e1000/base: modify MAC initialization for i211 Guinan Sun
@ 2020-06-29  3:30     ` Yang, Qiming
  0 siblings, 0 replies; 149+ messages in thread
From: Yang, Qiming @ 2020-06-29  3:30 UTC (permalink / raw)
  To: Sun, GuinanX, dev; +Cc: Guo, Jia, Lu, Wenzhuo, Sun, GuinanX, Fujinaka, Todd

This one should merge to the first patch.

> -----Original Message-----
> From: dev <dev-bounces@dpdk.org> On Behalf Of Guinan Sun
> Sent: Wednesday, June 24, 2020 15:53
> To: dev@dpdk.org
> Cc: Guo, Jia <jia.guo@intel.com>; Lu, Wenzhuo <wenzhuo.lu@intel.com>;
> Sun, GuinanX <guinanx.sun@intel.com>; Fujinaka, Todd
> <todd.fujinaka@intel.com>
> Subject: [dpdk-dev] [PATCH v2 06/42] net/e1000/base: modify MAC
> initialization for i211
> 
> Introduce SF/FW syncronization, acquire and release for i211 devices.
> 
> Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
> Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
> ---
>  drivers/net/e1000/base/e1000_82575.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/net/e1000/base/e1000_82575.c
> b/drivers/net/e1000/base/e1000_82575.c
> index 4c3611c6d..952bb4235 100644
> --- a/drivers/net/e1000/base/e1000_82575.c
> +++ b/drivers/net/e1000/base/e1000_82575.c
> @@ -486,7 +486,7 @@ STATIC s32 e1000_init_mac_params_82575(struct
> e1000_hw *hw)
>  	/* acquire SW_FW sync */
>  	mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_82575;
>  	mac->ops.release_swfw_sync = e1000_release_swfw_sync_82575;
> -	if (mac->type >= e1000_i210) {
> +	if (mac->type == e1000_i210 || mac->type == e1000_i211) {
>  		mac->ops.acquire_swfw_sync =
> e1000_acquire_swfw_sync_i210;
>  		mac->ops.release_swfw_sync =
> e1000_release_swfw_sync_i210;
>  	}
> --
> 2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 00/27] update e1000 base code
  2020-06-22  6:45 [dpdk-dev] [PATCH 00/70] update e1000 base code Guinan Sun
                   ` (70 preceding siblings ...)
  2020-06-24  7:52 ` [dpdk-dev] [PATCH v2 00/42] update e1000 base code Guinan Sun
@ 2020-07-06  8:11 ` Guinan Sun
  2020-07-06  8:11   ` [dpdk-dev] [PATCH v3 01/27] net/e1000/base: i210 slow system clock update Guinan Sun
                     ` (27 more replies)
  71 siblings, 28 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:11 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun

update e1000 base code.

source code of e1000 driver:
cid-gigabit.2020.06.05.tar.gz released by the team which develop
basic drivers for any e1000 NIC.

changelog in ND share repo:
From 99bddf09773a ("e1000_shared: Remove #ifdef CLARKVILLE_HW")
To 64edeeac42a7 ("e1000-shared: Fix LTR algorithm for i225 device")
Tested-by: Bo Chen <BoX.C.Chen@intel.com>
---
v3:
* Merge some patches.
* Modify some commit messages.

v2:
* Remove codes about i225.

Guinan Sun (27):
  net/e1000/base: i210 slow system clock update
  net/e1000/base: add ICL device ID
  net/e1000/base: introduce flags
  net/e1000/base: add support for i211
  net/e1000/base: expose xmdio methods
  net/e1000/base: fall through explicitly
  net/e1000/base: add function parameter descriptions
  net/e1000/base: improve code style and fix klocwork errors
  net/e1000/base: modify HW level time sync mechanisms
  net/e1000/base: remove duplicated codes
  net/e1000/base: expose MAC functions
  net/e1000/base: add define to PCIm function state
  net/e1000/base: add missing register defines
  net/e1000/base: increased timeout for ME ULP exit
  net/e1000/base: add missing device ID
  net/e1000/base: expose more future extended NVM
  net/e1000/base: remove useless statement
  net/e1000/base: add missed define for VFTA
  net/e1000/base: modify flow control setup
  net/e1000/base: led blinking fix for i210
  net/e1000/base: expose new FEXTNVM registers and masks
  net/e1000/base: add support for Nahum10
  net/e1000/base: add ADL device ID
  net/e1000/base: introduce DPGFR register
  net/e1000/base: cleanup pre-processor tags
  net/e1000/base: modify copyright
  net/e1000/base: update version

 drivers/net/e1000/Makefile                 |   1 +
 drivers/net/e1000/base/README              |   4 +-
 drivers/net/e1000/base/e1000_80003es2lan.c |   3 +-
 drivers/net/e1000/base/e1000_80003es2lan.h |   2 +-
 drivers/net/e1000/base/e1000_82540.c       |   2 +-
 drivers/net/e1000/base/e1000_82541.c       |   2 +-
 drivers/net/e1000/base/e1000_82541.h       |   2 +-
 drivers/net/e1000/base/e1000_82542.c       |   2 +-
 drivers/net/e1000/base/e1000_82543.c       |   2 +-
 drivers/net/e1000/base/e1000_82543.h       |   2 +-
 drivers/net/e1000/base/e1000_82571.c       |   2 +-
 drivers/net/e1000/base/e1000_82571.h       |   2 +-
 drivers/net/e1000/base/e1000_82575.c       | 521 +++++++--------------
 drivers/net/e1000/base/e1000_82575.h       |  95 +---
 drivers/net/e1000/base/e1000_api.c         |  14 +-
 drivers/net/e1000/base/e1000_api.h         |   3 +-
 drivers/net/e1000/base/e1000_base.c        | 190 ++++++++
 drivers/net/e1000/base/e1000_base.h        | 127 +++++
 drivers/net/e1000/base/e1000_defines.h     |  27 +-
 drivers/net/e1000/base/e1000_hw.h          |  17 +-
 drivers/net/e1000/base/e1000_i210.c        | 101 +---
 drivers/net/e1000/base/e1000_i210.h        |   6 +-
 drivers/net/e1000/base/e1000_ich8lan.c     | 115 ++---
 drivers/net/e1000/base/e1000_ich8lan.h     |  27 +-
 drivers/net/e1000/base/e1000_mac.c         |  13 +-
 drivers/net/e1000/base/e1000_mac.h         |   5 +-
 drivers/net/e1000/base/e1000_manage.c      |   6 +-
 drivers/net/e1000/base/e1000_manage.h      |   3 +-
 drivers/net/e1000/base/e1000_mbx.c         |   7 +-
 drivers/net/e1000/base/e1000_mbx.h         |   2 +-
 drivers/net/e1000/base/e1000_nvm.c         |  16 +-
 drivers/net/e1000/base/e1000_nvm.h         |   2 +-
 drivers/net/e1000/base/e1000_phy.c         |  86 +++-
 drivers/net/e1000/base/e1000_phy.h         |   7 +-
 drivers/net/e1000/base/e1000_regs.h        |  39 +-
 drivers/net/e1000/base/e1000_vf.c          |   4 +-
 drivers/net/e1000/base/e1000_vf.h          |   2 +-
 drivers/net/e1000/base/meson.build         |   1 +
 drivers/net/e1000/igb_rxtx.c               |   2 +-
 39 files changed, 805 insertions(+), 659 deletions(-)
 create mode 100644 drivers/net/e1000/base/e1000_base.c
 create mode 100644 drivers/net/e1000/base/e1000_base.h

-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 01/27] net/e1000/base: i210 slow system clock update
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
@ 2020-07-06  8:11   ` Guinan Sun
  2020-07-06  8:11   ` [dpdk-dev] [PATCH v3 02/27] net/e1000/base: add ICL device ID Guinan Sun
                     ` (26 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:11 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Todd Fujinaka

This code is required for the update for system clock.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i210.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index 9298223c3..d9cd1a084 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -900,6 +900,8 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 	u16 nvm_word, phy_word, pci_word, tmp_nvm;
 	int i;
 
+	/* Get PHY semaphore */
+	hw->phy.ops.acquire(hw);
 	/* Get and set needed register values */
 	wuc = E1000_READ_REG(hw, E1000_WUC);
 	mdicnfg = E1000_READ_REG(hw, E1000_MDICNFG);
@@ -915,8 +917,11 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 	phy_word = E1000_PHY_PLL_UNCONF;
 	for (i = 0; i < E1000_MAX_PLL_TRIES; i++) {
 		/* check current state directly from internal PHY */
-		e1000_read_phy_reg_gs40g(hw, (E1000_PHY_PLL_FREQ_PAGE |
-					 E1000_PHY_PLL_FREQ_REG), &phy_word);
+		e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0xFC);
+		usec_delay(20);
+		e1000_read_phy_reg_mdic(hw, E1000_PHY_PLL_FREQ_REG, &phy_word);
+		usec_delay(20);
+		e1000_write_phy_reg_mdic(hw, GS40G_PAGE_SELECT, 0);
 		if ((phy_word & E1000_PHY_PLL_UNCONF)
 		    != E1000_PHY_PLL_UNCONF) {
 			ret_val = E1000_SUCCESS;
@@ -950,6 +955,8 @@ STATIC s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
 	}
 	/* restore MDICNFG setting */
 	E1000_WRITE_REG(hw, E1000_MDICNFG, mdicnfg);
+	/* Release PHY semaphore */
+	hw->phy.ops.release(hw);
 	return ret_val;
 }
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 02/27] net/e1000/base: add ICL device ID
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
  2020-07-06  8:11   ` [dpdk-dev] [PATCH v3 01/27] net/e1000/base: i210 slow system clock update Guinan Sun
@ 2020-07-06  8:11   ` Guinan Sun
  2020-07-06  8:11   ` [dpdk-dev] [PATCH v3 03/27] net/e1000/base: introduce flags Guinan Sun
                     ` (25 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:11 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Lotem Leder

This patch contains a preliminary support for new LAN device ID.

Signed-off-by: Lotem Leder <lotem.leder@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.c | 4 ++++
 drivers/net/e1000/base/e1000_hw.h  | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index 718952801..a93e8ff03 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -284,6 +284,10 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 	case E1000_DEV_ID_PCH_CNP_I219_V6:
 	case E1000_DEV_ID_PCH_CNP_I219_LM7:
 	case E1000_DEV_ID_PCH_CNP_I219_V7:
+	case E1000_DEV_ID_PCH_ICP_I219_LM8:
+	case E1000_DEV_ID_PCH_ICP_I219_V8:
+	case E1000_DEV_ID_PCH_ICP_I219_LM9:
+	case E1000_DEV_ID_PCH_ICP_I219_V9:
 		mac->type = e1000_pch_cnp;
 		break;
 	case E1000_DEV_ID_82575EB_COPPER:
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 9793b724e..933a9204c 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -120,6 +120,10 @@ struct e1000_hw;
 #define E1000_DEV_ID_PCH_CNP_I219_V6		0x15BE
 #define E1000_DEV_ID_PCH_CNP_I219_LM7		0x15BB
 #define E1000_DEV_ID_PCH_CNP_I219_V7		0x15BC
+#define E1000_DEV_ID_PCH_ICP_I219_LM8		0x15DF
+#define E1000_DEV_ID_PCH_ICP_I219_V8		0x15E0
+#define E1000_DEV_ID_PCH_ICP_I219_LM9		0x15E1
+#define E1000_DEV_ID_PCH_ICP_I219_V9		0x15E2
 #define E1000_DEV_ID_82576			0x10C9
 #define E1000_DEV_ID_82576_FIBER		0x10E6
 #define E1000_DEV_ID_82576_SERDES		0x10E7
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 03/27] net/e1000/base: introduce flags
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
  2020-07-06  8:11   ` [dpdk-dev] [PATCH v3 01/27] net/e1000/base: i210 slow system clock update Guinan Sun
  2020-07-06  8:11   ` [dpdk-dev] [PATCH v3 02/27] net/e1000/base: add ICL device ID Guinan Sun
@ 2020-07-06  8:11   ` Guinan Sun
  2020-07-06  8:11   ` [dpdk-dev] [PATCH v3 04/27] net/e1000/base: add support for i211 Guinan Sun
                     ` (24 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:11 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Introduce flags to make flexible adjusting
number of outstanding requests.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/base/e1000_ich8lan.h
index 699a92c4b..9c21396c3 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.h
+++ b/drivers/net/e1000/base/e1000_ich8lan.h
@@ -103,8 +103,8 @@
 #define NVM_SIZE_MULTIPLIER 4096  /*multiplier for NVMS field*/
 #define E1000_FLASH_BASE_ADDR 0xE000 /*offset of NVM access regs*/
 #define E1000_CTRL_EXT_NVMVS 0x3 /*NVM valid sector */
-#define E1000_TARC0_CB_MULTIQ_3_REQ	(1 << 28 | 1 << 29)
-#define E1000_TARC0_CB_MULTIQ_2_REQ	(1 << 29)
+#define E1000_TARC0_CB_MULTIQ_3_REQ	0x30000000
+#define E1000_TARC0_CB_MULTIQ_2_REQ	0x20000000
 #define PCIE_ICH8_SNOOP_ALL	PCIE_NO_SNOOP_ALL
 
 #define E1000_ICH_RAR_ENTRIES	7
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 04/27] net/e1000/base: add support for i211
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (2 preceding siblings ...)
  2020-07-06  8:11   ` [dpdk-dev] [PATCH v3 03/27] net/e1000/base: introduce flags Guinan Sun
@ 2020-07-06  8:11   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 05/27] net/e1000/base: expose xmdio methods Guinan Sun
                     ` (23 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:11 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Todd Fujinaka, Sasha Neftin

Add support SF/FW syncronization.
Add support to print PBA when using flashless.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 4 ++--
 drivers/net/e1000/base/e1000_nvm.c   | 5 +++--
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 4c3611c6d..8db287251 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -435,7 +435,7 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	if ((mac->type == e1000_i210) || (mac->type == e1000_i211))
 		mac->ops.init_hw = e1000_init_hw_i210;
 	else
-	mac->ops.init_hw = e1000_init_hw_82575;
+		mac->ops.init_hw = e1000_init_hw_82575;
 	/* link setup */
 	mac->ops.setup_link = e1000_setup_link_generic;
 	/* physical interface link setup */
@@ -486,7 +486,7 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	/* acquire SW_FW sync */
 	mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_82575;
 	mac->ops.release_swfw_sync = e1000_release_swfw_sync_82575;
-	if (mac->type >= e1000_i210) {
+	if (mac->type == e1000_i210 || mac->type == e1000_i211) {
 		mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_i210;
 		mac->ops.release_swfw_sync = e1000_release_swfw_sync_i210;
 	}
diff --git a/drivers/net/e1000/base/e1000_nvm.c b/drivers/net/e1000/base/e1000_nvm.c
index 56e2db122..4d4a8e04b 100644
--- a/drivers/net/e1000/base/e1000_nvm.c
+++ b/drivers/net/e1000/base/e1000_nvm.c
@@ -749,8 +749,9 @@ s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
 
 	DEBUGFUNC("e1000_read_pba_string_generic");
 
-	if ((hw->mac.type >= e1000_i210) &&
-	    !e1000_get_flash_presence_i210(hw)) {
+	if ((hw->mac.type == e1000_i210 ||
+	     hw->mac.type == e1000_i211) &&
+	     !e1000_get_flash_presence_i210(hw)) {
 		DEBUGOUT("Flashless no PBA string\n");
 		return -E1000_ERR_NVM_PBA_SECTION;
 	}
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 05/27] net/e1000/base: expose xmdio methods
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (3 preceding siblings ...)
  2020-07-06  8:11   ` [dpdk-dev] [PATCH v3 04/27] net/e1000/base: add support for i211 Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 06/27] net/e1000/base: fall through explicitly Guinan Sun
                     ` (22 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:12 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Neftin Sasha

move read and write xmdio methods to e1000_phy.

Signed-off-by: Neftin Sasha <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_i210.c | 71 ----------------------------
 drivers/net/e1000/base/e1000_i210.h |  4 --
 drivers/net/e1000/base/e1000_phy.c  | 72 +++++++++++++++++++++++++++++
 drivers/net/e1000/base/e1000_phy.h  |  5 ++
 4 files changed, 77 insertions(+), 75 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index d9cd1a084..5c2fe8a3e 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -815,77 +815,6 @@ STATIC s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data)
 	return ret_val;
 }
 
-/**
- *  __e1000_access_xmdio_reg - Read/write XMDIO register
- *  @hw: pointer to the HW structure
- *  @address: XMDIO address to program
- *  @dev_addr: device address to program
- *  @data: pointer to value to read/write from/to the XMDIO address
- *  @read: boolean flag to indicate read or write
- **/
-STATIC s32 __e1000_access_xmdio_reg(struct e1000_hw *hw, u16 address,
-				    u8 dev_addr, u16 *data, bool read)
-{
-	s32 ret_val;
-
-	DEBUGFUNC("__e1000_access_xmdio_reg");
-
-	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr);
-	if (ret_val)
-		return ret_val;
-
-	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address);
-	if (ret_val)
-		return ret_val;
-
-	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA |
-							 dev_addr);
-	if (ret_val)
-		return ret_val;
-
-	if (read)
-		ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data);
-	else
-		ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data);
-	if (ret_val)
-		return ret_val;
-
-	/* Recalibrate the device back to 0 */
-	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0);
-	if (ret_val)
-		return ret_val;
-
-	return ret_val;
-}
-
-/**
- *  e1000_read_xmdio_reg - Read XMDIO register
- *  @hw: pointer to the HW structure
- *  @addr: XMDIO address to program
- *  @dev_addr: device address to program
- *  @data: value to be read from the EMI address
- **/
-s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data)
-{
-	DEBUGFUNC("e1000_read_xmdio_reg");
-
-	return __e1000_access_xmdio_reg(hw, addr, dev_addr, data, true);
-}
-
-/**
- *  e1000_write_xmdio_reg - Write XMDIO register
- *  @hw: pointer to the HW structure
- *  @addr: XMDIO address to program
- *  @dev_addr: device address to program
- *  @data: value to be written to the XMDIO address
- **/
-s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)
-{
-	DEBUGFUNC("e1000_read_xmdio_reg");
-
-	return __e1000_access_xmdio_reg(hw, addr, dev_addr, &data, false);
-}
-
 /**
  * e1000_pll_workaround_i210
  * @hw: pointer to the HW structure
diff --git a/drivers/net/e1000/base/e1000_i210.h b/drivers/net/e1000/base/e1000_i210.h
index c6aa2a17b..940eee21a 100644
--- a/drivers/net/e1000/base/e1000_i210.h
+++ b/drivers/net/e1000/base/e1000_i210.h
@@ -17,10 +17,6 @@ s32 e1000_read_invm_version(struct e1000_hw *hw,
 			    struct e1000_fw_version *invm_ver);
 s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
 void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask);
-s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
-			 u16 *data);
-s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
-			  u16 data);
 s32 e1000_init_hw_i210(struct e1000_hw *hw);
 
 #define E1000_STM_OPCODE		0xDB00
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index 956c06747..e8d922147 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -4229,3 +4229,75 @@ bool e1000_is_mphy_ready(struct e1000_hw *hw)
 
 	return ready;
 }
+
+/**
+ *  __e1000_access_xmdio_reg - Read/write XMDIO register
+ *  @hw: pointer to the HW structure
+ *  @address: XMDIO address to program
+ *  @dev_addr: device address to program
+ *  @data: pointer to value to read/write from/to the XMDIO address
+ *  @read: boolean flag to indicate read or write
+ **/
+STATIC s32 __e1000_access_xmdio_reg(struct e1000_hw *hw, u16 address,
+				    u8 dev_addr, u16 *data, bool read)
+{
+	s32 ret_val;
+
+	DEBUGFUNC("__e1000_access_xmdio_reg");
+
+	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr);
+	if (ret_val)
+		return ret_val;
+
+	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address);
+	if (ret_val)
+		return ret_val;
+
+	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA |
+					dev_addr);
+	if (ret_val)
+		return ret_val;
+
+	if (read)
+		ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data);
+	else
+		ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data);
+	if (ret_val)
+		return ret_val;
+
+	/* Recalibrate the device back to 0 */
+	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0);
+	if (ret_val)
+		return ret_val;
+
+	return ret_val;
+}
+
+/**
+ *  e1000_read_xmdio_reg - Read XMDIO register
+ *  @hw: pointer to the HW structure
+ *  @addr: XMDIO address to program
+ *  @dev_addr: device address to program
+ *  @data: value to be read from the EMI address
+ **/
+s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data)
+{
+	DEBUGFUNC("e1000_read_xmdio_reg");
+
+		return __e1000_access_xmdio_reg(hw, addr, dev_addr, data, true);
+}
+
+/**
+ *  e1000_write_xmdio_reg - Write XMDIO register
+ *  @hw: pointer to the HW structure
+ *  @addr: XMDIO address to program
+ *  @dev_addr: device address to program
+ *  @data: value to be written to the XMDIO address
+ **/
+s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)
+{
+	DEBUGFUNC("e1000_write_xmdio_reg");
+
+		return __e1000_access_xmdio_reg(hw, addr, dev_addr, &data,
+						false);
+}
diff --git a/drivers/net/e1000/base/e1000_phy.h b/drivers/net/e1000/base/e1000_phy.h
index 2c71e64c8..1c38498d1 100644
--- a/drivers/net/e1000/base/e1000_phy.h
+++ b/drivers/net/e1000/base/e1000_phy.h
@@ -91,6 +91,11 @@ s32 e1000_write_phy_reg_mphy(struct e1000_hw *hw, u32 address, u32 data,
 			     bool line_override);
 bool e1000_is_mphy_ready(struct e1000_hw *hw);
 
+s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
+			 u16 *data);
+s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr,
+			  u16 data);
+
 #define E1000_MAX_PHY_ADDR		8
 
 /* IGP01E1000 Specific Registers */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 06/27] net/e1000/base: fall through explicitly
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (4 preceding siblings ...)
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 05/27] net/e1000/base: expose xmdio methods Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 07/27] net/e1000/base: add function parameter descriptions Guinan Sun
                     ` (21 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:12 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher, Todd Fujinaka

Found some inconsistent code comments when it came to when we "fall
through", so made them more consistent and non-repetitive.

This patch adds/changes fall through comments to address new warnings
produced by gcc 7.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 11 +++++++++--
 drivers/net/e1000/base/e1000_mbx.c   |  1 +
 drivers/net/e1000/base/e1000_phy.c   |  1 +
 drivers/net/e1000/base/e1000_vf.c    |  2 ++
 4 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 8db287251..7c562258a 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -1560,14 +1560,21 @@ STATIC s32 e1000_setup_copper_link_82575(struct e1000_hw *hw)
 	}
 	switch (hw->phy.type) {
 	case e1000_phy_i210:
+	/* Fall through */
 	case e1000_phy_m88:
 		switch (hw->phy.id) {
 		case I347AT4_E_PHY_ID:
+		/* Fall through */
 		case M88E1112_E_PHY_ID:
+		/* Fall through */
 		case M88E1340M_E_PHY_ID:
+		/* Fall through */
 		case M88E1543_E_PHY_ID:
+		/* Fall through */
 		case M88E1512_E_PHY_ID:
+		/* Fall through */
 		case I210_I_PHY_ID:
+		/* Fall through */
 			ret_val = e1000_copper_link_setup_m88_gen2(hw);
 			break;
 		default:
@@ -1653,7 +1660,7 @@ STATIC s32 e1000_setup_serdes_link_82575(struct e1000_hw *hw)
 	case E1000_CTRL_EXT_LINK_MODE_1000BASE_KX:
 		/* disable PCS autoneg and support parallel detect only */
 		pcs_autoneg = false;
-		/* fall through to default case */
+		/* Fall through */
 	default:
 		if (hw->mac.type == e1000_82575 ||
 		    hw->mac.type == e1000_82576) {
@@ -1779,7 +1786,7 @@ STATIC s32 e1000_get_media_type_82575(struct e1000_hw *hw)
 			dev_spec->sgmii_active = true;
 			break;
 		}
-		/* fall through for I2C based SGMII */
+		/* Fall through for I2C based SGMII */
 	case E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES:
 		/* read media type from SFP EEPROM */
 		ret_val = e1000_set_sfp_media_type_82575(hw);
diff --git a/drivers/net/e1000/base/e1000_mbx.c b/drivers/net/e1000/base/e1000_mbx.c
index 6fae6767f..4cac3642e 100644
--- a/drivers/net/e1000/base/e1000_mbx.c
+++ b/drivers/net/e1000/base/e1000_mbx.c
@@ -755,6 +755,7 @@ s32 e1000_init_mbx_params_pf(struct e1000_hw *hw)
 		mbx->stats.reqs = 0;
 		mbx->stats.acks = 0;
 		mbx->stats.rsts = 0;
+		/* Fall through */
 	default:
 		return E1000_SUCCESS;
 	}
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index e8d922147..be4786794 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -1274,6 +1274,7 @@ s32 e1000_copper_link_setup_m88_gen2(struct e1000_hw *hw)
 			phy_data |= M88E1000_PSCR_AUTO_X_1000T;
 			break;
 		}
+		/* Fall through */
 	case 0:
 	default:
 		phy_data |= M88E1000_PSCR_AUTO_X_MODE;
diff --git a/drivers/net/e1000/base/e1000_vf.c b/drivers/net/e1000/base/e1000_vf.c
index 543fa7741..dc109d5e0 100644
--- a/drivers/net/e1000/base/e1000_vf.c
+++ b/drivers/net/e1000/base/e1000_vf.c
@@ -462,8 +462,10 @@ s32 e1000_promisc_set_vf(struct e1000_hw *hw, enum e1000_promisc_type type)
 		break;
 	case e1000_promisc_enabled:
 		msgbuf |= E1000_VF_SET_PROMISC_MULTICAST;
+		/* fall-through */
 	case e1000_promisc_unicast:
 		msgbuf |= E1000_VF_SET_PROMISC_UNICAST;
+		/* fall-through */
 	case e1000_promisc_disabled:
 		break;
 	default:
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 07/27] net/e1000/base: add function parameter descriptions
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (5 preceding siblings ...)
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 06/27] net/e1000/base: fall through explicitly Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 08/27] net/e1000/base: improve code style and fix klocwork errors Guinan Sun
                     ` (20 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:12 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Todd Fujinaka

Add function parameter descriptions to address gcc 7 warnings.

Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_82575.c | 11 +++++------
 drivers/net/e1000/base/e1000_mac.c   |  8 ++++++++
 drivers/net/e1000/base/e1000_mbx.c   |  4 ++++
 drivers/net/e1000/base/e1000_nvm.c   |  7 +++++++
 drivers/net/e1000/base/e1000_phy.c   |  6 ++++++
 5 files changed, 30 insertions(+), 6 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 7c562258a..750f1cf01 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -2764,7 +2764,7 @@ STATIC s32 e1000_update_nvm_checksum_i350(struct e1000_hw *hw)
 /**
  *  __e1000_access_emi_reg - Read/write EMI register
  *  @hw: pointer to the HW structure
- *  @addr: EMI address to program
+ *  @address: EMI address to program
  *  @data: pointer to value to read/write from/to the EMI address
  *  @read: boolean flag to indicate read or write
  **/
@@ -2991,8 +2991,8 @@ s32 e1000_initialize_M88E1543_phy(struct e1000_hw *hw)
 /**
  *  e1000_set_eee_i350 - Enable/disable EEE support
  *  @hw: pointer to the HW structure
- *  @adv1g: boolean flag enabling 1G EEE advertisement
- *  @adv100m: boolean flag enabling 100M EEE advertisement
+ *  @adv1G: boolean flag enabling 1G EEE advertisement
+ *  @adv100M: boolean flag enabling 100M EEE advertisement
  *
  *  Enable/disable EEE based on setting in dev_spec structure.
  *
@@ -3046,8 +3046,8 @@ s32 e1000_set_eee_i350(struct e1000_hw *hw, bool adv1G, bool adv100M)
 /**
  *  e1000_set_eee_i354 - Enable/disable EEE support
  *  @hw: pointer to the HW structure
- *  @adv1g: boolean flag enabling 1G EEE advertisement
- *  @adv100m: boolean flag enabling 100M EEE advertisement
+ *  @adv1G: boolean flag enabling 1G EEE advertisement
+ *  @adv100M: boolean flag enabling 100M EEE advertisement
  *
  *  Enable/disable EEE legacy mode based on setting in dev_spec structure.
  *
@@ -3703,7 +3703,6 @@ STATIC s32 e1000_set_i2c_data(struct e1000_hw *hw, u32 *i2cctl, bool data)
 
 /**
  *  e1000_get_i2c_data - Reads the I2C SDA data bit
- *  @hw: pointer to hardware structure
  *  @i2cctl: Current value of I2CCTL register
  *
  *  Returns the I2C data bit value
diff --git a/drivers/net/e1000/base/e1000_mac.c b/drivers/net/e1000/base/e1000_mac.c
index d0e1fa58b..48384b284 100644
--- a/drivers/net/e1000/base/e1000_mac.c
+++ b/drivers/net/e1000/base/e1000_mac.c
@@ -75,6 +75,8 @@ void e1000_null_mac_generic(struct e1000_hw E1000_UNUSEDARG *hw)
 /**
  *  e1000_null_link_info - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @s: dummy variable
+ *  @d: dummy variable
  **/
 s32 e1000_null_link_info(struct e1000_hw E1000_UNUSEDARG *hw,
 			 u16 E1000_UNUSEDARG *s, u16 E1000_UNUSEDARG *d)
@@ -98,6 +100,8 @@ bool e1000_null_mng_mode(struct e1000_hw E1000_UNUSEDARG *hw)
 /**
  *  e1000_null_update_mc - No-op function, return void
  *  @hw: pointer to the HW structure
+ *  @h: dummy variable
+ *  @a: dummy variable
  **/
 void e1000_null_update_mc(struct e1000_hw E1000_UNUSEDARG *hw,
 			  u8 E1000_UNUSEDARG *h, u32 E1000_UNUSEDARG a)
@@ -110,6 +114,8 @@ void e1000_null_update_mc(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_write_vfta - No-op function, return void
  *  @hw: pointer to the HW structure
+ *  @a: dummy variable
+ *  @b: dummy variable
  **/
 void e1000_null_write_vfta(struct e1000_hw E1000_UNUSEDARG *hw,
 			   u32 E1000_UNUSEDARG a, u32 E1000_UNUSEDARG b)
@@ -122,6 +128,8 @@ void e1000_null_write_vfta(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_rar_set - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @h: dummy variable
+ *  @a: dummy variable
  **/
 int e1000_null_rar_set(struct e1000_hw E1000_UNUSEDARG *hw,
 			u8 E1000_UNUSEDARG *h, u32 E1000_UNUSEDARG a)
diff --git a/drivers/net/e1000/base/e1000_mbx.c b/drivers/net/e1000/base/e1000_mbx.c
index 4cac3642e..3f3b326c6 100644
--- a/drivers/net/e1000/base/e1000_mbx.c
+++ b/drivers/net/e1000/base/e1000_mbx.c
@@ -7,6 +7,7 @@
 /**
  *  e1000_null_mbx_check_for_flag - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @mbx_id: id of mailbox to read
  **/
 STATIC s32 e1000_null_mbx_check_for_flag(struct e1000_hw E1000_UNUSEDARG *hw,
 					 u16 E1000_UNUSEDARG mbx_id)
@@ -20,6 +21,9 @@ STATIC s32 e1000_null_mbx_check_for_flag(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_mbx_transact - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @msg: The message buffer
+ *  @size: Length of buffer
+ *  @mbx_id: id of mailbox to read
  **/
 STATIC s32 e1000_null_mbx_transact(struct e1000_hw E1000_UNUSEDARG *hw,
 				   u32 E1000_UNUSEDARG *msg,
diff --git a/drivers/net/e1000/base/e1000_nvm.c b/drivers/net/e1000/base/e1000_nvm.c
index 4d4a8e04b..19a7f77ad 100644
--- a/drivers/net/e1000/base/e1000_nvm.c
+++ b/drivers/net/e1000/base/e1000_nvm.c
@@ -32,6 +32,9 @@ void e1000_init_nvm_ops_generic(struct e1000_hw *hw)
 /**
  *  e1000_null_nvm_read - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @a: dummy variable
+ *  @b: dummy variable
+ *  @c: dummy variable
  **/
 s32 e1000_null_read_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
 			u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
@@ -56,6 +59,7 @@ void e1000_null_nvm_generic(struct e1000_hw E1000_UNUSEDARG *hw)
 /**
  *  e1000_null_led_default - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @data: dummy variable
  **/
 s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw,
 			   u16 E1000_UNUSEDARG *data)
@@ -68,6 +72,9 @@ s32 e1000_null_led_default(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_write_nvm - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @a: dummy variable
+ *  @b: dummy variable
+ *  @c: dummy variable
  **/
 s32 e1000_null_write_nvm(struct e1000_hw E1000_UNUSEDARG *hw,
 			 u16 E1000_UNUSEDARG a, u16 E1000_UNUSEDARG b,
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index be4786794..c506d2344 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -73,6 +73,7 @@ void e1000_init_phy_ops_generic(struct e1000_hw *hw)
 /**
  *  e1000_null_set_page - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @data: dummy variable
  **/
 s32 e1000_null_set_page(struct e1000_hw E1000_UNUSEDARG *hw,
 			u16 E1000_UNUSEDARG data)
@@ -85,6 +86,8 @@ s32 e1000_null_set_page(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_read_reg - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @offset: dummy variable
+ *  @data: dummy variable
  **/
 s32 e1000_null_read_reg(struct e1000_hw E1000_UNUSEDARG *hw,
 			u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG *data)
@@ -108,6 +111,7 @@ void e1000_null_phy_generic(struct e1000_hw E1000_UNUSEDARG *hw)
 /**
  *  e1000_null_lplu_state - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @active: dummy variable
  **/
 s32 e1000_null_lplu_state(struct e1000_hw E1000_UNUSEDARG *hw,
 			  bool E1000_UNUSEDARG active)
@@ -120,6 +124,8 @@ s32 e1000_null_lplu_state(struct e1000_hw E1000_UNUSEDARG *hw,
 /**
  *  e1000_null_write_reg - No-op function, return 0
  *  @hw: pointer to the HW structure
+ *  @offset: dummy variable
+ *  @data: dummy variable
  **/
 s32 e1000_null_write_reg(struct e1000_hw E1000_UNUSEDARG *hw,
 			 u32 E1000_UNUSEDARG offset, u16 E1000_UNUSEDARG data)
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 08/27] net/e1000/base: improve code style and fix klocwork errors
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (6 preceding siblings ...)
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 07/27] net/e1000/base: add function parameter descriptions Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 09/27] net/e1000/base: modify HW level time sync mechanisms Guinan Sun
                     ` (19 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:12 UTC (permalink / raw)
  To: dev
  Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher, Neftin Sasha,
	Lifshits Vitaly, Robert Konklewski, Doug Dziggel, Todd Fujinaka,
	Jacob Keller

This patch fixes coding style and klocwork errors.

Fix typo in piece of code of NVM access for SPT.
And cleans up the remaining instances in the shared code
where it was not adhering to the Linux code standard.
Wrong description was found in the mentioned file, so fix them.
Remove shadowing variable declarations.

Relating to operands in bitwise operations having different sizes.
Unreachable code since *clock_in_i2c_* always return success.
Don't return unused s32 and don't check for constants.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Neftin Sasha <sasha.neftin@intel.com>
Signed-off-by: Lifshits Vitaly <vitaly.lifshits@intel.com>
Signed-off-by: Robert Konklewski <robertx.konklewski@intel.com>
Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_80003es2lan.c |  1 -
 drivers/net/e1000/base/e1000_82575.c       | 18 ++++------
 drivers/net/e1000/base/e1000_i210.c        | 10 +++---
 drivers/net/e1000/base/e1000_ich8lan.c     | 40 ++++++++++++----------
 drivers/net/e1000/base/e1000_nvm.c         |  2 +-
 drivers/net/e1000/base/e1000_phy.c         |  5 ++-
 6 files changed, 36 insertions(+), 40 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_80003es2lan.c b/drivers/net/e1000/base/e1000_80003es2lan.c
index bcfda9415..b795491c0 100644
--- a/drivers/net/e1000/base/e1000_80003es2lan.c
+++ b/drivers/net/e1000/base/e1000_80003es2lan.c
@@ -1210,7 +1210,6 @@ STATIC s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw)
 /**
  *  e1000_cfg_on_link_up_80003es2lan - es2 link configuration after link-up
  *  @hw: pointer to the HW structure
- *  @duplex: current duplex setting
  *
  *  Configure the KMRN interface by applying last minute quirks for
  *  10/100 operation.
diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 750f1cf01..410f2db41 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -75,10 +75,10 @@ STATIC void e1000_clear_vfta_i350(struct e1000_hw *hw);
 
 STATIC void e1000_i2c_start(struct e1000_hw *hw);
 STATIC void e1000_i2c_stop(struct e1000_hw *hw);
-STATIC s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);
+STATIC void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);
 STATIC s32 e1000_clock_out_i2c_byte(struct e1000_hw *hw, u8 data);
 STATIC s32 e1000_get_i2c_ack(struct e1000_hw *hw);
-STATIC s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);
+STATIC void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);
 STATIC s32 e1000_clock_out_i2c_bit(struct e1000_hw *hw, bool data);
 STATIC void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
 STATIC void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
@@ -1084,7 +1084,7 @@ STATIC void e1000_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask)
 		; /* Empty */
 
 	swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
-	swfw_sync &= ~mask;
+	swfw_sync &= (u32)~mask;
 	E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
 
 	e1000_put_hw_semaphore_generic(hw);
@@ -3300,9 +3300,7 @@ s32 e1000_read_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset,
 		if (status != E1000_SUCCESS)
 			goto fail;
 
-		status = e1000_clock_in_i2c_byte(hw, data);
-		if (status != E1000_SUCCESS)
-			goto fail;
+		e1000_clock_in_i2c_byte(hw, data);
 
 		status = e1000_clock_out_i2c_bit(hw, nack);
 		if (status != E1000_SUCCESS)
@@ -3466,7 +3464,7 @@ STATIC void e1000_i2c_stop(struct e1000_hw *hw)
  *
  *  Clocks in one byte data via I2C data/clock
  **/
-STATIC s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
+STATIC void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
 {
 	s32 i;
 	bool bit = 0;
@@ -3478,8 +3476,6 @@ STATIC s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
 		e1000_clock_in_i2c_bit(hw, &bit);
 		*data |= bit << i;
 	}
-
-	return E1000_SUCCESS;
 }
 
 /**
@@ -3568,7 +3564,7 @@ STATIC s32 e1000_get_i2c_ack(struct e1000_hw *hw)
  *
  *  Clocks in one bit via I2C data/clock
  **/
-STATIC s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
+STATIC void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
 {
 	u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
 
@@ -3586,8 +3582,6 @@ STATIC s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
 
 	/* Minimum low period of clock is 4.7 us */
 	usec_delay(E1000_I2C_T_LOW);
-
-	return E1000_SUCCESS;
 }
 
 /**
diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index 5c2fe8a3e..a6d8e3b34 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -117,7 +117,7 @@ void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask)
 		; /* Empty */
 
 	swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
-	swfw_sync &= ~mask;
+	swfw_sync &= (u32)~mask;
 	E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
 
 	e1000_put_hw_semaphore_generic(hw);
@@ -310,7 +310,7 @@ STATIC s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
 	}
 
 	for (i = 0; i < words; i++) {
-		eewr = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) |
+		eewr = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) |
 			(data[i] << E1000_NVM_RW_REG_DATA) |
 			E1000_NVM_RW_REG_START;
 
@@ -397,9 +397,9 @@ STATIC s32 e1000_read_invm_i210(struct e1000_hw *hw, u16 offset,
 	switch (offset) {
 	case NVM_MAC_ADDR:
 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, &data[0]);
-		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+1,
+		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 1,
 						     &data[1]);
-		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+2,
+		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 2,
 						     &data[2]);
 		if (ret_val != E1000_SUCCESS)
 			DEBUGOUT("MAC Addr not found in iNVM\n");
@@ -776,8 +776,6 @@ void e1000_init_function_pointers_i210(struct e1000_hw *hw)
 {
 	e1000_init_function_pointers_82575(hw);
 	hw->nvm.ops.init_params = e1000_init_nvm_params_i210;
-
-	return;
 }
 
 /**
diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 5241cf698..823dda5f5 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -822,7 +822,7 @@ STATIC s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 /**
  *  __e1000_access_emi_reg_locked - Read/write EMI register
  *  @hw: pointer to the HW structure
- *  @addr: EMI address to program
+ *  @address: EMI address to program
  *  @data: pointer to value to read/write from/to the EMI address
  *  @read: boolean flag to indicate read or write
  *
@@ -1546,8 +1546,6 @@ STATIC s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
 
 
 		if (hw->mac.type >= e1000_pch_lpt) {
-			u16 phy_reg;
-
 			hw->phy.ops.read_reg_locked(hw, I217_PLL_CLOCK_GATE_REG,
 						    &phy_reg);
 			phy_reg &= ~I217_PLL_CLOCK_GATE_MASK;
@@ -2401,7 +2399,7 @@ STATIC s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)
 /**
  *  e1000_configure_k1_ich8lan - Configure K1 power state
  *  @hw: pointer to the HW structure
- *  @enable: K1 state to configure
+ *  @k1_enable: K1 state to configure
  *
  *  Configure the K1 power state based on the provided parameter.
  *  Assumes semaphore already acquired.
@@ -2549,6 +2547,7 @@ STATIC s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw)
 /**
  *  e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be
  *  done after every PHY reset.
+ *  @hw: pointer to the HW structure
  **/
 STATIC s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
 {
@@ -2875,6 +2874,7 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable)
 /**
  *  e1000_lv_phy_workarounds_ich8lan - A series of Phy workarounds to be
  *  done after every PHY reset.
+ *  @hw: pointer to the HW structure
  **/
 STATIC s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw)
 {
@@ -3479,8 +3479,9 @@ STATIC s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
 
 	for (i = 0; i < words; i += 2) {
 		if (words - i == 1) {
-			if (dev_spec->shadow_ram[offset+i].modified) {
-				data[i] = dev_spec->shadow_ram[offset+i].value;
+			if (dev_spec->shadow_ram[offset + i].modified) {
+				data[i] =
+				    dev_spec->shadow_ram[offset + i].value;
 			} else {
 				offset_to_read = act_offset + i -
 						 ((act_offset + i) % 2);
@@ -3497,8 +3498,8 @@ STATIC s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
 			}
 		} else {
 			offset_to_read = act_offset + i;
-			if (!(dev_spec->shadow_ram[offset+i].modified) ||
-			    !(dev_spec->shadow_ram[offset+i+1].modified)) {
+			if (!(dev_spec->shadow_ram[offset + i].modified) ||
+			    !(dev_spec->shadow_ram[offset + i + 1].modified)) {
 				ret_val =
 				   e1000_read_flash_dword_ich8lan(hw,
 								 offset_to_read,
@@ -3506,15 +3507,16 @@ STATIC s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
 				if (ret_val)
 					break;
 			}
-			if (dev_spec->shadow_ram[offset+i].modified)
-				data[i] = dev_spec->shadow_ram[offset+i].value;
+			if (dev_spec->shadow_ram[offset + i].modified)
+				data[i] =
+				    dev_spec->shadow_ram[offset + i].value;
 			else
-				data[i] = (u16) (dword & 0xFFFF);
-			if (dev_spec->shadow_ram[offset+i].modified)
-				data[i+1] =
-				   dev_spec->shadow_ram[offset+i+1].value;
+				data[i] = (u16)(dword & 0xFFFF);
+			if (dev_spec->shadow_ram[offset + i + 1].modified)
+				data[i + 1] =
+				   dev_spec->shadow_ram[offset + i + 1].value;
 			else
-				data[i+1] = (u16) (dword >> 16 & 0xFFFF);
+				data[i + 1] = (u16)(dword >> 16 & 0xFFFF);
 		}
 	}
 
@@ -3568,8 +3570,8 @@ STATIC s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
 
 	ret_val = E1000_SUCCESS;
 	for (i = 0; i < words; i++) {
-		if (dev_spec->shadow_ram[offset+i].modified) {
-			data[i] = dev_spec->shadow_ram[offset+i].value;
+		if (dev_spec->shadow_ram[offset + i].modified) {
+			data[i] = dev_spec->shadow_ram[offset + i].value;
 		} else {
 			ret_val = e1000_read_flash_word_ich8lan(hw,
 								act_offset + i,
@@ -3974,8 +3976,8 @@ STATIC s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
 	nvm->ops.acquire(hw);
 
 	for (i = 0; i < words; i++) {
-		dev_spec->shadow_ram[offset+i].modified = true;
-		dev_spec->shadow_ram[offset+i].value = data[i];
+		dev_spec->shadow_ram[offset + i].modified = true;
+		dev_spec->shadow_ram[offset + i].value = data[i];
 	}
 
 	nvm->ops.release(hw);
diff --git a/drivers/net/e1000/base/e1000_nvm.c b/drivers/net/e1000/base/e1000_nvm.c
index 19a7f77ad..ca87ec122 100644
--- a/drivers/net/e1000/base/e1000_nvm.c
+++ b/drivers/net/e1000/base/e1000_nvm.c
@@ -551,7 +551,7 @@ s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
 	}
 
 	for (i = 0; i < words; i++) {
-		eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
+		eerd = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) +
 		       E1000_NVM_RW_REG_START;
 
 		E1000_WRITE_REG(hw, E1000_EERD, eerd);
diff --git a/drivers/net/e1000/base/e1000_phy.c b/drivers/net/e1000/base/e1000_phy.c
index c506d2344..4995578f4 100644
--- a/drivers/net/e1000/base/e1000_phy.c
+++ b/drivers/net/e1000/base/e1000_phy.c
@@ -597,7 +597,7 @@ s32 e1000_write_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 data)
 				 * lane and update whole word
 				 */
 				data_local = i2ccmd & 0xFF00;
-				data_local |= data;
+				data_local |= (u32)data;
 				i2ccmd = ((offset <<
 					E1000_I2CCMD_REG_ADDR_SHIFT) |
 					E1000_I2CCMD_OPCODE_WRITE | data_local);
@@ -3071,6 +3071,7 @@ s32 e1000_determine_phy_address(struct e1000_hw *hw)
 /**
  *  e1000_get_phy_addr_for_bm_page - Retrieve PHY page address
  *  @page: page to access
+ *  @reg: register to access
  *
  *  Returns the phy address for the page requested.
  **/
@@ -3508,6 +3509,7 @@ void e1000_power_down_phy_copper(struct e1000_hw *hw)
  *  @offset: register offset to be read
  *  @data: pointer to the read data
  *  @locked: semaphore has already been acquired or not
+ *  @page_set: BM_WUC_PAGE already set and access enabled
  *
  *  Acquires semaphore, if necessary, then reads the PHY register at offset
  *  and stores the retrieved information in data.  Release any acquired
@@ -3618,6 +3620,7 @@ s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data)
  *  @offset: register offset to write to
  *  @data: data to write at register offset
  *  @locked: semaphore has already been acquired or not
+ *  @page_set: BM_WUC_PAGE already set and access enabled
  *
  *  Acquires semaphore, if necessary, then writes the data to PHY register
  *  at the offset.  Release any acquired semaphores before exiting.
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 09/27] net/e1000/base: modify HW level time sync mechanisms
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (7 preceding siblings ...)
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 08/27] net/e1000/base: improve code style and fix klocwork errors Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 10/27] net/e1000/base: remove duplicated codes Guinan Sun
                     ` (18 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:12 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Efimov Evgeny

Add additinal configuration space access to allow HW
level time sync mechanism.

Signed-off-by: Efimov Evgeny <evgeny.efimov@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.c | 18 ++++++++++++++++++
 drivers/net/e1000/base/e1000_ich8lan.h |  1 +
 2 files changed, 19 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 823dda5f5..1dc29553e 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -4896,6 +4896,7 @@ STATIC s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
 	u16 kum_cfg;
 	u32 ctrl, reg;
 	s32 ret_val;
+	u16 pci_cfg;
 
 	DEBUGFUNC("e1000_reset_hw_ich8lan");
 
@@ -4956,11 +4957,28 @@ STATIC s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
 			e1000_gate_hw_phy_config_ich8lan(hw, true);
 	}
 	ret_val = e1000_acquire_swflag_ich8lan(hw);
+
+	/* Read from EXTCNF_CTRL in e1000_acquire_swflag_ich8lan function
+	 * may occur during global reset and cause system hang.
+	 * Configuration space access creates the needed delay.
+	 * Write to E1000_STRAP RO register E1000_PCI_VENDOR_ID_REGISTER value
+	 * insures configuration space read is done before global reset.
+	 */
+	e1000_read_pci_cfg(hw, E1000_PCI_VENDOR_ID_REGISTER, &pci_cfg);
+	E1000_WRITE_REG(hw, E1000_STRAP, pci_cfg);
 	DEBUGOUT("Issuing a global reset to ich8lan\n");
 	E1000_WRITE_REG(hw, E1000_CTRL, (ctrl | E1000_CTRL_RST));
 	/* cannot issue a flush here because it hangs the hardware */
 	msec_delay(20);
 
+	/* Configuration space access improve HW level time sync mechanism.
+	 * Write to E1000_STRAP RO register E1000_PCI_VENDOR_ID_REGISTER
+	 * value to insure configuration space read is done
+	 * before any access to mac register.
+	 */
+	e1000_read_pci_cfg(hw, E1000_PCI_VENDOR_ID_REGISTER, &pci_cfg);
+	E1000_WRITE_REG(hw, E1000_STRAP, pci_cfg);
+
 	/* Set Phy Config Counter to 50msec */
 	if (hw->mac.type == e1000_pch2lan) {
 		reg = E1000_READ_REG(hw, E1000_FEXTNVM3);
diff --git a/drivers/net/e1000/base/e1000_ich8lan.h b/drivers/net/e1000/base/e1000_ich8lan.h
index 9c21396c3..bfee467b3 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.h
+++ b/drivers/net/e1000/base/e1000_ich8lan.h
@@ -287,6 +287,7 @@
 /* Receive Address Initial CRC Calculation */
 #define E1000_PCH_RAICC(_n)	(0x05F50 + ((_n) * 4))
 
+#define E1000_PCI_VENDOR_ID_REGISTER	0x00
 #if defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT)
 #define E1000_PCI_REVISION_ID_REG	0x08
 #endif /* defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT) */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 10/27] net/e1000/base: remove duplicated codes
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (8 preceding siblings ...)
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 09/27] net/e1000/base: modify HW level time sync mechanisms Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 11/27] net/e1000/base: expose MAC functions Guinan Sun
                     ` (17 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:12 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher, Sasha Neftin

Add two files base.c and base.h to reduce the redundancy
in the silicon family code.
Remove the code duplication from e1000_82575 files.
Clean family specific functions from base.
Fix up a stray and duplicate function declaration.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/Makefile             |   1 +
 drivers/net/e1000/base/e1000_82575.c   | 475 ++++++++-----------------
 drivers/net/e1000/base/e1000_82575.h   |  91 +----
 drivers/net/e1000/base/e1000_api.h     |   1 -
 drivers/net/e1000/base/e1000_base.c    | 190 ++++++++++
 drivers/net/e1000/base/e1000_base.h    | 127 +++++++
 drivers/net/e1000/base/e1000_defines.h |  14 +-
 drivers/net/e1000/base/e1000_hw.h      |   1 +
 drivers/net/e1000/base/e1000_i210.c    |   2 +-
 drivers/net/e1000/base/e1000_regs.h    |  23 +-
 drivers/net/e1000/base/meson.build     |   1 +
 drivers/net/e1000/igb_rxtx.c           |   2 +-
 12 files changed, 512 insertions(+), 416 deletions(-)
 create mode 100644 drivers/net/e1000/base/e1000_base.c
 create mode 100644 drivers/net/e1000/base/e1000_base.h

diff --git a/drivers/net/e1000/Makefile b/drivers/net/e1000/Makefile
index 9fb038cf0..f186f8d0e 100644
--- a/drivers/net/e1000/Makefile
+++ b/drivers/net/e1000/Makefile
@@ -50,6 +50,7 @@ VPATH += $(SRCDIR)/base
 #
 # all source are stored in SRCS-y
 #
+SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_base.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_80003es2lan.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_82540.c
 SRCS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000_82541.c
diff --git a/drivers/net/e1000/base/e1000_82575.c b/drivers/net/e1000/base/e1000_82575.c
index 410f2db41..f6b9f629f 100644
--- a/drivers/net/e1000/base/e1000_82575.c
+++ b/drivers/net/e1000/base/e1000_82575.c
@@ -17,8 +17,6 @@
 
 STATIC s32  e1000_init_phy_params_82575(struct e1000_hw *hw);
 STATIC s32  e1000_init_mac_params_82575(struct e1000_hw *hw);
-STATIC s32  e1000_acquire_phy_82575(struct e1000_hw *hw);
-STATIC void e1000_release_phy_82575(struct e1000_hw *hw);
 STATIC s32  e1000_acquire_nvm_82575(struct e1000_hw *hw);
 STATIC void e1000_release_nvm_82575(struct e1000_hw *hw);
 STATIC s32  e1000_check_for_link_82575(struct e1000_hw *hw);
@@ -30,6 +28,7 @@ STATIC s32  e1000_phy_hw_reset_sgmii_82575(struct e1000_hw *hw);
 STATIC s32  e1000_read_phy_reg_sgmii_82575(struct e1000_hw *hw, u32 offset,
 					   u16 *data);
 STATIC s32  e1000_reset_hw_82575(struct e1000_hw *hw);
+STATIC s32 e1000_init_hw_82575(struct e1000_hw *hw);
 STATIC s32  e1000_reset_hw_82580(struct e1000_hw *hw);
 STATIC s32  e1000_read_phy_reg_82580(struct e1000_hw *hw,
 				     u32 offset, u16 *data);
@@ -55,10 +54,8 @@ STATIC s32  e1000_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw,
 STATIC s32  e1000_get_phy_id_82575(struct e1000_hw *hw);
 STATIC void e1000_release_swfw_sync_82575(struct e1000_hw *hw, u16 mask);
 STATIC bool e1000_sgmii_active_82575(struct e1000_hw *hw);
-STATIC s32  e1000_reset_init_script_82575(struct e1000_hw *hw);
 STATIC s32  e1000_read_mac_addr_82575(struct e1000_hw *hw);
 STATIC void e1000_config_collision_dist_82575(struct e1000_hw *hw);
-STATIC void e1000_power_down_phy_copper_82575(struct e1000_hw *hw);
 STATIC void e1000_shutdown_serdes_link_82575(struct e1000_hw *hw);
 STATIC void e1000_power_up_serdes_link_82575(struct e1000_hw *hw);
 STATIC s32 e1000_set_pcie_completion_timeout(struct e1000_hw *hw);
@@ -127,8 +124,8 @@ STATIC bool e1000_sgmii_uses_mdio_82575(struct e1000_hw *hw)
 }
 
 /**
- *  e1000_init_phy_params_82575 - Init PHY func ptrs.
- *  @hw: pointer to the HW structure
+ * e1000_init_phy_params_82575 - Initialize PHY function ptrs
+ * @hw: pointer to the HW structure
  **/
 STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
 {
@@ -146,17 +143,17 @@ STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
 		goto out;
 	}
 
-	phy->ops.power_up   = e1000_power_up_phy_copper;
-	phy->ops.power_down = e1000_power_down_phy_copper_82575;
+	phy->ops.power_up	= e1000_power_up_phy_copper;
+	phy->ops.power_down	= e1000_power_down_phy_copper_base;
 
 	phy->autoneg_mask	= AUTONEG_ADVERTISE_SPEED_DEFAULT;
 	phy->reset_delay_us	= 100;
 
-	phy->ops.acquire	= e1000_acquire_phy_82575;
+	phy->ops.acquire	= e1000_acquire_phy_base;
 	phy->ops.check_reset_block = e1000_check_reset_block_generic;
 	phy->ops.commit		= e1000_phy_sw_reset_generic;
 	phy->ops.get_cfg_done	= e1000_get_cfg_done_82575;
-	phy->ops.release	= e1000_release_phy_82575;
+	phy->ops.release	= e1000_release_phy_base;
 
 	ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
 
@@ -203,76 +200,39 @@ STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
 	case I347AT4_E_PHY_ID:
 	case M88E1112_E_PHY_ID:
 	case M88E1340M_E_PHY_ID:
+		phy->type		= e1000_phy_m88;
+		phy->ops.check_polarity	= e1000_check_polarity_m88;
+		phy->ops.get_info	= e1000_get_phy_info_m88;
+		phy->ops.get_cable_length = e1000_get_cable_length_m88_gen2;
+		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
+		break;
 	case M88E1111_I_PHY_ID:
 		phy->type		= e1000_phy_m88;
 		phy->ops.check_polarity	= e1000_check_polarity_m88;
 		phy->ops.get_info	= e1000_get_phy_info_m88;
-		if (phy->id == I347AT4_E_PHY_ID ||
-		    phy->id == M88E1112_E_PHY_ID ||
-		    phy->id == M88E1340M_E_PHY_ID)
-			phy->ops.get_cable_length =
-					 e1000_get_cable_length_m88_gen2;
-		else if (phy->id == M88E1543_E_PHY_ID ||
-			 phy->id == M88E1512_E_PHY_ID)
-			phy->ops.get_cable_length =
-					 e1000_get_cable_length_m88_gen2;
-		else
-			phy->ops.get_cable_length = e1000_get_cable_length_m88;
+		phy->ops.get_cable_length = e1000_get_cable_length_m88;
 		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88;
-		/* Check if this PHY is confgured for media swap. */
-		if (phy->id == M88E1112_E_PHY_ID) {
-			u16 data;
-
-			ret_val = phy->ops.write_reg(hw,
-						     E1000_M88E1112_PAGE_ADDR,
-						     2);
-			if (ret_val)
-				goto out;
-
-			ret_val = phy->ops.read_reg(hw,
-						    E1000_M88E1112_MAC_CTRL_1,
-						    &data);
-			if (ret_val)
-				goto out;
-
-			data = (data & E1000_M88E1112_MAC_CTRL_1_MODE_MASK) >>
-			       E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT;
-			if (data == E1000_M88E1112_AUTO_COPPER_SGMII ||
-			    data == E1000_M88E1112_AUTO_COPPER_BASEX)
-				hw->mac.ops.check_for_link =
-						e1000_check_for_link_media_swap;
-		}
-		if (phy->id == M88E1512_E_PHY_ID) {
-			ret_val = e1000_initialize_M88E1512_phy(hw);
-			if (ret_val)
-				goto out;
-		}
-		if (phy->id == M88E1543_E_PHY_ID) {
-			ret_val = e1000_initialize_M88E1543_phy(hw);
-			if (ret_val)
-				goto out;
-		}
 		break;
 	case IGP03E1000_E_PHY_ID:
 	case IGP04E1000_E_PHY_ID:
-		phy->type = e1000_phy_igp_3;
-		phy->ops.check_polarity = e1000_check_polarity_igp;
-		phy->ops.get_info = e1000_get_phy_info_igp;
+		phy->type		= e1000_phy_igp_3;
+		phy->ops.check_polarity	= e1000_check_polarity_igp;
+		phy->ops.get_info	= e1000_get_phy_info_igp;
 		phy->ops.get_cable_length = e1000_get_cable_length_igp_2;
-		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp;
 		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82575;
 		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_generic;
+		phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp;
 		break;
 	case I82580_I_PHY_ID:
 	case I350_I_PHY_ID:
-		phy->type = e1000_phy_82580;
-		phy->ops.check_polarity = e1000_check_polarity_82577;
-		phy->ops.force_speed_duplex =
-					 e1000_phy_force_speed_duplex_82577;
+		phy->type		= e1000_phy_82580;
+		phy->ops.check_polarity	= e1000_check_polarity_82577;
+		phy->ops.get_info	= e1000_get_phy_info_82577;
 		phy->ops.get_cable_length = e1000_get_cable_length_82577;
-		phy->ops.get_info = e1000_get_phy_info_82577;
 		phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_82580;
 		phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_82580;
+		phy->ops.force_speed_duplex =
+				e1000_phy_force_speed_duplex_82577;
 		break;
 	case I210_I_PHY_ID:
 		phy->type		= e1000_phy_i210;
@@ -291,98 +251,49 @@ STATIC s32 e1000_init_phy_params_82575(struct e1000_hw *hw)
 		goto out;
 	}
 
-out:
-	return ret_val;
-}
-
-/**
- *  e1000_init_nvm_params_82575 - Init NVM func ptrs.
- *  @hw: pointer to the HW structure
- **/
-s32 e1000_init_nvm_params_82575(struct e1000_hw *hw)
-{
-	struct e1000_nvm_info *nvm = &hw->nvm;
-	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
-	u16 size;
-
-	DEBUGFUNC("e1000_init_nvm_params_82575");
-
-	size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
-		     E1000_EECD_SIZE_EX_SHIFT);
-	/*
-	 * Added to a constant, "size" becomes the left-shift value
-	 * for setting word_size.
-	 */
-	size += NVM_WORD_SIZE_BASE_SHIFT;
-
-	/* Just in case size is out of range, cap it to the largest
-	 * EEPROM size supported
-	 */
-	if (size > 15)
-		size = 15;
-
-	nvm->word_size = 1 << size;
-	if (hw->mac.type < e1000_i210) {
-		nvm->opcode_bits = 8;
-		nvm->delay_usec = 1;
+	/* Check if this PHY is configured for media swap. */
+	switch (phy->id) {
+	case M88E1112_E_PHY_ID:
+	{
+		u16 data;
 
-		switch (nvm->override) {
-		case e1000_nvm_override_spi_large:
-			nvm->page_size = 32;
-			nvm->address_bits = 16;
-			break;
-		case e1000_nvm_override_spi_small:
-			nvm->page_size = 8;
-			nvm->address_bits = 8;
-			break;
-		default:
-			nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
-			nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
-					    16 : 8;
-			break;
-		}
-		if (nvm->word_size == (1 << 15))
-			nvm->page_size = 128;
+		ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 2);
+		if (ret_val)
+			goto out;
+		ret_val = phy->ops.read_reg(hw, E1000_M88E1112_MAC_CTRL_1,
+					    &data);
+		if (ret_val)
+			goto out;
 
-		nvm->type = e1000_nvm_eeprom_spi;
-	} else {
-		nvm->type = e1000_nvm_flash_hw;
+		data = (data & E1000_M88E1112_MAC_CTRL_1_MODE_MASK) >>
+			E1000_M88E1112_MAC_CTRL_1_MODE_SHIFT;
+		if (data == E1000_M88E1112_AUTO_COPPER_SGMII ||
+		    data == E1000_M88E1112_AUTO_COPPER_BASEX)
+			hw->mac.ops.check_for_link =
+						e1000_check_for_link_media_swap;
+		break;
 	}
-
-	/* Function Pointers */
-	nvm->ops.acquire = e1000_acquire_nvm_82575;
-	nvm->ops.release = e1000_release_nvm_82575;
-	if (nvm->word_size < (1 << 15))
-		nvm->ops.read = e1000_read_nvm_eerd;
-	else
-		nvm->ops.read = e1000_read_nvm_spi;
-
-	nvm->ops.write = e1000_write_nvm_spi;
-	nvm->ops.validate = e1000_validate_nvm_checksum_generic;
-	nvm->ops.update = e1000_update_nvm_checksum_generic;
-	nvm->ops.valid_led_default = e1000_valid_led_default_82575;
-
-	/* override generic family function pointers for specific descendants */
-	switch (hw->mac.type) {
-	case e1000_82580:
-		nvm->ops.validate = e1000_validate_nvm_checksum_82580;
-		nvm->ops.update = e1000_update_nvm_checksum_82580;
+	case M88E1512_E_PHY_ID:
+	{
+		ret_val = e1000_initialize_M88E1512_phy(hw);
 		break;
-	case e1000_i350:
-	case e1000_i354:
-		nvm->ops.validate = e1000_validate_nvm_checksum_i350;
-		nvm->ops.update = e1000_update_nvm_checksum_i350;
+	}
+	case M88E1543_E_PHY_ID:
+	{
+		ret_val = e1000_initialize_M88E1543_phy(hw);
 		break;
+	}
 	default:
-		break;
+		goto out;
 	}
 
-	return E1000_SUCCESS;
+out:
+	return ret_val;
 }
 
 /**
- *  e1000_init_mac_params_82575 - Init MAC func ptrs.
- *  @hw: pointer to the HW structure
+ * e1000_init_mac_params_82575 - Initialize MAC function ptrs
+ * @hw: pointer to the HW structure
  **/
 STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 {
@@ -391,13 +302,16 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 
 	DEBUGFUNC("e1000_init_mac_params_82575");
 
+	/* Initialize function pointer */
+	e1000_init_mac_ops_generic(hw);
+
 	/* Derives media type */
 	e1000_get_media_type_82575(hw);
-	/* Set mta register count */
+	/* Set MTA register count */
 	mac->mta_reg_count = 128;
-	/* Set uta register count */
+	/* Set UTA register count */
 	mac->uta_reg_count = (hw->mac.type == e1000_82575) ? 0 : 128;
-	/* Set rar entry count */
+	/* Set RAR entry count */
 	mac->rar_entry_count = E1000_RAR_ENTRIES_82575;
 	if (mac->type == e1000_82576)
 		mac->rar_entry_count = E1000_RAR_ENTRIES_82576;
@@ -430,8 +344,8 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	if (mac->type >= e1000_82580)
 		mac->ops.reset_hw = e1000_reset_hw_82580;
 	else
-	mac->ops.reset_hw = e1000_reset_hw_82575;
-	/* hw initialization */
+		mac->ops.reset_hw = e1000_reset_hw_82575;
+	/* HW initialization */
 	if ((mac->type == e1000_i210) || (mac->type == e1000_i211))
 		mac->ops.init_hw = e1000_init_hw_i210;
 	else
@@ -467,7 +381,7 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	}
 	if (hw->mac.type >= e1000_82580)
 		mac->ops.validate_mdi_setting =
-				e1000_validate_mdi_setting_crossover_generic;
+			e1000_validate_mdi_setting_crossover_generic;
 	/* ID LED init */
 	mac->ops.id_led_init = e1000_id_led_init_generic;
 	/* blink LED */
@@ -485,6 +399,7 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 	mac->ops.get_link_up_info = e1000_get_link_up_info_82575;
 	/* acquire SW_FW sync */
 	mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_82575;
+	/* release SW_FW sync */
 	mac->ops.release_swfw_sync = e1000_release_swfw_sync_82575;
 	if (mac->type == e1000_i210 || mac->type == e1000_i211) {
 		mac->ops.acquire_swfw_sync = e1000_acquire_swfw_sync_i210;
@@ -498,63 +413,102 @@ STATIC s32 e1000_init_mac_params_82575(struct e1000_hw *hw)
 }
 
 /**
- *  e1000_init_function_pointers_82575 - Init func ptrs.
- *  @hw: pointer to the HW structure
- *
- *  Called to initialize all function pointers and parameters.
+ * e1000_init_nvm_params_82575 - Initialize NVM function ptrs
+ * @hw: pointer to the HW structure
  **/
-void e1000_init_function_pointers_82575(struct e1000_hw *hw)
+s32 e1000_init_nvm_params_82575(struct e1000_hw *hw)
 {
-	DEBUGFUNC("e1000_init_function_pointers_82575");
+	struct e1000_nvm_info *nvm = &hw->nvm;
+	u32 eecd = E1000_READ_REG(hw, E1000_EECD);
+	u16 size;
 
-	hw->mac.ops.init_params = e1000_init_mac_params_82575;
-	hw->nvm.ops.init_params = e1000_init_nvm_params_82575;
-	hw->phy.ops.init_params = e1000_init_phy_params_82575;
-	hw->mbx.ops.init_params = e1000_init_mbx_params_pf;
-}
+	DEBUGFUNC("e1000_init_nvm_params_82575");
 
-/**
- *  e1000_acquire_phy_82575 - Acquire rights to access PHY
- *  @hw: pointer to the HW structure
- *
- *  Acquire access rights to the correct PHY.
- **/
-STATIC s32 e1000_acquire_phy_82575(struct e1000_hw *hw)
-{
-	u16 mask = E1000_SWFW_PHY0_SM;
+	size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
+		     E1000_EECD_SIZE_EX_SHIFT);
+	/* Added to a constant, "size" becomes the left-shift value
+	 * for setting word_size.
+	 */
+	size += NVM_WORD_SIZE_BASE_SHIFT;
+
+	/* Just in case size is out of range, cap it to the largest
+	 * EEPROM size supported
+	 */
+	if (size > 15)
+		size = 15;
 
-	DEBUGFUNC("e1000_acquire_phy_82575");
+	nvm->word_size = 1 << size;
+	if (hw->mac.type < e1000_i210) {
+		nvm->opcode_bits = 8;
+		nvm->delay_usec = 1;
 
-	if (hw->bus.func == E1000_FUNC_1)
-		mask = E1000_SWFW_PHY1_SM;
-	else if (hw->bus.func == E1000_FUNC_2)
-		mask = E1000_SWFW_PHY2_SM;
-	else if (hw->bus.func == E1000_FUNC_3)
-		mask = E1000_SWFW_PHY3_SM;
+		switch (nvm->override) {
+		case e1000_nvm_override_spi_large:
+			nvm->page_size = 32;
+			nvm->address_bits = 16;
+			break;
+		case e1000_nvm_override_spi_small:
+			nvm->page_size = 8;
+			nvm->address_bits = 8;
+			break;
+		default:
+			nvm->page_size = eecd & E1000_EECD_ADDR_BITS ? 32 : 8;
+			nvm->address_bits = eecd & E1000_EECD_ADDR_BITS ?
+					    16 : 8;
+			break;
+		}
+		if (nvm->word_size == (1 << 15))
+			nvm->page_size = 128;
+
+		nvm->type = e1000_nvm_eeprom_spi;
+	} else {
+		nvm->type = e1000_nvm_flash_hw;
+	}
+
+	/* Function Pointers */
+	nvm->ops.acquire = e1000_acquire_nvm_82575;
+	nvm->ops.release = e1000_release_nvm_82575;
+	if (nvm->word_size < (1 << 15))
+		nvm->ops.read = e1000_read_nvm_eerd;
+	else
+		nvm->ops.read = e1000_read_nvm_spi;
+
+	nvm->ops.write = e1000_write_nvm_spi;
+	nvm->ops.validate = e1000_validate_nvm_checksum_generic;
+	nvm->ops.update = e1000_update_nvm_checksum_generic;
+	nvm->ops.valid_led_default = e1000_valid_led_default_82575;
+
+	/* override generic family function pointers for specific descendants */
+	switch (hw->mac.type) {
+	case e1000_82580:
+		nvm->ops.validate = e1000_validate_nvm_checksum_82580;
+		nvm->ops.update = e1000_update_nvm_checksum_82580;
+		break;
+	case e1000_i350:
+		nvm->ops.validate = e1000_validate_nvm_checksum_i350;
+		nvm->ops.update = e1000_update_nvm_checksum_i350;
+		break;
+	default:
+		break;
+	}
 
-	return hw->mac.ops.acquire_swfw_sync(hw, mask);
+	return E1000_SUCCESS;
 }
 
 /**
- *  e1000_release_phy_82575 - Release rights to access PHY
+ *  e1000_init_function_pointers_82575 - Init func ptrs.
  *  @hw: pointer to the HW structure
  *
- *  A wrapper to release access rights to the correct PHY.
+ *  Called to initialize all function pointers and parameters.
  **/
-STATIC void e1000_release_phy_82575(struct e1000_hw *hw)
+void e1000_init_function_pointers_82575(struct e1000_hw *hw)
 {
-	u16 mask = E1000_SWFW_PHY0_SM;
-
-	DEBUGFUNC("e1000_release_phy_82575");
-
-	if (hw->bus.func == E1000_FUNC_1)
-		mask = E1000_SWFW_PHY1_SM;
-	else if (hw->bus.func == E1000_FUNC_2)
-		mask = E1000_SWFW_PHY2_SM;
-	else if (hw->bus.func == E1000_FUNC_3)
-		mask = E1000_SWFW_PHY3_SM;
+	DEBUGFUNC("e1000_init_function_pointers_82575");
 
-	hw->mac.ops.release_swfw_sync(hw, mask);
+	hw->mac.ops.init_params = e1000_init_mac_params_82575;
+	hw->nvm.ops.init_params = e1000_init_nvm_params_82575;
+	hw->phy.ops.init_params = e1000_init_phy_params_82575;
+	hw->mbx.ops.init_params = e1000_init_mbx_params_pf;
 }
 
 /**
@@ -1455,16 +1409,15 @@ STATIC s32 e1000_reset_hw_82575(struct e1000_hw *hw)
 }
 
 /**
- *  e1000_init_hw_82575 - Initialize hardware
- *  @hw: pointer to the HW structure
+ * e1000_init_hw_82575 - Initialize hardware
+ * @hw: pointer to the HW structure
  *
- *  This inits the hardware readying it for operation.
+ * This inits the hardware readying it for operation.
  **/
-s32 e1000_init_hw_82575(struct e1000_hw *hw)
+STATIC s32 e1000_init_hw_82575(struct e1000_hw *hw)
 {
 	struct e1000_mac_info *mac = &hw->mac;
 	s32 ret_val;
-	u16 i, rar_count = mac->rar_entry_count;
 
 	DEBUGFUNC("e1000_init_hw_82575");
 
@@ -1479,27 +1432,12 @@ s32 e1000_init_hw_82575(struct e1000_hw *hw)
 	DEBUGOUT("Initializing the IEEE VLAN\n");
 	mac->ops.clear_vfta(hw);
 
-	/* Setup the receive address */
-	e1000_init_rx_addrs_generic(hw, rar_count);
-
-	/* Zero out the Multicast HASH table */
-	DEBUGOUT("Zeroing the MTA\n");
-	for (i = 0; i < mac->mta_reg_count; i++)
-		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
-
-	/* Zero out the Unicast HASH table */
-	DEBUGOUT("Zeroing the UTA\n");
-	for (i = 0; i < mac->uta_reg_count; i++)
-		E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, 0);
-
-	/* Setup link and flow control */
-	ret_val = mac->ops.setup_link(hw);
+	ret_val = e1000_init_hw_base(hw);
 
 	/* Set the default MTU size */
 	hw->dev_spec._82575.mtu = 1500;
 
-	/*
-	 * Clear all of the statistics registers (clear on read).  It is
+	/* Clear all of the statistics registers (clear on read).  It is
 	 * important that we do this after we have tried to establish link
 	 * because the symbol error count will increment wildly if there
 	 * is no link.
@@ -1508,7 +1446,6 @@ s32 e1000_init_hw_82575(struct e1000_hw *hw)
 
 	return ret_val;
 }
-
 /**
  *  e1000_setup_copper_link_82575 - Configure copper link settings
  *  @hw: pointer to the HW structure
@@ -1519,9 +1456,9 @@ s32 e1000_init_hw_82575(struct e1000_hw *hw)
  **/
 STATIC s32 e1000_setup_copper_link_82575(struct e1000_hw *hw)
 {
-	u32 ctrl;
-	s32 ret_val;
 	u32 phpm_reg;
+	s32 ret_val;
+	u32 ctrl;
 
 	DEBUGFUNC("e1000_setup_copper_link_82575");
 
@@ -1588,8 +1525,6 @@ STATIC s32 e1000_setup_copper_link_82575(struct e1000_hw *hw)
 	case e1000_phy_82580:
 		ret_val = e1000_copper_link_setup_82577(hw);
 		break;
-	case e1000_phy_none:
-		break;
 	default:
 		ret_val = -E1000_ERR_PHY;
 		break;
@@ -1951,7 +1886,7 @@ STATIC bool e1000_sgmii_active_82575(struct e1000_hw *hw)
  *  Inits recommended HW defaults after a reset when there is no EEPROM
  *  detected. This is only for the 82575.
  **/
-STATIC s32 e1000_reset_init_script_82575(struct e1000_hw *hw)
+s32 e1000_reset_init_script_82575(struct e1000_hw *hw)
 {
 	DEBUGFUNC("e1000_reset_init_script_82575");
 
@@ -2029,27 +1964,6 @@ STATIC void e1000_config_collision_dist_82575(struct e1000_hw *hw)
 	E1000_WRITE_FLUSH(hw);
 }
 
-/**
- * e1000_power_down_phy_copper_82575 - Remove link during PHY power down
- * @hw: pointer to the HW structure
- *
- * In the case of a PHY power down to save power, or to turn off link during a
- * driver unload, or wake on lan is not enabled, remove the link.
- **/
-STATIC void e1000_power_down_phy_copper_82575(struct e1000_hw *hw)
-{
-	struct e1000_phy_info *phy = &hw->phy;
-
-	if (!(phy->ops.check_reset_block))
-		return;
-
-	/* If the management interface is not enabled, then power down */
-	if (!(e1000_enable_mng_pass_thru(hw) || phy->ops.check_reset_block(hw)))
-		e1000_power_down_phy_copper(hw);
-
-	return;
-}
-
 /**
  *  e1000_clear_hw_cntrs_82575 - Clear device specific hardware counters
  *  @hw: pointer to the HW structure
@@ -2115,85 +2029,6 @@ STATIC void e1000_clear_hw_cntrs_82575(struct e1000_hw *hw)
 		E1000_READ_REG(hw, E1000_SCVPC);
 }
 
-/**
- *  e1000_rx_fifo_flush_82575 - Clean rx fifo after Rx enable
- *  @hw: pointer to the HW structure
- *
- *  After Rx enable, if manageability is enabled then there is likely some
- *  bad data at the start of the fifo and possibly in the DMA fifo.  This
- *  function clears the fifos and flushes any packets that came in as rx was
- *  being enabled.
- **/
-void e1000_rx_fifo_flush_82575(struct e1000_hw *hw)
-{
-	u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled;
-	int i, ms_wait;
-
-	DEBUGFUNC("e1000_rx_fifo_flush_82575");
-
-	/* disable IPv6 options as per hardware errata */
-	rfctl = E1000_READ_REG(hw, E1000_RFCTL);
-	rfctl |= E1000_RFCTL_IPV6_EX_DIS;
-	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
-
-	if (hw->mac.type != e1000_82575 ||
-	    !(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_RCV_TCO_EN))
-		return;
-
-	/* Disable all Rx queues */
-	for (i = 0; i < 4; i++) {
-		rxdctl[i] = E1000_READ_REG(hw, E1000_RXDCTL(i));
-		E1000_WRITE_REG(hw, E1000_RXDCTL(i),
-				rxdctl[i] & ~E1000_RXDCTL_QUEUE_ENABLE);
-	}
-	/* Poll all queues to verify they have shut down */
-	for (ms_wait = 0; ms_wait < 10; ms_wait++) {
-		msec_delay(1);
-		rx_enabled = 0;
-		for (i = 0; i < 4; i++)
-			rx_enabled |= E1000_READ_REG(hw, E1000_RXDCTL(i));
-		if (!(rx_enabled & E1000_RXDCTL_QUEUE_ENABLE))
-			break;
-	}
-
-	if (ms_wait == 10)
-		DEBUGOUT("Queue disable timed out after 10ms\n");
-
-	/* Clear RLPML, RCTL.SBP, RFCTL.LEF, and set RCTL.LPE so that all
-	 * incoming packets are rejected.  Set enable and wait 2ms so that
-	 * any packet that was coming in as RCTL.EN was set is flushed
-	 */
-	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl & ~E1000_RFCTL_LEF);
-
-	rlpml = E1000_READ_REG(hw, E1000_RLPML);
-	E1000_WRITE_REG(hw, E1000_RLPML, 0);
-
-	rctl = E1000_READ_REG(hw, E1000_RCTL);
-	temp_rctl = rctl & ~(E1000_RCTL_EN | E1000_RCTL_SBP);
-	temp_rctl |= E1000_RCTL_LPE;
-
-	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl);
-	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl | E1000_RCTL_EN);
-	E1000_WRITE_FLUSH(hw);
-	msec_delay(2);
-
-	/* Enable Rx queues that were previously enabled and restore our
-	 * previous state
-	 */
-	for (i = 0; i < 4; i++)
-		E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl[i]);
-	E1000_WRITE_REG(hw, E1000_RCTL, rctl);
-	E1000_WRITE_FLUSH(hw);
-
-	E1000_WRITE_REG(hw, E1000_RLPML, rlpml);
-	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
-
-	/* Flush receive errors generated by workaround */
-	E1000_READ_REG(hw, E1000_ROC);
-	E1000_READ_REG(hw, E1000_RNBC);
-	E1000_READ_REG(hw, E1000_MPC);
-}
-
 /**
  *  e1000_set_pcie_completion_timeout - set pci-e completion timeout
  *  @hw: pointer to the HW structure
diff --git a/drivers/net/e1000/base/e1000_82575.h b/drivers/net/e1000/base/e1000_82575.h
index 52dd7a9a1..14887e25f 100644
--- a/drivers/net/e1000/base/e1000_82575.h
+++ b/drivers/net/e1000/base/e1000_82575.h
@@ -25,7 +25,6 @@
 #define E1000_RAR_ENTRIES_I350	32
 #define E1000_SW_SYNCH_MB	0x00000100
 #define E1000_STAT_DEV_RST_SET	0x00100000
-#define E1000_CTRL_DEV_RST	0x20000000
 
 #ifdef E1000_BIT_FIELDS
 struct e1000_adv_data_desc {
@@ -151,46 +150,12 @@ struct e1000_adv_context_desc {
 /* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */
 #define E1000_IMIR_PORT_IM_EN	0x00010000  /* TCP port enable */
 #define E1000_IMIR_PORT_BP	0x00020000  /* TCP port check bypass */
-#define E1000_IMIREXT_SIZE_BP	0x00001000  /* Packet size bypass */
 #define E1000_IMIREXT_CTRL_URG	0x00002000  /* Check URG bit in header */
 #define E1000_IMIREXT_CTRL_ACK	0x00004000  /* Check ACK bit in header */
 #define E1000_IMIREXT_CTRL_PSH	0x00008000  /* Check PSH bit in header */
 #define E1000_IMIREXT_CTRL_RST	0x00010000  /* Check RST bit in header */
 #define E1000_IMIREXT_CTRL_SYN	0x00020000  /* Check SYN bit in header */
 #define E1000_IMIREXT_CTRL_FIN	0x00040000  /* Check FIN bit in header */
-#define E1000_IMIREXT_CTRL_BP	0x00080000  /* Bypass check of ctrl bits */
-
-/* Receive Descriptor - Advanced */
-union e1000_adv_rx_desc {
-	struct {
-		__le64 pkt_addr; /* Packet buffer address */
-		__le64 hdr_addr; /* Header buffer address */
-	} read;
-	struct {
-		struct {
-			union {
-				__le32 data;
-				struct {
-					__le16 pkt_info; /*RSS type, Pkt type*/
-					/* Split Header, header buffer len */
-					__le16 hdr_info;
-				} hs_rss;
-			} lo_dword;
-			union {
-				__le32 rss; /* RSS Hash */
-				struct {
-					__le16 ip_id; /* IP id */
-					__le16 csum; /* Packet Checksum */
-				} csum_ip;
-			} hi_dword;
-		} lower;
-		struct {
-			__le32 status_error; /* ext status/error */
-			__le16 length; /* Packet length */
-			__le16 vlan; /* VLAN tag */
-		} upper;
-	} wb;  /* writeback */
-};
 
 #define E1000_RXDADV_RSSTYPE_MASK	0x0000000F
 #define E1000_RXDADV_RSSTYPE_SHIFT	12
@@ -199,7 +164,6 @@ union e1000_adv_rx_desc {
 #define E1000_RXDADV_SPLITHEADER_EN	0x00001000
 #define E1000_RXDADV_SPH		0x8000
 #define E1000_RXDADV_STAT_TS		0x10000 /* Pkt was time stamped */
-#define E1000_RXDADV_STAT_TSIP		0x08000 /* timestamp in packet */
 #define E1000_RXDADV_ERR_HBO		0x00800000
 
 /* RSS Hash results */
@@ -248,20 +212,6 @@ union e1000_adv_rx_desc {
 #define E1000_RXDADV_IPSEC_ERROR_INVALID_LENGTH		0x10000000
 #define E1000_RXDADV_IPSEC_ERROR_AUTHENTICATION_FAILED	0x18000000
 
-/* Transmit Descriptor - Advanced */
-union e1000_adv_tx_desc {
-	struct {
-		__le64 buffer_addr;    /* Address of descriptor's data buf */
-		__le32 cmd_type_len;
-		__le32 olinfo_status;
-	} read;
-	struct {
-		__le64 rsvd;       /* Reserved */
-		__le32 nxtseq_seed;
-		__le32 status;
-	} wb;
-};
-
 /* Adv Transmit Descriptor Config Masks */
 #define E1000_ADVTXD_DTYP_CTXT	0x00200000 /* Advanced Context Descriptor */
 #define E1000_ADVTXD_DTYP_DATA	0x00300000 /* Advanced Data Descriptor */
@@ -284,33 +234,6 @@ union e1000_adv_tx_desc {
 #define E1000_ADVTXD_POPTS_IPSEC	0x00000400 /* IPSec offload request */
 #define E1000_ADVTXD_PAYLEN_SHIFT	14 /* Adv desc PAYLEN shift */
 
-/* Context descriptors */
-struct e1000_adv_tx_context_desc {
-	__le32 vlan_macip_lens;
-	__le32 seqnum_seed;
-	__le32 type_tucmd_mlhl;
-	__le32 mss_l4len_idx;
-};
-
-#define E1000_ADVTXD_MACLEN_SHIFT	9  /* Adv ctxt desc mac len shift */
-#define E1000_ADVTXD_VLAN_SHIFT		16  /* Adv ctxt vlan tag shift */
-#define E1000_ADVTXD_TUCMD_IPV4		0x00000400  /* IP Packet Type: 1=IPv4 */
-#define E1000_ADVTXD_TUCMD_IPV6		0x00000000  /* IP Packet Type: 0=IPv6 */
-#define E1000_ADVTXD_TUCMD_L4T_UDP	0x00000000  /* L4 Packet TYPE of UDP */
-#define E1000_ADVTXD_TUCMD_L4T_TCP	0x00000800  /* L4 Packet TYPE of TCP */
-#define E1000_ADVTXD_TUCMD_L4T_SCTP	0x00001000  /* L4 Packet TYPE of SCTP */
-#define E1000_ADVTXD_TUCMD_IPSEC_TYPE_ESP	0x00002000 /* IPSec Type ESP */
-/* IPSec Encrypt Enable for ESP */
-#define E1000_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN	0x00004000
-/* Req requires Markers and CRC */
-#define E1000_ADVTXD_TUCMD_MKRREQ	0x00002000
-#define E1000_ADVTXD_L4LEN_SHIFT	8  /* Adv ctxt L4LEN shift */
-#define E1000_ADVTXD_MSS_SHIFT		16  /* Adv ctxt MSS shift */
-/* Adv ctxt IPSec SA IDX mask */
-#define E1000_ADVTXD_IPSEC_SA_INDEX_MASK	0x000000FF
-/* Adv ctxt IPSec ESP len mask */
-#define E1000_ADVTXD_IPSEC_ESP_LEN_MASK		0x000000FF
-
 /* Additional Transmit Descriptor Control definitions */
 #define E1000_TXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Tx Queue */
 #define E1000_TXDCTL_SWFLSH		0x04000000 /* Tx Desc. wbk flushing */
@@ -350,11 +273,6 @@ struct e1000_adv_tx_context_desc {
 #define E1000_IMS_LSECPNS	E1000_ICR_LSECPNS /* PN threshold - server */
 #define E1000_ICS_LSECPNS	E1000_ICR_LSECPNS /* PN threshold - server */
 
-/* ETQF register bit definitions */
-#define E1000_ETQF_FILTER_ENABLE	(1 << 26)
-#define E1000_ETQF_IMM_INT		(1 << 29)
-#define E1000_ETQF_1588			(1 << 30)
-#define E1000_ETQF_QUEUE_ENABLE		(1U << 31)
 /*
  * ETQF filter list: one static filter per filter consumer. This is
  *                   to avoid filter collisions later. Add new filters
@@ -365,10 +283,6 @@ struct e1000_adv_tx_context_desc {
  */
 #define E1000_ETQF_FILTER_EAPOL		0
 
-#define E1000_FTQF_VF_BP		0x00008000
-#define E1000_FTQF_1588_TIME_STAMP	0x08000000
-#define E1000_FTQF_MASK			0xF0000000
-#define E1000_FTQF_MASK_PROTO_BP	0x10000000
 #define E1000_FTQF_MASK_SOURCE_ADDR_BP	0x20000000
 #define E1000_FTQF_MASK_DEST_ADDR_BP	0x40000000
 #define E1000_FTQF_MASK_SOURCE_PORT_BP	0x80000000
@@ -444,13 +358,14 @@ struct e1000_adv_tx_context_desc {
 
 #define ALL_QUEUES		0xFFFF
 
+s32 e1000_reset_init_script_82575(struct e1000_hw *hw);
+s32 e1000_init_nvm_params_82575(struct e1000_hw *hw);
+
 /* Rx packet buffer size defines */
 #define E1000_RXPBS_SIZE_MASK_82576	0x0000007F
 void e1000_vmdq_set_loopback_pf(struct e1000_hw *hw, bool enable);
 void e1000_vmdq_set_anti_spoofing_pf(struct e1000_hw *hw, bool enable, int pf);
 void e1000_vmdq_set_replication_pf(struct e1000_hw *hw, bool enable);
-s32 e1000_init_nvm_params_82575(struct e1000_hw *hw);
-s32  e1000_init_hw_82575(struct e1000_hw *hw);
 
 enum e1000_promisc_type {
 	e1000_promisc_disabled = 0,   /* all promisc modes disabled */
diff --git a/drivers/net/e1000/base/e1000_api.h b/drivers/net/e1000/base/e1000_api.h
index 3054d5b9d..d719b691a 100644
--- a/drivers/net/e1000/base/e1000_api.h
+++ b/drivers/net/e1000/base/e1000_api.h
@@ -15,7 +15,6 @@ extern void e1000_init_function_pointers_82541(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_80003es2lan(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_82575(struct e1000_hw *hw);
-extern void e1000_rx_fifo_flush_82575(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_vf(struct e1000_hw *hw);
 extern void e1000_power_up_fiber_serdes_link(struct e1000_hw *hw);
 extern void e1000_shutdown_fiber_serdes_link(struct e1000_hw *hw);
diff --git a/drivers/net/e1000/base/e1000_base.c b/drivers/net/e1000/base/e1000_base.c
new file mode 100644
index 000000000..ab73e1e59
--- /dev/null
+++ b/drivers/net/e1000/base/e1000_base.c
@@ -0,0 +1,190 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2020 Intel Corporation
+ */
+
+#include "e1000_hw.h"
+#include "e1000_82575.h"
+#include "e1000_mac.h"
+#include "e1000_base.h"
+#include "e1000_manage.h"
+
+/**
+ *  e1000_acquire_phy_base - Acquire rights to access PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  Acquire access rights to the correct PHY.
+ **/
+s32 e1000_acquire_phy_base(struct e1000_hw *hw)
+{
+	u16 mask = E1000_SWFW_PHY0_SM;
+
+	DEBUGFUNC("e1000_acquire_phy_base");
+
+	if (hw->bus.func == E1000_FUNC_1)
+		mask = E1000_SWFW_PHY1_SM;
+	else if (hw->bus.func == E1000_FUNC_2)
+		mask = E1000_SWFW_PHY2_SM;
+	else if (hw->bus.func == E1000_FUNC_3)
+		mask = E1000_SWFW_PHY3_SM;
+
+	return hw->mac.ops.acquire_swfw_sync(hw, mask);
+}
+
+/**
+ *  e1000_release_phy_base - Release rights to access PHY
+ *  @hw: pointer to the HW structure
+ *
+ *  A wrapper to release access rights to the correct PHY.
+ **/
+void e1000_release_phy_base(struct e1000_hw *hw)
+{
+	u16 mask = E1000_SWFW_PHY0_SM;
+
+	DEBUGFUNC("e1000_release_phy_base");
+
+	if (hw->bus.func == E1000_FUNC_1)
+		mask = E1000_SWFW_PHY1_SM;
+	else if (hw->bus.func == E1000_FUNC_2)
+		mask = E1000_SWFW_PHY2_SM;
+	else if (hw->bus.func == E1000_FUNC_3)
+		mask = E1000_SWFW_PHY3_SM;
+
+	hw->mac.ops.release_swfw_sync(hw, mask);
+}
+
+/**
+ *  e1000_init_hw_base - Initialize hardware
+ *  @hw: pointer to the HW structure
+ *
+ *  This inits the hardware readying it for operation.
+ **/
+s32 e1000_init_hw_base(struct e1000_hw *hw)
+{
+	struct e1000_mac_info *mac = &hw->mac;
+	s32 ret_val;
+	u16 i, rar_count = mac->rar_entry_count;
+
+	DEBUGFUNC("e1000_init_hw_base");
+
+	/* Setup the receive address */
+	e1000_init_rx_addrs_generic(hw, rar_count);
+
+	/* Zero out the Multicast HASH table */
+	DEBUGOUT("Zeroing the MTA\n");
+	for (i = 0; i < mac->mta_reg_count; i++)
+		E1000_WRITE_REG_ARRAY(hw, E1000_MTA, i, 0);
+
+	/* Zero out the Unicast HASH table */
+	DEBUGOUT("Zeroing the UTA\n");
+	for (i = 0; i < mac->uta_reg_count; i++)
+		E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, 0);
+
+	/* Setup link and flow control */
+	ret_val = mac->ops.setup_link(hw);
+
+	/* Clear all of the statistics registers (clear on read).  It is
+	 * important that we do this after we have tried to establish link
+	 * because the symbol error count will increment wildly if there
+	 * is no link.
+	 */
+	e1000_clear_hw_cntrs_base_generic(hw);
+
+	return ret_val;
+}
+
+/**
+ * e1000_power_down_phy_copper_base - Remove link during PHY power down
+ * @hw: pointer to the HW structure
+ *
+ * In the case of a PHY power down to save power, or to turn off link during a
+ * driver unload, or wake on lan is not enabled, remove the link.
+ **/
+void e1000_power_down_phy_copper_base(struct e1000_hw *hw)
+{
+	struct e1000_phy_info *phy = &hw->phy;
+
+	if (!(phy->ops.check_reset_block))
+		return;
+
+	/* If the management interface is not enabled, then power down */
+	if (phy->ops.check_reset_block(hw))
+		e1000_power_down_phy_copper(hw);
+}
+
+/**
+ *  e1000_rx_fifo_flush_base - Clean Rx FIFO after Rx enable
+ *  @hw: pointer to the HW structure
+ *
+ *  After Rx enable, if manageability is enabled then there is likely some
+ *  bad data at the start of the FIFO and possibly in the DMA FIFO.  This
+ *  function clears the FIFOs and flushes any packets that came in as Rx was
+ *  being enabled.
+ **/
+void e1000_rx_fifo_flush_base(struct e1000_hw *hw)
+{
+	u32 rctl, rlpml, rxdctl[4], rfctl, temp_rctl, rx_enabled;
+	int i, ms_wait;
+
+	DEBUGFUNC("e1000_rx_fifo_flush_base");
+
+	/* disable IPv6 options as per hardware errata */
+	rfctl = E1000_READ_REG(hw, E1000_RFCTL);
+	rfctl |= E1000_RFCTL_IPV6_EX_DIS;
+	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
+
+	if (!(E1000_READ_REG(hw, E1000_MANC) & E1000_MANC_RCV_TCO_EN))
+		return;
+
+	/* Disable all Rx queues */
+	for (i = 0; i < 4; i++) {
+		rxdctl[i] = E1000_READ_REG(hw, E1000_RXDCTL(i));
+		E1000_WRITE_REG(hw, E1000_RXDCTL(i),
+				rxdctl[i] & ~E1000_RXDCTL_QUEUE_ENABLE);
+	}
+	/* Poll all queues to verify they have shut down */
+	for (ms_wait = 0; ms_wait < 10; ms_wait++) {
+		msec_delay(1);
+		rx_enabled = 0;
+		for (i = 0; i < 4; i++)
+			rx_enabled |= E1000_READ_REG(hw, E1000_RXDCTL(i));
+		if (!(rx_enabled & E1000_RXDCTL_QUEUE_ENABLE))
+			break;
+	}
+
+	if (ms_wait == 10)
+		DEBUGOUT("Queue disable timed out after 10ms\n");
+
+	/* Clear RLPML, RCTL.SBP, RFCTL.LEF, and set RCTL.LPE so that all
+	 * incoming packets are rejected.  Set enable and wait 2ms so that
+	 * any packet that was coming in as RCTL.EN was set is flushed
+	 */
+	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl & ~E1000_RFCTL_LEF);
+
+	rlpml = E1000_READ_REG(hw, E1000_RLPML);
+	E1000_WRITE_REG(hw, E1000_RLPML, 0);
+
+	rctl = E1000_READ_REG(hw, E1000_RCTL);
+	temp_rctl = rctl & ~(E1000_RCTL_EN | E1000_RCTL_SBP);
+	temp_rctl |= E1000_RCTL_LPE;
+
+	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl);
+	E1000_WRITE_REG(hw, E1000_RCTL, temp_rctl | E1000_RCTL_EN);
+	E1000_WRITE_FLUSH(hw);
+	msec_delay(2);
+
+	/* Enable Rx queues that were previously enabled and restore our
+	 * previous state
+	 */
+	for (i = 0; i < 4; i++)
+		E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl[i]);
+	E1000_WRITE_REG(hw, E1000_RCTL, rctl);
+	E1000_WRITE_FLUSH(hw);
+
+	E1000_WRITE_REG(hw, E1000_RLPML, rlpml);
+	E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
+
+	/* Flush receive errors generated by workaround */
+	E1000_READ_REG(hw, E1000_ROC);
+	E1000_READ_REG(hw, E1000_RNBC);
+	E1000_READ_REG(hw, E1000_MPC);
+}
diff --git a/drivers/net/e1000/base/e1000_base.h b/drivers/net/e1000/base/e1000_base.h
new file mode 100644
index 000000000..0d6172b6d
--- /dev/null
+++ b/drivers/net/e1000/base/e1000_base.h
@@ -0,0 +1,127 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2001-2020 Intel Corporation
+ */
+
+#ifndef _E1000_BASE_H_
+#define _E1000_BASE_H_
+
+/* forward declaration */
+s32 e1000_init_hw_base(struct e1000_hw *hw);
+void e1000_power_down_phy_copper_base(struct e1000_hw *hw);
+extern void e1000_rx_fifo_flush_base(struct e1000_hw *hw);
+s32 e1000_acquire_phy_base(struct e1000_hw *hw);
+void e1000_release_phy_base(struct e1000_hw *hw);
+
+/* Transmit Descriptor - Advanced */
+union e1000_adv_tx_desc {
+	struct {
+		__le64 buffer_addr;    /* Address of descriptor's data buf */
+		__le32 cmd_type_len;
+		__le32 olinfo_status;
+	} read;
+	struct {
+		__le64 rsvd;       /* Reserved */
+		__le32 nxtseq_seed;
+		__le32 status;
+	} wb;
+};
+
+/* Context descriptors */
+struct e1000_adv_tx_context_desc {
+	__le32 vlan_macip_lens;
+	union {
+		__le32 launch_time;
+		__le32 seqnum_seed;
+	} u;
+	__le32 type_tucmd_mlhl;
+	__le32 mss_l4len_idx;
+};
+
+/* Adv Transmit Descriptor Config Masks */
+#define E1000_ADVTXD_DTYP_CTXT	0x00200000 /* Advanced Context Descriptor */
+#define E1000_ADVTXD_DTYP_DATA	0x00300000 /* Advanced Data Descriptor */
+#define E1000_ADVTXD_DCMD_EOP	0x01000000 /* End of Packet */
+#define E1000_ADVTXD_DCMD_IFCS	0x02000000 /* Insert FCS (Ethernet CRC) */
+#define E1000_ADVTXD_DCMD_RS	0x08000000 /* Report Status */
+#define E1000_ADVTXD_DCMD_DDTYP_ISCSI	0x10000000 /* DDP hdr type or iSCSI */
+#define E1000_ADVTXD_DCMD_DEXT	0x20000000 /* Descriptor extension (1=Adv) */
+#define E1000_ADVTXD_DCMD_VLE	0x40000000 /* VLAN pkt enable */
+#define E1000_ADVTXD_DCMD_TSE	0x80000000 /* TCP Seg enable */
+#define E1000_ADVTXD_MAC_LINKSEC	0x00040000 /* Apply LinkSec on pkt */
+#define E1000_ADVTXD_MAC_TSTAMP		0x00080000 /* IEEE1588 Timestamp pkt */
+#define E1000_ADVTXD_STAT_SN_CRC	0x00000002 /* NXTSEQ/SEED prsnt in WB */
+#define E1000_ADVTXD_IDX_SHIFT		4  /* Adv desc Index shift */
+#define E1000_ADVTXD_POPTS_ISCO_1ST	0x00000000 /* 1st TSO of iSCSI PDU */
+#define E1000_ADVTXD_POPTS_ISCO_MDL	0x00000800 /* Middle TSO of iSCSI PDU */
+#define E1000_ADVTXD_POPTS_ISCO_LAST	0x00001000 /* Last TSO of iSCSI PDU */
+/* 1st & Last TSO-full iSCSI PDU*/
+#define E1000_ADVTXD_POPTS_ISCO_FULL	0x00001800
+#define E1000_ADVTXD_POPTS_IPSEC	0x00000400 /* IPSec offload request */
+#define E1000_ADVTXD_PAYLEN_SHIFT	14 /* Adv desc PAYLEN shift */
+
+/* Advanced Transmit Context Descriptor Config */
+#define E1000_ADVTXD_MACLEN_SHIFT	9  /* Adv ctxt desc mac len shift */
+#define E1000_ADVTXD_VLAN_SHIFT		16  /* Adv ctxt vlan tag shift */
+#define E1000_ADVTXD_TUCMD_IPV4		0x00000400  /* IP Packet Type: 1=IPv4 */
+#define E1000_ADVTXD_TUCMD_IPV6		0x00000000  /* IP Packet Type: 0=IPv6 */
+#define E1000_ADVTXD_TUCMD_L4T_UDP	0x00000000  /* L4 Packet TYPE of UDP */
+#define E1000_ADVTXD_TUCMD_L4T_TCP	0x00000800  /* L4 Packet TYPE of TCP */
+#define E1000_ADVTXD_TUCMD_L4T_SCTP	0x00001000  /* L4 Packet TYPE of SCTP */
+#define E1000_ADVTXD_TUCMD_IPSEC_TYPE_ESP	0x00002000 /* IPSec Type ESP */
+/* IPSec Encrypt Enable for ESP */
+#define E1000_ADVTXD_TUCMD_IPSEC_ENCRYPT_EN	0x00004000
+/* Req requires Markers and CRC */
+#define E1000_ADVTXD_TUCMD_MKRREQ	0x00002000
+#define E1000_ADVTXD_L4LEN_SHIFT	8  /* Adv ctxt L4LEN shift */
+#define E1000_ADVTXD_MSS_SHIFT		16  /* Adv ctxt MSS shift */
+/* Adv ctxt IPSec SA IDX mask */
+#define E1000_ADVTXD_IPSEC_SA_INDEX_MASK	0x000000FF
+/* Adv ctxt IPSec ESP len mask */
+#define E1000_ADVTXD_IPSEC_ESP_LEN_MASK		0x000000FF
+
+#define E1000_RAR_ENTRIES_BASE		16
+
+/* Receive Descriptor - Advanced */
+union e1000_adv_rx_desc {
+	struct {
+		__le64 pkt_addr; /* Packet buffer address */
+		__le64 hdr_addr; /* Header buffer address */
+	} read;
+	struct {
+		struct {
+			union {
+				__le32 data;
+				struct {
+					__le16 pkt_info; /*RSS type, Pkt type*/
+					/* Split Header, header buffer len */
+					__le16 hdr_info;
+				} hs_rss;
+			} lo_dword;
+			union {
+				__le32 rss; /* RSS Hash */
+				struct {
+					__le16 ip_id; /* IP id */
+					__le16 csum; /* Packet Checksum */
+				} csum_ip;
+			} hi_dword;
+		} lower;
+		struct {
+			__le32 status_error; /* ext status/error */
+			__le16 length; /* Packet length */
+			__le16 vlan; /* VLAN tag */
+		} upper;
+	} wb;  /* writeback */
+};
+
+/* Additional Transmit Descriptor Control definitions */
+#define E1000_TXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Tx Queue */
+
+/* Additional Receive Descriptor Control definitions */
+#define E1000_RXDCTL_QUEUE_ENABLE	0x02000000 /* Ena specific Rx Queue */
+
+/* SRRCTL bit definitions */
+#define E1000_SRRCTL_BSIZEPKT_SHIFT		10 /* Shift _right_ */
+#define E1000_SRRCTL_BSIZEHDRSIZE_SHIFT		2  /* Shift _left_ */
+#define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF	0x02000000
+
+#endif /* _E1000_BASE_H_ */
diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 8831da7ca..06759cc3b 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -251,6 +251,7 @@
 #define E1000_CTRL_SWDPIO0	0x00400000 /* SWDPIN 0 Input or output */
 #define E1000_CTRL_SWDPIO2	0x01000000 /* SWDPIN 2 input or output */
 #define E1000_CTRL_SWDPIO3	0x02000000 /* SWDPIN 3 input or output */
+#define E1000_CTRL_DEV_RST	0x20000000 /* Device reset */
 #define E1000_CTRL_RST		0x04000000 /* Global reset */
 #define E1000_CTRL_RFCE		0x08000000 /* Receive Flow Control enable */
 #define E1000_CTRL_TFCE		0x10000000 /* Transmit flow control enable */
@@ -414,8 +415,8 @@
 #define E1000_RFCTL_LEF			0x00040000
 
 /* Collision related configuration parameters */
-#define E1000_COLLISION_THRESHOLD	15
 #define E1000_CT_SHIFT			4
+#define E1000_COLLISION_THRESHOLD	15
 #define E1000_COLLISION_DISTANCE	63
 #define E1000_COLD_SHIFT		12
 
@@ -770,6 +771,17 @@
 #define E1000_TIMINCA_INCPERIOD_SHIFT	24
 #define E1000_TIMINCA_INCVALUE_MASK	0x00FFFFFF
 
+/* ETQF register bit definitions */
+#define E1000_ETQF_1588			(1 << 30)
+#define E1000_FTQF_VF_BP		0x00008000
+#define E1000_FTQF_1588_TIME_STAMP	0x08000000
+#define E1000_FTQF_MASK			0xF0000000
+#define E1000_FTQF_MASK_PROTO_BP	0x10000000
+/* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */
+#define E1000_IMIREXT_CTRL_BP	0x00080000  /* Bypass check of ctrl bits */
+#define E1000_IMIREXT_SIZE_BP	0x00001000  /* Packet size bypass */
+
+#define E1000_RXDADV_STAT_TSIP		0x08000 /* timestamp in packet */
 #define E1000_TSICR_TXTS		0x00000002
 #define E1000_TSIM_TXTS			0x00000002
 /* TUPLE Filtering Configuration */
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 933a9204c..688174200 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -1012,6 +1012,7 @@ struct e1000_hw {
 #include "e1000_ich8lan.h"
 #include "e1000_82575.h"
 #include "e1000_i210.h"
+#include "e1000_base.h"
 
 /* These functions must be implemented by drivers */
 void e1000_pci_clear_mwi(struct e1000_hw *hw);
diff --git a/drivers/net/e1000/base/e1000_i210.c b/drivers/net/e1000/base/e1000_i210.c
index a6d8e3b34..553803261 100644
--- a/drivers/net/e1000/base/e1000_i210.c
+++ b/drivers/net/e1000/base/e1000_i210.c
@@ -934,6 +934,6 @@ s32 e1000_init_hw_i210(struct e1000_hw *hw)
 			return ret_val;
 	}
 	hw->phy.ops.get_cfg_done = e1000_get_cfg_done_i210;
-	ret_val = e1000_init_hw_82575(hw);
+	ret_val = e1000_init_hw_base(hw);
 	return ret_val;
 }
diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index b072c5c1d..9edd3c528 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -138,7 +138,8 @@
 #define E1000_RADV	0x0282C  /* Rx Interrupt Absolute Delay Timer - RW */
 #define E1000_EMIADD	0x10     /* Extended Memory Indirect Address */
 #define E1000_EMIDATA	0x11     /* Extended Memory Indirect Data */
-#define E1000_SRWR		0x12018  /* Shadow Ram Write Register - RW */
+/* Shadow Ram Write Register - RW */
+#define E1000_SRWR		0x12018
 #define E1000_I210_FLMNGCTL	0x12038
 #define E1000_I210_FLMNGDATA	0x1203C
 #define E1000_I210_FLMNGCNT	0x12040
@@ -283,6 +284,7 @@
 #define E1000_TIDV	0x03820  /* Tx Interrupt Delay Value - RW */
 #define E1000_TADV	0x0382C  /* Tx Interrupt Absolute Delay Val - RW */
 #define E1000_TSPMT	0x03830  /* TCP Segmentation PAD & Min Threshold - RW */
+/* Statistics Register Descriptions */
 #define E1000_CRCERRS	0x04000  /* CRC Error Count - R/clr */
 #define E1000_ALGNERRC	0x04004  /* Alignment Error Count - R/clr */
 #define E1000_SYMERRS	0x04008  /* Symbol Error Count - R/clr */
@@ -484,17 +486,20 @@
 #define E1000_MANC2H		0x05860 /* Management Control To Host - RW */
 /* Management Decision Filters */
 #define E1000_MDEF(_n)		(0x05890 + (4 * (_n)))
+/* Semaphore registers */
 #define E1000_SW_FW_SYNC	0x05B5C /* SW-FW Synchronization - RW */
 #define E1000_CCMCTL	0x05B48 /* CCM Control Register */
 #define E1000_GIOCTL	0x05B44 /* GIO Analog Control Register */
 #define E1000_SCCTL	0x05B4C /* PCIc PLL Configuration Register */
+/* PCIe Register Description */
 #define E1000_GCR	0x05B00 /* PCI-Ex Control */
 #define E1000_GCR2	0x05B64 /* PCI-Ex Control #2 */
 #define E1000_GSCL_1	0x05B10 /* PCI-Ex Statistic Control #1 */
 #define E1000_GSCL_2	0x05B14 /* PCI-Ex Statistic Control #2 */
 #define E1000_GSCL_3	0x05B18 /* PCI-Ex Statistic Control #3 */
 #define E1000_GSCL_4	0x05B1C /* PCI-Ex Statistic Control #4 */
-#define E1000_FACTPS	0x05B30 /* Function Active and Power State to MNG */
+/* Function Active and Power State to MNG */
+#define E1000_FACTPS	0x05B30
 #define E1000_SWSM	0x05B50 /* SW Semaphore */
 #define E1000_FWSM	0x05B54 /* FW Semaphore */
 /* Driver-only SW semaphore (not used by BOOT agents) */
@@ -513,8 +518,10 @@
 #define E1000_IMIREXT(_i)	(0x05AA0 + ((_i) * 4)) /* Immediate INTR Ext*/
 #define E1000_IMIRVP		0x05AC0 /* Immediate INT Rx VLAN Priority -RW */
 #define E1000_MSIXBM(_i)	(0x01600 + ((_i) * 4)) /* MSI-X Alloc Reg -RW */
-#define E1000_RETA(_i)	(0x05C00 + ((_i) * 4)) /* Redirection Table - RW */
-#define E1000_RSSRK(_i)	(0x05C80 + ((_i) * 4)) /* RSS Random Key - RW */
+/* Redirection Table - RW Array */
+#define E1000_RETA(_i)	(0x05C00 + ((_i) * 4))
+/* RSS Random Key - RW Array */
+#define E1000_RSSRK(_i)	(0x05C80 + ((_i) * 4))
 #define E1000_RSSIM	0x05864 /* RSS Interrupt Mask */
 #define E1000_RSSIR	0x05868 /* RSS Interrupt Request */
 /* VT Registers */
@@ -584,6 +591,14 @@
 #define E1000_SYNQF(_n)	(0x055FC + (4 * (_n))) /* SYN Packet Queue Fltr */
 #define E1000_ETQF(_n)	(0x05CB0 + (4 * (_n))) /* EType Queue Fltr */
 
+/* ETQF register bit definitions */
+#define E1000_ETQF_FILTER_ENABLE	(1 << 26)
+#define E1000_ETQF_IMM_INT		(1 << 29)
+#define E1000_ETQF_QUEUE_ENABLE		(1 << 31)
+#define E1000_ETQF_QUEUE_SHIFT		16
+#define E1000_ETQF_QUEUE_MASK		0x00070000
+#define E1000_ETQF_ETYPE_MASK		0x0000FFFF
+
 #define E1000_RTTDCS	0x3600 /* Reedtown Tx Desc plane control and status */
 #define E1000_RTTPCS	0x3474 /* Reedtown Tx Packet Plane control and status */
 #define E1000_RTRPCS	0x2474 /* Rx packet plane control and status */
diff --git a/drivers/net/e1000/base/meson.build b/drivers/net/e1000/base/meson.build
index 5e1716def..d13f693d3 100644
--- a/drivers/net/e1000/base/meson.build
+++ b/drivers/net/e1000/base/meson.build
@@ -2,6 +2,7 @@
 # Copyright(c) 2017 Intel Corporation
 
 sources = [
+	'e1000_base.c',
 	'e1000_80003es2lan.c',
 	'e1000_82540.c',
 	'e1000_82541.c',
diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c
index 684fa4ad8..688320284 100644
--- a/drivers/net/e1000/igb_rxtx.c
+++ b/drivers/net/e1000/igb_rxtx.c
@@ -320,7 +320,7 @@ igbe_set_xmit_ctx(struct igb_tx_queue* txq,
 	vlan_macip_lens = (uint32_t)tx_offload.data;
 	ctx_txd->vlan_macip_lens = rte_cpu_to_le_32(vlan_macip_lens);
 	ctx_txd->mss_l4len_idx = rte_cpu_to_le_32(mss_l4len_idx);
-	ctx_txd->seqnum_seed = 0;
+	ctx_txd->u.seqnum_seed = 0;
 }
 
 /*
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 11/27] net/e1000/base: expose MAC functions
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (9 preceding siblings ...)
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 10/27] net/e1000/base: remove duplicated codes Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 12/27] net/e1000/base: add define to PCIm function state Guinan Sun
                     ` (16 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:12 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher

Now the functions are being accessed outside of the file, we need
to properly expose them for silicon families to use.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_mac.c | 3 +--
 drivers/net/e1000/base/e1000_mac.h | 1 +
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_mac.c b/drivers/net/e1000/base/e1000_mac.c
index 48384b284..1a2abd9a2 100644
--- a/drivers/net/e1000/base/e1000_mac.c
+++ b/drivers/net/e1000/base/e1000_mac.c
@@ -7,7 +7,6 @@
 STATIC s32 e1000_validate_mdi_setting_generic(struct e1000_hw *hw);
 STATIC void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
 STATIC void e1000_config_collision_dist_generic(struct e1000_hw *hw);
-STATIC int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);
 
 /**
  *  e1000_init_mac_ops_generic - Initialize MAC function pointers
@@ -448,7 +447,7 @@ s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw)
  *  Sets the receive address array register at index to the address passed
  *  in by addr.
  **/
-STATIC int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)
+int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index)
 {
 	u32 rar_low, rar_high;
 
diff --git a/drivers/net/e1000/base/e1000_mac.h b/drivers/net/e1000/base/e1000_mac.h
index bbd2a7388..35a691f63 100644
--- a/drivers/net/e1000/base/e1000_mac.h
+++ b/drivers/net/e1000/base/e1000_mac.h
@@ -41,6 +41,7 @@ s32  e1000_led_on_generic(struct e1000_hw *hw);
 s32  e1000_led_off_generic(struct e1000_hw *hw);
 void e1000_update_mc_addr_list_generic(struct e1000_hw *hw,
 				       u8 *mc_addr_list, u32 mc_addr_count);
+int e1000_rar_set_generic(struct e1000_hw *hw, u8 *addr, u32 index);
 s32  e1000_set_default_fc_generic(struct e1000_hw *hw);
 s32  e1000_set_fc_watermarks_generic(struct e1000_hw *hw);
 s32  e1000_setup_fiber_serdes_link_generic(struct e1000_hw *hw);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 12/27] net/e1000/base: add define to PCIm function state
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (10 preceding siblings ...)
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 11/27] net/e1000/base: expose MAC functions Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 13/27] net/e1000/base: add missing register defines Guinan Sun
                     ` (15 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:12 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Lifshits Vitaly

Added define to pcim function state.

Signed-off-by: Lifshits Vitaly <vitaly.lifshits@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_defines.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/e1000/base/e1000_defines.h b/drivers/net/e1000/base/e1000_defines.h
index 06759cc3b..41a2b5c3f 100644
--- a/drivers/net/e1000/base/e1000_defines.h
+++ b/drivers/net/e1000/base/e1000_defines.h
@@ -316,6 +316,7 @@
 #define E1000_STATUS_PCIX_SPEED_66	0x00000000 /* PCI-X bus spd 50-66MHz */
 #define E1000_STATUS_PCIX_SPEED_100	0x00004000 /* PCI-X bus spd 66-100MHz */
 #define E1000_STATUS_PCIX_SPEED_133	0x00008000 /* PCI-X bus spd 100-133MHz*/
+#define E1000_STATUS_PCIM_STATE		0x40000000 /* PCIm function state */
 
 #define SPEED_10	10
 #define SPEED_100	100
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 13/27] net/e1000/base: add missing register defines
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (11 preceding siblings ...)
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 12/27] net/e1000/base: add define to PCIm function state Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 14/27] net/e1000/base: increased timeout for ME ULP exit Guinan Sun
                     ` (14 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:12 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeff Kirsher

Added defines for the EEC, SHADOWINF and FLFWUPDATE registers needed for
the nvmupd_validate_offset function to correctly validate the NVM update
offset.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_regs.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 9edd3c528..4af9e1746 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -140,6 +140,8 @@
 #define E1000_EMIDATA	0x11     /* Extended Memory Indirect Data */
 /* Shadow Ram Write Register - RW */
 #define E1000_SRWR		0x12018
+#define E1000_EEC_REG		0x12010
+
 #define E1000_I210_FLMNGCTL	0x12038
 #define E1000_I210_FLMNGDATA	0x1203C
 #define E1000_I210_FLMNGCNT	0x12040
@@ -150,6 +152,9 @@
 
 #define E1000_I210_FLA		0x1201C
 
+#define E1000_SHADOWINF		0x12068
+#define E1000_FLFWUPDATE	0x12108
+
 #define E1000_INVM_DATA_REG(_n)	(0x12120 + 4*(_n))
 #define E1000_INVM_SIZE		64 /* Number of INVM Data Registers */
 
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 14/27] net/e1000/base: increased timeout for ME ULP exit
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (12 preceding siblings ...)
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 13/27] net/e1000/base: add missing register defines Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 15/27] net/e1000/base: add missing device ID Guinan Sun
                     ` (13 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:12 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Efrati Nir

Due timing issues in WHL and since recovery by host is
not always supported, increased timeout for Manageability Engine(ME)
to finish Ultra Low Power(ULP) exit flow for Nahum before timer expiration.

Signed-off-by: Efrati Nir <nir.efrati@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index 1dc29553e..b79e3bad8 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -1268,6 +1268,7 @@ s32 e1000_enable_ulp_lpt_lp(struct e1000_hw *hw, bool to_sx)
 s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
 {
 	s32 ret_val = E1000_SUCCESS;
+	u8 ulp_exit_timeout = 30;
 	u32 mac_reg;
 	u16 phy_reg;
 	int i = 0;
@@ -1289,10 +1290,12 @@ s32 e1000_disable_ulp_lpt_lp(struct e1000_hw *hw, bool force)
 			E1000_WRITE_REG(hw, E1000_H2ME, mac_reg);
 		}
 
-		/* Poll up to 300msec for ME to clear ULP_CFG_DONE. */
+		if (hw->mac.type == e1000_pch_cnp)
+			ulp_exit_timeout = 100;
+
 		while (E1000_READ_REG(hw, E1000_FWSM) &
 		       E1000_FWSM_ULP_CFG_DONE) {
-			if (i++ == 30) {
+			if (i++ == ulp_exit_timeout) {
 				ret_val = -E1000_ERR_PHY;
 				goto out;
 			}
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 15/27] net/e1000/base: add missing device ID
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (13 preceding siblings ...)
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 14/27] net/e1000/base: increased timeout for ME ULP exit Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 16/27] net/e1000/base: expose more future extended NVM Guinan Sun
                     ` (12 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:12 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Kamil Bednarczyk

Adding Intel(R) I210 Gigabit Network Connection 15F6 device ID for SGMII
flashless automotive device.

Signed-off-by: Kamil Bednarczyk <Kamil.Bednarczyk@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_api.c | 1 +
 drivers/net/e1000/base/e1000_hw.h  | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index a93e8ff03..a9a4493ac 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -326,6 +326,7 @@ s32 e1000_set_mac_type(struct e1000_hw *hw)
 		break;
 	case E1000_DEV_ID_I210_COPPER_FLASHLESS:
 	case E1000_DEV_ID_I210_SERDES_FLASHLESS:
+	case E1000_DEV_ID_I210_SGMII_FLASHLESS:
 	case E1000_DEV_ID_I210_COPPER:
 	case E1000_DEV_ID_I210_COPPER_OEM1:
 	case E1000_DEV_ID_I210_COPPER_IT:
diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h
index 688174200..b71cb4d4d 100644
--- a/drivers/net/e1000/base/e1000_hw.h
+++ b/drivers/net/e1000/base/e1000_hw.h
@@ -158,6 +158,7 @@ struct e1000_hw;
 #define E1000_DEV_ID_I210_SGMII			0x1538
 #define E1000_DEV_ID_I210_COPPER_FLASHLESS	0x157B
 #define E1000_DEV_ID_I210_SERDES_FLASHLESS	0x157C
+#define E1000_DEV_ID_I210_SGMII_FLASHLESS	0x15F6
 #define E1000_DEV_ID_I211_COPPER		0x1539
 #define E1000_DEV_ID_I354_BACKPLANE_1GBPS	0x1F40
 #define E1000_DEV_ID_I354_SGMII			0x1F41
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 16/27] net/e1000/base: expose more future extended NVM
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (14 preceding siblings ...)
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 15/27] net/e1000/base: add missing device ID Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 17/27] net/e1000/base: remove useless statement Guinan Sun
                     ` (11 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:12 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Sasha Neftin

Future extended NVM 5 (five) required for a Dynamic Power Gating
control in the MAC.

Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_regs.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/e1000/base/e1000_regs.h b/drivers/net/e1000/base/e1000_regs.h
index 4af9e1746..71c8d28b0 100644
--- a/drivers/net/e1000/base/e1000_regs.h
+++ b/drivers/net/e1000/base/e1000_regs.h
@@ -35,6 +35,7 @@
 #define E1000_FEXTNVM	0x00028  /* Future Extended NVM - RW */
 #define E1000_FEXTNVM3	0x0003C  /* Future Extended NVM 3 - RW */
 #define E1000_FEXTNVM4	0x00024  /* Future Extended NVM 4 - RW */
+#define E1000_FEXTNVM5	0x00014  /* Future Extended NVM 5 - RW */
 #define E1000_FEXTNVM6	0x00010  /* Future Extended NVM 6 - RW */
 #define E1000_FEXTNVM7	0x000E4  /* Future Extended NVM 7 - RW */
 #define E1000_FEXTNVM9	0x5BB4  /* Future Extended NVM 9 - RW */
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 17/27] net/e1000/base: remove useless statement
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (15 preceding siblings ...)
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 16/27] net/e1000/base: expose more future extended NVM Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 18/27] net/e1000/base: add missed define for VFTA Guinan Sun
                     ` (10 subsequent siblings)
  27 siblings, 0 replies; 149+ messages in thread
From: Guinan Sun @ 2020-07-06  8:12 UTC (permalink / raw)
  To: dev; +Cc: Jeff Guo, Zhao1 Wei, Guinan Sun, Jeb Cramer

As it stands now, this fix will not change the current functionality
of the code. In addition, we remove the comment that seemed to be
a copy/paste from a separate implementation.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
---
 drivers/net/e1000/base/e1000_ich8lan.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c
index b79e3bad8..9b9cc7d90 100644
--- a/drivers/net/e1000/base/e1000_ich8lan.c
+++ b/drivers/net/e1000/base/e1000_ich8lan.c
@@ -4113,13 +4113,6 @@ STATIC s32 e1000_update_nvm_checksum_spt(struct e1000_hw *hw)
 	if (ret_val)
 		goto release;
 
-	/* And invalidate the previously valid segment by setting
-	 * its signature word (0x13) high_byte to 0b. This can be
-	 * done without an erase because flash erase sets all bits
-	 * to 1's. We can write 1's to 0's without an erase
-	 */
-	act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1;
-
 	/* offset in words but we read dword*/
 	act_offset = old_bank_offset + E1000_ICH_NVM_SIG_WORD - 1;
 	ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword);
-- 
2.17.1


^ permalink raw reply	[flat|nested] 149+ messages in thread

* [dpdk-dev] [PATCH v3 18/27] net/e1000/base: add missed define for VFTA
  2020-07-06  8:11 ` [dpdk-dev] [PATCH v3 00/27] " Guinan Sun
                     ` (16 preceding siblings ...)
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 17/27] net/e1000/base: remove useless statement Guinan Sun
@ 2020-07-06  8:12   ` Guinan Sun
  2020-07-06  8:12   ` [dpdk-dev] [PATCH v3 19/27] net/e1000/base: modify flow control setup Guinan Sun
                     ` (9 subsequent siblings)